diff --git a/README.md b/README.md
index c07e144..6ee1eac 100644
--- a/README.md
+++ b/README.md
@@ -34,7 +34,8 @@ License: MIT
 ### Yosys
 Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.
 
-Homepage: http://www.clifford.at/yosys/
+Homepage: https://yosyshq.net/yosys/
+Github repository: https://github.com/YosysHQ/yosys
 
 License: ISC