by Michael Holachek and Nalini Singh
Note: HeartAware is not being actively maintained. Feel free to open issues with general questions, but we are no longer updating the code to support external projects.
HeartAware is a pulse oximetry system with a user-friendly interface for the Nexys 4 DDR FPGA board. The system will process the input pulse oximeter signal to identify peaks in the signal and calculate the patient’s heart rate using this data. Then, the processed oxygen saturation waveform and calculated heart rate will be displayed on a monitor. Additionally, the user’s calculated heart rate will be periodically announced through a recorded voice played through the audio output. Disclaimer: this device is not intended for medical use.
- Nexys 4 DDR board with USB cable
- 1024x768 VGA display
- 3.5mm speaker
- 2GB SD card
First, program the microSD card. Use the Mac/Linux
dd utility to block copy WAV files directly to the SD card. Note: the WAV file must be an unsigned 8 bit WAV with 32 kHz sample rate. Here are the steps to creating the SD card:
1. Format the SD card in Disk Utility 2. In Terminal, run `df -h` to see what devices are currently mounted. Find the SD card. Should be something like `/dev/diskXXX`. Easiest way to determine is by Size. 3. Run `umount /dev/diskXXX` to unmount the card 4. Block copy over WAV file `sudo dd if=~/Desktop/my_awesome_wav_file.wav of=/dev/diskXXX`
Then you'll be ready to start the Nexys 4:
Plug in the microSD card to the Nexys 4
Open the project file under
vivado/and program the device with the generated bitstream. Ensure you have Vivado 2015.2.1 or newer installed.
It works! Ensure you have switch 15 and 14 set to zero to boot into run mode.
In run mode:
SW will turn on/off the heart rate beeping sound. SW will turn on/off the match filter display.
Press the center button to play the current user heart rate.
Press the right button to play a test tone.
Press the left button to enter pause mode, or the up button to enter system error mode.
Press the down button to clear these modes and resume run mode.
Xilinx IP Modules
Our project uses a few Xilinx IP core modules: Block Memory Generator, FIFO Generator, and Clocking Wizard.
We used the excellent Dosis font by Impallari, released under the Open Font License.
Font to Bitmap
Thanks to Codehead for Bitmap Font Generator, a way to generate bitmap font files from any fonts.
Thanks to Javier Merino for coetool, a simple Python-based conversion utility to generate COE files from JPG/PNG/BMP images. We also used the 6.111 MATLAB COE generator script.
SD Card Module
Thanks to Jonathan Matthews for the sd_controller.v module.
Thanks to Google for their Material Icons used in our sprite map.
Thanks to Microsoft for their Windows 95 start up tone we used for extra retro effect in our project!
Many thanks to Gim Hom, Miren Bamforth, and the 6.111 lab staff for help and support during the project!