This folder contains improved version of assemly for DLX simulator originally from the 3rd lecture. Task was to eliminate data hazard in the pipeline and perform loop unrolling on the code.
This folder contains custom implementation of branching and forwarding in the CPU pipeline. The task itself took almost 4 lectures to be done.
10th lecture contain resources used to measure the CPU cache performace such as helper scripts, data and graphs.
This folder contains optimized version of program for VLIW-DLX. To fulfill requirement we had to optimized CPU clocks the program consumed.
This is semestral work focused on optimization of program. We got the Gauss elimination in the well-known form to optimized. We had to perform several steps such as loop unrolling, dead-code elimination and out-of-order instruction reallocation. We suceeded!