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  1. espple Public

    Apple 1 Emulator with wireless PAL RF Output

    C 195 20

  2. fpg1 Public

    FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

    Verilog 167 11

  3. EDSAC Public

    FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

    Verilog 28 3

  4. uplatnica Public

    Generates Croatian payment slips in vector format with Postscript and Python.

    Python 89 9

  5. babyping Public

    A computer from 1948 in ICMP packets

    C 72 2

  6. Fasthumb Public

    GPU accelerated video thumbnail generator

    C++ 18 3

15 contributions in the last year

Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr May Jun Mon Wed Fri

Contribution activity

June 2022

hrvach has no activity yet for this period.

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