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vminmax_sreg only needs a single element

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hrydgard committed Jul 7, 2017
1 parent 567937f commit 270001e651ed8a81427cb65b041185ef68aabf62
Showing with 4 additions and 4 deletions.
  1. +3 −3 Core/MIPS/x86/CompVFPU.cpp
  2. +1 −1 GPU/Common/VertexDecoderX86.cpp
@@ -973,10 +973,10 @@ void Jit::Comp_Vcmov(MIPSOpcode op) {
fpr.ReleaseSpillLocks();
}
static s32 MEMORY_ALIGNED16(vminmax_sreg[4]);
static s32 vminmax_sreg;
static s32 DoVminSS(s32 treg) {
s32 sreg = vminmax_sreg[0];
s32 sreg = vminmax_sreg;
// If both are negative, we flip the comparison (not two's compliment.)
if (sreg < 0 && treg < 0) {
@@ -989,7 +989,7 @@ static s32 DoVminSS(s32 treg) {
}
static s32 DoVmaxSS(s32 treg) {
s32 sreg = vminmax_sreg[0];
s32 sreg = vminmax_sreg;
// This is the same logic as vmin, just reversed.
if (sreg < 0 && treg < 0) {
@@ -1237,7 +1237,7 @@ void VertexDecoderJitCache::Jit_WriteMorphColor(int outOff, bool checkAlpha) {
CMP(32, R(tempReg1), Imm32(0xFF000000));
FixupBranch skip = J_CC(CC_AE, false);
if (RipAccessible(&gstate_c.vertexFullAlpha)) {
MOV(8, M(&gstate_c.vertexFullAlpha), Imm8(0));
MOV(8, M(&gstate_c.vertexFullAlpha), Imm8(0)); // rip accessible
} else {
MOV(PTRBITS, R(tempReg2), ImmPtr(&gstate_c.vertexFullAlpha));
MOV(8, MatR(tempReg2), Imm8(0));

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