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More RIP elimination

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hrydgard committed Jul 7, 2017
1 parent 86396ba commit 837118d2306be326ab336166c7d11541e37c182f
Showing with 30 additions and 15 deletions.
  1. +4 −3 Common/MemoryUtil.cpp
  2. +14 −3 Core/MIPS/x86/CompVFPU.cpp
  3. +0 −3 Core/MIPS/x86/RegCacheFPU.cpp
  4. +12 −6 GPU/Common/VertexDecoderX86.cpp
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@@ -120,15 +120,14 @@ static void *SearchForFreeMem(size_t size) {
void *AllocateExecutableMemory(size_t size) {
#if defined(_WIN32)
void *ptr;
void *ptr = nullptr;
DWORD prot = PAGE_EXECUTE_READWRITE;
if (PlatformIsWXExclusive())
prot = PAGE_READWRITE;
if (sys_info.dwPageSize == 0)
GetSystemInfo(&sys_info);
#if defined(_M_X64)
if ((uintptr_t)&hint_location > 0xFFFFFFFFULL) {
size_t aligned_size = round_page(size);
ptr = SearchForFreeMem(aligned_size);
if (!ptr) {
@@ -140,7 +139,9 @@ void *AllocateExecutableMemory(size_t size) {
if (ptr) {
ptr = VirtualAlloc(ptr, aligned_size, MEM_RESERVE | MEM_COMMIT, prot);
} else {
ERROR_LOG(COMMON, "Unable to find nearby executable memory for jit");
WARN_LOG(COMMON, "Unable to find nearby executable memory for jit. Proceeding with far memory.");
// Can still run, thanks to "RipAccessible".
ptr = VirtualAlloc(nullptr, aligned_size, MEM_RESERVE | MEM_COMMIT, prot);
}
}
else
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@@ -1545,8 +1545,14 @@ void Jit::Comp_Vi2f(MIPSOpcode op) {
}
}
if (*mult != 1.0f)
MOVSS(XMM1, M(mult));
if (*mult != 1.0f) {
if (RipAccessible(mult)) {
MOVSS(XMM1, M(mult));
} else {
MOV(PTRBITS, R(TEMPREG), ImmPtr(mult));
MOVSS(XMM1, MatR(TEMPREG));
}
}
for (int i = 0; i < n; i++) {
fpr.MapRegV(tempregs[i], sregs[i] == dregs[i] ? MAP_DIRTY : MAP_NOINIT);
if (fpr.V(sregs[i]).IsSimpleReg()) {
@@ -3261,7 +3267,12 @@ void Jit::Comp_Vi2x(MIPSOpcode op) {
// At this point, everything is aligned in the high bits of our lanes.
if (cpu_info.bSSSE3) {
PSHUFB(dst0, bits == 8 ? M(vi2xc_shuffle) : M(vi2xs_shuffle));
if (RipAccessible(vi2xc_shuffle)) {
PSHUFB(dst0, bits == 8 ? M(vi2xc_shuffle) : M(vi2xs_shuffle));
} else {
MOV(PTRBITS, R(TEMPREG), bits == 8 ? ImmPtr(vi2xc_shuffle) : ImmPtr(vi2xs_shuffle));
PSHUFB(dst0, MatR(TEMPREG));
}
} else {
// Let's *arithmetically* shift in the sign so we can use saturating packs.
PSRAD(dst0, 32 - bits);
@@ -614,9 +614,6 @@ void FPURegCache::MapReg(const int i, bool doLoad, bool makeDirty) {
xregs[xr].dirty = makeDirty;
OpArg newloc = ::Gen::R(xr);
if (doLoad) {
if (!regs[i].location.IsImm() && (regs[i].location.offset & 0x3)) {
PanicAlert("WARNING - misaligned fp register location %i", i);
}
emit->MOVSS(xr, regs[i].location);
}
regs[i].location = newloc;
@@ -1081,8 +1081,10 @@ void VertexDecoderJitCache::Jit_Color4444Morph() {
if (!cpu_info.bSSE4_1) {
PXOR(fpScratchReg4, R(fpScratchReg4));
}
MOVDQA(XMM5, M(color4444mask));
MOVAPS(XMM6, M(byColor4444));
MOV(PTRBITS, R(tempReg2), ImmPtr(color4444mask));
MOVDQA(XMM5, MatR(tempReg2));
MOV(PTRBITS, R(tempReg2), ImmPtr(byColor4444));
MOVAPS(XMM6, MatR(tempReg2));
bool first = true;
for (int n = 0; n < dec_->morphcount; ++n) {
@@ -1126,8 +1128,10 @@ static const float MEMORY_ALIGNED16(byColor565[4]) = { 255.0f / 31.0f, 255.0f /
void VertexDecoderJitCache::Jit_Color565Morph() {
MOV(PTRBITS, R(tempReg1), ImmPtr(&gstate_c.morphWeights[0]));
MOVDQA(XMM5, M(color565Mask));
MOVAPS(XMM6, M(byColor565));
MOV(PTRBITS, R(tempReg2), ImmPtr(color565Mask));
MOVDQA(XMM5, MatR(tempReg2));
MOV(PTRBITS, R(tempReg2), ImmPtr(byColor565));
MOVAPS(XMM6, MatR(tempReg2));
bool first = true;
for (int n = 0; n < dec_->morphcount; ++n) {
@@ -1179,8 +1183,10 @@ static const float MEMORY_ALIGNED16(byColor5551[4]) = { 255.0f / 31.0f, 255.0f /
void VertexDecoderJitCache::Jit_Color5551Morph() {
MOV(PTRBITS, R(tempReg1), ImmPtr(&gstate_c.morphWeights[0]));
MOVDQA(XMM5, M(color5551Mask));
MOVAPS(XMM6, M(byColor5551));
MOV(PTRBITS, R(tempReg2), ImmPtr(color5551Mask));
MOVDQA(XMM5, MatR(tempReg2));
MOV(PTRBITS, R(tempReg2), ImmPtr(byColor5551));
MOVAPS(XMM6, MatR(tempReg2));
bool first = true;
for (int n = 0; n < dec_->morphcount; ++n) {

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