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arm64jit: Negate in ADDI2R/SUBI2R as well.

Should've done this at the same time as CMN.  It's not as common, mostly
catches addu calls, but it's good to have these generic for other uses.
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unknownbrackets committed Dec 30, 2017
1 parent 79a9018 commit 9ff812b31352724cdca6135da7ab2077dfa6ff74
Showing with 9 additions and 5 deletions.
  1. +8 −0 Common/Arm64Emitter.cpp
  2. +1 −5 Core/MIPS/ARM64/Arm64CompALU.cpp
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@@ -3736,6 +3736,7 @@ void ARM64XEmitter::CMPI2R(ARM64Reg Rn, u64 imm, ARM64Reg scratch) {
}
bool ARM64XEmitter::TryADDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm) {
s64 negated = Is64Bit(Rn) ? -(s64)imm : -(s32)(u32)imm;
u32 val;
bool shift;
if (imm == 0) {
@@ -3745,12 +3746,16 @@ bool ARM64XEmitter::TryADDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm) {
} else if (IsImmArithmetic(imm, &val, &shift)) {
ADD(Rd, Rn, val, shift);
return true;
} else if (IsImmArithmetic((u64)negated, &val, &shift)) {
SUB(Rd, Rn, val, shift);
return true;
} else {
return false;
}
}
bool ARM64XEmitter::TrySUBI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm) {
s64 negated = Is64Bit(Rn) ? -(s64)imm : -(s32)(u32)imm;
u32 val;
bool shift;
if (imm == 0) {
@@ -3760,6 +3765,9 @@ bool ARM64XEmitter::TrySUBI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm) {
} else if (IsImmArithmetic(imm, &val, &shift)) {
SUB(Rd, Rn, val, shift);
return true;
} else if (IsImmArithmetic((u64)negated, &val, &shift)) {
ADD(Rd, Rn, val, shift);
return true;
} else {
return false;
}
@@ -90,11 +90,7 @@ void Arm64Jit::Comp_IType(MIPSOpcode op) {
ARM64Reg r32 = gpr.RPtr(rs);
gpr.MarkDirty(r32);
ARM64Reg r = EncodeRegTo64(r32);
if (simm > 0) {
ADDI2R(r, r, simm);
} else {
SUBI2R(r, r, -simm);
}
ADDI2R(r, r, simm);
} else {
if (simm >= 0) {
CompImmLogic(rs, rt, simm, &ARM64XEmitter::ADD, &ARM64XEmitter::TryADDI2R, &EvalAdd);

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