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arm64jit: Allow ANDI2R/etc. with zero.

Since they're all possible anyway, and it's easy to forget to special case
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unknownbrackets committed Dec 28, 2017
1 parent 1b792c3 commit b21af3321a8e28cd5763dd31407da8662cba85ee
Showing with 27 additions and 2 deletions.
  1. +27 −2 Common/Arm64Emitter.cpp
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@@ -3669,8 +3669,10 @@ void ARM64XEmitter::ANDI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
imm &= 0xFFFFFFFF;
if (IsImmLogical(imm, Is64Bit(Rn) ? 64 : 32, &n, &imm_s, &imm_r)) {
AND(Rd, Rn, imm_r, imm_s, n != 0);
} else if (imm == 0) {
MOVI2R(Rd, 0);
} else {
_assert_msg_(JIT, scratch != INVALID_REG, "ANDSI2R - failed to construct logical immediate value from %08x, need scratch", (u32)imm);
_assert_msg_(JIT, scratch != INVALID_REG, "ANDI2R - failed to construct logical immediate value from %08x, need scratch", (u32)imm);
MOVI2R(scratch, imm);
AND(Rd, Rn, scratch);
}
@@ -3680,6 +3682,10 @@ void ARM64XEmitter::ORRI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
unsigned int n, imm_s, imm_r;
if (IsImmLogical(imm, Is64Bit(Rn) ? 64 : 32, &n, &imm_s, &imm_r)) {
ORR(Rd, Rn, imm_r, imm_s, n != 0);
} else if (imm == 0) {
if (Rd != Rn) {
MOV(Rd, Rn);
}
} else {
_assert_msg_(JIT, scratch != INVALID_REG, "ORRI2R - failed to construct logical immediate value from %08x, need scratch", (u32)imm);
MOVI2R(scratch, imm);
@@ -3691,6 +3697,10 @@ void ARM64XEmitter::EORI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
unsigned int n, imm_s, imm_r;
if (IsImmLogical(imm, Is64Bit(Rn) ? 64 : 32, &n, &imm_s, &imm_r)) {
EOR(Rd, Rn, imm_r, imm_s, n != 0);
} else if (imm == 0) {
if (Rd != Rn) {
MOV(Rd, Rn);
}
} else {
_assert_msg_(JIT, scratch != INVALID_REG, "EORI2R - failed to construct logical immediate value from %08x, need scratch", (u32)imm);
MOVI2R(scratch, imm);
@@ -3702,6 +3712,8 @@ void ARM64XEmitter::ANDSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
unsigned int n, imm_s, imm_r;
if (IsImmLogical(imm, Is64Bit(Rn) ? 64 : 32, &n, &imm_s, &imm_r)) {
ANDS(Rd, Rn, imm_r, imm_s, n != 0);
} else if (imm == 0) {
ANDS(Rd, Rn, Is64Bit(Rn) ? ZR : WZR, ArithOption(Rd, ST_LSL, 0));
} else {
_assert_msg_(JIT, scratch != INVALID_REG, "ANDSI2R - failed to construct logical immediate value from %08x, need scratch", (u32)imm);
MOVI2R(scratch, imm);
@@ -3783,6 +3795,9 @@ bool ARM64XEmitter::TryANDI2R(ARM64Reg Rd, ARM64Reg Rn, u32 imm) {
if (IsImmLogical(imm, 32, &n, &imm_s, &imm_r)) {
AND(Rd, Rn, imm_r, imm_s, n != 0);
return true;
} else if (imm == 0) {
MOVI2R(Rd, 0);
return true;
} else {
return false;
}
@@ -3792,6 +3807,11 @@ bool ARM64XEmitter::TryORRI2R(ARM64Reg Rd, ARM64Reg Rn, u32 imm) {
if (IsImmLogical(imm, 32, &n, &imm_s, &imm_r)) {
ORR(Rd, Rn, imm_r, imm_s, n != 0);
return true;
} else if (imm == 0) {
if (Rd != Rn) {
MOV(Rd, Rn);
}
return true;
} else {
return false;
}
@@ -3801,6 +3821,11 @@ bool ARM64XEmitter::TryEORI2R(ARM64Reg Rd, ARM64Reg Rn, u32 imm) {
if (IsImmLogical(imm, 32, &n, &imm_s, &imm_r)) {
EOR(Rd, Rn, imm_r, imm_s, n != 0);
return true;
} else if (imm == 0) {
if (Rd != Rn) {
MOV(Rd, Rn);
}
return true;
} else {
return false;
}
@@ -3892,7 +3917,7 @@ void ARM64XEmitter::SUBSI2R(ARM64Reg Rd, ARM64Reg Rn, u64 imm, ARM64Reg scratch)
if (IsImmArithmetic(imm, &val, &shift)) {
SUBS(Rd, Rn, val, shift);
} else {
_assert_msg_(JIT, scratch != INVALID_REG, "ANDSI2R - failed to construct immediate value from %08x, need scratch", (u32)imm);
_assert_msg_(JIT, scratch != INVALID_REG, "SUBSI2R - failed to construct immediate value from %08x, need scratch", (u32)imm);
MOVI2R(scratch, imm);
SUBS(Rd, Rn, scratch);
}

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