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  1. OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores

    C 55 23

  2. Generic Logic Interfacing Project

    C 37 12

  3. LibreCores Web Site

    PHP 29 27

  4. Open SoC Debug Software reference implementation

    C 2 5

  5. Open SoC Debug Hardware Reference Implementation

    SystemVerilog 13 10

  6. Open Soc Debug Documentation, including the specification

    Python 1 4

2,153 contributions in the last year

Sep Oct Nov Dec Jan Feb Mar Apr May Jun Jul Aug Sep Mon Wed Fri

Contribution activity

September 2021

Created a pull request in lowRISC/ibex that received 6 comments

[TEST] Fail the linter

+6 −6 6 comments
Reviewed 41 pull requests in 3 repositories
lowRISC/opentitan 38 pull requests
lowRISC/ibex 2 pull requests
olofk/edalize 1 pull request

Created an issue in lowRISC/opentitan that received 2 comments


The only error which isn't present in ERR_BITS at the moment is BUS_INTG_VIOLATION. Is there a reason why we don't have it in ERR_BITS, but only in…

23 contributions in private repositories Sep 7 – Sep 20

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