Block or report user

Popular repositories

  1. cpu_4

    Enhanced 5-stage CPU core with several HW implementations

    Verilog 2

  2. bare_system

    Bare MCPU system for DE0-Nano

    Verilog 1

  3. flight_control

    Verilog 1

  4. objcopy_convert


  5. fpu_add

    Floating point addition/subtraction. No denormals and NaN propagate.

  6. fpu_mul

    Floating point multiplication

0 contributions in the last year

May Jun Jul Aug Sep Oct Nov Dec Jan Feb Mar Apr Mon Wed Fri

Contribution activity First repository Joined GitHub

January - April 2017

ineganov has no activity yet for this period.

Seeing something unexpected? Take a look at the GitHub profile guide.