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rockpi4: Add rockpi4 support

Closes #958

Signed-off-by: Brian Lee <brian@vamrs.com>
Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
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brian541 authored and tingleby committed Mar 28, 2019
1 parent 8942117 commit b8349c0ffe0b5e38c0699f7f01e97abd921becba
Showing with 238 additions and 1 deletion.
  1. +1 −1 api/mraa/types.h
  2. +46 −0 include/arm/rockpi4.h
  3. +1 −0 src/CMakeLists.txt
  4. +6 −0 src/arm/arm.c
  5. +184 −0 src/arm/rockpi4.c
@@ -60,7 +60,7 @@ typedef enum {
MRAA_MTK_LINKIT = 17, /**< Mediatek MT7688 based Linkit boards */
MRAA_MTK_OMEGA2 = 18, /**< MT7688 based Onion Omega2 board */
MRAA_IEI_TANK = 19, /**< IEI Tank System*/

MRAA_ROCKPI4 = 20, /**< Radxa ROCK PI 4 Models A/B */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */

@@ -0,0 +1,46 @@
/*
* Author: Brian <brian@vamrs.com>
* Copyright (c) 2019 Vamrs Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

#include "mraa_internal.h"

#define MRAA_ROCKPI4_GPIO_COUNT 27
#define MRAA_ROCKPI4_I2C_COUNT 3
#define MRAA_ROCKPI4_SPI_COUNT 2
#define MRAA_ROCKPI4_UART_COUNT 2
#define MRAA_ROCKPI4_PWM_COUNT 2
#define MRAA_ROCKPI4_AIO_COUNT 1
#define MRAA_ROCKPI4_PIN_COUNT 40

mraa_board_t *
mraa_rockpi4();

#ifdef __cplusplus
}
#endif
@@ -101,6 +101,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/phyboard.c
${PROJECT_SOURCE_DIR}/src/arm/banana.c
${PROJECT_SOURCE_DIR}/src/arm/de_nano_soc.c
${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c
)

set (mraa_LIB_MIPS_SRCS_NOAUTO
@@ -27,6 +27,7 @@
#include <string.h>

#include "arm/96boards.h"
#include "arm/rockpi4.h"
#include "arm/de_nano_soc.h"
#include "arm/banana.h"
#include "arm/beaglebone.h"
@@ -105,6 +106,8 @@ mraa_arm_platform()
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/proc/device-tree/model", "Avnet Ultra96 Rev1"))
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/proc/device-tree/model", "ROCK PI 4"))
platform_type = MRAA_ROCKPI4;
else if (mraa_file_contains("/proc/device-tree/compatible", "raspberrypi,"))
platform_type = MRAA_RASPBERRY_PI;
}
@@ -124,6 +127,9 @@ mraa_arm_platform()
break;
case MRAA_96BOARDS:
plat = mraa_96boards();
break;
case MRAA_ROCKPI4:
plat = mraa_rockpi4();
break;
case MRAA_DE_NANO_SOC:
plat = mraa_de_nano_soc();
@@ -0,0 +1,184 @@
/*
* Author: Brian <brian@vamrs.com>
* Copyright (c) 2019 Vamrs Corporation.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/

#include <mraa/common.h>
#include <stdarg.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>

#include "arm/rockpi4.h"
#include "common.h"

#define DT_BASE "/proc/device-tree"
#define PLATFORM_NAME_ROCK_PI_4A "ROCK PI 4A"
#define PLATFORM_NAME_ROCK_PI_4B "ROCK PI 4B"

#define MAX_SIZE 64

const char* rockpi4a_serialdev[MRAA_ROCKPI4_UART_COUNT] = { "/dev/ttyS2","/dev/ttyS4"};
const char* rockpi4b_serialdev[MRAA_ROCKPI4_UART_COUNT] = { "/dev/ttyS2","/dev/ttyS4"};

void
mraa_rockpi4_pininfo(mraa_board_t* board, int index, int sysfs_pin, mraa_pincapabilities_t pincapabilities_t, char* fmt, ...)
{
va_list arg_ptr;
if (index > board->phy_pin_count)
return;

mraa_pininfo_t* pininfo = &board->pins[index];
va_start(arg_ptr, fmt);
vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr);

if( pincapabilities_t.gpio == 1 ) {
va_arg(arg_ptr, int);
pininfo->gpio.gpio_chip = va_arg(arg_ptr, int);
pininfo->gpio.gpio_line = va_arg(arg_ptr, int);
}

pininfo->capabilities = pincapabilities_t;

va_end(arg_ptr);
pininfo->gpio.pinmap = sysfs_pin;
pininfo->gpio.mux_total = 0;
}

mraa_board_t*
mraa_rockpi4()
{
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
if (b == NULL) {
return NULL;
}

b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
if (b->adv_func == NULL) {
free(b);
return NULL;
}

// pin mux for buses are setup by default by kernel so tell mraa to ignore them
b->no_bus_mux = 1;
b->phy_pin_count = MRAA_ROCKPI4_PIN_COUNT + 1;

if (mraa_file_exist(DT_BASE "/model")) {
// We are on a modern kernel, great!!!!
if (mraa_file_contains(DT_BASE "/model", "ROCK PI 4A")) {
b->platform_name = PLATFORM_NAME_ROCK_PI_4A;
b->uart_dev[0].device_path = (char*) rockpi4a_serialdev[0];
b->uart_dev[1].device_path = (char*) rockpi4a_serialdev[1];
} else if (mraa_file_contains(DT_BASE "/model", "ROCK PI 4B")) {
b->platform_name = PLATFORM_NAME_ROCK_PI_4B;
b->uart_dev[0].device_path = (char*) rockpi4b_serialdev[0];
b->uart_dev[1].device_path = (char*) rockpi4b_serialdev[1];
}
}

// UART
b->uart_dev_count = MRAA_ROCKPI4_UART_COUNT;
b->def_uart_dev = 0;
b->uart_dev[0].index = 2;
b->uart_dev[1].index = 4;

// I2C
if ((strncmp(b->platform_name, PLATFORM_NAME_ROCK_PI_4B, MAX_SIZE) == 0)
|| (strncmp(b->platform_name, PLATFORM_NAME_ROCK_PI_4B, MAX_SIZE) == 0)) {
b->i2c_bus_count = MRAA_ROCKPI4_I2C_COUNT;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 7;
b->i2c_bus[1].bus_id = 2;
b->i2c_bus[2].bus_id = 6;
}

// SPI
b->spi_bus_count = MRAA_ROCKPI4_SPI_COUNT;
b->def_spi_bus = 0;
b->spi_bus[0].bus_id = 32766;
b->spi_bus[1].bus_id = 32765;

b->pwm_dev_count = MRAA_ROCKPI4_PWM_COUNT;
b->pwm_default_period = 500;
b->pwm_max_period = 2147483;
b->pwm_min_period = 1;

b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
if (b->pins == NULL) {
free(b->adv_func);
free(b);
return NULL;
}

b->pins[11].pwm.parent_id = 0;
b->pins[13].pwm.parent_id = 1;

b->aio_count = MRAA_ROCKPI4_AIO_COUNT;
b->adc_raw = 10;
b->adc_supported = 10;
b->aio_dev[0].pin = 26;
b->aio_non_seq = 1;

mraa_rockpi4_pininfo(b, 0, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
mraa_rockpi4_pininfo(b, 1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");
mraa_rockpi4_pininfo(b, 2, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V");
mraa_rockpi4_pininfo(b, 3, 71, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA7");
mraa_rockpi4_pininfo(b, 4, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V");
mraa_rockpi4_pininfo(b, 5, 72, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL7");
mraa_rockpi4_pininfo(b, 6, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 7, 75, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2_CLK");
mraa_rockpi4_pininfo(b, 8, 148, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "TXD2");
mraa_rockpi4_pininfo(b, 9, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 10, 147, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "RXD2");
mraa_rockpi4_pininfo(b, 11, 146, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM0");
mraa_rockpi4_pininfo(b, 12, 131, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A3");
mraa_rockpi4_pininfo(b, 13, 150, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "PWM1");
mraa_rockpi4_pininfo(b, 14, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 15, 149, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_C5");
mraa_rockpi4_pininfo(b, 16, 154, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D2");
mraa_rockpi4_pininfo(b, 17, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");
mraa_rockpi4_pininfo(b, 18, 156, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D4");
mraa_rockpi4_pininfo(b, 19, 40, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1TX,TXD4");
mraa_rockpi4_pininfo(b, 20, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 21, 39, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "SPI1RX,RXD4");
mraa_rockpi4_pininfo(b, 22, 157, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D5");
mraa_rockpi4_pininfo(b, 23, 41, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CLK");
mraa_rockpi4_pininfo(b, 24, 42, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1CS");
mraa_rockpi4_pininfo(b, 25, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 26, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,1,0}, "ADC_IN0");
mraa_rockpi4_pininfo(b, 27, 64, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SDA2");
mraa_rockpi4_pininfo(b, 28, 65, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "SCL2");
mraa_rockpi4_pininfo(b, 29, 74, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SCL6,SPI2RX");
mraa_rockpi4_pininfo(b, 30, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 31, 73, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "SDA6,SPI2TX");
mraa_rockpi4_pininfo(b, 32, 112, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO3_C0");
mraa_rockpi4_pininfo(b, 33, 76, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI2CS");
mraa_rockpi4_pininfo(b, 34, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 35, 133, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A5");
mraa_rockpi4_pininfo(b, 36, 132, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A4");
mraa_rockpi4_pininfo(b, 37, 158, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_D6");
mraa_rockpi4_pininfo(b, 38, 134, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A6");
mraa_rockpi4_pininfo(b, 39, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
mraa_rockpi4_pininfo(b, 40, 135, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO4_A7");

return b;
}

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