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Add support for PMC Time-Aware GPIO (TGPIO) hardware that is present …
…on upcoming Intel platforms. The hardware logic is driven by the ART clock. The current hardware has two GPIO pins. Input interrupts are not implemented in hardware. The driver implements to the expanded PHC interface. Input requires use of the user-polling interface. Also, since the ART clock can't be adjusted, modulating the output frequency uses the edge timestamp interface (EVENT_COUNT_TSTAMP2) and the PEROUT2 ioctl output frequency adjustment interface. Signed-off-by: Christopher Hall <christopher.s.hall@intel.com>
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