diff --git a/libclc/generic/libspirv/atomic/atomic_load.cl b/libclc/generic/libspirv/atomic/atomic_load.cl
index 6d8b1447261b5..8fd849e72a181 100644
--- a/libclc/generic/libspirv/atomic/atomic_load.cl
+++ b/libclc/generic/libspirv/atomic/atomic_load.cl
@@ -13,26 +13,27 @@
 #define FDECL(TYPE, PREFIX, AS, BYTE_SIZE, MEM_ORDER) \
 TYPE __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_##MEM_ORDER(volatile AS const TYPE *);
 
-#define IMPL(TYPE, TYPE_MANGLED, AS, AS_MANGLED, PREFIX, BYTE_SIZE)                                               \
-  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, unordered)                                                                   \
-  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, acquire)                                                                     \
-  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, seq_cst)                                                                     \
-  _CLC_DEF TYPE                                                                                                   \
-      _Z18__spirv_AtomicLoadPU3##AS_MANGLED##K##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
-          volatile AS const TYPE *p, enum Scope scope,                                                            \
-          enum MemorySemanticsMask semantics) {                                                                   \
-    if (semantics & Acquire) {                                                                                    \
-      return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_acquire(p);                                        \
-    }                                                                                                             \
-    if (semantics & SequentiallyConsistent) {                                                                     \
-      return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_seq_cst(p);                                        \
-    }                                                                                                             \
-    return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_unordered(p);                                        \
+#define IMPL(TYPE, TYPE_MANGLED, AS, AS_MANGLED, PREFIX, BYTE_SIZE)                                             \
+  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, unordered)                                                                 \
+  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, acquire)                                                                   \
+  FDECL(TYPE, PREFIX, AS, BYTE_SIZE, seq_cst)                                                                   \
+  _CLC_DEF TYPE                                                                                                 \
+      _Z18__spirv_AtomicLoadP##AS_MANGLED##K##TYPE_MANGLED##N5__spv5Scope4FlagENS1_19MemorySemanticsMask4FlagE( \
+          volatile AS const TYPE *p, enum Scope scope,                                                          \
+          enum MemorySemanticsMask semantics) {                                                                 \
+    if (semantics & Acquire) {                                                                                  \
+      return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_acquire(p);                                      \
+    }                                                                                                           \
+    if (semantics & SequentiallyConsistent) {                                                                   \
+      return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_seq_cst(p);                                      \
+    }                                                                                                           \
+    return __clc__atomic_##PREFIX##load_##AS##_##BYTE_SIZE##_unordered(p);                                      \
   }
 
-#define IMPL_AS(TYPE, TYPE_MANGLED, PREFIX, BYTE_SIZE) \
-IMPL(TYPE, TYPE_MANGLED, global, AS1, PREFIX, BYTE_SIZE) \
-IMPL(TYPE, TYPE_MANGLED, local, AS3, PREFIX, BYTE_SIZE)
+#define IMPL_AS(TYPE, TYPE_MANGLED, PREFIX, BYTE_SIZE)                         \
+  IMPL(TYPE, TYPE_MANGLED, global, U3AS1, PREFIX, BYTE_SIZE)                   \
+  IMPL(TYPE, TYPE_MANGLED, local, U3AS3, PREFIX, BYTE_SIZE)                    \
+  IMPL(TYPE, TYPE_MANGLED, , , PREFIX, BYTE_SIZE)
 
 IMPL_AS(int, i, , 4)
 IMPL_AS(unsigned int, j, u, 4)
diff --git a/libclc/generic/libspirv/atomic/loadstore_helpers_acquire.ll b/libclc/generic/libspirv/atomic/loadstore_helpers_acquire.ll
index 46418d5d35c2a..8ab75c6ca3ee3 100644
--- a/libclc/generic/libspirv/atomic/loadstore_helpers_acquire.ll
+++ b/libclc/generic/libspirv/atomic/loadstore_helpers_acquire.ll
@@ -20,6 +20,12 @@ entry:
   unreachable
 }
 
+define i32 @__clc__atomic_load__4_acquire(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define i64 @__clc__atomic_load_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -32,6 +38,12 @@ entry:
   unreachable
 }
 
+define i64 @__clc__atomic_load__8_acquire(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define i32 @__clc__atomic_uload_global_4_acquire(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   %0 = load atomic volatile i32, i32 addrspace(1)* %ptr acquire, align 4
@@ -44,6 +56,12 @@ entry:
   unreachable
 }
 
+define i32 @__clc__atomic_uload__4_acquire(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  %0 = load atomic volatile i32, i32 addrspace(0)* %ptr acquire, align 4
+  ret i32 %0
+}
+
 define i64 @__clc__atomic_uload_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -56,3 +74,8 @@ entry:
   unreachable
 }
 
+define i64 @__clc__atomic_uload__8_acquire(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
diff --git a/libclc/generic/libspirv/atomic/loadstore_helpers_release.ll b/libclc/generic/libspirv/atomic/loadstore_helpers_release.ll
index c10d96eb19f6c..da70542a4de30 100644
--- a/libclc/generic/libspirv/atomic/loadstore_helpers_release.ll
+++ b/libclc/generic/libspirv/atomic/loadstore_helpers_release.ll
@@ -20,6 +20,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_store__4_release(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_store_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -32,6 +38,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_store__8_release(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_ustore_global_4_release(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -44,6 +56,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_ustore__4_release(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_ustore_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -56,3 +74,9 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_ustore__8_release(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
diff --git a/libclc/generic/libspirv/atomic/loadstore_helpers_seq_cst.ll b/libclc/generic/libspirv/atomic/loadstore_helpers_seq_cst.ll
index c996862619c0e..7d24e2f89e768 100644
--- a/libclc/generic/libspirv/atomic/loadstore_helpers_seq_cst.ll
+++ b/libclc/generic/libspirv/atomic/loadstore_helpers_seq_cst.ll
@@ -20,6 +20,12 @@ entry:
   unreachable
 }
 
+define i32 @__clc__atomic_load__4_seq_cst(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define i64 @__clc__atomic_load_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -32,6 +38,12 @@ entry:
   unreachable
 }
 
+define i64 @__clc__atomic_load__8_seq_cst(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define i32 @__clc__atomic_uload_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   %0 = load atomic volatile i32, i32 addrspace(1)* %ptr seq_cst, align 4
@@ -44,6 +56,12 @@ entry:
   unreachable
 }
 
+define i32 @__clc__atomic_uload__4_seq_cst(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define i64 @__clc__atomic_uload_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -56,6 +74,12 @@ entry:
   unreachable
 }
 
+define i64 @__clc__atomic_uload__8_seq_cst(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_store_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -68,6 +92,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_store__4_seq_cst(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_store_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -80,6 +110,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_store__8_seq_cst(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_ustore_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -92,6 +128,12 @@ entry:
   unreachable
 }
 
+define void @__clc__atomic_ustore__4_seq_cst(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
+
 define void @__clc__atomic_ustore_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   tail call void @llvm.trap()
@@ -103,3 +145,9 @@ entry:
   tail call void @llvm.trap()
   unreachable
 }
+
+define void @__clc__atomic_ustore__8_seq_cst(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  tail call void @llvm.trap()
+  unreachable
+}
diff --git a/libclc/generic/libspirv/atomic/loadstore_helpers_unordered.ll b/libclc/generic/libspirv/atomic/loadstore_helpers_unordered.ll
index f31df6390163f..2316346e0feff 100644
--- a/libclc/generic/libspirv/atomic/loadstore_helpers_unordered.ll
+++ b/libclc/generic/libspirv/atomic/loadstore_helpers_unordered.ll
@@ -20,6 +20,12 @@ entry:
   ret i32 %0
 }
 
+define i32 @__clc__atomic_load__4_unordered(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  %0 = load atomic volatile i32, i32 addrspace(0)* %ptr unordered, align 4
+  ret i32 %0
+}
+
 define i64 @__clc__atomic_load_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   %0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
@@ -32,6 +38,12 @@ entry:
   ret i64 %0
 }
 
+define i64 @__clc__atomic_load__8_unordered(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  %0 = load atomic volatile i64, i64 addrspace(0)* %ptr unordered, align 8
+  ret i64 %0
+}
+
 define i32 @__clc__atomic_uload_global_4_unordered(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   %0 = load atomic volatile i32, i32 addrspace(1)* %ptr unordered, align 4
@@ -44,6 +56,12 @@ entry:
   ret i32 %0
 }
 
+define i32 @__clc__atomic_uload__4_unordered(i32 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  %0 = load atomic volatile i32, i32 addrspace(0)* %ptr unordered, align 4
+  ret i32 %0
+}
+
 define i64 @__clc__atomic_uload_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
 entry:
   %0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
@@ -56,6 +74,12 @@ entry:
   ret i64 %0
 }
 
+define i64 @__clc__atomic_uload__8_unordered(i64 addrspace(0)* nocapture %ptr) nounwind alwaysinline {
+entry:
+  %0 = load atomic volatile i64, i64 addrspace(0)* %ptr unordered, align 8
+  ret i64 %0
+}
+
 define void @__clc__atomic_store_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
 entry:
   store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
@@ -68,6 +92,12 @@ entry:
   ret void
 }
 
+define void @__clc__atomic_store__4_unordered(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  store atomic volatile i32 %value, i32 addrspace(0)* %ptr unordered, align 4
+  ret void
+}
+
 define void @__clc__atomic_store_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
@@ -80,6 +110,12 @@ entry:
   ret void
 }
 
+define void @__clc__atomic_store__8_unordered(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  store atomic volatile i64 %value, i64 addrspace(0)* %ptr unordered, align 8
+  ret void
+}
+
 define void @__clc__atomic_ustore_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
 entry:
   store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
@@ -92,6 +128,12 @@ entry:
   ret void
 }
 
+define void @__clc__atomic_ustore__4_unordered(i32 addrspace(0)* nocapture %ptr, i32 %value) nounwind alwaysinline {
+entry:
+  store atomic volatile i32 %value, i32 addrspace(0)* %ptr unordered, align 4
+  ret void
+}
+
 define void @__clc__atomic_ustore_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
 entry:
   store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
@@ -104,3 +146,9 @@ entry:
   ret void
 }
 
+define void @__clc__atomic_ustore__8_unordered(i64 addrspace(0)* nocapture %ptr, i64 %value) nounwind alwaysinline {
+entry:
+  store atomic volatile i64 %value, i64 addrspace(0)* %ptr unordered, align 8
+  ret void
+}
+