diff --git a/llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp b/llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp index 40af89ddcf26f..8d4d40f187060 100644 --- a/llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp +++ b/llvm/lib/SYCLLowerIR/CompileTimePropertiesPass.cpp @@ -947,7 +947,7 @@ bool CompileTimePropertiesPass::transformSYCLPropertiesAnnotation( if (CacheProp) { LLVMContext &Ctx = M.getContext(); unsigned MDKindID = Ctx.getMDKindID(SPIRV_DECOR_MD_KIND); - if (!FPGAProp) { + if (!FPGAProp && llvm::isa(IntrInst->getArgOperand(0))) { // If there are no annotations other than cache controls we can apply the // controls to the pointer and remove the intrinsic. auto PtrInstr = cast(IntrInst->getArgOperand(0)); diff --git a/sycl/test/check_device_code/extensions/properties/properties_cache_control.cpp b/sycl/test/check_device_code/extensions/properties/properties_cache_control.cpp index cf853d2a6c7ac..6042363056b88 100644 --- a/sycl/test/check_device_code/extensions/properties/properties_cache_control.cpp +++ b/sycl/test/check_device_code/extensions/properties/properties_cache_control.cpp @@ -81,6 +81,15 @@ void cache_control_read_write_func() { }); } +// Test that annotated pointer parameter functions don't crash. +SYCL_EXTERNAL void annotated_ptr_func_param_test(float *p) { + *(store_hint{p}) = 42.0f; +} + +// CHECK-IR: spir_func{{.*}}annotated_ptr_func_param_test +// CHECK-IR: {{.*}}call ptr addrspace(4) @llvm.ptr.annotation.p4.p1{{.*}}!spirv.Decorations [[WHINT:.*]] +// CHECK-IR: ret void + // CHECK-IR: spir_kernel{{.*}}cache_control_read_hint_func // CHECK-IR: {{.*}}addrspacecast ptr addrspace(1){{.*}}!spirv.Decorations [[RHINT:.*]] // CHECK-IR: ret void @@ -90,13 +99,19 @@ void cache_control_read_write_func() { // CHECK-IR: ret void // CHECK-IR: spir_kernel{{.*}}cache_control_write_hint_func -// CHECK-IR: {{.*}}addrspacecast ptr addrspace(1){{.*}}!spirv.Decorations [[WHINT:.*]] +// CHECK-IR: {{.*}}addrspacecast ptr addrspace(1){{.*}}!spirv.Decorations [[WHINT]] // CHECK-IR: ret void // CHECK-IR: spir_kernel{{.*}}cache_control_read_write_func // CHECK-IR: {{.*}}addrspacecast ptr addrspace(1){{.*}}!spirv.Decorations [[RWHINT:.*]] // CHECK-IR: ret void +// CHECK-IR: [[WHINT]] = !{[[WHINT1:.*]], [[WHINT2:.*]], [[WHINT3:.*]], [[WHINT4:.*]]} +// CHECK-IR: [[WHINT1]] = !{i32 6443, i32 3, i32 3} +// CHECK-IR: [[WHINT2]] = !{i32 6443, i32 0, i32 1} +// CHECK-IR: [[WHINT3]] = !{i32 6443, i32 1, i32 2} +// CHECK-IR: [[WHINT4]] = !{i32 6443, i32 2, i32 2} + // CHECK-IR: [[RHINT]] = !{[[RHINT1:.*]], [[RHINT2:.*]], [[RHINT3:.*]]} // CHECK-IR: [[RHINT1]] = !{i32 6442, i32 1, i32 0} // CHECK-IR: [[RHINT2]] = !{i32 6442, i32 2, i32 0} @@ -107,12 +122,6 @@ void cache_control_read_write_func() { // CHECK-IR: [[RASSERT2]] = !{i32 6442, i32 2, i32 3} // CHECK-IR: [[RASSERT3]] = !{i32 6442, i32 0, i32 4} -// CHECK-IR: [[WHINT]] = !{[[WHINT1:.*]], [[WHINT2:.*]], [[WHINT3:.*]], [[WHINT4:.*]]} -// CHECK-IR: [[WHINT1]] = !{i32 6443, i32 3, i32 3} -// CHECK-IR: [[WHINT2]] = !{i32 6443, i32 0, i32 1} -// CHECK-IR: [[WHINT3]] = !{i32 6443, i32 1, i32 2} -// CHECK-IR: [[WHINT4]] = !{i32 6443, i32 2, i32 2} - // CHECK-IR: [[RWHINT]] = !{[[RWHINT1:.*]], [[RWHINT2:.*]], [[RWHINT3:.*]]} // CHECK-IR: [[RWHINT1]] = !{i32 6442, i32 2, i32 1} // CHECK-IR: [[RWHINT2]] = !{i32 6442, i32 3, i32 4}