From 0c2119070de4ad2aece9463a3703f82ebf5eaebe Mon Sep 17 00:00:00 2001 From: Wenju He Date: Fri, 24 Oct 2025 07:03:26 +0200 Subject: [PATCH] [lbispirv] Add __spirv_BitFieldUExtract/SExtract/Insert implementation --- libclc/libspirv/lib/generic/SOURCES | 3 +++ .../generic/integer/bitfield_extract_signed.cl | 13 +++++++++++++ .../generic/integer/bitfield_extract_signed.inc | 16 ++++++++++++++++ .../generic/integer/bitfield_extract_unsigned.cl | 13 +++++++++++++ .../integer/bitfield_extract_unsigned.inc | 16 ++++++++++++++++ .../lib/generic/integer/bitfield_insert.cl | 13 +++++++++++++ .../lib/generic/integer/bitfield_insert.inc | 12 ++++++++++++ 7 files changed, 86 insertions(+) create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_extract_signed.cl create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_extract_signed.inc create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.cl create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.inc create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_insert.cl create mode 100644 libclc/libspirv/lib/generic/integer/bitfield_insert.inc diff --git a/libclc/libspirv/lib/generic/SOURCES b/libclc/libspirv/lib/generic/SOURCES index 8a5d0d279c464..b38e427a8ac3a 100644 --- a/libclc/libspirv/lib/generic/SOURCES +++ b/libclc/libspirv/lib/generic/SOURCES @@ -39,6 +39,9 @@ geometric/scale.cl integer/abs.cl integer/abs_diff.cl integer/add_sat.cl +integer/bitfield_extract_signed.cl +integer/bitfield_extract_unsigned.cl +integer/bitfield_insert.cl integer/clamp.cl integer/clz.cl integer/ctz.cl diff --git a/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.cl b/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.cl new file mode 100644 index 0000000000000..26861f758c77d --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.cl @@ -0,0 +1,13 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include +#include + +#define __CLC_BODY +#include diff --git a/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.inc b/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.inc new file mode 100644 index 0000000000000..cdd0f0e45de15 --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_extract_signed.inc @@ -0,0 +1,16 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifdef __CLC_GEN_S + +_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE +__spirv_BitFieldSExtract(__CLC_GENTYPE base, uint offset, uint count) { + return __clc_bitfield_extract_signed(base, offset, count); +} + +#endif diff --git a/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.cl b/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.cl new file mode 100644 index 0000000000000..28858dfaecfa6 --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.cl @@ -0,0 +1,13 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include +#include + +#define __CLC_BODY +#include diff --git a/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.inc b/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.inc new file mode 100644 index 0000000000000..3dcc5b34b2e3f --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_extract_unsigned.inc @@ -0,0 +1,16 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifdef __CLC_GEN_U + +_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE +__spirv_BitFieldUExtract(__CLC_GENTYPE base, uint offset, uint count) { + return __clc_bitfield_extract_unsigned(base, offset, count); +} + +#endif diff --git a/libclc/libspirv/lib/generic/integer/bitfield_insert.cl b/libclc/libspirv/lib/generic/integer/bitfield_insert.cl new file mode 100644 index 0000000000000..d106d326a71e5 --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_insert.cl @@ -0,0 +1,13 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include +#include + +#define __CLC_BODY +#include diff --git a/libclc/libspirv/lib/generic/integer/bitfield_insert.inc b/libclc/libspirv/lib/generic/integer/bitfield_insert.inc new file mode 100644 index 0000000000000..7d1855b3d82e2 --- /dev/null +++ b/libclc/libspirv/lib/generic/integer/bitfield_insert.inc @@ -0,0 +1,12 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE __spirv_BitFieldInsert( + __CLC_GENTYPE base, __CLC_GENTYPE insert, uint offset, uint count) { + return __clc_bitfield_insert(base, insert, offset, count); +}