From ec7e082fa240062a0e5a7a98c302243454af344b Mon Sep 17 00:00:00 2001 From: Greg Lueck Date: Tue, 1 Feb 2022 15:51:01 -0500 Subject: [PATCH 1/3] [SYCL][DOC] Move proposed FPGA extensions These two extension specifications are proposed changes to existing extensions. Move them to the "proposed" directory. You can see the proposed changes via: ``` $ git diff HEAD:sycl/doc/extensions/{supported,proposed}/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc $ git diff HEAD:sycl/doc/extensions/{supported,proposed}/SYCL_EXT_INTEL_FPGA_LSU.md ``` --- .../SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc} | 0 .../SYCL_EXT_INTEL_FPGA_LSU.md} | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename sycl/doc/extensions/{DataFlowPipes/data_flow_pipes_rev4_proposed.asciidoc => proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc} (100%) rename sycl/doc/extensions/{IntelFPGA/FPGALsu_rev2_proposed.md => proposed/SYCL_EXT_INTEL_FPGA_LSU.md} (100%) diff --git a/sycl/doc/extensions/DataFlowPipes/data_flow_pipes_rev4_proposed.asciidoc b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc similarity index 100% rename from sycl/doc/extensions/DataFlowPipes/data_flow_pipes_rev4_proposed.asciidoc rename to sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc diff --git a/sycl/doc/extensions/IntelFPGA/FPGALsu_rev2_proposed.md b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md similarity index 100% rename from sycl/doc/extensions/IntelFPGA/FPGALsu_rev2_proposed.md rename to sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md From ea487cb7e2a5a67e55789ab6ea4cdad060b610f9 Mon Sep 17 00:00:00 2001 From: Greg Lueck Date: Tue, 1 Feb 2022 16:09:16 -0500 Subject: [PATCH 2/3] Fix file permissions --- .../extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc diff --git a/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc old mode 100755 new mode 100644 From 485c98f30cb35c787ea025953a502fd325082c36 Mon Sep 17 00:00:00 2001 From: Greg Lueck Date: Thu, 3 Feb 2022 16:34:23 -0500 Subject: [PATCH 3/3] Add a notice to top of documents Add a notice to the top of these documents stating that they are proposals to existing extensions. --- .../proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc | 6 +++++- sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md | 7 +++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc index 4b8cbc5dffb1..4bf496b1d2ac 100644 --- a/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc +++ b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc @@ -17,7 +17,11 @@ :language: {basebackend@docbook:c++:cpp} == Introduction -IMPORTANT: This specification is a draft. +IMPORTANT: This is a proposed update to an existing extension. The APIs +described in this document are not yet implemented and cannot be used in +application code. See +link:../supported/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc[here] for the existing +extension, which is implemented. NOTE: Khronos(R) is a registered trademark and SYCL(TM) and SPIR(TM) are trademarks of The Khronos Group Inc. OpenCL(TM) is a trademark of Apple Inc. used by permission by Khronos. diff --git a/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md index ad85bee3af4b..88ce1ef82681 100644 --- a/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md +++ b/sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md @@ -1,6 +1,13 @@ # FPGA lsu +**IMPORTANT:** This is a proposed update to an existing extension. The APIs +described in this document are not yet implemented and cannot be used in +application code. See [here][1] for the existing extension, which is +implemented. + +[1]: <../supported/SYCL_EXT_INTEL_FPGA_LSU.md> + The Intel FPGA `lsu` class is implemented in `sycl/ext/intel/fpga_lsu.hpp` which is included in `sycl/ext/intel/fpga_extensions.hpp`.