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hw: i386: Factorize fw_cfg initialisation code
The fw_cfg device initialisation code is moved into its own file and made PC machine type agnostic. We need to do this code factorization in order for all x86 machine types to be able initialize and add a fw_cfg device, including the new virt one. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,87 @@ | ||
| /* | ||
| * | ||
| * Copyright (c) 2018 Intel Corportation | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify it | ||
| * under the terms and conditions of the GNU General Public License, | ||
| * version 2 or later, as published by the Free Software Foundation. | ||
| * | ||
| * This program is distributed in the hope it will be useful, but WITHOUT | ||
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| * more details. | ||
| * | ||
| * You should have received a copy of the GNU General Public License along with | ||
| * this program. If not, see <http://www.gnu.org/licenses/>. | ||
| */ | ||
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| #include "qemu/osdep.h" | ||
| #include "sysemu/numa.h" | ||
| #include "exec/cpu-common.h" | ||
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| #include "hw/acpi/acpi.h" | ||
| #include "hw/timer/hpet.h" | ||
| #include "hw/nvram/fw_cfg.h" | ||
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| #include "hw/i386/fw.h" | ||
| #include "hw/i386/memory.h" | ||
| #include "hw/i386/pc.h" | ||
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| #include "kvm_i386.h" | ||
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| struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; | ||
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| FWCfgState *fw_cfg_init(uint16_t boot_cpus, const CPUArchIdList *cpus, unsigned apic_id_limit) | ||
| { | ||
| FWCfgState *fw_cfg; | ||
| uint64_t *numa_fw_cfg; | ||
| int i; | ||
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| fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, &address_space_memory); | ||
| fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus); | ||
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| /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: | ||
| * | ||
| * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for | ||
| * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table, | ||
| * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface | ||
| * for CPU hotplug also uses APIC ID and not "CPU index". | ||
| * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs", | ||
| * but the "limit to the APIC ID values SeaBIOS may see". | ||
| * | ||
| * So for compatibility reasons with old BIOSes we are stuck with | ||
| * "etc/max-cpus" actually being apic_id_limit | ||
| */ | ||
| fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)apic_id_limit); | ||
| fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); | ||
| fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, | ||
| acpi_tables, acpi_tables_len); | ||
| fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override()); | ||
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| fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, | ||
| &e820_reserve, sizeof(e820_reserve)); | ||
| fw_cfg_add_file(fw_cfg, "etc/e820", e820_table, | ||
| sizeof(struct e820_entry) * e820_entries); | ||
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| fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg)); | ||
| /* allocate memory for the NUMA channel: one (64bit) word for the number | ||
| * of nodes, one word for each VCPU->node and one word for each node to | ||
| * hold the amount of memory. | ||
| */ | ||
| numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes); | ||
| numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes); | ||
| for (i = 0; i < cpus->len; i++) { | ||
| unsigned int apic_id = cpus->cpus[i].arch_id; | ||
| assert(apic_id < apic_id_limit); | ||
| numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id); | ||
| } | ||
| for (i = 0; i < nb_numa_nodes; i++) { | ||
| numa_fw_cfg[apic_id_limit + 1 + i] = | ||
| cpu_to_le64(numa_info[i].node_mem); | ||
| } | ||
| fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg, | ||
| (1 + apic_id_limit + nb_numa_nodes) * | ||
| sizeof(*numa_fw_cfg)); | ||
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| return fw_cfg; | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| #ifndef QEMU_I386_FW_H | ||
| #define QEMU_I386_FW_H | ||
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| #include "hw/boards.h" | ||
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| #include "hw/nvram/fw_cfg.h" | ||
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| #include "hw/timer/hpet.h" | ||
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| #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) | ||
| #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) | ||
| #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) | ||
| #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3) | ||
| #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4) | ||
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| FWCfgState *fw_cfg_init(uint16_t boot_cpus, const CPUArchIdList *cpus, unsigned apic_id_limit); | ||
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| #endif |