From dab8260d88f3e7d21cd6b56c57c1317dc2d5efb7 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 13:34:31 +0000 Subject: [PATCH 01/33] Add Windows support for pcm-sensor-server - platform abstraction layer Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/CMakeLists.txt | 3 + src/pcm-sensor-server.cpp | 245 +++++++++++++++++++++++++++++++------- 2 files changed, 204 insertions(+), 44 deletions(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index aec24e1a..225fd496 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -132,6 +132,9 @@ if(MSVC) set_target_properties(pcm-service PROPERTIES LINK_FLAGS "/INCREMENTAL:NO" COMMON_LANGUAGE_RUNTIME "") set_property(TARGET pcm-service PROPERTY VS_DOTNET_REFERENCES "System;System.Configuration.Install;System.Data;System.Management;System.ServiceProcess;System.Xml") target_link_libraries(pcm-service pcm-lib) + + # pcm-sensor-server now also supported on Windows + list(APPEND PROJECT_NAMES pcm-sensor-server) endif(MSVC) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index f3ba4aae..9f5b1488 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -12,15 +12,34 @@ constexpr unsigned int DEFAULT_HTTPS_PORT = DEFAULT_HTTP_PORT; #include #include #include -#include #include +// Platform-specific includes +#ifdef _WIN32 +#include +#include +#include +#pragma comment(lib, "ws2_32.lib") +// Define UNIX-like types for Windows +typedef SOCKET socket_t; +#define SHUT_RDWR SD_BOTH +#define MSG_NOSIGNAL 0 +// errno values +#define EAGAIN WSAEWOULDBLOCK +#define EWOULDBLOCK WSAEWOULDBLOCK +inline int close(SOCKET s) { return closesocket(s); } +#else +#include #include #include #include #include #include #include +typedef int socket_t; +#define INVALID_SOCKET -1 +#define SOCKET_ERROR -1 +#endif #include #include @@ -216,9 +235,13 @@ class SignalHandler { return &instance; } +#ifdef _WIN32 + static BOOL WINAPI handleSignal( DWORD signum ); +#else static void handleSignal( int signum ); +#endif - void setSocket( int s ) { + void setSocket( socket_t s ) { networkSocket_ = s; } @@ -227,19 +250,31 @@ class SignalHandler { } void ignoreSignal( int signum ) { +#ifdef _WIN32 + // On Windows, ignoring signals is handled differently + // SIGPIPE doesn't exist on Windows, so this is a no-op +#else struct sigaction sa; sigemptyset(&sa.sa_mask); sa.sa_handler = SIG_IGN; sa.sa_flags = 0; sigaction( signum, &sa, 0 ); +#endif } void installHandler( void (*handler)(int), int signum ) { +#ifdef _WIN32 + // On Windows, use SetConsoleCtrlHandler for CTRL+C and CTRL+BREAK + (void)handler; // unused on Windows + (void)signum; // unused on Windows + SetConsoleCtrlHandler((PHANDLER_ROUTINE)handleSignal, TRUE); +#else struct sigaction sa; sigemptyset(&sa.sa_mask); sa.sa_handler = handler; sa.sa_flags = 0; sigaction( signum, &sa, 0 ); +#endif } SignalHandler( SignalHandler const & ) = delete; @@ -250,11 +285,11 @@ class SignalHandler { SignalHandler() = default; private: - static int networkSocket_; + static socket_t networkSocket_; static HTTPServer* httpServer_; }; -int SignalHandler::networkSocket_ = 0; +socket_t SignalHandler::networkSocket_ = INVALID_SOCKET; HTTPServer* SignalHandler::httpServer_ = nullptr; class JSONPrinter : Visitor @@ -887,7 +922,7 @@ void PrometheusPrinter::iterateVectorAndCallAccept(Vector const& v) { }; #if defined (USE_SSL) -void closeSSLConnectionAndFD( int fd, SSL* ssl ) { +void closeSSLConnectionAndFD( socket_t fd, SSL* ssl ) { int ret; if ( (ret = SSL_shutdown( ssl )) == 0 ) { @@ -916,13 +951,17 @@ class basic_socketbuf : public std::basic_streambuf { using int_type = typename Base::int_type; using traits_type = typename Base::traits_type; - basic_socketbuf( std::string dbg_ = std::string("Server: ") ): socketFD_(0), dbg(dbg_) { + basic_socketbuf( std::string dbg_ = std::string("Server: ") ): socketFD_(INVALID_SOCKET), dbg(dbg_) { // According to http://en.cppreference.com/w/cpp/io/basic_streambuf // epptr and egptr point beyond the buffer, so start + SIZE Base::setp( outputBuffer_, outputBuffer_ + SIZE ); Base::setg( inputBuffer_, inputBuffer_, inputBuffer_ ); // Default timeout of 10 seconds and 0 microseconds +#ifdef _WIN32 + timeout_ = 10000; // Windows uses milliseconds +#else timeout_ = { 10, 0 }; +#endif #if defined (USE_SSL) // I guess one could say that the instantiation of the ptr in this object will always be 0, i just want this to be explicit for now // cppcheck-suppress uselessAssignmentPtrArg @@ -935,28 +974,47 @@ class basic_socketbuf : public std::basic_streambuf { DBG( 3, dbg, "socketbuf destructor finished" ); } - int socket() { + socket_t socket() { return socketFD_; } - void setSocket( int socketFD ) { + void setSocket( socket_t socketFD ) { socketFD_ = socketFD; - if( 0 == socketFD ) // avoid work with 0 socket after closure socket and set value to 0 + if( INVALID_SOCKET == socketFD ) // avoid work with invalid socket after closure return; // When receiving the socket descriptor, set the timeout +#ifdef _WIN32 + DWORD timeout_ms = timeout_; + const auto res = setsockopt( socketFD_, SOL_SOCKET, SO_RCVTIMEO, (char*)&timeout_ms, sizeof(DWORD) ); +#else const auto res = setsockopt( socketFD_, SOL_SOCKET, SO_RCVTIMEO, (char*)&timeout_, sizeof(struct timeval) ); +#endif if (res != 0) { +#ifdef _WIN32 + std::cerr << "setsockopt failed while setting timeout value, error: " << WSAGetLastError() << "\n"; +#else std::cerr << "setsockopt failed while setting timeout value, " << strerror( errno ) << "\n"; +#endif } } +#ifdef _WIN32 + void setTimeout( DWORD t ) { + timeout_ = t; + const auto res = setsockopt( socketFD_, SOL_SOCKET, SO_RCVTIMEO, (char*)&timeout_, sizeof(DWORD) ); +#else void setTimeout( struct timeval t ) { timeout_ = t; const auto res = setsockopt( socketFD_, SOL_SOCKET, SO_RCVTIMEO, (char*)&timeout_, sizeof(struct timeval) ); +#endif if (res != 0) { +#ifdef _WIN32 + std::cerr << "setsockopt failed while setting timeout value, error: " << WSAGetLastError() << "\n"; +#else std::cerr << "setsockopt failed while setting timeout value, " << strerror( errno ) << "\n"; +#endif } } @@ -984,25 +1042,34 @@ class basic_socketbuf : public std::basic_streambuf { ssl_ = nullptr; } #endif - if ( 0 != socketFD_ ) { + if ( INVALID_SOCKET != socketFD_ ) { DBG( 3, dbg, "close clientsocketFD" ); ::close( socketFD_ ); + socketFD_ = INVALID_SOCKET; } } protected: int_type writeToSocket() { size_t bytesToSend; - ssize_t bytesSent; + int bytesSent; bytesToSend = (char*)Base::pptr() - (char*)Base::pbase(); DBG( 3, dbg, "wts: Bytes to send: ", bytesToSend ); #if defined (USE_SSL) if ( nullptr == ssl_ ) { #endif +#ifdef _WIN32 + bytesSent= ::send( socketFD_, (const char*)outputBuffer_, static_cast(bytesToSend), MSG_NOSIGNAL ); +#else bytesSent= ::send( socketFD_, (void*)outputBuffer_, bytesToSend, MSG_NOSIGNAL ); - if ( -1 == bytesSent ) { +#endif + if ( SOCKET_ERROR == bytesSent ) { +#ifdef _WIN32 + DBG( 3, "bytesSent == SOCKET_ERROR: WSAGetLastError: ", WSAGetLastError(), ", returning eof..." ); +#else DBG( 3, "bytesSent == -1: strerror( ", errno, " ): ", strerror( errno ), ", returning eof..." ); +#endif return traits_type::eof(); } #if defined (USE_SSL) @@ -1052,7 +1119,7 @@ class basic_socketbuf : public std::basic_streambuf { int sync() override { DBG( 3, dbg, "sync socketFD_: ", socketFD_ ); - if ( 0 == socketFD_ ) // Socket is closed already + if ( INVALID_SOCKET == socketFD_ ) // Socket is closed already return 0; DBG( 3, dbg, "sync: Calling writeToSocket()" ); @@ -1078,21 +1145,31 @@ class basic_socketbuf : public std::basic_streambuf { virtual int_type underflow() override { std::fill(inputBuffer_, inputBuffer_ + SIZE, 0); - ssize_t bytesReceived; + int bytesReceived; #if defined (USE_SSL) if ( nullptr == ssl_ ) { #endif DBG( 3, dbg, "Socketbuf: Read from socket:" ); +#ifdef _WIN32 + bytesReceived = ::recv( socketFD_, static_cast(inputBuffer_), SIZE * sizeof( char_type ), 0 ); +#else bytesReceived = ::read( socketFD_, static_cast(inputBuffer_), SIZE * sizeof( char_type ) ); +#endif if ( 0 == bytesReceived ) { // Client closed the socket normally, we will do the same close(); return traits_type::eof(); } - if ( -1 == bytesReceived ) { + if ( SOCKET_ERROR == bytesReceived ) { +#ifdef _WIN32 + int err = WSAGetLastError(); + if ( err ) + DBG( 3, dbg, "WSAError: ", err ); +#else if ( errno ) DBG( 3, dbg, "Errno: ", errno, ", (", strerror( errno ) , ")" ); +#endif close(); Base::setg( nullptr, nullptr, nullptr ); return traits_type::eof(); @@ -1173,8 +1250,12 @@ class basic_socketbuf : public std::basic_streambuf { protected: CharT outputBuffer_[SIZE]; CharT inputBuffer_[SIZE]; - int socketFD_; + socket_t socketFD_; +#ifdef _WIN32 + DWORD timeout_; +#else struct timeval timeout_; +#endif std::string dbg; #if defined (USE_SSL) SSL* ssl_; @@ -1195,11 +1276,11 @@ class basic_socketstream : public std::basic_iostream { basic_socketstream & operator = (const basic_socketstream &) = delete; basic_socketstream() : stream_type( &socketBuffer_ ) {} #if defined (USE_SSL) - basic_socketstream( int socketFD, SSL* ssl, std::string dbg_ = "Server: " ) : stream_type( &socketBuffer_ ), dbg( dbg_ ), socketBuffer_( dbg_ ) { + basic_socketstream( socket_t socketFD, SSL* ssl, std::string dbg_ = "Server: " ) : stream_type( &socketBuffer_ ), dbg( dbg_ ), socketBuffer_( dbg_ ) { DBG( 3, dbg, "socketFD = ", socketFD ); - if ( 0 == socketFD ) { - DBG( 3, dbg, "Trying to set socketFD to 0 which is not allowed!" ); - throw std::runtime_error( "Trying to set socketFD to 0 on basic_socketstream level which is not allowed." ); + if ( INVALID_SOCKET == socketFD ) { + DBG( 3, dbg, "Trying to set socketFD to INVALID_SOCKET which is not allowed!" ); + throw std::runtime_error( "Trying to set socketFD to INVALID_SOCKET on basic_socketstream level which is not allowed." ); } socketBuffer_.setSocket( socketFD ); @@ -1208,11 +1289,11 @@ class basic_socketstream : public std::basic_iostream { } #endif - basic_socketstream( int socketFD ) : stream_type( &socketBuffer_ ) { + basic_socketstream( socket_t socketFD ) : stream_type( &socketBuffer_ ) { DBG( 3, dbg, "socketFD = ", socketFD ); - if ( 0 == socketFD ) { - DBG( 3, dbg, "Trying to set socketFD to 0 which is not allowed!" ); - throw std::runtime_error( "Trying to set socketFD to 0 on basic_socketstream level which is not allowed." ); + if ( INVALID_SOCKET == socketFD ) { + DBG( 3, dbg, "Trying to set socketFD to INVALID_SOCKET which is not allowed!" ); + throw std::runtime_error( "Trying to set socketFD to INVALID_SOCKET on basic_socketstream level which is not allowed." ); } socketBuffer_.setSocket( socketFD ); } @@ -1276,7 +1357,7 @@ class basic_socketstream : public std::basic_iostream { } void putLine( std::string& line ) { - if ( !socketBuffer_.socket() ) + if ( INVALID_SOCKET == socketBuffer_.socket() ) throw std::runtime_error( "The socket is not or no longer open!" ); DBG( 3, dbg, "socketstream::putLine: putting \"", line, "\" into the socket." ); Base::write( line.c_str(), line.size() ); @@ -1300,32 +1381,55 @@ class Server { Server() = delete; Server( const std::string & listenIP, uint16_t port ) noexcept( false ) : listenIP_(listenIP), wq_( WorkQueue::getInstance() ), port_( port ) { DBG( 3, "Initializing Server" ); +#ifdef _WIN32 + // Initialize Winsock on Windows + WSADATA wsaData; + int result = WSAStartup(MAKEWORD(2, 2), &wsaData); + if (result != 0) { + throw std::runtime_error(std::string("WSAStartup failed: ") + std::to_string(result)); + } +#endif serverSocket_ = initializeServerSocket(); SignalHandler* shi = SignalHandler::getInstance(); shi->setSocket( serverSocket_ ); +#ifndef _WIN32 shi->ignoreSignal( SIGPIPE ); // Sorry Dennis Ritchie, we do not care about this, we always check return codes +#endif #ifndef UNIT_TEST // libFuzzer installs own signal handlers +#ifndef _WIN32 shi->installHandler( SignalHandler::handleSignal, SIGTERM ); shi->installHandler( SignalHandler::handleSignal, SIGINT ); +#else + shi->installHandler( nullptr, 0 ); // Windows uses SetConsoleCtrlHandler +#endif #endif } Server( Server const & ) = delete; Server & operator = ( Server const & ) = delete; virtual ~Server() { wq_ = nullptr; +#ifdef _WIN32 + WSACleanup(); +#endif } public: virtual void run() = 0; private: - int initializeServerSocket() { + socket_t initializeServerSocket() { if ( port_ == 0 ) throw std::runtime_error( "Server Constructor: No port specified." ); - int sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); - if ( -1 == sockfd ) + socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); + if ( INVALID_SOCKET == sockfd ) + { +#ifdef _WIN32 + throw std::runtime_error( std::string("Server Constructor: Can´t create socket: ") + std::to_string(WSAGetLastError()) ); +#else throw std::runtime_error( "Server Constructor: Can´t create socket" ); +#endif + } int retval = 0; @@ -1363,7 +1467,7 @@ class Server { protected: std::string listenIP_; WorkQueue* wq_; - int serverSocket_; + socket_t serverSocket_; uint16_t port_; }; @@ -2880,11 +2984,11 @@ class HTTPConnection : public Work { public: HTTPConnection() = delete; #if defined (USE_SSL) - HTTPConnection( HTTPServer* hs, int socketFD, struct sockaddr_in /* clientAddr */, std::vector const & cl, SSL* ssl = nullptr ) : hs_( hs ), socketStream_( socketFD, ssl ), /* clientAddress_( clientAddr ), */ callbackList_( cl ) { + HTTPConnection( HTTPServer* hs, socket_t socketFD, struct sockaddr_in /* clientAddr */, std::vector const & cl, SSL* ssl = nullptr ) : hs_( hs ), socketStream_( socketFD, ssl ), /* clientAddress_( clientAddr ), */ callbackList_( cl ) { DBG( 3, "HTTPConnection Constructor called..." ); } #else - HTTPConnection( HTTPServer* hs, int socketFD, struct sockaddr_in /* clientAddr */, std::vector const & cl ) : hs_( hs ), socketStream_( socketFD ), /* clientAddress_( clientAddr ), */ callbackList_( cl ) {} + HTTPConnection( HTTPServer* hs, socket_t socketFD, struct sockaddr_in /* clientAddr */, std::vector const & cl ) : hs_( hs ), socketStream_( socketFD ), /* clientAddress_( clientAddr ), */ callbackList_( cl ) {} #endif HTTPConnection( HTTPConnection const & ) = delete; void operator=( HTTPConnection const & ) = delete; @@ -3110,11 +3214,19 @@ class HTTPServer : public Server { return ret; } - bool checkForIncomingSSLConnection( int fd ) { + bool checkForIncomingSSLConnection( socket_t fd ) { char ch = ' '; +#ifdef _WIN32 + int bytes = ::recv( fd, &ch, 1, MSG_PEEK ); +#else ssize_t bytes = ::recv( fd, &ch, 1, MSG_PEEK ); - if ( bytes == -1 ) { +#endif + if ( SOCKET_ERROR == bytes ) { +#ifdef _WIN32 + DBG( 1, "recv call to peek for the first incoming character failed, WSAGetLastError = ", WSAGetLastError() ); +#else DBG( 1, "recv call to peek for the first incoming character failed, errno = ", errno, ", strerror: ", strerror(errno) ); +#endif throw std::runtime_error( "recv to peek first char failed" ); } else if ( bytes == 0 ) { DBG( 0, "Connection was properly closed by the client, no bytes to read" ); @@ -3149,6 +3261,23 @@ class HTTPServer : public Server { }; // Here to break dependency on HTTPServer +#ifdef _WIN32 +BOOL WINAPI SignalHandler::handleSignal( DWORD signum ) +{ + // Clean up, close socket and such + std::cerr << "handleSignal: signal " << signum << " caught.\n"; + std::cerr << "handleSignal: closing socket " << networkSocket_ << "\n"; + ::close( networkSocket_ ); + std::cerr << "Stopping HTTPServer\n"; + if (httpServer_) + httpServer_->stop(); + std::cerr << "Cleaning up PMU:\n"; + PCM::getInstance()->cleanup(); + std::cerr << "handleSignal: exiting with exit code 1...\n"; + exit(1); + return TRUE; +} +#else void SignalHandler::handleSignal( int signum ) { // Clean up, close socket and such @@ -3162,6 +3291,7 @@ void SignalHandler::handleSignal( int signum ) std::cerr << "handleSignal: exiting with exit code 1...\n"; exit(1); } +#endif void PeriodicCounterFetcher::execute() { using namespace std::chrono; @@ -3193,13 +3323,17 @@ void PeriodicCounterFetcher::execute() { void HTTPServer::run() { struct sockaddr_in clientAddress; clientAddress.sin_family = AF_INET; - int clientSocketFD = 0; + socket_t clientSocketFD = INVALID_SOCKET; while ( ! stopped_ ) { // Listen on socket for incoming requests socklen_t sa_len = sizeof( struct sockaddr_in ); - int retval = ::accept( serverSocket_, (struct sockaddr*)&clientAddress, &sa_len ); - if ( -1 == retval ) { + socket_t retval = ::accept( serverSocket_, (struct sockaddr*)&clientAddress, &sa_len ); + if ( INVALID_SOCKET == retval ) { +#ifdef _WIN32 + DBG( 3, "Accept returned INVALID_SOCKET, WSAGetLastError: ", WSAGetLastError() ); +#else DBG( 3, "Accept returned -1, errno: ", strerror( errno ) ); +#endif continue; } clientSocketFD = retval; @@ -3227,7 +3361,11 @@ void HTTPServer::run() { std::fill(ipbuf, ipbuf + INET_ADDRSTRLEN, 0); char const * resbuf = ::inet_ntop( AF_INET, &(clientAddress.sin_addr), ipbuf, INET_ADDRSTRLEN ); if ( nullptr == resbuf ) { +#ifdef _WIN32 + DBG( 3, "inet_ntop returned nullptr, WSAGetLastError: ", WSAGetLastError() ); +#else DBG( 3, "inet_ntop returned -1, strerror: ", strerror( errno ) ); +#endif DBG( 3, "close clientsocketFD" ); ::close( clientSocketFD ); continue; @@ -3319,7 +3457,7 @@ class HTTPSServer : public HTTPServer { void HTTPSServer::run() { struct sockaddr_in clientAddress; clientAddress.sin_family = AF_INET; - int clientSocketFD = 0; + socket_t clientSocketFD = INVALID_SOCKET; // Check SSL CTX for validity if ( nullptr == sslCTX_ ) throw std::runtime_error( "No SSL_CTX created" ); @@ -3327,10 +3465,14 @@ void HTTPSServer::run() { while ( ! stopped_ ) { // Listen on socket for incoming requests, same as for regular connection socklen_t sa_len = sizeof( struct sockaddr_in ); - int retval = ::accept( serverSocket_, (struct sockaddr*)&clientAddress, &sa_len ); - DBG( 3, "RegularAccept: (if not -1 it is client socket descriptor) ", retval ); - if ( -1 == retval ) { + socket_t retval = ::accept( serverSocket_, (struct sockaddr*)&clientAddress, &sa_len ); + DBG( 3, "RegularAccept: (if not INVALID_SOCKET it is client socket descriptor) ", retval ); + if ( INVALID_SOCKET == retval ) { +#ifdef _WIN32 + DBG( 3, "Accept failed: WSAGetLastError( ): ", WSAGetLastError() ); +#else DBG( 3, "Accept failed: strerror( ", errno, " ): ", strerror( errno ) ); +#endif continue; } clientSocketFD = retval; @@ -3420,7 +3562,11 @@ void HTTPSServer::run() { memset( ipbuf, 0, 16 ); char const * resbuf = ::inet_ntop( AF_INET, &(clientAddress.sin_addr), ipbuf, INET_ADDRSTRLEN ); if ( nullptr == resbuf ) { +#ifdef _WIN32 + DBG( 3, "inet_ntop returned an error: ", WSAGetLastError(), "\n"); +#else DBG( 3, "inet_ntop returned an error: ", errno, ", error string: ", strerror( errno ), "\n"); +#endif ERR_clear_error(); SSL_free( ssl ); // Free the SSL structure to prevent memory leaks ssl = nullptr; @@ -3722,18 +3868,20 @@ int startHTTPSServer( unsigned short port, std::string const & cFile, std::strin void printHelpText( std::string const & programName ) { std::cout << "Usage: " << programName << " [OPTION]\n\n"; std::cout << "Valid Options:\n"; +#ifndef _WIN32 std::cout << " -d : Run in the background\n"; +#endif #if defined (USE_SSL) std::cout << " -s : Use https protocol (default port " << DEFAULT_HTTPS_PORT << ")\n"; #endif std::cout << " -p portnumber : Run on port (default port is " << DEFAULT_HTTP_PORT << ")\n"; std::cout << " -r|--reset : Reset programming of the performance counters.\n"; std::cout << " -D|--debug level : level = 0: no debug info, > 0 increase verbosity.\n"; -#ifndef __APPLE__ +#if !defined(__APPLE__) && !defined(_WIN32) std::cout << " -R|--real-time : If possible the daemon will run with real time\n"; -#endif std::cout << " priority, could be useful under heavy load to \n"; std::cout << " stabilize the async counter fetching.\n"; +#endif #if defined (USE_SSL) std::cout << " -C|--certificateFile : \n"; std::cout << " -P|--privateKeyFile : \n"; @@ -3955,7 +4103,7 @@ int mainThrows(int argc, char * argv[]) { } #endif -#ifndef __APPLE__ +#if !defined(__APPLE__) && !defined(_WIN32) if ( useRealtimePriority ) { int priority = sched_get_priority_min( SCHED_RR ); if ( priority == -1 ) { @@ -3975,14 +4123,23 @@ int mainThrows(int argc, char * argv[]) { } #endif +#ifdef _WIN32 + // Windows doesn't support fork(), so daemon mode is not available + if ( daemonMode ) { + std::cerr << "Daemon mode is not supported on Windows. Starting in foreground mode.\n"; + daemonMode = false; + } + const int pid = 0; // Always run in foreground on Windows +#else pid_t pid; if ( daemonMode ) pid = fork(); else pid = 0; +#endif if ( pid == 0 ) { - /* child */ + /* child (or Windows foreground mode) */ // Default programming is to use normal core counters and memory bandwidth counters // and if pmem is available to also show this instead of partial writes // A HTTP interface to change the programming is planned From 320ada645d76e83374ab47cb569d156db0a506d1 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 13:40:10 +0000 Subject: [PATCH 02/33] Add Windows documentation for pcm-sensor-server Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- doc/PCM-EXPORTER.md | 23 +++++++++++++++-- doc/WINDOWS_HOWTO.md | 60 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+), 2 deletions(-) diff --git a/doc/PCM-EXPORTER.md b/doc/PCM-EXPORTER.md index 63efc0b6..cf759e04 100644 --- a/doc/PCM-EXPORTER.md +++ b/doc/PCM-EXPORTER.md @@ -3,6 +3,8 @@ pcm-sensor-server is a collector exposing Intel processor metrics over http in JSON or Prometheus (exporter text based) format. Also [available as a docker container](DOCKER_README.md). +**NEW**: pcm-sensor-server is now supported on Windows! See [Windows-specific instructions](#windows-support) below. + Installation on target system to be analyzed: 1. [Build](https://github.com/intel/pcm#building-pcm-tools) or [download](https://github.com/intel/pcm#downloading-pre-compiled-pcm-tools) pcm tools 2. As root, start pcm-sensor-server: `sudo ./pcm-sensor-server` or as non-root https://github.com/intel/pcm#executing-pcm-tools-under-non-root-user-on-linux @@ -16,16 +18,33 @@ $ ./pcm-sensor-server --help Usage: ./pcm-sensor-server [OPTION] Valid Options: - -d : Run in the background + -d : Run in the background (Linux/macOS only) -p portnumber : Run on port (default port is 9738) -r|--reset : Reset programming of the performance counters. -D|--debug level : level = 0: no debug info, > 0 increase verbosity. -R|--real-time : If possible the daemon will run with real time priority, could be useful under heavy load to - stabilize the async counter fetching. + stabilize the async counter fetching. (Linux only) -h|--help : This information ``` +## Windows Support + +pcm-sensor-server now runs natively on Windows. Key points: + +- **Requirements**: Windows 7+ or Windows Server 2008+ R2, Administrator privileges, MSR driver installed +- **Build instructions**: See [WINDOWS_HOWTO.md](WINDOWS_HOWTO.md#pcm-sensor-server-httphttps-server-for-grafana-integration) +- **Limitations**: + - Daemon mode (`-d`) not available - runs in foreground only + - Real-time priority (`-R`) not available + - Use Ctrl+C to stop the server + +Example on Windows: +``` +# Run as Administrator +pcm-sensor-server.exe -p 9738 +``` + The default output of pcm-sensor-server endpoint in a browser: ![image](https://user-images.githubusercontent.com/25432609/226344012-8783e154-998e-48a7-a2ca-f2c42af9c843.png) diff --git a/doc/WINDOWS_HOWTO.md b/doc/WINDOWS_HOWTO.md index 97a880d5..3ea6a35e 100644 --- a/doc/WINDOWS_HOWTO.md +++ b/doc/WINDOWS_HOWTO.md @@ -101,3 +101,63 @@ A: Despite that PCM-Service is reserving more memory than the standard 512kB thi ` to that file + +## pcm-sensor-server (HTTP/HTTPS server for Grafana integration) + +Starting from this release, **pcm-sensor-server** is now supported on Windows. This utility exposes PCM metrics over HTTP in JSON or Prometheus format for integration with Grafana dashboards. + +### Building pcm-sensor-server on Windows + +1. Follow steps 1-2 from [Compile the Windows MSR driver](#compile-the-windows-msr-driver) to compile and install the MSR driver + +2. Build pcm-sensor-server: + ``` + cmake -B build + cmake --build build --config Release --target pcm-sensor-server + ``` + + The executable will be located in `build\bin\Release\pcm-sensor-server.exe` + +3. (Optional) For HTTPS support, ensure OpenSSL is installed and available to CMake + +### Running pcm-sensor-server on Windows + +1. Copy `msr.sys` and `pcm-sensor-server.exe` to the PCM directory (e.g., `C:\Program Files (x86)\PCM\`) + +2. Run as Administrator (required for MSR access): + ``` + pcm-sensor-server.exe + ``` + + The server will start on the default port 9738 + +3. Common command-line options: + - `-p ` : Run on a specific port (default is 9738) + - `-D ` : Set debug verbosity level (0 = no debug, higher = more verbose) + - `-s` : Enable HTTPS (requires OpenSSL and certificate files) + - `-h` or `--help` : Show all available options + +4. Access the metrics: + - JSON format: http://localhost:9738/ (with `Accept: application/json` header) + - Prometheus format: http://localhost:9738/metrics + +### Windows-specific limitations + +- **Daemon mode not supported**: The `-d` (daemon/background) option is not available on Windows. The server runs in foreground mode only. +- **Real-time priority not supported**: The `-R` (real-time priority) option is not available on Windows. +- **Signal handling**: Use Ctrl+C to gracefully stop the server instead of SIGTERM/SIGINT. + +### Example: Running with Grafana on Windows + +1. Start pcm-sensor-server as Administrator: + ``` + pcm-sensor-server.exe -p 9738 + ``` + +2. Configure Prometheus to scrape from `http://localhost:9738/metrics` + +3. Configure Grafana to use your Prometheus data source + +4. Import the PCM Grafana dashboard (see [scripts/grafana/README.md](../scripts/grafana/README.md)) + +For more details on using pcm-sensor-server with Grafana, see [PCM-EXPORTER.md](PCM-EXPORTER.md). From d7448eb13b8b8c1d819b54e93f4122dfe2831087 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 13:41:49 +0000 Subject: [PATCH 03/33] Address code review feedback - improve documentation clarity Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- doc/PCM-EXPORTER.md | 2 +- doc/WINDOWS_HOWTO.md | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/PCM-EXPORTER.md b/doc/PCM-EXPORTER.md index cf759e04..15ac3433 100644 --- a/doc/PCM-EXPORTER.md +++ b/doc/PCM-EXPORTER.md @@ -32,7 +32,7 @@ Valid Options: pcm-sensor-server now runs natively on Windows. Key points: -- **Requirements**: Windows 7+ or Windows Server 2008+ R2, Administrator privileges, MSR driver installed +- **Requirements**: Windows 10+ or Windows Server 2016+ (earlier versions may work but are no longer officially supported), Administrator privileges, MSR driver installed - **Build instructions**: See [WINDOWS_HOWTO.md](WINDOWS_HOWTO.md#pcm-sensor-server-httphttps-server-for-grafana-integration) - **Limitations**: - Daemon mode (`-d`) not available - runs in foreground only diff --git a/doc/WINDOWS_HOWTO.md b/doc/WINDOWS_HOWTO.md index 3ea6a35e..4ad1a03b 100644 --- a/doc/WINDOWS_HOWTO.md +++ b/doc/WINDOWS_HOWTO.md @@ -108,7 +108,7 @@ Starting from this release, **pcm-sensor-server** is now supported on Windows. T ### Building pcm-sensor-server on Windows -1. Follow steps 1-2 from [Compile the Windows MSR driver](#compile-the-windows-msr-driver) to compile and install the MSR driver +1. Follow the **Compile the Windows MSR driver** and **Sign the Windows MSR driver** sections above to compile, sign, and install the MSR driver (`msr.sys`) 2. Build pcm-sensor-server: ``` @@ -122,7 +122,7 @@ Starting from this release, **pcm-sensor-server** is now supported on Windows. T ### Running pcm-sensor-server on Windows -1. Copy `msr.sys` and `pcm-sensor-server.exe` to the PCM directory (e.g., `C:\Program Files (x86)\PCM\`) +1. Choose or create a directory for PCM (e.g., `C:\Program Files\PCM\` or `C:\Program Files (x86)\PCM\`). Copy `msr.sys` and `pcm-sensor-server.exe` to this directory. 2. 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defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +#endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_C) +# define COMPILER_ID "SunPro" +# if __SUNPRO_C >= 0x5100 + /* __SUNPRO_C = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_C>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_C>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_C & 0xF) +# endif + +#elif defined(__HP_cc) +# define COMPILER_ID "HP" + /* __HP_cc = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_cc/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_cc/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_cc % 100) + +#elif defined(__DECC) +# define COMPILER_ID "Compaq" + /* __DECC_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECC_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECC_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECC_VER % 10000) + +#elif defined(__IBMC__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__open_xl__) && defined(__clang__) +# define COMPILER_ID "IBMClang" +# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__) +# define COMPILER_VERSION_MINOR DEC(__open_xl_release__) +# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__) + + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ >= 800 +# define COMPILER_ID "XL" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__IBMC__) && !defined(__COMPILER_VER__) && __IBMC__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMC__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMC__ % 10) + +#elif defined(__NVCOMPILER) +# define COMPILER_ID "NVHPC" +# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__) +# if defined(__NVCOMPILER_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__) +# endif + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(__clang__) && defined(__cray__) +# define COMPILER_ID "CrayClang" +# define COMPILER_VERSION_MAJOR DEC(__cray_major__) +# define COMPILER_VERSION_MINOR DEC(__cray_minor__) +# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__CLANG_FUJITSU) +# define COMPILER_ID "FujitsuClang" +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__FUJITSU) +# define COMPILER_ID "Fujitsu" +# if defined(__FCC_version__) +# define COMPILER_VERSION __FCC_version__ +# elif defined(__FCC_major__) +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# endif +# if defined(__fcc_version) +# define COMPILER_VERSION_INTERNAL DEC(__fcc_version) +# elif defined(__FCC_VERSION) +# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION) +# endif + + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TASKING__) +# define COMPILER_ID "Tasking" + # define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000) + # define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100) +# define COMPILER_VERSION_INTERNAL DEC(__VERSION__) + +#elif defined(__ORANGEC__) +# define COMPILER_ID "OrangeC" +# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__) + +#elif defined(__TINYC__) +# define COMPILER_ID "TinyCC" + +#elif defined(__BCC__) +# define COMPILER_ID "Bruce" + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) && defined(__ti__) +# define COMPILER_ID "TIClang" + # define COMPILER_VERSION_MAJOR DEC(__ti_major__) + # define COMPILER_VERSION_MINOR DEC(__ti_minor__) + # define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__) +# define COMPILER_VERSION_INTERNAL DEC(__ti_version__) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__)) +# define COMPILER_ID "LCC" +# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100) +# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100) +# if defined(__LCC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__) +# endif +# if defined(__GNUC__) && defined(__GNUC_MINOR__) +# define SIMULATE_ID "GNU" +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif +# endif + +#elif defined(__GNUC__) +# define COMPILER_ID "GNU" +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(_ADI_COMPILER) +# define COMPILER_ID "ADSP" +#if defined(__VERSIONNUM__) + /* __VERSIONNUM__ = 0xVVRRPPTT */ +# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF) +# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + +#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC) +# define COMPILER_ID "SDCC" +# if defined(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR) +# define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR) +# define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH) +# else + /* SDCC = VRP */ +# define COMPILER_VERSION_MAJOR DEC(SDCC/100) +# define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10) +# define COMPILER_VERSION_PATCH DEC(SDCC % 10) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__MSYS__) +# define PLATFORM_ID "MSYS" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# elif defined(__VXWORKS__) +# define PLATFORM_ID "VxWorks" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +# elif defined(_ADI_COMPILER) +# define PLATFORM_ID "ADSP" + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_ARM64EC) +# define ARCHITECTURE_ID "ARM64EC" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__ICCSTM8__) +# define ARCHITECTURE_ID "STM8" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__clang__) && defined(__ti__) +# if defined(__ARM_ARCH) +# define ARCHITECTURE_ID "ARM" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__TI_COMPILER_VERSION__) +# if defined(__TI_ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__MSP430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__TMS320C28XX__) +# define ARCHITECTURE_ID "TMS320C28x" + +# elif defined(__TMS320C6X__) || defined(_TMS320C6X) +# define ARCHITECTURE_ID "TMS320C6x" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +# elif defined(__ADSPSHARC__) +# define ARCHITECTURE_ID "SHARC" + +# elif defined(__ADSPBLACKFIN__) +# define ARCHITECTURE_ID "Blackfin" + +#elif defined(__TASKING__) + +# if defined(__CTC__) || defined(__CPTC__) +# define ARCHITECTURE_ID "TriCore" + +# elif defined(__CMCS__) +# define ARCHITECTURE_ID "MCS" + +# elif defined(__CARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__CARC__) +# define ARCHITECTURE_ID "ARC" + +# elif defined(__C51__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__CPCP__) +# define ARCHITECTURE_ID "PCP" + +# else +# define ARCHITECTURE_ID "" +# endif + +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number. */ +#ifdef COMPILER_VERSION +char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]"; + +/* Construct a string literal encoding the version number components. */ +#elif defined(COMPILER_VERSION_MAJOR) +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#elif defined(COMPILER_VERSION_INTERNAL_STR) +char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + +#define C_STD_99 199901L +#define C_STD_11 201112L +#define C_STD_17 201710L +#define C_STD_23 202311L + +#ifdef __STDC_VERSION__ +# define C_STD __STDC_VERSION__ +#endif + +#if !defined(__STDC__) && !defined(__clang__) +# if defined(_MSC_VER) || defined(__ibmxl__) || defined(__IBMC__) +# define C_VERSION "90" +# else +# define C_VERSION +# endif +#elif C_STD > C_STD_17 +# define C_VERSION "23" +#elif C_STD > C_STD_11 +# define C_VERSION "17" +#elif C_STD > C_STD_99 +# define C_VERSION "11" +#elif C_STD >= C_STD_99 +# define C_VERSION "99" +#else +# define C_VERSION "90" +#endif +const char* info_language_standard_default = + "INFO" ":" "standard_default[" C_VERSION "]"; + +const char* info_language_extensions_default = "INFO" ":" "extensions_default[" +#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) || \ + defined(__TI_COMPILER_VERSION__)) && \ + !defined(__STRICT_ANSI__) + "ON" +#else + "OFF" +#endif +"]"; + +/*--------------------------------------------------------------------------*/ + +#ifdef ID_VOID_MAIN +void main() {} +#else +# if defined(__CLASSIC_C__) +int main(argc, argv) int argc; char *argv[]; +# else +int main(int argc, char* argv[]) +# endif +{ + int require = 0; + require += info_compiler[argc]; + require += info_platform[argc]; + require += info_arch[argc]; +#ifdef COMPILER_VERSION_MAJOR + require += info_version[argc]; +#endif +#ifdef COMPILER_VERSION_INTERNAL + require += info_version_internal[argc]; +#endif +#ifdef SIMULATE_ID + require += info_simulate[argc]; +#endif +#ifdef SIMULATE_VERSION_MAJOR + require += info_simulate_version[argc]; +#endif +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) + require += info_cray[argc]; +#endif + require += info_language_standard_default[argc]; + require += info_language_extensions_default[argc]; + (void)argv; + return require; +} +#endif diff --git a/_codeql_build_dir/CMakeFiles/3.31.6/CompilerIdCXX/CMakeCXXCompilerId.cpp b/_codeql_build_dir/CMakeFiles/3.31.6/CompilerIdCXX/CMakeCXXCompilerId.cpp new file mode 100644 index 00000000..3b6e114c --- /dev/null +++ b/_codeql_build_dir/CMakeFiles/3.31.6/CompilerIdCXX/CMakeCXXCompilerId.cpp @@ -0,0 +1,919 @@ +/* This source file must have a .cpp extension so that all C++ compilers + recognize the extension without flags. Borland does not know .cxx for + example. */ +#ifndef __cplusplus +# error "A C compiler has been selected for C++." +#endif + +#if !defined(__has_include) +/* If the compiler does not have __has_include, pretend the answer is + always no. */ +# define __has_include(x) 0 +#endif + + +/* Version number components: V=Version, R=Revision, P=Patch + Version date components: YYYY=Year, MM=Month, DD=Day */ + +#if defined(__INTEL_COMPILER) || defined(__ICC) +# define COMPILER_ID "Intel" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# if defined(__GNUC__) +# define SIMULATE_ID "GNU" +# endif + /* __INTEL_COMPILER = VRP prior to 2021, and then VVVV for 2021 and later, + except that a few beta releases use the old format with V=2021. */ +# if __INTEL_COMPILER < 2021 || __INTEL_COMPILER == 202110 || __INTEL_COMPILER == 202111 +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10) +# if defined(__INTEL_COMPILER_UPDATE) +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE) +# else +# define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER % 10) +# endif +# else +# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER) +# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE) + /* The third version component from --version is an update index, + but no macro is provided for it. */ +# define COMPILER_VERSION_PATCH DEC(0) +# endif +# if defined(__INTEL_COMPILER_BUILD_DATE) + /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */ +# define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE) +# endif +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER) +# define COMPILER_ID "IntelLLVM" +#if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +#endif +#if defined(__GNUC__) +# define SIMULATE_ID "GNU" +#endif +/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and + * later. Look for 6 digit vs. 8 digit version number to decide encoding. + * VVVV is no smaller than the current year when a version is released. + */ +#if __INTEL_LLVM_COMPILER < 1000000L +# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100) +# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 10) +#else +# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000) +# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER % 100) +#endif +#if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +#endif +#if defined(__GNUC__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +#elif defined(__GNUG__) +# define SIMULATE_VERSION_MAJOR DEC(__GNUG__) +#endif +#if defined(__GNUC_MINOR__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +#endif +#if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +#endif + +#elif defined(__PATHCC__) +# define COMPILER_ID "PathScale" +# define COMPILER_VERSION_MAJOR DEC(__PATHCC__) +# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__) +# if defined(__PATHCC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__) +# endif + +#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__) +# define COMPILER_ID "Embarcadero" +# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF) +# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF) +# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__ & 0xFFFF) + +#elif defined(__BORLANDC__) +# define COMPILER_ID "Borland" + /* __BORLANDC__ = 0xVRR */ +# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8) +# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF) + +#elif defined(__WATCOMC__) && __WATCOMC__ < 1200 +# define COMPILER_ID "Watcom" + /* __WATCOMC__ = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__WATCOMC__) +# define COMPILER_ID "OpenWatcom" + /* __WATCOMC__ = VVRP + 1100 */ +# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100) +# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10) +# if (__WATCOMC__ % 10) > 0 +# define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10) +# endif + +#elif defined(__SUNPRO_CC) +# define COMPILER_ID "SunPro" +# if __SUNPRO_CC >= 0x5100 + /* __SUNPRO_CC = 0xVRRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# else + /* __SUNPRO_CC = 0xVRP */ +# define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8) +# define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF) +# define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC & 0xF) +# endif + +#elif defined(__HP_aCC) +# define COMPILER_ID "HP" + /* __HP_aCC = VVRRPP */ +# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000) +# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100) +# define COMPILER_VERSION_PATCH DEC(__HP_aCC % 100) + +#elif defined(__DECCXX) +# define COMPILER_ID "Compaq" + /* __DECCXX_VER = VVRRTPPPP */ +# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000) +# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000 % 100) +# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER % 10000) + +#elif defined(__IBMCPP__) && defined(__COMPILER_VER__) +# define COMPILER_ID "zOS" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__open_xl__) && defined(__clang__) +# define COMPILER_ID "IBMClang" +# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__) +# define COMPILER_VERSION_MINOR DEC(__open_xl_release__) +# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__) + + +#elif defined(__ibmxl__) && defined(__clang__) +# define COMPILER_ID "XLClang" +# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__) +# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__) +# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__) +# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__) + + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800 +# define COMPILER_ID "XL" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800 +# define COMPILER_ID "VisualAge" + /* __IBMCPP__ = VRP */ +# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100) +# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10) +# define COMPILER_VERSION_PATCH DEC(__IBMCPP__ % 10) + +#elif defined(__NVCOMPILER) +# define COMPILER_ID "NVHPC" +# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__) +# if defined(__NVCOMPILER_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__) +# endif + +#elif defined(__PGI) +# define COMPILER_ID "PGI" +# define COMPILER_VERSION_MAJOR DEC(__PGIC__) +# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__) +# if defined(__PGIC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__) +# endif + +#elif defined(__clang__) && defined(__cray__) +# define COMPILER_ID "CrayClang" +# define COMPILER_VERSION_MAJOR DEC(__cray_major__) +# define COMPILER_VERSION_MINOR DEC(__cray_minor__) +# define COMPILER_VERSION_PATCH DEC(__cray_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(_CRAYC) +# define COMPILER_ID "Cray" +# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR) +# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR) + +#elif defined(__TI_COMPILER_VERSION__) +# define COMPILER_ID "TI" + /* __TI_COMPILER_VERSION__ = VVVRRRPPP */ +# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000) +# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000 % 1000) +# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__ % 1000) + +#elif defined(__CLANG_FUJITSU) +# define COMPILER_ID "FujitsuClang" +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# define COMPILER_VERSION_INTERNAL_STR __clang_version__ + + +#elif defined(__FUJITSU) +# define COMPILER_ID "Fujitsu" +# if defined(__FCC_version__) +# define COMPILER_VERSION __FCC_version__ +# elif defined(__FCC_major__) +# define COMPILER_VERSION_MAJOR DEC(__FCC_major__) +# define COMPILER_VERSION_MINOR DEC(__FCC_minor__) +# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__) +# endif +# if defined(__fcc_version) +# define COMPILER_VERSION_INTERNAL DEC(__fcc_version) +# elif defined(__FCC_VERSION) +# define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION) +# endif + + +#elif defined(__ghs__) +# define COMPILER_ID "GHS" +/* __GHS_VERSION_NUMBER = VVVVRP */ +# ifdef __GHS_VERSION_NUMBER +# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100) +# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10) +# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER % 10) +# endif + +#elif defined(__TASKING__) +# define COMPILER_ID "Tasking" + # define COMPILER_VERSION_MAJOR DEC(__VERSION__/1000) + # define COMPILER_VERSION_MINOR DEC(__VERSION__ % 100) +# define COMPILER_VERSION_INTERNAL DEC(__VERSION__) + +#elif defined(__ORANGEC__) +# define COMPILER_ID "OrangeC" +# define COMPILER_VERSION_MAJOR DEC(__ORANGEC_MAJOR__) +# define COMPILER_VERSION_MINOR DEC(__ORANGEC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__ORANGEC_PATCHLEVEL__) + +#elif defined(__SCO_VERSION__) +# define COMPILER_ID "SCO" + +#elif defined(__ARMCC_VERSION) && !defined(__clang__) +# define COMPILER_ID "ARMCC" +#if __ARMCC_VERSION >= 1000000 + /* __ARMCC_VERSION = VRRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#else + /* __ARMCC_VERSION = VRPPPP */ + # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000) + # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10) + # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION % 10000) +#endif + + +#elif defined(__clang__) && defined(__apple_build_version__) +# define COMPILER_ID "AppleClang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif +# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__) + +#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION) +# define COMPILER_ID "ARMClang" + # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000) + # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100) + # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION/100 % 100) +# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION) + +#elif defined(__clang__) && defined(__ti__) +# define COMPILER_ID "TIClang" + # define COMPILER_VERSION_MAJOR DEC(__ti_major__) + # define COMPILER_VERSION_MINOR DEC(__ti_minor__) + # define COMPILER_VERSION_PATCH DEC(__ti_patchlevel__) +# define COMPILER_VERSION_INTERNAL DEC(__ti_version__) + +#elif defined(__clang__) +# define COMPILER_ID "Clang" +# if defined(_MSC_VER) +# define SIMULATE_ID "MSVC" +# endif +# define COMPILER_VERSION_MAJOR DEC(__clang_major__) +# define COMPILER_VERSION_MINOR DEC(__clang_minor__) +# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__) +# if defined(_MSC_VER) + /* _MSC_VER = VVRR */ +# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100) +# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100) +# endif + +#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__)) +# define COMPILER_ID "LCC" +# define COMPILER_VERSION_MAJOR DEC(__LCC__ / 100) +# define COMPILER_VERSION_MINOR DEC(__LCC__ % 100) +# if defined(__LCC_MINOR__) +# define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__) +# endif +# if defined(__GNUC__) && defined(__GNUC_MINOR__) +# define SIMULATE_ID "GNU" +# define SIMULATE_VERSION_MAJOR DEC(__GNUC__) +# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__) +# if defined(__GNUC_PATCHLEVEL__) +# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif +# endif + +#elif defined(__GNUC__) || defined(__GNUG__) +# define COMPILER_ID "GNU" +# if defined(__GNUC__) +# define COMPILER_VERSION_MAJOR DEC(__GNUC__) +# else +# define COMPILER_VERSION_MAJOR DEC(__GNUG__) +# endif +# if defined(__GNUC_MINOR__) +# define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__) +# endif +# if defined(__GNUC_PATCHLEVEL__) +# define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__) +# endif + +#elif defined(_MSC_VER) +# define COMPILER_ID "MSVC" + /* _MSC_VER = VVRR */ +# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100) +# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100) +# if defined(_MSC_FULL_VER) +# if _MSC_VER >= 1400 + /* _MSC_FULL_VER = VVRRPPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000) +# else + /* _MSC_FULL_VER = VVRRPPPP */ +# define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000) +# endif +# endif +# if defined(_MSC_BUILD) +# define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD) +# endif + +#elif defined(_ADI_COMPILER) +# define COMPILER_ID "ADSP" +#if defined(__VERSIONNUM__) + /* __VERSIONNUM__ = 0xVVRRPPTT */ +# define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF) +# define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF) +# define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF) +# define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF) +#endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# define COMPILER_ID "IAR" +# if defined(__VER__) && defined(__ICCARM__) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000) +# define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000) +# define COMPILER_VERSION_PATCH DEC((__VER__) % 1000) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__)) +# define COMPILER_VERSION_MAJOR DEC((__VER__) / 100) +# define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100)) +# define COMPILER_VERSION_PATCH DEC(__SUBVERSION__) +# define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__) +# endif + + +/* These compilers are either not known or too old to define an + identification macro. Try to identify the platform and guess that + it is the native compiler. */ +#elif defined(__hpux) || defined(__hpua) +# define COMPILER_ID "HP" + +#else /* unknown compiler */ +# define COMPILER_ID "" +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; +#ifdef SIMULATE_ID +char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; +#endif + +#ifdef __QNXNTO__ +char const* qnxnto = "INFO" ":" "qnxnto[]"; +#endif + +#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) +char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; +#endif + +#define STRINGIFY_HELPER(X) #X +#define STRINGIFY(X) STRINGIFY_HELPER(X) + +/* Identify known platforms by name. */ +#if defined(__linux) || defined(__linux__) || defined(linux) +# define PLATFORM_ID "Linux" + +#elif defined(__MSYS__) +# define PLATFORM_ID "MSYS" + +#elif defined(__CYGWIN__) +# define PLATFORM_ID "Cygwin" + +#elif defined(__MINGW32__) +# define PLATFORM_ID "MinGW" + +#elif defined(__APPLE__) +# define PLATFORM_ID "Darwin" + +#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) +# define PLATFORM_ID "Windows" + +#elif defined(__FreeBSD__) || defined(__FreeBSD) +# define PLATFORM_ID "FreeBSD" + +#elif defined(__NetBSD__) || defined(__NetBSD) +# define PLATFORM_ID "NetBSD" + +#elif defined(__OpenBSD__) || defined(__OPENBSD) +# define PLATFORM_ID "OpenBSD" + +#elif defined(__sun) || defined(sun) +# define PLATFORM_ID "SunOS" + +#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) +# define PLATFORM_ID "AIX" + +#elif defined(__hpux) || defined(__hpux__) +# define PLATFORM_ID "HP-UX" + +#elif defined(__HAIKU__) +# define PLATFORM_ID "Haiku" + +#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) +# define PLATFORM_ID "BeOS" + +#elif defined(__QNX__) || defined(__QNXNTO__) +# define PLATFORM_ID "QNX" + +#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) +# define PLATFORM_ID "Tru64" + +#elif defined(__riscos) || defined(__riscos__) +# define PLATFORM_ID "RISCos" + +#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) +# define PLATFORM_ID "SINIX" + +#elif defined(__UNIX_SV__) +# define PLATFORM_ID "UNIX_SV" + +#elif defined(__bsdos__) +# define PLATFORM_ID "BSDOS" + +#elif defined(_MPRAS) || defined(MPRAS) +# define PLATFORM_ID "MP-RAS" + +#elif defined(__osf) || defined(__osf__) +# define PLATFORM_ID "OSF1" + +#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) +# define PLATFORM_ID "SCO_SV" + +#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) +# define PLATFORM_ID "ULTRIX" + +#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) +# define PLATFORM_ID "Xenix" + +#elif defined(__WATCOMC__) +# if defined(__LINUX__) +# define PLATFORM_ID "Linux" + +# elif defined(__DOS__) +# define PLATFORM_ID "DOS" + +# elif defined(__OS2__) +# define PLATFORM_ID "OS2" + +# elif defined(__WINDOWS__) +# define PLATFORM_ID "Windows3x" + +# elif defined(__VXWORKS__) +# define PLATFORM_ID "VxWorks" + +# else /* unknown platform */ +# define PLATFORM_ID +# endif + +#elif defined(__INTEGRITY) +# if defined(INT_178B) +# define PLATFORM_ID "Integrity178" + +# else /* regular Integrity */ +# define PLATFORM_ID "Integrity" +# endif + +# elif defined(_ADI_COMPILER) +# define PLATFORM_ID "ADSP" + +#else /* unknown platform */ +# define PLATFORM_ID + +#endif + +/* For windows compilers MSVC and Intel we can determine + the architecture of the compiler being used. This is because + the compilers do not have flags that can change the architecture, + but rather depend on which compiler is being used +*/ +#if defined(_WIN32) && defined(_MSC_VER) +# if defined(_M_IA64) +# define ARCHITECTURE_ID "IA64" + +# elif defined(_M_ARM64EC) +# define ARCHITECTURE_ID "ARM64EC" + +# elif defined(_M_X64) || defined(_M_AMD64) +# define ARCHITECTURE_ID "x64" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# elif defined(_M_ARM64) +# define ARCHITECTURE_ID "ARM64" + +# elif defined(_M_ARM) +# if _M_ARM == 4 +# define ARCHITECTURE_ID "ARMV4I" +# elif _M_ARM == 5 +# define ARCHITECTURE_ID "ARMV5I" +# else +# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) +# endif + +# elif defined(_M_MIPS) +# define ARCHITECTURE_ID "MIPS" + +# elif defined(_M_SH) +# define ARCHITECTURE_ID "SHx" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__WATCOMC__) +# if defined(_M_I86) +# define ARCHITECTURE_ID "I86" + +# elif defined(_M_IX86) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) +# if defined(__ICCARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__ICCRX__) +# define ARCHITECTURE_ID "RX" + +# elif defined(__ICCRH850__) +# define ARCHITECTURE_ID "RH850" + +# elif defined(__ICCRL78__) +# define ARCHITECTURE_ID "RL78" + +# elif defined(__ICCRISCV__) +# define ARCHITECTURE_ID "RISCV" + +# elif defined(__ICCAVR__) +# define ARCHITECTURE_ID "AVR" + +# elif defined(__ICC430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__ICCV850__) +# define ARCHITECTURE_ID "V850" + +# elif defined(__ICC8051__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__ICCSTM8__) +# define ARCHITECTURE_ID "STM8" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__ghs__) +# if defined(__PPC64__) +# define ARCHITECTURE_ID "PPC64" + +# elif defined(__ppc__) +# define ARCHITECTURE_ID "PPC" + +# elif defined(__ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__x86_64__) +# define ARCHITECTURE_ID "x64" + +# elif defined(__i386__) +# define ARCHITECTURE_ID "X86" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__clang__) && defined(__ti__) +# if defined(__ARM_ARCH) +# define ARCHITECTURE_ID "ARM" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +#elif defined(__TI_COMPILER_VERSION__) +# if defined(__TI_ARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__MSP430__) +# define ARCHITECTURE_ID "MSP430" + +# elif defined(__TMS320C28XX__) +# define ARCHITECTURE_ID "TMS320C28x" + +# elif defined(__TMS320C6X__) || defined(_TMS320C6X) +# define ARCHITECTURE_ID "TMS320C6x" + +# else /* unknown architecture */ +# define ARCHITECTURE_ID "" +# endif + +# elif defined(__ADSPSHARC__) +# define ARCHITECTURE_ID "SHARC" + +# elif defined(__ADSPBLACKFIN__) +# define ARCHITECTURE_ID "Blackfin" + +#elif defined(__TASKING__) + +# if defined(__CTC__) || defined(__CPTC__) +# define ARCHITECTURE_ID "TriCore" + +# elif defined(__CMCS__) +# define ARCHITECTURE_ID "MCS" + +# elif defined(__CARM__) +# define ARCHITECTURE_ID "ARM" + +# elif defined(__CARC__) +# define ARCHITECTURE_ID "ARC" + +# elif defined(__C51__) +# define ARCHITECTURE_ID "8051" + +# elif defined(__CPCP__) +# define ARCHITECTURE_ID "PCP" + +# else +# define ARCHITECTURE_ID "" +# endif + +#else +# define ARCHITECTURE_ID +#endif + +/* Convert integer to decimal digit literals. */ +#define DEC(n) \ + ('0' + (((n) / 10000000)%10)), \ + ('0' + (((n) / 1000000)%10)), \ + ('0' + (((n) / 100000)%10)), \ + ('0' + (((n) / 10000)%10)), \ + ('0' + (((n) / 1000)%10)), \ + ('0' + (((n) / 100)%10)), \ + ('0' + (((n) / 10)%10)), \ + ('0' + ((n) % 10)) + +/* Convert integer to hex digit literals. */ +#define HEX(n) \ + ('0' + ((n)>>28 & 0xF)), \ + ('0' + ((n)>>24 & 0xF)), \ + ('0' + ((n)>>20 & 0xF)), \ + ('0' + ((n)>>16 & 0xF)), \ + ('0' + ((n)>>12 & 0xF)), \ + ('0' + ((n)>>8 & 0xF)), \ + ('0' + ((n)>>4 & 0xF)), \ + ('0' + ((n) & 0xF)) + +/* Construct a string literal encoding the version number. */ +#ifdef COMPILER_VERSION +char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]"; + +/* Construct a string literal encoding the version number components. */ +#elif defined(COMPILER_VERSION_MAJOR) +char const info_version[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', + COMPILER_VERSION_MAJOR, +# ifdef COMPILER_VERSION_MINOR + '.', COMPILER_VERSION_MINOR, +# ifdef COMPILER_VERSION_PATCH + '.', COMPILER_VERSION_PATCH, +# ifdef COMPILER_VERSION_TWEAK + '.', COMPILER_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct a string literal encoding the internal version number. */ +#ifdef COMPILER_VERSION_INTERNAL +char const info_version_internal[] = { + 'I', 'N', 'F', 'O', ':', + 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', + 'i','n','t','e','r','n','a','l','[', + COMPILER_VERSION_INTERNAL,']','\0'}; +#elif defined(COMPILER_VERSION_INTERNAL_STR) +char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; +#endif + +/* Construct a string literal encoding the version number components. */ +#ifdef SIMULATE_VERSION_MAJOR +char const info_simulate_version[] = { + 'I', 'N', 'F', 'O', ':', + 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', + SIMULATE_VERSION_MAJOR, +# ifdef SIMULATE_VERSION_MINOR + '.', SIMULATE_VERSION_MINOR, +# ifdef SIMULATE_VERSION_PATCH + '.', SIMULATE_VERSION_PATCH, +# ifdef SIMULATE_VERSION_TWEAK + '.', SIMULATE_VERSION_TWEAK, +# endif +# endif +# endif + ']','\0'}; +#endif + +/* Construct the string literal in pieces to prevent the source from + getting matched. Store it in a pointer rather than an array + because some compilers will just produce instructions to fill the + array rather than assigning a pointer to a static array. */ +char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; +char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; + + + +#define CXX_STD_98 199711L +#define CXX_STD_11 201103L +#define CXX_STD_14 201402L +#define CXX_STD_17 201703L +#define CXX_STD_20 202002L +#define CXX_STD_23 202302L + +#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) +# if _MSVC_LANG > CXX_STD_17 +# define CXX_STD _MSVC_LANG +# elif _MSVC_LANG == CXX_STD_17 && defined(__cpp_aggregate_paren_init) +# define CXX_STD CXX_STD_20 +# elif _MSVC_LANG > CXX_STD_14 && __cplusplus > CXX_STD_17 +# define CXX_STD CXX_STD_20 +# elif _MSVC_LANG > CXX_STD_14 +# define CXX_STD CXX_STD_17 +# elif defined(__INTEL_CXX11_MODE__) && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# elif defined(__INTEL_CXX11_MODE__) +# define CXX_STD CXX_STD_11 +# else +# define CXX_STD CXX_STD_98 +# endif +#elif defined(_MSC_VER) && defined(_MSVC_LANG) +# if _MSVC_LANG > __cplusplus +# define CXX_STD _MSVC_LANG +# else +# define CXX_STD __cplusplus +# endif +#elif defined(__NVCOMPILER) +# if __cplusplus == CXX_STD_17 && defined(__cpp_aggregate_paren_init) +# define CXX_STD CXX_STD_20 +# else +# define CXX_STD __cplusplus +# endif +#elif defined(__INTEL_COMPILER) || defined(__PGI) +# if __cplusplus == CXX_STD_11 && defined(__cpp_namespace_attributes) +# define CXX_STD CXX_STD_17 +# elif __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# else +# define CXX_STD __cplusplus +# endif +#elif (defined(__IBMCPP__) || defined(__ibmxl__)) && defined(__linux__) +# if __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) +# define CXX_STD CXX_STD_14 +# else +# define CXX_STD __cplusplus +# endif +#elif __cplusplus == 1 && defined(__GXX_EXPERIMENTAL_CXX0X__) +# define CXX_STD CXX_STD_11 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file mode 100644 index 00000000..3dccd731 --- /dev/null +++ b/_codeql_build_dir/CMakeFiles/cmake.check_cache @@ -0,0 +1 @@ +# This file is generated by cmake for dependency checking of the CMakeCache.txt file diff --git a/_codeql_build_dir/CMakeFiles/progress.marks b/_codeql_build_dir/CMakeFiles/progress.marks new file mode 100644 index 00000000..d22307c4 --- /dev/null +++ b/_codeql_build_dir/CMakeFiles/progress.marks @@ -0,0 +1 @@ +88 diff --git a/_codeql_build_dir/CPackConfig.cmake b/_codeql_build_dir/CPackConfig.cmake new file mode 100644 index 00000000..d4627f34 --- /dev/null +++ b/_codeql_build_dir/CPackConfig.cmake @@ -0,0 +1,88 @@ +# This file will be configured to contain variables for CPack. These variables +# should be set in the CMake list file of the project before CPack module is +# included. The list of available CPACK_xxx variables and their associated +# documentation may be obtained using +# cpack --help-variable-list +# +# Some variables are common to all generators (e.g. CPACK_PACKAGE_NAME) +# and some are specific to a generator +# (e.g. CPACK_NSIS_EXTRA_INSTALL_COMMANDS). The generator specific variables +# usually begin with CPACK__xxxx. + + +set(CPACK_BUILD_SOURCE_DIRS "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm;/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir") +set(CPACK_CMAKE_GENERATOR "Unix Makefiles") +set(CPACK_COMPONENT_UNSPECIFIED_HIDDEN "TRUE") +set(CPACK_COMPONENT_UNSPECIFIED_REQUIRED "TRUE") +set(CPACK_DEBIAN_PACKAGE_SHLIBDEPS "ON") +set(CPACK_DEB_COMPONENT_INSTALL "ON") +set(CPACK_DEFAULT_PACKAGE_DESCRIPTION_FILE "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_DEFAULT_PACKAGE_DESCRIPTION_SUMMARY "PCM built using CMake") +set(CPACK_DMG_SLA_USE_RESOURCE_FILE_LICENSE "ON") +set(CPACK_GENERATOR "DEB") +set(CPACK_INNOSETUP_ARCHITECTURE "x64") +set(CPACK_INSTALL_CMAKE_PROJECTS "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir;PCM;ALL;/") +set(CPACK_INSTALL_DEFAULT_DIRECTORY_PERMISSIONS "OWNER_READ;OWNER_WRITE;OWNER_EXECUTE;GROUP_READ;GROUP_EXECUTE;WORLD_READ;WORLD_EXECUTE") +set(CPACK_INSTALL_PREFIX "/usr/local") +set(CPACK_MODULE_PATH "") +set(CPACK_NSIS_DISPLAY_NAME "/usr/local") +set(CPACK_NSIS_INSTALLER_ICON_CODE "") +set(CPACK_NSIS_INSTALLER_MUI_ICON_CODE "") +set(CPACK_NSIS_INSTALL_ROOT "$PROGRAMFILES") +set(CPACK_NSIS_PACKAGE_NAME "/usr/local") +set(CPACK_NSIS_UNINSTALL_NAME "Uninstall") +set(CPACK_OBJCOPY_EXECUTABLE "/usr/bin/objcopy") +set(CPACK_OBJDUMP_EXECUTABLE "/usr/bin/objdump") +set(CPACK_OUTPUT_CONFIG_FILE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/CPackConfig.cmake") +set(CPACK_PACKAGE_CONTACT "intel ") +set(CPACK_PACKAGE_DEFAULT_LOCATION "/") +set(CPACK_PACKAGE_DESCRIPTION " Intel(r) Performance Counter Monitor (Intel(r) PCM) is an application programming + interface (API) and a set of tools based on the API to monitor + performance and energy metrics of Intel(r) Core(tm), Xeon(r), Atom(tm) + and Xeon Phi(tm) processors. PCM works on Linux, Windows, Mac OS X, + FreeBSD and DragonFlyBSD operating systems.") +set(CPACK_PACKAGE_DESCRIPTION_FILE "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_PACKAGE_DESCRIPTION_SUMMARY "Intel(r) Performance Counter Monitor (Intel(r) PCM)") +set(CPACK_PACKAGE_FILE_NAME "pcm-0000-Linux") +set(CPACK_PACKAGE_INSTALL_DIRECTORY "/usr/local") +set(CPACK_PACKAGE_INSTALL_REGISTRY_KEY "/usr/local") +set(CPACK_PACKAGE_NAME "pcm") +set(CPACK_PACKAGE_RELOCATABLE "true") +set(CPACK_PACKAGE_VENDOR "Humanity") +set(CPACK_PACKAGE_VERSION "0000") +set(CPACK_PACKAGE_VERSION_MAJOR "0") +set(CPACK_PACKAGE_VERSION_MINOR "1") +set(CPACK_PACKAGE_VERSION_PATCH "1") +set(CPACK_READELF_EXECUTABLE "/usr/bin/readelf") +set(CPACK_RESOURCE_FILE_LICENSE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/LICENSE") +set(CPACK_RESOURCE_FILE_README "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_RESOURCE_FILE_WELCOME "/usr/local/share/cmake-3.31/Templates/CPack.GenericWelcome.txt") +set(CPACK_RPM_COMPONENT_INSTALL "ON") +set(CPACK_RPM_PACKAGE_DESCRIPTION " Intel(r) Performance Counter Monitor (Intel(r) PCM) is an application programming + interface (API) and a set of tools based on the API to monitor + performance and energy metrics of Intel(r) Core(tm), Xeon(r), Atom(tm) + and Xeon Phi(tm) processors. PCM works on Linux, Windows, Mac OS X, + FreeBSD and DragonFlyBSD operating systems.") +set(CPACK_RPM_PACKAGE_LICENSE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/LICENSE") +set(CPACK_RPM_PACKAGE_RELOCATABLE "TRUE") +set(CPACK_SET_DESTDIR "OFF") +set(CPACK_SOURCE_GENERATOR "TBZ2;TGZ;TXZ;TZ") +set(CPACK_SOURCE_OUTPUT_CONFIG_FILE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/CPackSourceConfig.cmake") +set(CPACK_SOURCE_RPM "OFF") +set(CPACK_SOURCE_TBZ2 "ON") +set(CPACK_SOURCE_TGZ "ON") +set(CPACK_SOURCE_TXZ "ON") +set(CPACK_SOURCE_TZ "ON") +set(CPACK_SOURCE_ZIP "OFF") +set(CPACK_SYSTEM_NAME "Linux") +set(CPACK_THREADS "1") +set(CPACK_TOPLEVEL_TAG "Linux") +set(CPACK_WIX_SIZEOF_VOID_P "8") + +if(NOT CPACK_PROPERTIES_FILE) + set(CPACK_PROPERTIES_FILE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/CPackProperties.cmake") +endif() + +if(EXISTS ${CPACK_PROPERTIES_FILE}) + include(${CPACK_PROPERTIES_FILE}) +endif() diff --git a/_codeql_build_dir/CPackSourceConfig.cmake b/_codeql_build_dir/CPackSourceConfig.cmake new file mode 100644 index 00000000..4bf9e058 --- /dev/null +++ b/_codeql_build_dir/CPackSourceConfig.cmake @@ -0,0 +1,96 @@ +# This file will be configured to contain variables for CPack. These variables +# should be set in the CMake list file of the project before CPack module is +# included. The list of available CPACK_xxx variables and their associated +# documentation may be obtained using +# cpack --help-variable-list +# +# Some variables are common to all generators (e.g. CPACK_PACKAGE_NAME) +# and some are specific to a generator +# (e.g. CPACK_NSIS_EXTRA_INSTALL_COMMANDS). The generator specific variables +# usually begin with CPACK__xxxx. + + +set(CPACK_BUILD_SOURCE_DIRS "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm;/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir") +set(CPACK_CMAKE_GENERATOR "Unix Makefiles") +set(CPACK_COMPONENT_UNSPECIFIED_HIDDEN "TRUE") +set(CPACK_COMPONENT_UNSPECIFIED_REQUIRED "TRUE") +set(CPACK_DEBIAN_PACKAGE_SHLIBDEPS "ON") +set(CPACK_DEB_COMPONENT_INSTALL "ON") +set(CPACK_DEFAULT_PACKAGE_DESCRIPTION_FILE "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_DEFAULT_PACKAGE_DESCRIPTION_SUMMARY "PCM built using CMake") +set(CPACK_DMG_SLA_USE_RESOURCE_FILE_LICENSE "ON") +set(CPACK_GENERATOR "TBZ2;TGZ;TXZ;TZ") +set(CPACK_IGNORE_FILES "/CVS/;/\\.svn/;/\\.bzr/;/\\.hg/;/\\.git/;\\.swp\$;\\.#;/#") +set(CPACK_INNOSETUP_ARCHITECTURE "x64") +set(CPACK_INSTALLED_DIRECTORIES "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm;/") +set(CPACK_INSTALL_CMAKE_PROJECTS "") +set(CPACK_INSTALL_DEFAULT_DIRECTORY_PERMISSIONS "OWNER_READ;OWNER_WRITE;OWNER_EXECUTE;GROUP_READ;GROUP_EXECUTE;WORLD_READ;WORLD_EXECUTE") +set(CPACK_INSTALL_PREFIX "/usr/local") +set(CPACK_MODULE_PATH "") +set(CPACK_NSIS_DISPLAY_NAME "/usr/local") +set(CPACK_NSIS_INSTALLER_ICON_CODE "") +set(CPACK_NSIS_INSTALLER_MUI_ICON_CODE "") +set(CPACK_NSIS_INSTALL_ROOT "$PROGRAMFILES") +set(CPACK_NSIS_PACKAGE_NAME "/usr/local") +set(CPACK_NSIS_UNINSTALL_NAME "Uninstall") +set(CPACK_OBJCOPY_EXECUTABLE "/usr/bin/objcopy") +set(CPACK_OBJDUMP_EXECUTABLE "/usr/bin/objdump") +set(CPACK_OUTPUT_CONFIG_FILE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/CPackConfig.cmake") +set(CPACK_PACKAGE_CONTACT "intel ") +set(CPACK_PACKAGE_DEFAULT_LOCATION "/") +set(CPACK_PACKAGE_DESCRIPTION " Intel(r) Performance Counter Monitor (Intel(r) PCM) is an application programming + interface (API) and a set of tools based on the API to monitor + performance and energy metrics of Intel(r) Core(tm), Xeon(r), Atom(tm) + and Xeon Phi(tm) processors. PCM works on Linux, Windows, Mac OS X, + FreeBSD and DragonFlyBSD operating systems.") +set(CPACK_PACKAGE_DESCRIPTION_FILE "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_PACKAGE_DESCRIPTION_SUMMARY "Intel(r) Performance Counter Monitor (Intel(r) PCM)") +set(CPACK_PACKAGE_FILE_NAME "pcm-0000-Source") +set(CPACK_PACKAGE_INSTALL_DIRECTORY "/usr/local") +set(CPACK_PACKAGE_INSTALL_REGISTRY_KEY "/usr/local") +set(CPACK_PACKAGE_NAME "pcm") +set(CPACK_PACKAGE_RELOCATABLE "true") +set(CPACK_PACKAGE_VENDOR "Humanity") +set(CPACK_PACKAGE_VERSION "0000") +set(CPACK_PACKAGE_VERSION_MAJOR "0") +set(CPACK_PACKAGE_VERSION_MINOR "1") +set(CPACK_PACKAGE_VERSION_PATCH "1") +set(CPACK_READELF_EXECUTABLE "/usr/bin/readelf") +set(CPACK_RESOURCE_FILE_LICENSE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/LICENSE") +set(CPACK_RESOURCE_FILE_README "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") +set(CPACK_RESOURCE_FILE_WELCOME "/usr/local/share/cmake-3.31/Templates/CPack.GenericWelcome.txt") +set(CPACK_RPM_COMPONENT_INSTALL "ON") +set(CPACK_RPM_PACKAGE_DESCRIPTION " Intel(r) Performance Counter Monitor (Intel(r) PCM) is an application programming + interface (API) and a set of tools based on the API to monitor + performance and energy metrics of Intel(r) Core(tm), Xeon(r), Atom(tm) + and Xeon Phi(tm) processors. PCM works on Linux, Windows, Mac OS X, + FreeBSD and DragonFlyBSD operating systems.") +set(CPACK_RPM_PACKAGE_LICENSE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/LICENSE") +set(CPACK_RPM_PACKAGE_RELOCATABLE "TRUE") +set(CPACK_RPM_PACKAGE_SOURCES "ON") +set(CPACK_SET_DESTDIR "OFF") +set(CPACK_SOURCE_GENERATOR "TBZ2;TGZ;TXZ;TZ") +set(CPACK_SOURCE_IGNORE_FILES "/CVS/;/\\.svn/;/\\.bzr/;/\\.hg/;/\\.git/;\\.swp\$;\\.#;/#") +set(CPACK_SOURCE_INSTALLED_DIRECTORIES "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm;/") +set(CPACK_SOURCE_OUTPUT_CONFIG_FILE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/CPackSourceConfig.cmake") +set(CPACK_SOURCE_PACKAGE_FILE_NAME "pcm-0000-Source") +set(CPACK_SOURCE_RPM "OFF") +set(CPACK_SOURCE_TBZ2 "ON") +set(CPACK_SOURCE_TGZ "ON") +set(CPACK_SOURCE_TOPLEVEL_TAG "Linux-Source") +set(CPACK_SOURCE_TXZ "ON") +set(CPACK_SOURCE_TZ "ON") +set(CPACK_SOURCE_ZIP "OFF") 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named pcm-tpmi + +# Build rule for target. +pcm-tpmi: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 pcm-tpmi +.PHONY : pcm-tpmi + +# fast build rule for target. +pcm-tpmi/fast: + $(MAKE) $(MAKESILENT) -f src/CMakeFiles/pcm-tpmi.dir/build.make src/CMakeFiles/pcm-tpmi.dir/build +.PHONY : pcm-tpmi/fast + +#============================================================================= +# Target rules for targets named pcm-raw + +# Build rule for target. +pcm-raw: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 pcm-raw +.PHONY : pcm-raw + +# fast build rule for target. +pcm-raw/fast: + $(MAKE) $(MAKESILENT) -f src/CMakeFiles/pcm-raw.dir/build.make src/CMakeFiles/pcm-raw.dir/build +.PHONY : pcm-raw/fast + +#============================================================================= +# Target rules for targets named pcm-accel + +# Build rule for target. +pcm-accel: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 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: client/fast + +#============================================================================= +# Target rules for targets named c_example + +# Build rule for target. +c_example: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 c_example +.PHONY : c_example + +# fast build rule for target. +c_example/fast: + $(MAKE) $(MAKESILENT) -f examples/CMakeFiles/c_example.dir/build.make examples/CMakeFiles/c_example.dir/build +.PHONY : c_example/fast + +#============================================================================= +# Target rules for targets named c_example_shlib + +# Build rule for target. +c_example_shlib: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 c_example_shlib +.PHONY : c_example_shlib + +# fast build rule for target. +c_example_shlib/fast: + $(MAKE) $(MAKESILENT) -f examples/CMakeFiles/c_example_shlib.dir/build.make examples/CMakeFiles/c_example_shlib.dir/build +.PHONY : c_example_shlib/fast + +#============================================================================= +# Target rules for targets named daemon_alignment_test + +# Build rule for target. +daemon_alignment_test: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 daemon_alignment_test +.PHONY : daemon_alignment_test + +# fast build rule for target. +daemon_alignment_test/fast: + $(MAKE) $(MAKESILENT) -f tests/CMakeFiles/daemon_alignment_test.dir/build.make tests/CMakeFiles/daemon_alignment_test.dir/build +.PHONY : daemon_alignment_test/fast + +#============================================================================= +# Target rules for targets named urltest + +# Build rule for target. +urltest: cmake_check_build_system + $(MAKE) $(MAKESILENT) -f CMakeFiles/Makefile2 urltest +.PHONY : urltest + +# fast build rule for target. +urltest/fast: + $(MAKE) $(MAKESILENT) -f tests/CMakeFiles/urltest.dir/build.make tests/CMakeFiles/urltest.dir/build +.PHONY : urltest/fast + +# Help Target +help: + @echo "The following are some of the valid targets for this Makefile:" + @echo "... all (the default if no target is provided)" + @echo "... clean" + @echo "... depend" + @echo "... edit_cache" + @echo "... install" + @echo "... install/local" + @echo "... install/strip" + @echo "... list_install_components" + @echo "... package" + @echo "... package_source" + @echo "... rebuild_cache" + @echo "... PCM_SHARED" + @echo "... PCM_STATIC" + @echo "... PCM_STATIC_SILENT" + @echo "... c_example" + @echo "... c_example_shlib" + @echo "... client" + @echo "... daemon" + @echo "... daemon_alignment_test" + @echo "... pcm" + @echo "... pcm-accel" + @echo "... pcm-core" + @echo "... pcm-iio" + @echo "... pcm-latency" + @echo "... pcm-memory" + @echo "... pcm-mmio" + @echo "... pcm-msr" + @echo "... pcm-numa" + @echo "... pcm-pcicfg" + @echo "... pcm-pcie" + @echo "... pcm-power" + @echo "... pcm-raw" + @echo "... pcm-sensor" + @echo "... pcm-sensor-server" + @echo "... pcm-tpmi" + @echo "... pcm-tsx" + @echo "... urltest" +.PHONY : help + + + +#============================================================================= +# Special targets to cleanup operation of make. + +# Special rule to run CMake to check the build system integrity. +# No rule that depends on this can have commands that come from listfiles +# because they might be regenerated. +cmake_check_build_system: + $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 0 +.PHONY : cmake_check_build_system + diff --git a/_codeql_build_dir/bin/CUSTOM-COMPILE-OPTIONS.md b/_codeql_build_dir/bin/CUSTOM-COMPILE-OPTIONS.md new file mode 100644 index 00000000..9b05f49f --- /dev/null +++ b/_codeql_build_dir/bin/CUSTOM-COMPILE-OPTIONS.md @@ -0,0 +1,15 @@ +cpucounters.h : `#define PCM_HA_REQUESTS_READS_ONLY` +For the metric "LOCAL: number of local memory access in %“ (getLocalMemoryRequestRatio API) count only read accesses (local and all). + +cpucounters.h : `#define PCM_DEBUG_TOPOLOGY` +print detailed CPU topology information + +cpucounters.h : `#define PCM_UNCORE_PMON_BOX_CHECK_STATUS` +verify uncore PMU register state after programming + +types.h : `#define PCM_DEBUG` +print some debug information + +pci.h : `#define PCM_USE_PCI_MM_LINUX` +use /dev/mem (direct memory mapped I/O) for PCICFG register access on Linux. This might be required for accessing registers in extended configuration space (beyond 4K) in *pcm-pcicfg* utility. Recent Linux kernels also require to be booted with iomem=relaxed option to make this work. + diff --git a/_codeql_build_dir/bin/CXL_README.md b/_codeql_build_dir/bin/CXL_README.md new file mode 100644 index 00000000..ad9265be --- /dev/null +++ b/_codeql_build_dir/bin/CXL_README.md @@ -0,0 +1,15 @@ +PCM can collect CLX bandwidth using the methods below. + +-------------------------------------------------------------------------------- +CXL.mem and CXL.cache traffic +-------------------------------------------------------------------------------- + +Please use pcm-memory utility for monitoring CXL.mem and CLX.cache traffic. pcm-memory will detect available CXL ports and will show traffic per CXL port and protocol (mem and cache) and per direction (read and write). + +-------------------------------------------------------------------------------- +CXL.io traffic +-------------------------------------------------------------------------------- + +pcm-iio utility should be used to monitor CXL.io traffic. pcm-iio will show traffic per CXL device and direction (inbound/outbound, read/write) + + diff --git a/_codeql_build_dir/bin/DOCKER_README.md b/_codeql_build_dir/bin/DOCKER_README.md new file mode 100644 index 00000000..ed38f7ed --- /dev/null +++ b/_codeql_build_dir/bin/DOCKER_README.md @@ -0,0 +1,14 @@ +-------------------------------------------------------------------------------- +How To Run Intel(r) Performance Counter Monitor Server Container from GitHub Container Repository or Docker Hub +-------------------------------------------------------------------------------- + +As root user: +1. ``modprobe msr`` +2. ``docker run -d --name pcm --privileged -p 9738:9738 ghcr.io/intel/pcm`` (GitHub Container repository) or ``docker run -d --name pcm --privileged -p 9738:9738 opcm/pcm`` (Dockerhub repository) + - the container can also be run with limited capabilities without the privileged mode: ``docker run -d --name pcm --cap-add=SYS_ADMIN --cap-add=SYS_RAWIO --device=/dev/cpu --device=/dev/mem -v /sys/firmware/acpi/tables/MCFG:/pcm/sys/firmware/acpi/tables/MCFG:ro -v /proc/bus/pci/:/pcm/proc/bus/pci/ -v /proc/sys/kernel/nmi_watchdog:/pcm/proc/sys/kernel/nmi_watchdog -v /sys:/sys:rw -p 9738:9738 ghcr.io/intel/pcm`` (there is also a docker-compose file containing these options: https://raw.githubusercontent.com/intel/pcm/master/docker-compose.yml) + +This will start pcm-sensor-server container exposing CPU metrics from the whole system at port 9738 + +The URLs of the docker container repositories: +- https://github.com/intel/pcm/pkgs/container/pcm +- https://hub.docker.com/r/opcm/pcm diff --git a/_codeql_build_dir/bin/ENVVAR_README.md b/_codeql_build_dir/bin/ENVVAR_README.md new file mode 100644 index 00000000..3a93ced0 --- /dev/null +++ b/_codeql_build_dir/bin/ENVVAR_README.md @@ -0,0 +1,17 @@ +`PCM_NO_PERF=1` : don't use Linux perf events API to program *core* PMUs (default is to use it) + +`PCM_USE_UNCORE_PERF=1` : use Linux perf events API to program *uncore* PMUs (default is *not* to use it) + +`PCM_NO_RDT=1` : don't use RDT metrics for a better interoperation with pqos utility (https://github.com/intel/intel-cmt-cat) + +`PCM_USE_RESCTRL=1` : use Linux resctrl driver for RDT metrics + +`PCM_PRINT_TOPOLOGY=1` : print detailed CPU topology + +`PCM_KEEP_NMI_WATCHDOG=1` : don't disable NMI watchdog (reducing the core metrics set) + +`PCM_NO_MAIN_EXCEPTION_HANDLER=1` : don't catch exceptions in the main function of pcm tools (a debugging option) + +`PCM_ENFORCE_MBM=1` : force-enable Memory Bandwidth Monitoring (MBM) metrics (LocalMemoryBW = LMB) and (RemoteMemoryBW = RMB) on processors with RDT/MBM errata + +`PCM_DEBUG_LEVEL=x` : x is an integer defining debug output level. level = 0 (default): minimal or no debug info, > 0 increases verbosity diff --git a/_codeql_build_dir/bin/FAQ.md b/_codeql_build_dir/bin/FAQ.md new file mode 100644 index 00000000..88a0266d --- /dev/null +++ b/_codeql_build_dir/bin/FAQ.md @@ -0,0 +1,95 @@ + +## Q1 + +pcm-iio Tool outputs "Server CPU is required for this tool! Program aborted". Is there a way I can monitor my PCIe link bandwidth using one of the PCM utilities on client CPU? + +Answer: The "IO" metric in *pcm* utility is the closest capability to monitor I/O PCIe traffic on client CPUs. + +## Q2 + +PCM reports "ERROR: QPI LL monitoring device (...) is missing". How to fix it? + +Answer: It is likely a BIOS issue. See details [here](https://software.intel.com/content/www/us/en/develop/articles/bios-preventing-access-to-qpi-performance-counters.html) + +## Q3 + +Does PCM work inside a virtual machine? + +Answer: PCM works inside virtual machines which support vPMU (with a limited set of metrics supported by vPMU). For example on AWS instances this is indicated by the presence of [arch_perfmon](https://instaguide.io/info.html?type=c5.18xlarge) flag: https://instaguide.io/ . Enabling vPMU in hypervisors is documented [in Hardware Event-Based Sampling section](https://software.intel.com/content/www/us/en/develop/documentation/vtune-help/top/set-up-analysis-target/on-virtual-machine.html). + +## Q4 + +Does PCM work inside a docker container? + +Answer: yes, it does. An example of how to run PCM inside a docker container is located [here](DOCKER_README.md). The recipe works also for other PCM utilities besides pcm-sensor-server. + +## Q5 + +pcm-power reports "Unsupported processor model". Can you add support for pcm-power for my CPU? + +Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. PCM-power can not work without them. + +## Q6 + +pcm-memory reports that the CPU is not supported. Can you add support for pcm-memory for my CPU? + +Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. PCM-memory can not work without them. + +## Q7 + +Can PCM be used for measuring energy, CPU cycles, etc for a particular process or does it measure for the system as a whole? + +Answer: PCM supports measurement for the whole system, per processor, per physical or per logical core. If you need monitoring per-process or user per-thread you can pin your process and/or thread to certain cores and read PCM data for these cores. But keep in mind that the OS can also schedule other processes or threads on this core and this may disturb your measurements. For a precise per-process or per-thread measurement the Intel VTune profiler or Linux perf profiler should be used. + +## Q8 + +PCM reports + +``` +opening /dev/mem failed: errno is 1 (Operation not permitted) +Can not read memory controller counter information from PCI configuration space. Access to memory bandwidth counters is not possible. +You must be root to access these SandyBridge/IvyBridge/Haswell counters in PCM. +Secure Boot detected. Using Linux perf for uncore PMU programming. +``` + +How to fix it? + +Answer: Linux disables access to /dev/mem because Secure Boot is enabled in the BIOS. Disable Secure Boot in the BIOS to enable memory controller statistics (e.g. memory read and write bandwidth). + +## Q9 + +PCM reports +``` +Linux Perf: Error on programming ... +``` +How to fix it? + +**Answer:** It is an issue with the Linux kernel perf driver. As a workaround upgrade your Linux kernel to the latest available/possible or run PCM with its own programming logic: + +``` +export PCM_NO_PERF=1 +pcm -r +``` + +## Q10 + +If you are getting the error `Starting MSR service failed with error 3 The system cannot find the path specified.` try to uninstall the driver by running `pcm --uninstallDriver` and optionally reboot the system. + +## Q11 + +Is PCM supported on AWS instances + +**Answer**: + +Not all AWS instances allow users to collect CPU telemetry by exposing PMU to the user. The following instances can be used: + +* Bare metal instances: allow collection of CPU metrics from both core (e.g. instructions per cycle, cache misses) and uncore (e.g. memory controller, UPI) +* Full-socket (single socket, two socket, etc) virtualized instances: e.g. m5d.12xlarge, m5.24xlarge, m5.12xlarge. Only core CPU metrics are exposed, and certain CPU performance events are forbidden (e.g. offcore response events, events collecting “any_thread” information). “arch_perfmon” flag in /proc/cpuinfo indicates if the core CPU metrics are exposed (example: https://instaguide.io/info.html?type=m5.12xlarge ). The mechanism of PMU virtualization is commonly known as vPMU. + +## Q12 + +pcm-pcie reports that the CPU is not supported: "Jaketown, Ivytown, Haswell, Broadwell-DE, Skylake, Icelake, Snowridge and Sapphirerapids Server CPU is required for this tool! Program aborted" +Can you add support for pcm-pcie for my CPU? + +Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. pcm-pcie can not work without them. + diff --git a/_codeql_build_dir/bin/FREEBSD_HOWTO.txt b/_codeql_build_dir/bin/FREEBSD_HOWTO.txt new file mode 100644 index 00000000..7711c85f --- /dev/null +++ b/_codeql_build_dir/bin/FREEBSD_HOWTO.txt @@ -0,0 +1,8 @@ +Building: +$ cmake -B build +$ cmake --build build + +Runtime requirements: +* the cpuctl(4) driver needs to be loaded + +PCM is also available as a port maintained by The FreeBSD Project (sysutils/intel-pcm). diff --git a/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md b/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md new file mode 100644 index 00000000..6cf74314 --- /dev/null +++ b/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md @@ -0,0 +1,61 @@ +# Latency Optimized Mode in Intel® Xeon® 6 Processors + +Intel® Xeon® 6 Processors (previously codenamed Granite Rapids and Sierra Forest/Birch Stream platform) introduce a new power management mechanism called Efficiency Latency Control (ELC), designed to optimize performance per watt. This feature allows hardware power management algorithms to balance the trade-off between latency and power consumption. For latency-sensitive workloads, further tuning can be performed to achieve the desired performance. + +The hardware monitors the average CPU utilization across all cores at regular intervals to determine an appropriate uncore frequency. While this approach generally results in optimal performance per watt, some workloads may achieve higher performance at the expense of increased power consumption. For instance, an application that intermittently performs memory reads on an otherwise idle system may experience delays if the hardware lowers the uncore frequency, causing a lag in ramping up to the required performance levels. To verify this, the uncore frequencies can be monitored using the pcm utility: + +![Uncore Frequency Statistics DEFAULT](https://github.com/user-attachments/assets/108c7350-3fc2-4056-aeaf-ecc7c25da6bc) + +The screenshot above presents real-time data on uncore frequency statistics, measured in GHz, from a dual-socket platform (represented by two rows). Each socket includes five dies (organized into five columns). The first three dies contain CORes (COR), Last Level Cache (LLC), and Memory controllers (M), collectively referred to as CORLLCM. The final two dies are IO dies. + +The ELC control has parameters that can be adjusted either through BIOS or software tools. The default parameter configuration is optimized for performance per watt, ensuring power efficiency. The alternative configuration, known as Latency Optimized Mode, prioritizes maximum performance. +Below are the PCM statistics from a system operating in Latency Optimized Mode: + +![Uncore Frequency Statistics Latency Optimized Mode](https://github.com/user-attachments/assets/70310bbc-725b-4450-af7a-1db2c04291dd) + +## BIOS Options for Latency Optimized Mode + +The BIOS option for selecting the Default or Latency Optimized Mode can typically be located in the following menus, depending on the BIOS version and OEM vendor: +- **Socket Configuration** -> **Advanced Power Management** -> **CPU – Advanced PM Tuning** -> **Latency Optimized Mode** (Disabled or Enabled) +- **System Utilities** -> **System Configuration** -> **BIOS/Platform Configuration (RBSU)** -> **Power and Performance Options** -> **Advanced Power Options** -> **Efficiency Latency Control** (Default or Latency Optimized mode) + +Should this BIOS option be unavailable or if there is a preference to change the mode during runtime, the PCM repository provides scripts for changing this mode. + +|Platform |Script Type| URL | +|------------------|-----------|---------------------------------------------------------------------| +|Linux/FreeBSD/UNIX|bash | https://github.com/intel/pcm/blob/master/scripts/bhs-power-mode.sh | +|Windows |powershell | https://github.com/intel/pcm/blob/master/scripts/bhs-power-mode.ps1 | + +The scripts require the pcm-tpmi utility. There are several methods to obtain this utility: +- **Download or install precompiled PCM binaries:** Please refer to the following link: [Downloading Pre-Compiled PCM Tools](https://github.com/intel/pcm?tab=readme-ov-file#downloading-pre-compiled-pcm-tools) +- **Compile the utility:** Follow the instructions in the "Building PCM Tools" section available at: [Building PCM Tools](https://github.com/intel/pcm?tab=readme-ov-file#building-pcm-tools) + * For Linux/FreeBSD: Copy the pcm-tpmi utility from PCM’s source 'build/bin' directory to `/usr/local/bin/` or execute `make install` in the 'build' directory. + +For Windows: Copy the pcm-tpmi utility to the current directory. + +Once the pcm-tpmi binary is correctly placed, you can set the Latency Optimized Mode. + +### Setting Latency Optimized Mode + +Linux/FreeBSD/UNIX: +``` +bash bhs-power-mode.sh --latency-optimized-mode +``` +Windows: +``` +.\bhs-power-mode.ps1 --latency-optimized-mode +``` + +### Restoring the Default Mode + +Linux/FreeBSD/UNIX: +``` +bash bhs-power-mode.sh --default +``` + +Windows: +``` +.\bhs-power-mode.ps1 --default +``` + + diff --git a/_codeql_build_dir/bin/LINUX_HOWTO.txt b/_codeql_build_dir/bin/LINUX_HOWTO.txt new file mode 100644 index 00000000..19062902 --- /dev/null +++ b/_codeql_build_dir/bin/LINUX_HOWTO.txt @@ -0,0 +1,7 @@ +Refer to the main README ("Building PCM Tools" or "Downloading Pre-Compiled PCM Tools") sections + +Running tests: + +* build PCM +* as root run "sh test/test.sh" + - Automated CI test workflow: https://github.com/intel/pcm/blob/03ad6b0228c9e8a8eb022708b53a61875b9447bc/.github/workflows/ci-test.yml#L40 diff --git a/_codeql_build_dir/bin/MAC_HOWTO.txt b/_codeql_build_dir/bin/MAC_HOWTO.txt new file mode 100644 index 00000000..4cdd2dfb --- /dev/null +++ b/_codeql_build_dir/bin/MAC_HOWTO.txt @@ -0,0 +1,64 @@ +Building and Installing + +Note: xcode is required to build the driver and dynamic library. + +Requirements +____________ +Building and installing requires make, cmake, gcc, and xcode. +It has been tested on the following system configurations: + OS X 12.0.1, Xcode 13.1, Apple LLVM compiler 13.0.0 + +Build PCM and MacMSRDriver +----------------- + mkdir build && cd build + cmake .. && cmake --build . + +PCM utilities will be located in build/bin folder, libraries libpcm.dylib and libPcmMsr.dylib - in build/lib. + +Automatic Install +----------------- + cd build + sudo make install + +Install command loads the driver, installs the library into /usr/lib and installs the library headers into /usr/include. +Also PCM utilities are installing to /usr/local/sbin. + +Manual Install +-------------- +Build steps are the same. +To install do the following: + 1) load the driver by running src/MacMSRDriver/kextload.sh + 2) copy build/lib/libPcmMsr.dylib to a location on your path (auto-install uses /usr/lib) + 3) copy src/MacMSRDriver/MSRKernel.h to a location on your path (auto-install uses /usr/include) + 4) copy src/MacMSRDriver/MSRAccessorPublic.h as MSRAccessor.h to a location on your path (auto-install uses /usr/include) + +kext Signatures +--------------- +As of OS X El Capitan, kexts must be signed. So after building the kext, kextload.sh may fail with: + + /System/Library/Extensions/PcmMsrDriver.kext failed to load - (libkern/kext) not loadable (reason unspecified); check the system/kernel logs for errors or try kextutil(8). + +In this event, you will need to either disable System Integrity Protection or sign the kext. +You can disable SIP by rebooting into Recovery (reboot, command-option-R), opening a shell, csrutil disable and reboot again. +Signing a kext is more involved. You can't self-sign and will first need to obtain a Developer ID from Apple: + + https://developer.apple.com/contact/kext/ + +With this ID, you can then sign your kext with codesign. + +PCM Execution +---------------------- +Now you can run ./pcm utility. +See description of other built utilities in LINUX_HOWTO.txt + +Logging/Debugging +---------------------- + +Sometimes you will get errors while running utilities that may come from the kernel, and you can use something like this DTrace script to correlate it with user-land behavior: + +$ sudo dtrace -n 'fbt:mach_kernel:_ZN*IOUser*:return /execname == "pcm"/ { @hgram[probefunc, arg1, ustack(20)] = count(); }' -c ./pcm + +Various commands that can help diagnose errors: + +$ kmutil log stream +$ kmutil inspect -b com.intel.driver.PcmMsr diff --git a/_codeql_build_dir/bin/PCM-EXPORTER.md b/_codeql_build_dir/bin/PCM-EXPORTER.md new file mode 100644 index 00000000..15ac3433 --- /dev/null +++ b/_codeql_build_dir/bin/PCM-EXPORTER.md @@ -0,0 +1,55 @@ +# Intel® Performance Counter Monitor (Intel® PCM) Prometheus exporter + + +pcm-sensor-server is a collector exposing Intel processor metrics over http in JSON or Prometheus (exporter text based) format. Also [available as a docker container](DOCKER_README.md). + +**NEW**: pcm-sensor-server is now supported on Windows! See [Windows-specific instructions](#windows-support) below. + +Installation on target system to be analyzed: +1. [Build](https://github.com/intel/pcm#building-pcm-tools) or [download](https://github.com/intel/pcm#downloading-pre-compiled-pcm-tools) pcm tools +2. As root, start pcm-sensor-server: `sudo ./pcm-sensor-server` or as non-root https://github.com/intel/pcm#executing-pcm-tools-under-non-root-user-on-linux + +Alternatively one can start [pcm-sensor-server as a container from docker hub](DOCKER_README.md). + +Additional options: + +``` +$ ./pcm-sensor-server --help +Usage: ./pcm-sensor-server [OPTION] + +Valid Options: + -d : Run in the background (Linux/macOS only) + -p portnumber : Run on port (default port is 9738) + -r|--reset : Reset programming of the performance counters. + -D|--debug level : level = 0: no debug info, > 0 increase verbosity. + -R|--real-time : If possible the daemon will run with real time + priority, could be useful under heavy load to + stabilize the async counter fetching. (Linux only) + -h|--help : This information +``` + +## Windows Support + +pcm-sensor-server now runs natively on Windows. Key points: + +- **Requirements**: Windows 10+ or Windows Server 2016+ (earlier versions may work but are no longer officially supported), Administrator privileges, MSR driver installed +- **Build instructions**: See [WINDOWS_HOWTO.md](WINDOWS_HOWTO.md#pcm-sensor-server-httphttps-server-for-grafana-integration) +- **Limitations**: + - Daemon mode (`-d`) not available - runs in foreground only + - Real-time priority (`-R`) not available + - Use Ctrl+C to stop the server + +Example on Windows: +``` +# Run as Administrator +pcm-sensor-server.exe -p 9738 +``` + +The default output of pcm-sensor-server endpoint in a browser: + +![image](https://user-images.githubusercontent.com/25432609/226344012-8783e154-998e-48a7-a2ca-f2c42af9c843.png) + + +The PCM exporter can be used together with Grafana to obtain these Intel processor metrics (see [how-to](../scripts/grafana/README.md)): + +![pcm grafana output](https://raw.githubusercontent.com/wiki/intel/pcm/pcm-dashboard-full.png) diff --git a/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md b/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md new file mode 100644 index 00000000..16cbf717 --- /dev/null +++ b/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md @@ -0,0 +1,47 @@ +# Global PCM Events + +| Event Name | Description | +|-----------------------------|-----------------------------------------------------------------------------| +| Measurement_Interval_in_us | How many us elapsed to complete the last measurement | +| Number_of_sockets | Number of CPU sockets in the system | + + +# Core Counters per socket + +OS_ID is the OS assigned ID of the logical CPU core and denotes the socket id, core id and thread id. + +The events below are followed by the same {socket="socket id",core="core id",thread="thread id"} as +the OS_ID of their section with source="socket/core/thread" appended that denotes what the quantity +of the event accounts for. + +For example Instructions_Retired_Any{socket="0",core="1",thread="1",source="core"} refers to +Instructions_Retired_Any for socket 0, core 1, thread 1, and accounts for the total instructions +retired of the specified core. + +| Event | Description | +|------------------------------------------------|--------------------------------------------------------------| +| Instructions_Retired_Any | Total number of Retired instructions | +| Clock_Unhalted_Thread | | +| Clock_Unhalted_Ref | Counts the number of reference cycles that the thread is | +| | not in a halt state. The thread enters the halt state when | +| | it is running the HLT instruction. This event is not | +| | affected by thread frequency changes but counts as if the | +| | thread is running at the maximum frequency all the time. | +| L3_Cache_Misses | Total number of L3 Cache misses | +| L3_Cache_Hits | Total number of L3 Cache hits | +| L2_Cache_Misses | Total number of L2 Cache misses | +| L2_Cache_Hits | Total number of L3 Cache hits | +| L3_Cache_Occupancy | Computes L3 Cache Occupancy | +| SMI_Count | SMI (System Management Interrupt) count | +| Invariant_TSC | Calculates the invariant TSC clocks (the invariant TSC | +| | means that the TSC continues at a fixed rate regardless of | +| | the C-state or frequency of the processor as long as the | +| | processor remains in the ACPI S0 state. | +| Thermal_Headroom | Celsius degrees before reaching TjMax temperature | +| CStateResidency | This is the percentage of time that the core (or the whole | +| | package) spends in a particular level of C-state | | + +References: + +https://software.intel.com/content/www/us/en/develop/articles/intel-performance-counter-monitor.html +https://software.intel.com/content/dam/develop/external/us/en/documents-tps/325384-sdm-vol-3abcd.pdf - Chapter 18 Performance Monitoring \ No newline at end of file diff --git a/_codeql_build_dir/bin/PCM_ACCEL_README.md b/_codeql_build_dir/bin/PCM_ACCEL_README.md new file mode 100644 index 00000000..0acde59c --- /dev/null +++ b/_codeql_build_dir/bin/PCM_ACCEL_README.md @@ -0,0 +1,121 @@ +## Purpose: + +Intel® Xeon® Scalable Processors, starting from the 4th Generation (codenamed Sapphire Rapids), feature accelerators, which include the Intel® In-Memory Analytics Accelerator (Intel® IAA), Intel® Data Streaming Accelerator (Intel® DSA), and Intel® QuickAssist Technology (Intel® QAT), among others. These accelerators are essential components that can enhance the performance of Intel architecture platforms. + +Although these accelerators and their associated software stacks can significantly contribute to data center system performance, customers and users often find it challenging to access and understand performance data such as utilization and throughput. This difficulty arises from the complexity of low-level hardware event sets, which require a deep understanding of the accelerator's hardware and software architecture. + +The pcm-accel tool addresses this challenge by sampling performance data from the accelerator hardware and presenting it to end users in an easy-to-understand format. Its goal is to enable users to quickly and accurately gain a high-level overview of performance or identify issues related to the accelerator, regardless of their level of expertise in the underlying technology. + +## Command syntax: + +pcm-accel [target] [options] + +#### the target parameter + +Notes: only 1 target is allowed to monitor. + +| target | Default | Description | +| ------ | ------- | ----------------------------- | +| -iaa | yes | Monitor the IAA accelerator. | +| -dsa | no | Monitor the DSA accelerator. | +| -qat | no | Monitor the QAT accelerator. | + +#### the options parameter + +Notes: multiple options is allowed. + +| options | Default | Description | +| ---------------------- | -------------------- | -------------------------------------------------------------------------------------------------------------------------- | +| -numa | no | Print NUMA node mapping instead of CPU socket location. | +| -evt=[cfg.txt] | opCode-x-y-accel.txt | Specify the event config file name as cfg.txt.
- x/y is cpu family is model id, for example 6/143 for Sapphire Rapids. | +| -silent | no | Silence information output and print only measurements | +| -csv[=file.csv] | no | Output compact CSV format to screen or a file in case filename is provided | +| -csv-delimiter=[value] | no | Set custom csv delimiter | +| -human-readable | no | Use human readable format for output (for csv only) | +| -i=[value] | 0 | Allow to determine number of iterations, default is 0(infinite loop) if not specified. | +| [interval] | 3 | Time interval in seconds (floating point number is accepted) to sample performance counters, default is 3s if not specified| + +#### Examples: + +This example prints IAA counters every second 10 times and exits + +> pcm-accel -iaa 1.0 -i=10  + +This example saves IAA counters twice a second save IAA counter values to test.log in CSV format + +> pcm-accel -iaa 0.5 -csv=test.log            + +This example prints IAA counters every 3 second in human-readable CSV format + +> pcm-accel -iaa -csv -human-readable + +## Prerequisites: + +Linux* OS: + +FreeBSD* OS: + +Windows OS: + +- Install and load the required accelerator driver(iaa/dsa, qat driver, etc). + +Notes: + +- QAT monitoring and NUMA node display feature is supported only on Linux OS! + +## Tool UI introduction: + +Common indicator(Column field): + +- Accelerator = Accelerator device id. +- Socket = CPU socket id where accelerator device is located. +- NUMA Node = NUMA node that accelerator device belongs to. +- Inbound_BW = Data throughput input to the accelerator device, unit is Bps(Bytes per second). +- Outbound_BW = Data throughput output from the accelerator device, unit is Bps(Bytes per second). + +Specific indicators related to IAA/DSA:  + +- ShareWQ_ReqNb = The number of request submitted to share work queue of accelerator. +- DedicateWQ_ReqNb = The number of request submitted to dedicate work queue of accelerator. + +![image](https://user-images.githubusercontent.com/25432609/224027332-8846dff6-f71e-4daa-a189-730e68c7e1b2.png) +![image](https://user-images.githubusercontent.com/25432609/224027445-2b08e89c-4653-4f39-971b-a7dc76bd7349.png) + +Specific indicators related to QAT: + +- util_comp0 = The utilization of the compress engine 0, unit is %.(Sapphire Rapids platform has 1 compress and 3 decompress engine per QAT device) + +- util_decomp0 = same as above for decompress engine 0. + +- util_decomp1 = same as above for decompress engine 1. + +- util_decomp2 = same as above for decompress engine 2. + +- util_xlt0 = same as above for translation engine 0. + + + ![image](https://user-images.githubusercontent.com/25432609/224027570-e433aeef-c2ed-418d-aa42-18eef0f1b645.png) + + +## Event config file: + +pcm-accel tool allows the user to customized the monitored performance events with the config file as advance feature. + +Customize fields of cfg file: + +- ev_sel and ev_cat field for IAA/DSA monitor event. +- ev_sel field for QAT monitor event.  +- multiplier/divider is for event data display calculation. +- vname is the event name string(column) displayed in the UI. + +Please refer to the spec or code to learn more about the event mapping if you want to customize it. + +- IAA/DSA: https://software.intel.com/en-us/download/intel-data-streaming-accelerator-preliminary-architecture-specification + +- QAT: please refer to the [mapping table in source code](https://github.com/intel/pcm/blob/f20013f7563714cf592d7a59f169c1ddee3cf8ba/src/cpucounters.cpp#L915) + + +Here is the content of the event cfg file(opCode-6-143-accel.txt as example) + +![image](https://user-images.githubusercontent.com/25432609/224027717-1dcdae9e-6701-4b6f-90a0-8108c4ea4550.png) + diff --git a/_codeql_build_dir/bin/PCM_IIO_README.md b/_codeql_build_dir/bin/PCM_IIO_README.md new file mode 100644 index 00000000..cc2e0ab6 --- /dev/null +++ b/_codeql_build_dir/bin/PCM_IIO_README.md @@ -0,0 +1,35 @@ +## Purpose: + +PCM-IIO tool monitors PCIe transactions with a breakdown per PCIe bus (IIO stack) and/or PCIe devices. + +## Tool UI introduction: + +Inbound (PCIe device DMA into system) metrics: + +* IB write (inbound write): the number of bytes per second that the PCIe device requested to write to main memory through DMA +* IB read (inbound read): the number of bytes per second that the PCIe device requested to read from main memory through DMA + +Outbound (CPU MMIO to the PCIe device) metrics: + +* OB read (outbound read): the number of bytes per second that the CPU requested to read from the PCIe device through MMIO (memory-mapped I/O) +* OB write (outbound write): the number of bytes per second that the CPU requested to write to the PCIe device through MMIO (memory-mapped I/O) + +IOMMU metrics: + +* IOTLB Lookup: IOTLB lookups per second +* IOTLB Miss: IOTLB misses per second +* Ctxt Cache Hit: Context cache hits per second +* 256T Cache Hit: Second Level Page Walk Cache Hits to a 256T page per second +* 512G Cache Hit: Second Level Page Walk Cache Hits to a 512G page per second +* 1G Cache Hit: Second Level Page Walk Cache Hits to a 1G page per second +* 2M Cache Hit: Second Level Page Walk Cache Hits to a 2M page per second +* IOMMU Mem Access: IOMMU memory accesses per second + +Sample output: + +![image](https://github.com/user-attachments/assets/e8cce396-b210-49d5-ac95-dc43f9ae69d3) + +## Event config file: + +pcm-iio tool allows the user to customize the performance events with a config file as an advanced feature. The event config files are in opCode-x-y.txt files where x/y is cpu family is model id, for example 6/143 for Sapphire Rapids. + diff --git a/_codeql_build_dir/bin/PCM_RAW_README.md b/_codeql_build_dir/bin/PCM_RAW_README.md new file mode 100644 index 00000000..585e0b35 --- /dev/null +++ b/_codeql_build_dir/bin/PCM_RAW_README.md @@ -0,0 +1,251 @@ +-------------------------------------------------------------------------------- +PCM Raw Utility +-------------------------------------------------------------------------------- + +Disclaimer: in contrast to other PCM utilities this one is for expert usage only. + +*pcm-raw* allows to collect arbitrary core and uncore PMU events by providing raw PMU event ID encoding. It can become handy if other low-level PMU tools (e.g. emon, Linux perf) can not be used for some reason. For example: +- emon kernel driver is not compatible with the currently used Linux kernel or operating system +- loading emon Linux kernel driver is forbidden due to system administration policies +- Linux kernel is too old to support modern processor PMU and can not be upgraded + +Currently supported PMUs: core, m3upi, upi(ll)/qpi(ll), imc, m2m, pcu, cha/cbo, iio, ubox + +Recommended usage (as privileged/root user): +1. Install VTune which also contains emon (emon/sep driver installation is not needed): [free download](https://software.intel.com/content/www/us/en/develop/tools/vtune-profiler.html) +2. Run emon with `--dry-run -m` options to obtain raw PMU event encodings for event of interest. For example: +``` +# emon -C BR_MISP_RETIRED.ALL_BRANCHES,UNC_CHA_CLOCKTICKS,UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0,UNC_UPI_TxL_FLITS.NON_DATA --dry-run -m +Event Set 0 + BR_MISP_RETIRED.ALL_BRANCHES (PerfEvtSel0 (0x186) = 0x00000000004300c5) + CC=ALL PC=0x0 UMASK=0x0 E=0x1 INT=0x0 INV=0x0 CMASK=0x0 AMT=0x0 +cha Uncore Event Set 0 + UNC_CHA_CLOCKTICKS (CHA Counter 0 (0xe01) = 0x0000000000400000) + +qpill Uncore Event Set 0 + UNC_UPI_TxL_FLITS.NON_DATA (QPILL Counter 0 (0x350) = 0x0000000000409702) + +iio Uncore Event Set 0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 (IIO Counter 0 (0xa48) = 0x0000701000400183) +``` +3. Run *pcm-raw* by specifying the obtained raw event encodings to collect into csv file. Example: +``` +pcm-raw -e core/config=0x00000000004300c5,name=BR_MISP_RETIRED.ALL_BRANCHES -e cha/config=0x0000000000400000,name=UNC_CHA_CLOCKTICKS -e qpi/config=0x0000000000409702,name=UNC_UPI_TxL_FLITS.NON_DATA -e iio/config=0x0000701000400183,name=UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 -csv=out.csv +``` +4. View/process the csv file using your favorite method. For example just open it in Excel. + +-------------------------------------------------------------------------------- +Collecting Register Values +-------------------------------------------------------------------------------- + +pcm-raw supports collecting raw MSR and PCICFG (CSR) register values. The syntax is described below: + +Model Specific Registers (MSRs): + +``` +package_msr/config=,config1=[,name=] +``` + +static_or_freerun encoding: +* 0 : static (last value reported in csv) +* 1 : freerun (delta to last value reported in csv) + +Examples: +``` +package_msr/config=0x34,config1=0,name=SMI_COUNT +thread_msr/config=0x10,config1=1,name=TSC_DELTA +thread_msr/config=0x10,config1=0,name=TSC +``` + +If the name is not specified the first event will show up as package_msr:0x34:static, with the name it will show up as SMI_COUNT in csv. + +PCI Configuration Registers - PCICFG (CSR): + +``` +pcicfg/config=,config1=,config2=,width=[,name=] +``` + +* dev_id: Intel PCI device id where the register is located +* offset: offset of the register +* static_or_freerun: same syntax as for MSR registers +* width: register width in bits (16,32,64) + +Example: + +``` +pcicfg/config=0xe20,config1=0x180,config2=0x0,width=32,name=CHANERR_INT +``` +From: https://www.intel.la/content/dam/www/public/us/en/documents/datasheets/xeon-e7-v2-datasheet-vol-2.pdf + +MMIO Registers: + +``` +mmio/config=,config1=,config2=,config3=[,config4=],width=[,name=] +``` + +The MEMBAR is computed by logically ORing the result of membar_bits1 and membar_bits1 computation described below (PCICFG read + bit extraction and shift). The final MMIO register address = MEMBAR + offset. + +* width: register width in bits (16,32,64) +* dev_id: Intel PCI device id where the membar address registers are located +* membar_bits1: mmioBase register bits to compute membar (base address) + - bits 0-15 : PCICFG register offset to read membar1 bits + - bits 16-23: source position of membar bits in the PCICFG register + - bits 24-31: number of bits + - bits 32-39: destination bit position in the membar +* membar_bits2: mmioBase register bits to compute membar (base address), can be zero if only membar_bits1 is sufficient for locating the register. + - bits 0-15 : PCICFG register offset to read membar2 bits + - bits 16-23: source position of membar bits in the PCICFG register + - bits 24-31: number of bits + - bits 32-39: destination bit position in the membar +* offset: offset of the MMIO register relative to the membar +* static_or_freerun: same syntax as for MSR registers + +Example (Icelake server iMC PMON MMIO register read): + +``` +mmio/config=0x3451,config1=0x22808,config2=1,config3=0x171D0000D0,config4=0x0c0b0000d8,width=64 +``` + +TPMI Registers: + +TPMI ([Topology Aware Register and PM Capsule Interface](https://github.com/intel/tpmi_power_management)) can be read with pcm-raw as follows: + +``` +tpmi/config=,config1=,config2=[,name=] +``` + +* tpmi_id: TPMI id +* offset: offset of the register +* static_or_freerun: same syntax as for MSR registers + +Example: + +``` +tpmi/config=0x2,config1=0x18,name=BHS_UFS_CONTROL +``` + +From: https://github.com/intel/tpmi_power_management/blob/main/UFS_TPMI_public_disclosure_FINAL_rev4.pdf + +-------------------------------------------------------------------------------- +Collecting Events By Names From Event Lists (https://github.com/intel/perfmon/) +-------------------------------------------------------------------------------- + +pcm-raw can also automatically lookup the events from the json event lists (https://github.com/intel/perfmon/) and translate them to raw encodings itself. To make this work you need to checkout PCM with simdjson submodule: + +* use git clone --recursive flag when cloning pcm repository, or +* update submodule with command `git submodule update --init --recursive`, or +* download simdjson library in the PCM source directory and recompile PCM: + +1. change to PCM 'src/' directory +2. git clone https://github.com/simdjson/simdjson.git +3. re-compile pcm + +Example of usage (on Intel Xeon Scalable processor): + +``` +pcm-raw -tr -e INST_RETIRED.ANY -e CPU_CLK_UNHALTED.THREAD -e CPU_CLK_UNHALTED.REF_TSC -e LD_BLOCKS.STORE_FORWARD -e UNC_CHA_CLOCKTICKS -e UNC_M_CAS_COUNT.RD +``` + +or with event groups specified in event_file.txt (with event multiplexing): + +``` +pcm-raw -tr -el event_file.txt +``` + +where event_file.txt contains event groups separated by a semicolon: + +``` +# group 1 +INST_RETIRED.ANY +CPU_CLK_UNHALTED.REF_TSC +CPU_CLK_UNHALTED.THREAD +DTLB_LOAD_MISSES.STLB_HIT +L1D_PEND_MISS.PENDING_CYCLES_ANY +MEM_INST_RETIRED.LOCK_LOADS +UOPS_EXECUTED.X87 +UNC_CHA_DIR_LOOKUP.SNP +UNC_CHA_DIR_LOOKUP.NO_SNP +UNC_M_CAS_COUNT.RD +UNC_M_CAS_COUNT.WR +UNC_UPI_CLOCKTICKS +UNC_UPI_TxL_FLITS.ALL_DATA +UNC_UPI_TxL_FLITS.NON_DATA +UNC_UPI_L1_POWER_CYCLES +; +# group 2 +INST_RETIRED.ANY +CPU_CLK_UNHALTED.REF_TSC +CPU_CLK_UNHALTED.THREAD +OFFCORE_REQUESTS_BUFFER.SQ_FULL +MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT +MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM +MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS +UNC_CHA_DIR_UPDATE.HA +UNC_CHA_DIR_UPDATE.TOR +UNC_M2M_DIRECTORY_UPDATE.ANY +UNC_M_CAS_COUNT.RD +UNC_M_CAS_COUNT.WR +UNC_M_PRE_COUNT.PAGE_MISS +UNC_UPI_TxL0P_POWER_CYCLES +UNC_UPI_RxL0P_POWER_CYCLES +UNC_UPI_RxL_FLITS.ALL_DATA +UNC_UPI_RxL_FLITS.NON_DATA +; +``` + +Sample csv output (date,time,event_name,milliseconds_between_samples,TSC_cycles_between_samples,unit0_event_count,unit1_event_count,unit2_event_count,...): + +``` +2021-09-27,00:07:40.507,UNC_CHA_DIR_LOOKUP.SNP,1000,2102078418,76,70,56,91,88,75,76,158,74,60,77,81,75,74,71,95,99,95,125,87,68,136,54,91,65,84,69,46,75,100,92,68,67,70,68,80,72,88,80,76,130,71,102,98,79,73,71,109 +2021-09-27,00:07:40.507,UNC_CHA_DIR_LOOKUP.NO_SNP,1000,2102078418,1218,1280,1187,1310,1268,1287,1282,1331,1265,1267,1300,1270,1258,1307,1289,1300,1410,1378,1312,1316,1367,1337,1332,1317,1584,1519,1569,1557,1483,1537,1545,1520,1562,1527,1575,1540,1530,1581,1476,1525,1610,1680,1581,1657,1565,1613,1596,1600 +2021-09-27,00:07:40.507,INST_RETIRED.ANY,1000,2102078418,705400,44587,45923,238392,53910,69547,46644,46172,44740,44732,45692,44864,46105,45352,45057,217052,46511,46671,46893,46459,53739,47021,114133,46339,61649,59027,142096,48048,98178,48288,162122,474329,48046,49795,78239,425635,105512,69933,49827,48913,71549,48451,294858,312316,149586,540477,49115,55144,46788,61681,82964,81127,116227,85776,453369,145979,81007,82269,83580,73595,73355,73751,72599,47169,47767,48191,48131,48359,48621,67664,48227,532184,49686,48704,324264,48539,48795,48609,60275,518368,116077,163734,526815,50650,140337,666605,47935,1368049,47243,337542,47153,46882,46925,62373,70186,466927 +2021-09-27,00:07:40.507,CPU_CLK_UNHALTED.REF_TSC,1000,2102078418,3618636,384720,589092,2143512,766752,724164,803124,627312,541548,538188,534324,509964,535164,527436,529284,1366176,488124,491820,533148,543900,608580,577920,1145172,602196,919632,824544,1429344,692916,1092756,700644,1298640,2487156,736344,841344,1324008,1855476,1260084,1104768,658308,5805324,851424,766080,1909740,2170392,1313592,3986892,683844,986832,659064,642432,682668,772128,1076628,710220,2514876,1085112,715344,700812,676452,594468,577668,590856,574056,597996,525336,551460,548520,561624,569352,741468,623196,3124212,592032,596400,2265312,556584,593124,546756,766752,2547216,1047396,1280160,2704884,525336,1200444,3255000,497700,13643700,481572,1601040,515592,523740,503664,854280,603120,2305128 +2021-09-27,00:07:40.507,CPU_CLK_UNHALTED.THREAD,1000,2102078418,1723000,183219,280560,1020631,365140,344897,382467,298699,257868,256243,254471,242757,254794,251172,252091,650377,232442,234209,253807,259024,289817,275179,545244,286717,437888,392646,680513,329759,520244,333662,618356,1184347,350594,400648,630580,1517122,599939,525847,313441,2765951,405441,364827,909395,1033366,625655,1898427,325614,881026,312798,305884,325245,367890,512845,338440,1197524,516836,341497,334581,322975,283138,275031,281300,273347,284616,250171,262581,261182,267455,271097,353013,296757,1487751,282516,283651,1076725,265489,282845,260889,365411,1212743,498705,611118,1287439,360493,571158,1549944,236616,6499483,229820,762766,245338,248648,239640,406676,287582,1714659 +2021-09-27,00:07:40.507,DTLB_LOAD_MISSES.STLB_HIT,1000,2102078418,10093,1178,1186,2593,1184,1356,1182,1201,1187,1200,1191,1179,1189,1179,1177,1444,1218,1205,1158,1183,1216,1190,1789,1184,1388,1347,2207,1384,1566,1352,1541,3221,1374,1398,1580,11223,1690,1427,1398,1356,1531,1388,3429,3567,2136,2639,1354,1393,1181,1188,1457,1456,1801,1437,4698,1697,1426,1434,1418,1452,1396,1394,1434,1164,1349,1349,1356,1318,1354,1528,1349,18546,1168,1160,8935,1166,1172,1167,1194,4432,1801,2341,3152,1190,1777,4328,1178,4396,1170,1939,1199,1150,1158,1197,1187,12441 +2021-09-27,00:07:40.507,L1D_PEND_MISS.PENDING_CYCLES_ANY,1000,2102078418,682630,81530,114229,363299,169260,134931,441644,183870,89947,95379,98135,81156,75366,77990,78734,178321,52738,53883,57241,56306,65514,94824,152070,227164,87723,80980,300491,70675,148506,70130,173723,628031,142178,161405,503099,383743,255465,317627,67134,1509172,105102,242908,300344,336683,157280,555052,84017,615357,526290,88531,117674,387708,192129,157226,451213,201430,103646,106302,112452,86251,83203,82880,80239,189044,72389,73820,75135,70746,84963,106517,168907,249006,117006,109389,320326,98291,168531,100734,206075,647276,167155,154684,495947,359092,257614,322235,78189,1473756,148139,278653,308380,343576,166510,556816,90475,306546 +2021-09-27,00:07:40.507,MEM_INST_RETIRED.LOCK_LOADS,1000,2102078418,3462,231,235,1159,259,277,239,237,236,238,236,239,238,237,237,1114,237,237,238,237,265,237,555,237,277,278,542,237,431,240,389,906,239,238,385,3973,435,280,238,238,401,238,847,1238,604,1948,238,238,235,275,266,267,428,277,1287,399,271,277,272,239,240,239,239,237,237,237,237,237,238,347,237,4266,238,238,1174,238,238,238,270,1361,526,697,1101,238,615,2172,238,4276,236,642,236,237,236,275,299,2842 +2021-09-27,00:07:40.507,UOPS_EXECUTED.X87,1000,2102078418,1152,12,13,496,46,17,27,12,11,13,10,14,11,27,12,1591,11,10,11,13,23,11,257,12,64,52,216,31,231,31,1668,5944,31,30,85,710,101,54,34,41,100,33,1852,1561,423,2348,28,46,14,23,155,57,82,172,2776,281,19,52,107,18,36,18,19,14,11,10,10,10,26,57,10,108,31,33,151,31,32,30,63,3700,361,509,4610,31,396,1814,31,5607,33,4175,31,30,32,47,78,471 +2021-09-27,00:07:40.507,UNC_M_CAS_COUNT.RD,1000,2102078418,37565,33584,0,0,0,0,40306,0,37373,0,0,0 +2021-09-27,00:07:40.507,UNC_M_CAS_COUNT.WR,1000,2102078418,58994,53007,0,0,0,0,25088,0,21901,0,0,0 +2021-09-27,00:07:40.507,UNC_UPI_CLOCKTICKS,1000,2102078418,1300347171,1300351441,1200328715,1300297715,1300303139,1200283803 +2021-09-27,00:07:40.507,UNC_UPI_TxL_FLITS.ALL_DATA,1000,2102078418,132768,150840,0,285147,269190,0 +2021-09-27,00:07:40.507,UNC_UPI_TxL_FLITS.NON_DATA,1000,2102078418,298203,319302,0,293389,264875,0 +2021-09-27,00:07:40.507,UNC_UPI_L1_POWER_CYCLES,1000,2102078418,0,0,1200328715,0,0,1200283803 +``` +The unit can be logical core, memory channel, CHA, etc, depending on the event type. + + +Show events available for the processor on the system: +``` +pcm-raw -? +``` + +-------------------------------------------------------------------------------- +Low-level access to Intel PMT telemetry data +-------------------------------------------------------------------------------- + +pcm-raw can read raw telemetry data from Intel PMT (https://github.com/intel/Intel-PMT/). + +Syntax for a PMT raw telemetry counter: + +``` +pmt/config=,config1=,config2=,config3=[,name=] + +``` + +The fields are the values for the counter from the Intel PMT aggregator XML: + +* uniqueid : Intel PMT Telemetry unique identifier +* sampleID : sample ID of the counter +* sampleType counter encoding: + - 0 : Snapshot (last value reported in csv) + - non-zero : Counter (delta to last value reported in csv) +* lsb : lsb field +* msb : msb field + +Example for https://github.com/intel/Intel-PMT/blob/868049006ad2770a75e5fc7526fd0c4b22438e27/xml/SPR/OOBMSM/CORE/spr_aggregator.xml#L15428: +``` +pmt/config=0x87b6fef1,config1=770,config2=0,config3=32,config4=63,name="Temperature_histogram_range_5_(50.5-57.5C)_counter_for_core_0" +``` + +Current limitations: this feature (PMT access) is currently only available on Linux (with Intel PMT Linux driver). diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json new file mode 100644 index 00000000..3f1fcc2b --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json @@ -0,0 +1,122 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "Filter0": {"Config": 1, "Position": 0, "Width": 64, "DefaultValue": 0}, + "TID": {"Config": 1, "Position": 0, "Width": 6, "DefaultValue": 0}, + "State": {"Config": 1, "Position": 17, "Width": 7, "DefaultValue": 0}, + "Filter1": {"Config": 2, "Position": 0, "Width": 64, "DefaultValue": 59}, + "OPC": {"Config": 2, "Position": 20, "Width": 9, "DefaultValue": 0}, + "NC": {"Config": 2, "Position": 30, "Width": 1, "DefaultValue": 0}, + "ISOC": {"Config": 2, "Position": 31, "Width": 1, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json new file mode 100644 index 00000000..9b08c471 --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json @@ -0,0 +1,136 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "Filter0": {"Config": 1, "Position": 0, "Width": 64, "DefaultValue": 0}, + "TID": {"Config": 1, "Position": 0, "Width": 9, "DefaultValue": 0}, + "Filter1": {"Config": 2, "Position": 0, "Width": 64, "DefaultValue": 59} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 8}, + "FCMask": {"Config": 0, "Position": 44, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json new file mode 100644 index 00000000..ee0d516d --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json @@ -0,0 +1,144 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed3" : { + "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 9, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json new file mode 100644 index 00000000..f564e4fa --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json @@ -0,0 +1,103 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json new file mode 100644 index 00000000..9955c1dc --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json @@ -0,0 +1,57 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json new file mode 100644 index 00000000..0cc35641 --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json @@ -0,0 +1,152 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed3" : { + "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json new file mode 100644 index 00000000..d68375b7 --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json @@ -0,0 +1,158 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed3" : { + "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex8" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex16" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json new file mode 100644 index 00000000..d68375b7 --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json @@ -0,0 +1,158 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed3" : { + "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex8" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex16" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json new file mode 100644 index 00000000..e3b4a8ed --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json @@ -0,0 +1,145 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex8" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex16" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json new file mode 100644 index 00000000..e3b4a8ed --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json @@ -0,0 +1,145 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex8" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "pciex16" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json new file mode 100644 index 00000000..0cc35641 --- /dev/null +++ b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json @@ -0,0 +1,152 @@ +{ + "core" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, + "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, + "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, + "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, + "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, + "Invert": {"Config": 0, "Position": 23, "Width": 1}, + "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, + "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, + "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, + "MSRIndex": { + "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, + "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, + "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, + "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} + } + }, + "fixed0" : { + "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed1" : { + "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed2" : { + "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} + }, + "fixed3" : { + "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, + "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, + "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, + "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, + "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} + } + }, + "cha" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, + "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} + } + }, + "imc" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "xpi" : { + "__comment" : "this is for UPI LL and QPI LL uncore PMUs", + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} + } + }, + "m2m" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, + "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} + } + }, + "m3upi" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "mdf" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "irp" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "ubox" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} + } + }, + "pcu" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} + } + }, + "iio" : { + "programmable" : { + "EventCode": {"Config": 0, "Position": 0, "Width": 8}, + "UMask": {"Config": 0, "Position": 8, "Width": 8}, + "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, + "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, + "PortMask": {"Config": 0, "Position": 36, "Width": 12}, + "FCMask": {"Config": 0, "Position": 48, "Width": 3} + } + } +} diff --git a/_codeql_build_dir/bin/STARS.md b/_codeql_build_dir/bin/STARS.md new file mode 100644 index 00000000..3755531f --- /dev/null +++ b/_codeql_build_dir/bin/STARS.md @@ -0,0 +1,3 @@ +## Git Hub Star History for PCM Project + +[![Star History Chart](https://api.star-history.com/svg?repos=intel/pcm&type=Date)](https://star-history.com/#intel/pcm&Date) diff --git a/_codeql_build_dir/bin/WINDOWS_HOWTO.md b/_codeql_build_dir/bin/WINDOWS_HOWTO.md new file mode 100644 index 00000000..4ad1a03b --- /dev/null +++ b/_codeql_build_dir/bin/WINDOWS_HOWTO.md @@ -0,0 +1,163 @@ +**COMPILATION AND INSTALLATION OF UTILITIES** + +_For support of systems with more than _**_64_**_ logical cores you need to compile all binaries below in “_**_x64_**_” platform mode (not the default “_**_Win32_**_” mode)._ + +## Command-line utility + +1. Follow [Compile the Windows MSR driver](#compile-the-windows-msr-driver) to compile the Windows MSR driver (msr.sys). For Windows 7 and later versions you have to [sign the msr.sys driver additionally](#sign-the-windows-msr-driver). To enable loading test-signed drivers on the system: in administrator cmd console run `bcdedit /set testsigning on` and reboot. + +2. Build the *pcm.exe* utility: + ``` + cmake -B build + cmake --build build --config Release --parallel + ``` + alternatively you can perform `cmake -B build`, open *PCM.sln* form *build* folder in and build required project in Visual Studio. + .exe and .dll files will be located in *build\bin\Release* folder +3. As Administrator create PCM directory in Windows "Program Files" directory (e.g. `C:\Program Files (x86)\PCM\`) +4. As Administrator copy the msr.sys driver and pcm.exe into the PCM directory +5. Run pcm.exe utility from the PCM directory as Administrator + +For Windows 7+ and Windows Server 2008+ R2 the PCM utilities need to be run as Administrator: + +Alternatively you can achieve the same using the “Properties” Windows menu of the executable (“Privilege level” setting in the “Compatibility” tab): Right mouse click -> Properties -> Compatibility -> Privilege level -> Set “Run this program as an administrator”. + +![Screenshot](run-as-administrator.png) + +If you are getting the error `Starting MSR service failed with error 3 The system cannot find the path specified.` try to uninstall the driver by running `pcm --uninstallDriver` and optionally reboot the system. + +## Graphical Perfmon front end + +1. Follow [Compile the windows MSR driver](#compile-the-windows-msr-driver) to compile the windows MSR driver (msr.sys). For Windows 7 and later versions you have to sign the msr.sys driver additionally ([http://msdn.microsoft.com/en-us/library/ms537361(VS.85).aspx](http://msdn.microsoft.com/en-us/library/ms537361(VS.85).aspx)). + +2. Copy msr.sys into the c:\windows\system32 directory + +3. Build pcm-lib.dll using Microsoft Visual Studio or cmake + +4. Build 'PCM-Service.exe' using Microsoft Visual Studio or cmake + +5. Copy PCM-Service.exe, PCM-Service.exe.config, and pcm-lib.dll files into the PCM sub-directory in Windows "Program Files" directory (see above) + +The config file enables support for legacy security policy. Without this configuration switch, you will get an exception like this: + +Unhandled Exception: System.NotSupportedException: This method implicitly uses CAS policy, which has been obsoleted by the .NET Framework. + +6. With administrator rights execute '"PCM-Service.exe" -Install' from this directory + +7. With administrator rights execute 'net start pcmservice' + +8. Start perfmon and find new PCM\* counters + +If you do not want or cannot compile the msr.sys driver you might use a third-party open source WinRing0 driver instead (experimental only, for testing environments only). +Instructions: + +1. Download the free RealTemp utility package from [http://www.techpowerup.com/realtemp/](http://www.techpowerup.com/realtemp/) or any other free utility that uses the open-source WinRing0 driver (like OpenHardwareMonitor [http://code.google.com/p/open-hardware-monitor/downloads/list](http://code.google.com/p/open-hardware-monitor/downloads/list)). +2. Copy WinRing0.dll, WinRing0.sys, WinRing0x64.dll, WinRing0x64.sys files from there into the PCM.exe binary location, into the PCM-Service.exe location and into c:\windows\system32 +3. Run the PCM.exe tool and/or go to step 6 (perfmon utility). + +## Compile the Windows MSR driver + +1. Download Visual Studio ([Visual Studio download](https://visualstudio.microsoft.com/downloads/)). +When you install Visual Studio, also install related packages: + - under `Workloads`, select `Desktop development with C++` +(select `C++ CMake tools for Windows` in this workload) and `.NET desktop development`. + - under `Individual components`, search `Libs for Spectre` and select `MSVC v143 - VS +2022 C++ x64/x86 Spectre-mitigated libs(Latest)`. + +2. Download and install SDK ([windows-sdk](https://developer.microsoft.com/en-us/windows/downloads/windows-sdk/)) + +3. Download and install WDK ([windows-wdk](https://learn.microsoft.com/en-us/windows-hardware/drivers/download-the-wdk)). Please select `Install Windows Driver Kit Visual Studio extension` when you install WDK. + +4. Open **a terminal in Visual Studio**, then go to `src\WinMSRDriver`, and run the following command to compile the driver. Then you will see `MSR.sys` in `src\WinMSRDriver\x64\Release`. + ``` + MSBuild.exe MSR.vcxproj -property:Configuration=Release -property:Platform=x64 + ``` + +## Sign the Windows MSR driver + +Run the following in PowerShell, in the directory where `MSR.sys` is located: + +``` +$cert = New-SelfSignedCertificate -Type CodeSigning -Subject "CN=TestCert" -CertStoreLocation "Cert:\CurrentUser\My" -KeyExportPolicy Exportable +$pwd = Read-Host -Prompt "Enter the password for the PFX file" -AsSecureString +Export-PfxCertificate -Cert $cert -FilePath TestCert.pfx -Password $pwd +signtool sign /fd SHA256 /f TestCert.pfx /p ([Runtime.InteropServices.Marshal]::PtrToStringAuto([Runtime.InteropServices.Marshal]::SecureStringToBSTR($pwd))) /t http://timestamp.digicert.com MSR.sys +``` + +Afterwards, double-click `TestCert.pfx`. Install to "Current User" and when able to pick "Place all ...", browse for "Trusted Root Certification Authorities". + +## Known limitations + +Running PCM.exe under Cygwin shell is possible, but due to incompatibilities of signals/events handling between Windows and Cygwin, the PCM may not cleanup PMU configuration after Ctrl+C or Ctrl+Break pressed. The subsequent run of PCM will require to do PMU configuration reset, so adding -r command line option to PCM will be required. + +PCM-Service FAQ: +Q: Help my service won't start, what can I do to diagnose the problem? +A: Please check in the Windows Application "Event Viewer" under "Windows Logs" and then under "Application". PCM-Service writes its messages here, just look for errors. If you can't figure it out how to fix it, create a bug report and make sure to paste the text from the Event Viewer in the bug report so we can diagnose the issue. + +Q: I see a message in the Events Viewer that PCM-Service does not start because the "custom counter file view is out of memory", how do I fix this? +A: Despite that PCM-Service is reserving more memory than the standard 512kB this error can still occur if there is another application that uses performance counters is initialized before PCM. There are two options: +1. identify the application or service that starts before PCM-Service and stop or disable it and consequently reboot and try again +2. [find your machine.config file](https://stackoverflow.com/questions/2325473/where-is-machine-config) and add +` + +` +to that file + +## pcm-sensor-server (HTTP/HTTPS server for Grafana integration) + +Starting from this release, **pcm-sensor-server** is now supported on Windows. This utility exposes PCM metrics over HTTP in JSON or Prometheus format for integration with Grafana dashboards. + +### Building pcm-sensor-server on Windows + +1. Follow the **Compile the Windows MSR driver** and **Sign the Windows MSR driver** sections above to compile, sign, and install the MSR driver (`msr.sys`) + +2. Build pcm-sensor-server: + ``` + cmake -B build + cmake --build build --config Release --target pcm-sensor-server + ``` + + The executable will be located in `build\bin\Release\pcm-sensor-server.exe` + +3. (Optional) For HTTPS support, ensure OpenSSL is installed and available to CMake + +### Running pcm-sensor-server on Windows + +1. Choose or create a directory for PCM (e.g., `C:\Program Files\PCM\` or `C:\Program Files (x86)\PCM\`). Copy `msr.sys` and `pcm-sensor-server.exe` to this directory. + +2. Run as Administrator (required for MSR access): + ``` + pcm-sensor-server.exe + ``` + + The server will start on the default port 9738 + +3. Common command-line options: + - `-p ` : Run on a specific port (default is 9738) + - `-D ` : Set debug verbosity level (0 = no debug, higher = more verbose) + - `-s` : Enable HTTPS (requires OpenSSL and certificate files) + - `-h` or `--help` : Show all available options + +4. Access the metrics: + - JSON format: http://localhost:9738/ (with `Accept: application/json` header) + - Prometheus format: http://localhost:9738/metrics + +### Windows-specific limitations + +- **Daemon mode not supported**: The `-d` (daemon/background) option is not available on Windows. The server runs in foreground mode only. +- **Real-time priority not supported**: The `-R` (real-time priority) option is not available on Windows. +- **Signal handling**: Use Ctrl+C to gracefully stop the server instead of SIGTERM/SIGINT. + +### Example: Running with Grafana on Windows + +1. Start pcm-sensor-server as Administrator: + ``` + pcm-sensor-server.exe -p 9738 + ``` + +2. Configure Prometheus to scrape from `http://localhost:9738/metrics` + +3. Configure Grafana to use your Prometheus data source + +4. Import the PCM Grafana dashboard (see [scripts/grafana/README.md](../scripts/grafana/README.md)) + +For more details on using pcm-sensor-server with Grafana, see [PCM-EXPORTER.md](PCM-EXPORTER.md). diff --git a/_codeql_build_dir/bin/generate_summary_readme.md b/_codeql_build_dir/bin/generate_summary_readme.md new file mode 100644 index 00000000..f202a926 --- /dev/null +++ b/_codeql_build_dir/bin/generate_summary_readme.md @@ -0,0 +1,25 @@ +Step 1 + +```pip3 install pipreqs``` + +Step 2 + +```cd /path/to/pcm/scripts``` + +Step 3 + +```python3 -m pipreqs.pipreqs --encoding utf-8 .``` + +Step 4 + +```pip3 install -r requirements.txt``` + +Step 5 + +```python3 generate_summary.py --help``` + +Step 6 + +```python3 generate_summary.py -{argument1} -{argument2} ....-{argumentN}``` + + diff --git a/_codeql_build_dir/bin/license.txt b/_codeql_build_dir/bin/license.txt new file mode 100644 index 00000000..976fed2c --- /dev/null +++ b/_codeql_build_dir/bin/license.txt @@ -0,0 +1,28 @@ +This notice belongs to the code originating from "Intel Performance Counter Monitor". + +Copyright (c) 2009-2016, Intel Corporation +All rights reserved. +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +* Neither the name of Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + diff --git a/_codeql_build_dir/bin/opCode-6-106.txt b/_codeql_build_dir/bin/opCode-6-106.txt new file mode 100644 index 00000000..2bd1077e --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-106.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-108.txt b/_codeql_build_dir/bin/opCode-6-108.txt new file mode 100644 index 00000000..2bd1077e --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-108.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-134.txt b/_codeql_build_dir/bin/opCode-6-134.txt new file mode 100644 index 00000000..4c8e744f --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-134.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total \ No newline at end of file diff --git a/_codeql_build_dir/bin/opCode-6-143-accel.txt b/_codeql_build_dir/bin/opCode-6-143-accel.txt new file mode 100644 index 00000000..8c6429a7 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-143-accel.txt @@ -0,0 +1,20 @@ +# IAA events +ctr=0,ev_sel=0x1,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=IAA,vname=Inbound_BW(Bps) +ctr=1,ev_sel=0x2,ev_cat=0x1,en=1,multiplier=512,divider=1,hname=IAA,vname=Outbound_BW(Bps) +ctr=2,ev_sel=0x5,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=IAA,vname=ShareWQ_ReqNb +ctr=3,ev_sel=0x10,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=IAA,vname=DedicateWQ_ReqNb + +# DSA events +ctr=0,ev_sel=0x1,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=DSA,vname=Inbound_BW(Bps) +ctr=1,ev_sel=0x2,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=DSA,vname=Outbound_BW(Bps) +ctr=2,ev_sel=0x5,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=DSA,vname=ShareWQ_ReqNb +ctr=3,ev_sel=0x10,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=DSA,vname=DedicateWQ_ReqNb + +# QAT events +ctr=0,ev_sel=0x6,ev_cat=0x1,en=1,multiplier=1048576,divider=1,hname=QAT,vname=Inbound_BW(Bps) +ctr=1,ev_sel=0x7,ev_cat=0x1,en=1,multiplier=1048576,divider=1,hname=QAT,vname=Outbound_BW(Bps) +ctr=2,ev_sel=0xB,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_comp0(%) +ctr=3,ev_sel=0xC,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp0(%) +ctr=4,ev_sel=0xD,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp1(%) +ctr=5,ev_sel=0xE,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp2(%) +ctr=6,ev_sel=0xF,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_xlt0(%) diff --git a/_codeql_build_dir/bin/opCode-6-143.txt b/_codeql_build_dir/bin/opCode-6-143.txt new file mode 100644 index 00000000..7a4dfc3d --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-143.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-173.txt b/_codeql_build_dir/bin/opCode-6-173.txt new file mode 100644 index 00000000..821de1c2 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-173.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-174.txt b/_codeql_build_dir/bin/opCode-6-174.txt new file mode 100644 index 00000000..821de1c2 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-174.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-175.txt b/_codeql_build_dir/bin/opCode-6-175.txt new file mode 100644 index 00000000..821de1c2 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-175.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-182.txt b/_codeql_build_dir/bin/opCode-6-182.txt new file mode 100644 index 00000000..821de1c2 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-182.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-207.txt b/_codeql_build_dir/bin/opCode-6-207.txt new file mode 100644 index 00000000..7a4dfc3d --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-207.txt @@ -0,0 +1,45 @@ +#Clockticks +#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 +ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 +ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 +# IOMMU events +ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total +ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-85.txt b/_codeql_build_dir/bin/opCode-6-85.txt new file mode 100644 index 00000000..73d93176 --- /dev/null +++ b/_codeql_build_dir/bin/opCode-6-85.txt @@ -0,0 +1,26 @@ +# Inbound (PCIe device DMA into system) payload events +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part3 (4th x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part0 (1st x16/x8/x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part1 (2nd x4) +ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part2 (2nd x8/3rd x4) +ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part3 (4th x4) +# Outbound (CPU MMIO to the PCIe device) payload events +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part3 (4th x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part0 (1st x16/x8/x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part1 (2nd x4) +ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part2 (2nd x8/3rd x4) +ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part3 (4th x4) +# VTd events +ctr=0,unit=iio,ev_sel=0x41,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=IOTLB Hit,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x20,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=IOTLB Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d CTXT Miss,vname=Total +ctr=3,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d L1 Miss,vname=Total +ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d L2 Miss,vname=Total +ctr=1,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=VT-d L3 Miss,vname=Total +ctr=2,unit=iio,ev_sel=0x84,umask=0x04,en=1,ch_mask=0x10,fc_mask=0x7,multiplier=1,hname=VT-d Mem Read,vname=Total diff --git a/_codeql_build_dir/bin/pcm b/_codeql_build_dir/bin/pcm new file mode 100755 index 0000000000000000000000000000000000000000..d8abab5c20f96f31578b36e53b27aac9880d81df GIT binary patch literal 1473920 zcmbTf30TbE_Xqx-Y09*k5?U&Yl1B`^>j_{?GG2kC!{0xpVHh=bn4+dEa@z?`(9MGLgw(P-2py z##8iPH9uG)7LUA9wz402MNvG;no@@U2UCM6IpESYdE{NmvXO~zh)Xu9Cj%w@ISu+n z59I)4Q{qyrAzh+oq=H1ThKcWrONxUP=+DX0FFEAX5+!45Z&5{Y`F}qr`hn|wL-shK8Hu|gOq0y!@#yxwWrI`oHM~ULeGg!k}@p1MBoYu1BWK}+sV-g>r!=g;G)M6c( zj#MGVH&$||Sp1r+N_;loLWfe`0aE0cp}VLo&x_n6vgM%Py$NmLZSd0{22ZvgWZ?{ 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for a file +pcm-numa.cpp.s: + cd /home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir && $(MAKE) $(MAKESILENT) -f src/CMakeFiles/pcm-numa.dir/build.make src/CMakeFiles/pcm-numa.dir/pcm-numa.cpp.s +.PHONY : pcm-numa.cpp.s + +pcm-pcicfg.o: pcm-pcicfg.cpp.o +.PHONY : pcm-pcicfg.o + +# target to build an object file +pcm-pcicfg.cpp.o: + cd /home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir && $(MAKE) $(MAKESILENT) -f src/CMakeFiles/pcm-pcicfg.dir/build.make src/CMakeFiles/pcm-pcicfg.dir/pcm-pcicfg.cpp.o +.PHONY : pcm-pcicfg.cpp.o + +pcm-pcicfg.i: pcm-pcicfg.cpp.i +.PHONY : pcm-pcicfg.i + +# target to preprocess a source file +pcm-pcicfg.cpp.i: + cd /home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir && $(MAKE) $(MAKESILENT) -f src/CMakeFiles/pcm-pcicfg.dir/build.make src/CMakeFiles/pcm-pcicfg.dir/pcm-pcicfg.cpp.i +.PHONY : pcm-pcicfg.cpp.i + +pcm-pcicfg.s: pcm-pcicfg.cpp.s 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- -/* Construct a string literal encoding the version number components. */ -#elif defined(COMPILER_VERSION_MAJOR) -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#elif defined(COMPILER_VERSION_INTERNAL_STR) -char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. 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- -/* Construct a string literal encoding the version number components. */ -#elif defined(COMPILER_VERSION_MAJOR) -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#elif defined(COMPILER_VERSION_INTERNAL_STR) -char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; 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PCM works on Linux, Windows, Mac OS X, - FreeBSD and DragonFlyBSD operating systems.") -set(CPACK_PACKAGE_DESCRIPTION_FILE "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") -set(CPACK_PACKAGE_DESCRIPTION_SUMMARY "Intel(r) Performance Counter Monitor (Intel(r) PCM)") -set(CPACK_PACKAGE_FILE_NAME "pcm-0000-Linux") -set(CPACK_PACKAGE_INSTALL_DIRECTORY "/usr/local") -set(CPACK_PACKAGE_INSTALL_REGISTRY_KEY "/usr/local") -set(CPACK_PACKAGE_NAME "pcm") -set(CPACK_PACKAGE_RELOCATABLE "true") -set(CPACK_PACKAGE_VENDOR "Humanity") -set(CPACK_PACKAGE_VERSION "0000") -set(CPACK_PACKAGE_VERSION_MAJOR "0") -set(CPACK_PACKAGE_VERSION_MINOR "1") -set(CPACK_PACKAGE_VERSION_PATCH "1") -set(CPACK_READELF_EXECUTABLE "/usr/bin/readelf") -set(CPACK_RESOURCE_FILE_LICENSE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/LICENSE") -set(CPACK_RESOURCE_FILE_README "/usr/local/share/cmake-3.31/Templates/CPack.GenericDescription.txt") -set(CPACK_RESOURCE_FILE_WELCOME "/usr/local/share/cmake-3.31/Templates/CPack.GenericWelcome.txt") -set(CPACK_RPM_COMPONENT_INSTALL "ON") -set(CPACK_RPM_PACKAGE_DESCRIPTION " Intel(r) Performance Counter Monitor (Intel(r) PCM) is an application programming - interface (API) and a set of tools based on the API to monitor - performance and energy metrics of Intel(r) Core(tm), Xeon(r), Atom(tm) - and Xeon Phi(tm) processors. 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This might be required for accessing registers in extended configuration space (beyond 4K) in *pcm-pcicfg* utility. Recent Linux kernels also require to be booted with iomem=relaxed option to make this work. - diff --git a/_codeql_build_dir/bin/CXL_README.md b/_codeql_build_dir/bin/CXL_README.md deleted file mode 100644 index ad9265be..00000000 --- a/_codeql_build_dir/bin/CXL_README.md +++ /dev/null @@ -1,15 +0,0 @@ -PCM can collect CLX bandwidth using the methods below. - --------------------------------------------------------------------------------- -CXL.mem and CXL.cache traffic --------------------------------------------------------------------------------- - -Please use pcm-memory utility for monitoring CXL.mem and CLX.cache traffic. pcm-memory will detect available CXL ports and will show traffic per CXL port and protocol (mem and cache) and per direction (read and write). - --------------------------------------------------------------------------------- -CXL.io traffic --------------------------------------------------------------------------------- - -pcm-iio utility should be used to monitor CXL.io traffic. pcm-iio will show traffic per CXL device and direction (inbound/outbound, read/write) - - diff --git a/_codeql_build_dir/bin/DOCKER_README.md b/_codeql_build_dir/bin/DOCKER_README.md deleted file mode 100644 index ed38f7ed..00000000 --- a/_codeql_build_dir/bin/DOCKER_README.md +++ /dev/null @@ -1,14 +0,0 @@ --------------------------------------------------------------------------------- -How To Run Intel(r) Performance Counter Monitor Server Container from GitHub Container Repository or Docker Hub --------------------------------------------------------------------------------- - -As root user: -1. ``modprobe msr`` -2. ``docker run -d --name pcm --privileged -p 9738:9738 ghcr.io/intel/pcm`` (GitHub Container repository) or ``docker run -d --name pcm --privileged -p 9738:9738 opcm/pcm`` (Dockerhub repository) - - the container can also be run with limited capabilities without the privileged mode: ``docker run -d --name pcm --cap-add=SYS_ADMIN --cap-add=SYS_RAWIO --device=/dev/cpu --device=/dev/mem -v /sys/firmware/acpi/tables/MCFG:/pcm/sys/firmware/acpi/tables/MCFG:ro -v /proc/bus/pci/:/pcm/proc/bus/pci/ -v /proc/sys/kernel/nmi_watchdog:/pcm/proc/sys/kernel/nmi_watchdog -v /sys:/sys:rw -p 9738:9738 ghcr.io/intel/pcm`` (there is also a docker-compose file containing these options: https://raw.githubusercontent.com/intel/pcm/master/docker-compose.yml) - -This will start pcm-sensor-server container exposing CPU metrics from the whole system at port 9738 - -The URLs of the docker container repositories: -- https://github.com/intel/pcm/pkgs/container/pcm -- https://hub.docker.com/r/opcm/pcm diff --git a/_codeql_build_dir/bin/ENVVAR_README.md b/_codeql_build_dir/bin/ENVVAR_README.md deleted file mode 100644 index 3a93ced0..00000000 --- a/_codeql_build_dir/bin/ENVVAR_README.md +++ /dev/null @@ -1,17 +0,0 @@ -`PCM_NO_PERF=1` : don't use Linux perf events API to program *core* PMUs (default is to use it) - -`PCM_USE_UNCORE_PERF=1` : use Linux perf events API to program *uncore* PMUs (default is *not* to use it) - -`PCM_NO_RDT=1` : don't use RDT metrics for a better interoperation with pqos utility (https://github.com/intel/intel-cmt-cat) - -`PCM_USE_RESCTRL=1` : use Linux resctrl driver for RDT metrics - -`PCM_PRINT_TOPOLOGY=1` : print detailed CPU topology - -`PCM_KEEP_NMI_WATCHDOG=1` : don't disable NMI watchdog (reducing the core metrics set) - -`PCM_NO_MAIN_EXCEPTION_HANDLER=1` : don't catch exceptions in the main function of pcm tools (a debugging option) - -`PCM_ENFORCE_MBM=1` : force-enable Memory Bandwidth Monitoring (MBM) metrics (LocalMemoryBW = LMB) and (RemoteMemoryBW = RMB) on processors with RDT/MBM errata - -`PCM_DEBUG_LEVEL=x` : x is an integer defining debug output level. level = 0 (default): minimal or no debug info, > 0 increases verbosity diff --git a/_codeql_build_dir/bin/FAQ.md b/_codeql_build_dir/bin/FAQ.md deleted file mode 100644 index 88a0266d..00000000 --- a/_codeql_build_dir/bin/FAQ.md +++ /dev/null @@ -1,95 +0,0 @@ - -## Q1 - -pcm-iio Tool outputs "Server CPU is required for this tool! Program aborted". Is there a way I can monitor my PCIe link bandwidth using one of the PCM utilities on client CPU? - -Answer: The "IO" metric in *pcm* utility is the closest capability to monitor I/O PCIe traffic on client CPUs. - -## Q2 - -PCM reports "ERROR: QPI LL monitoring device (...) is missing". How to fix it? - -Answer: It is likely a BIOS issue. See details [here](https://software.intel.com/content/www/us/en/develop/articles/bios-preventing-access-to-qpi-performance-counters.html) - -## Q3 - -Does PCM work inside a virtual machine? - -Answer: PCM works inside virtual machines which support vPMU (with a limited set of metrics supported by vPMU). For example on AWS instances this is indicated by the presence of [arch_perfmon](https://instaguide.io/info.html?type=c5.18xlarge) flag: https://instaguide.io/ . Enabling vPMU in hypervisors is documented [in Hardware Event-Based Sampling section](https://software.intel.com/content/www/us/en/develop/documentation/vtune-help/top/set-up-analysis-target/on-virtual-machine.html). - -## Q4 - -Does PCM work inside a docker container? - -Answer: yes, it does. An example of how to run PCM inside a docker container is located [here](DOCKER_README.md). The recipe works also for other PCM utilities besides pcm-sensor-server. - -## Q5 - -pcm-power reports "Unsupported processor model". Can you add support for pcm-power for my CPU? - -Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. PCM-power can not work without them. - -## Q6 - -pcm-memory reports that the CPU is not supported. Can you add support for pcm-memory for my CPU? - -Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. PCM-memory can not work without them. - -## Q7 - -Can PCM be used for measuring energy, CPU cycles, etc for a particular process or does it measure for the system as a whole? - -Answer: PCM supports measurement for the whole system, per processor, per physical or per logical core. If you need monitoring per-process or user per-thread you can pin your process and/or thread to certain cores and read PCM data for these cores. But keep in mind that the OS can also schedule other processes or threads on this core and this may disturb your measurements. For a precise per-process or per-thread measurement the Intel VTune profiler or Linux perf profiler should be used. - -## Q8 - -PCM reports - -``` -opening /dev/mem failed: errno is 1 (Operation not permitted) -Can not read memory controller counter information from PCI configuration space. Access to memory bandwidth counters is not possible. -You must be root to access these SandyBridge/IvyBridge/Haswell counters in PCM. -Secure Boot detected. Using Linux perf for uncore PMU programming. -``` - -How to fix it? - -Answer: Linux disables access to /dev/mem because Secure Boot is enabled in the BIOS. Disable Secure Boot in the BIOS to enable memory controller statistics (e.g. memory read and write bandwidth). - -## Q9 - -PCM reports -``` -Linux Perf: Error on programming ... -``` -How to fix it? - -**Answer:** It is an issue with the Linux kernel perf driver. As a workaround upgrade your Linux kernel to the latest available/possible or run PCM with its own programming logic: - -``` -export PCM_NO_PERF=1 -pcm -r -``` - -## Q10 - -If you are getting the error `Starting MSR service failed with error 3 The system cannot find the path specified.` try to uninstall the driver by running `pcm --uninstallDriver` and optionally reboot the system. - -## Q11 - -Is PCM supported on AWS instances - -**Answer**: - -Not all AWS instances allow users to collect CPU telemetry by exposing PMU to the user. The following instances can be used: - -* Bare metal instances: allow collection of CPU metrics from both core (e.g. instructions per cycle, cache misses) and uncore (e.g. memory controller, UPI) -* Full-socket (single socket, two socket, etc) virtualized instances: e.g. m5d.12xlarge, m5.24xlarge, m5.12xlarge. Only core CPU metrics are exposed, and certain CPU performance events are forbidden (e.g. offcore response events, events collecting “any_thread” information). “arch_perfmon” flag in /proc/cpuinfo indicates if the core CPU metrics are exposed (example: https://instaguide.io/info.html?type=m5.12xlarge ). The mechanism of PMU virtualization is commonly known as vPMU. - -## Q12 - -pcm-pcie reports that the CPU is not supported: "Jaketown, Ivytown, Haswell, Broadwell-DE, Skylake, Icelake, Snowridge and Sapphirerapids Server CPU is required for this tool! Program aborted" -Can you add support for pcm-pcie for my CPU? - -Answer: most likely you have a client CPU which does not have required hardware performance monitoring units. pcm-pcie can not work without them. - diff --git a/_codeql_build_dir/bin/FREEBSD_HOWTO.txt b/_codeql_build_dir/bin/FREEBSD_HOWTO.txt deleted file mode 100644 index 7711c85f..00000000 --- a/_codeql_build_dir/bin/FREEBSD_HOWTO.txt +++ /dev/null @@ -1,8 +0,0 @@ -Building: -$ cmake -B build -$ cmake --build build - -Runtime requirements: -* the cpuctl(4) driver needs to be loaded - -PCM is also available as a port maintained by The FreeBSD Project (sysutils/intel-pcm). diff --git a/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md b/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md deleted file mode 100644 index 6cf74314..00000000 --- a/_codeql_build_dir/bin/LATENCY-OPTIMIZED-MODE.md +++ /dev/null @@ -1,61 +0,0 @@ -# Latency Optimized Mode in Intel® Xeon® 6 Processors - -Intel® Xeon® 6 Processors (previously codenamed Granite Rapids and Sierra Forest/Birch Stream platform) introduce a new power management mechanism called Efficiency Latency Control (ELC), designed to optimize performance per watt. This feature allows hardware power management algorithms to balance the trade-off between latency and power consumption. For latency-sensitive workloads, further tuning can be performed to achieve the desired performance. - -The hardware monitors the average CPU utilization across all cores at regular intervals to determine an appropriate uncore frequency. While this approach generally results in optimal performance per watt, some workloads may achieve higher performance at the expense of increased power consumption. For instance, an application that intermittently performs memory reads on an otherwise idle system may experience delays if the hardware lowers the uncore frequency, causing a lag in ramping up to the required performance levels. To verify this, the uncore frequencies can be monitored using the pcm utility: - -![Uncore Frequency Statistics DEFAULT](https://github.com/user-attachments/assets/108c7350-3fc2-4056-aeaf-ecc7c25da6bc) - -The screenshot above presents real-time data on uncore frequency statistics, measured in GHz, from a dual-socket platform (represented by two rows). Each socket includes five dies (organized into five columns). The first three dies contain CORes (COR), Last Level Cache (LLC), and Memory controllers (M), collectively referred to as CORLLCM. The final two dies are IO dies. - -The ELC control has parameters that can be adjusted either through BIOS or software tools. The default parameter configuration is optimized for performance per watt, ensuring power efficiency. The alternative configuration, known as Latency Optimized Mode, prioritizes maximum performance. -Below are the PCM statistics from a system operating in Latency Optimized Mode: - -![Uncore Frequency Statistics Latency Optimized Mode](https://github.com/user-attachments/assets/70310bbc-725b-4450-af7a-1db2c04291dd) - -## BIOS Options for Latency Optimized Mode - -The BIOS option for selecting the Default or Latency Optimized Mode can typically be located in the following menus, depending on the BIOS version and OEM vendor: -- **Socket Configuration** -> **Advanced Power Management** -> **CPU – Advanced PM Tuning** -> **Latency Optimized Mode** (Disabled or Enabled) -- **System Utilities** -> **System Configuration** -> **BIOS/Platform Configuration (RBSU)** -> **Power and Performance Options** -> **Advanced Power Options** -> **Efficiency Latency Control** (Default or Latency Optimized mode) - -Should this BIOS option be unavailable or if there is a preference to change the mode during runtime, the PCM repository provides scripts for changing this mode. - -|Platform |Script Type| URL | -|------------------|-----------|---------------------------------------------------------------------| -|Linux/FreeBSD/UNIX|bash | https://github.com/intel/pcm/blob/master/scripts/bhs-power-mode.sh | -|Windows |powershell | https://github.com/intel/pcm/blob/master/scripts/bhs-power-mode.ps1 | - -The scripts require the pcm-tpmi utility. There are several methods to obtain this utility: -- **Download or install precompiled PCM binaries:** Please refer to the following link: [Downloading Pre-Compiled PCM Tools](https://github.com/intel/pcm?tab=readme-ov-file#downloading-pre-compiled-pcm-tools) -- **Compile the utility:** Follow the instructions in the "Building PCM Tools" section available at: [Building PCM Tools](https://github.com/intel/pcm?tab=readme-ov-file#building-pcm-tools) - * For Linux/FreeBSD: Copy the pcm-tpmi utility from PCM’s source 'build/bin' directory to `/usr/local/bin/` or execute `make install` in the 'build' directory. - -For Windows: Copy the pcm-tpmi utility to the current directory. - -Once the pcm-tpmi binary is correctly placed, you can set the Latency Optimized Mode. - -### Setting Latency Optimized Mode - -Linux/FreeBSD/UNIX: -``` -bash bhs-power-mode.sh --latency-optimized-mode -``` -Windows: -``` -.\bhs-power-mode.ps1 --latency-optimized-mode -``` - -### Restoring the Default Mode - -Linux/FreeBSD/UNIX: -``` -bash bhs-power-mode.sh --default -``` - -Windows: -``` -.\bhs-power-mode.ps1 --default -``` - - diff --git a/_codeql_build_dir/bin/LINUX_HOWTO.txt b/_codeql_build_dir/bin/LINUX_HOWTO.txt deleted file mode 100644 index 19062902..00000000 --- a/_codeql_build_dir/bin/LINUX_HOWTO.txt +++ /dev/null @@ -1,7 +0,0 @@ -Refer to the main README ("Building PCM Tools" or "Downloading Pre-Compiled PCM Tools") sections - -Running tests: - -* build PCM -* as root run "sh test/test.sh" - - Automated CI test workflow: https://github.com/intel/pcm/blob/03ad6b0228c9e8a8eb022708b53a61875b9447bc/.github/workflows/ci-test.yml#L40 diff --git a/_codeql_build_dir/bin/MAC_HOWTO.txt b/_codeql_build_dir/bin/MAC_HOWTO.txt deleted file mode 100644 index 4cdd2dfb..00000000 --- a/_codeql_build_dir/bin/MAC_HOWTO.txt +++ /dev/null @@ -1,64 +0,0 @@ -Building and Installing - -Note: xcode is required to build the driver and dynamic library. - -Requirements -____________ -Building and installing requires make, cmake, gcc, and xcode. -It has been tested on the following system configurations: - OS X 12.0.1, Xcode 13.1, Apple LLVM compiler 13.0.0 - -Build PCM and MacMSRDriver ------------------ - mkdir build && cd build - cmake .. && cmake --build . - -PCM utilities will be located in build/bin folder, libraries libpcm.dylib and libPcmMsr.dylib - in build/lib. - -Automatic Install ------------------ - cd build - sudo make install - -Install command loads the driver, installs the library into /usr/lib and installs the library headers into /usr/include. -Also PCM utilities are installing to /usr/local/sbin. - -Manual Install --------------- -Build steps are the same. -To install do the following: - 1) load the driver by running src/MacMSRDriver/kextload.sh - 2) copy build/lib/libPcmMsr.dylib to a location on your path (auto-install uses /usr/lib) - 3) copy src/MacMSRDriver/MSRKernel.h to a location on your path (auto-install uses /usr/include) - 4) copy src/MacMSRDriver/MSRAccessorPublic.h as MSRAccessor.h to a location on your path (auto-install uses /usr/include) - -kext Signatures ---------------- -As of OS X El Capitan, kexts must be signed. So after building the kext, kextload.sh may fail with: - - /System/Library/Extensions/PcmMsrDriver.kext failed to load - (libkern/kext) not loadable (reason unspecified); check the system/kernel logs for errors or try kextutil(8). - -In this event, you will need to either disable System Integrity Protection or sign the kext. -You can disable SIP by rebooting into Recovery (reboot, command-option-R), opening a shell, csrutil disable and reboot again. -Signing a kext is more involved. You can't self-sign and will first need to obtain a Developer ID from Apple: - - https://developer.apple.com/contact/kext/ - -With this ID, you can then sign your kext with codesign. - -PCM Execution ----------------------- -Now you can run ./pcm utility. -See description of other built utilities in LINUX_HOWTO.txt - -Logging/Debugging ----------------------- - -Sometimes you will get errors while running utilities that may come from the kernel, and you can use something like this DTrace script to correlate it with user-land behavior: - -$ sudo dtrace -n 'fbt:mach_kernel:_ZN*IOUser*:return /execname == "pcm"/ { @hgram[probefunc, arg1, ustack(20)] = count(); }' -c ./pcm - -Various commands that can help diagnose errors: - -$ kmutil log stream -$ kmutil inspect -b com.intel.driver.PcmMsr diff --git a/_codeql_build_dir/bin/PCM-EXPORTER.md b/_codeql_build_dir/bin/PCM-EXPORTER.md deleted file mode 100644 index 15ac3433..00000000 --- a/_codeql_build_dir/bin/PCM-EXPORTER.md +++ /dev/null @@ -1,55 +0,0 @@ -# Intel® Performance Counter Monitor (Intel® PCM) Prometheus exporter - - -pcm-sensor-server is a collector exposing Intel processor metrics over http in JSON or Prometheus (exporter text based) format. Also [available as a docker container](DOCKER_README.md). - -**NEW**: pcm-sensor-server is now supported on Windows! See [Windows-specific instructions](#windows-support) below. - -Installation on target system to be analyzed: -1. [Build](https://github.com/intel/pcm#building-pcm-tools) or [download](https://github.com/intel/pcm#downloading-pre-compiled-pcm-tools) pcm tools -2. As root, start pcm-sensor-server: `sudo ./pcm-sensor-server` or as non-root https://github.com/intel/pcm#executing-pcm-tools-under-non-root-user-on-linux - -Alternatively one can start [pcm-sensor-server as a container from docker hub](DOCKER_README.md). - -Additional options: - -``` -$ ./pcm-sensor-server --help -Usage: ./pcm-sensor-server [OPTION] - -Valid Options: - -d : Run in the background (Linux/macOS only) - -p portnumber : Run on port (default port is 9738) - -r|--reset : Reset programming of the performance counters. - -D|--debug level : level = 0: no debug info, > 0 increase verbosity. - -R|--real-time : If possible the daemon will run with real time - priority, could be useful under heavy load to - stabilize the async counter fetching. (Linux only) - -h|--help : This information -``` - -## Windows Support - -pcm-sensor-server now runs natively on Windows. Key points: - -- **Requirements**: Windows 10+ or Windows Server 2016+ (earlier versions may work but are no longer officially supported), Administrator privileges, MSR driver installed -- **Build instructions**: See [WINDOWS_HOWTO.md](WINDOWS_HOWTO.md#pcm-sensor-server-httphttps-server-for-grafana-integration) -- **Limitations**: - - Daemon mode (`-d`) not available - runs in foreground only - - Real-time priority (`-R`) not available - - Use Ctrl+C to stop the server - -Example on Windows: -``` -# Run as Administrator -pcm-sensor-server.exe -p 9738 -``` - -The default output of pcm-sensor-server endpoint in a browser: - -![image](https://user-images.githubusercontent.com/25432609/226344012-8783e154-998e-48a7-a2ca-f2c42af9c843.png) - - -The PCM exporter can be used together with Grafana to obtain these Intel processor metrics (see [how-to](../scripts/grafana/README.md)): - -![pcm grafana output](https://raw.githubusercontent.com/wiki/intel/pcm/pcm-dashboard-full.png) diff --git a/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md b/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md deleted file mode 100644 index 16cbf717..00000000 --- a/_codeql_build_dir/bin/PCM-SENSOR-SERVER-README.md +++ /dev/null @@ -1,47 +0,0 @@ -# Global PCM Events - -| Event Name | Description | -|-----------------------------|-----------------------------------------------------------------------------| -| Measurement_Interval_in_us | How many us elapsed to complete the last measurement | -| Number_of_sockets | Number of CPU sockets in the system | - - -# Core Counters per socket - -OS_ID is the OS assigned ID of the logical CPU core and denotes the socket id, core id and thread id. - -The events below are followed by the same {socket="socket id",core="core id",thread="thread id"} as -the OS_ID of their section with source="socket/core/thread" appended that denotes what the quantity -of the event accounts for. - -For example Instructions_Retired_Any{socket="0",core="1",thread="1",source="core"} refers to -Instructions_Retired_Any for socket 0, core 1, thread 1, and accounts for the total instructions -retired of the specified core. - -| Event | Description | -|------------------------------------------------|--------------------------------------------------------------| -| Instructions_Retired_Any | Total number of Retired instructions | -| Clock_Unhalted_Thread | | -| Clock_Unhalted_Ref | Counts the number of reference cycles that the thread is | -| | not in a halt state. The thread enters the halt state when | -| | it is running the HLT instruction. This event is not | -| | affected by thread frequency changes but counts as if the | -| | thread is running at the maximum frequency all the time. | -| L3_Cache_Misses | Total number of L3 Cache misses | -| L3_Cache_Hits | Total number of L3 Cache hits | -| L2_Cache_Misses | Total number of L2 Cache misses | -| L2_Cache_Hits | Total number of L3 Cache hits | -| L3_Cache_Occupancy | Computes L3 Cache Occupancy | -| SMI_Count | SMI (System Management Interrupt) count | -| Invariant_TSC | Calculates the invariant TSC clocks (the invariant TSC | -| | means that the TSC continues at a fixed rate regardless of | -| | the C-state or frequency of the processor as long as the | -| | processor remains in the ACPI S0 state. | -| Thermal_Headroom | Celsius degrees before reaching TjMax temperature | -| CStateResidency | This is the percentage of time that the core (or the whole | -| | package) spends in a particular level of C-state | | - -References: - -https://software.intel.com/content/www/us/en/develop/articles/intel-performance-counter-monitor.html -https://software.intel.com/content/dam/develop/external/us/en/documents-tps/325384-sdm-vol-3abcd.pdf - Chapter 18 Performance Monitoring \ No newline at end of file diff --git a/_codeql_build_dir/bin/PCM_ACCEL_README.md b/_codeql_build_dir/bin/PCM_ACCEL_README.md deleted file mode 100644 index 0acde59c..00000000 --- a/_codeql_build_dir/bin/PCM_ACCEL_README.md +++ /dev/null @@ -1,121 +0,0 @@ -## Purpose: - -Intel® Xeon® Scalable Processors, starting from the 4th Generation (codenamed Sapphire Rapids), feature accelerators, which include the Intel® In-Memory Analytics Accelerator (Intel® IAA), Intel® Data Streaming Accelerator (Intel® DSA), and Intel® QuickAssist Technology (Intel® QAT), among others. These accelerators are essential components that can enhance the performance of Intel architecture platforms. - -Although these accelerators and their associated software stacks can significantly contribute to data center system performance, customers and users often find it challenging to access and understand performance data such as utilization and throughput. This difficulty arises from the complexity of low-level hardware event sets, which require a deep understanding of the accelerator's hardware and software architecture. - -The pcm-accel tool addresses this challenge by sampling performance data from the accelerator hardware and presenting it to end users in an easy-to-understand format. Its goal is to enable users to quickly and accurately gain a high-level overview of performance or identify issues related to the accelerator, regardless of their level of expertise in the underlying technology. - -## Command syntax: - -pcm-accel [target] [options] - -#### the target parameter - -Notes: only 1 target is allowed to monitor. - -| target | Default | Description | -| ------ | ------- | ----------------------------- | -| -iaa | yes | Monitor the IAA accelerator. | -| -dsa | no | Monitor the DSA accelerator. | -| -qat | no | Monitor the QAT accelerator. | - -#### the options parameter - -Notes: multiple options is allowed. - -| options | Default | Description | -| ---------------------- | -------------------- | -------------------------------------------------------------------------------------------------------------------------- | -| -numa | no | Print NUMA node mapping instead of CPU socket location. | -| -evt=[cfg.txt] | opCode-x-y-accel.txt | Specify the event config file name as cfg.txt.
    - x/y is cpu family is model id, for example 6/143 for Sapphire Rapids. | -| -silent | no | Silence information output and print only measurements | -| -csv[=file.csv] | no | Output compact CSV format to screen or a file in case filename is provided | -| -csv-delimiter=[value] | no | Set custom csv delimiter | -| -human-readable | no | Use human readable format for output (for csv only) | -| -i=[value] | 0 | Allow to determine number of iterations, default is 0(infinite loop) if not specified. | -| [interval] | 3 | Time interval in seconds (floating point number is accepted) to sample performance counters, default is 3s if not specified| - -#### Examples: - -This example prints IAA counters every second 10 times and exits - -> pcm-accel -iaa 1.0 -i=10  - -This example saves IAA counters twice a second save IAA counter values to test.log in CSV format - -> pcm-accel -iaa 0.5 -csv=test.log            - -This example prints IAA counters every 3 second in human-readable CSV format - -> pcm-accel -iaa -csv -human-readable - -## Prerequisites: - -Linux* OS: - -FreeBSD* OS: - -Windows OS: - -- Install and load the required accelerator driver(iaa/dsa, qat driver, etc). - -Notes: - -- QAT monitoring and NUMA node display feature is supported only on Linux OS! - -## Tool UI introduction: - -Common indicator(Column field): - -- Accelerator = Accelerator device id. -- Socket = CPU socket id where accelerator device is located. -- NUMA Node = NUMA node that accelerator device belongs to. -- Inbound_BW = Data throughput input to the accelerator device, unit is Bps(Bytes per second). -- Outbound_BW = Data throughput output from the accelerator device, unit is Bps(Bytes per second). - -Specific indicators related to IAA/DSA:  - -- ShareWQ_ReqNb = The number of request submitted to share work queue of accelerator. -- DedicateWQ_ReqNb = The number of request submitted to dedicate work queue of accelerator. - -![image](https://user-images.githubusercontent.com/25432609/224027332-8846dff6-f71e-4daa-a189-730e68c7e1b2.png) -![image](https://user-images.githubusercontent.com/25432609/224027445-2b08e89c-4653-4f39-971b-a7dc76bd7349.png) - -Specific indicators related to QAT: - -- util_comp0 = The utilization of the compress engine 0, unit is %.(Sapphire Rapids platform has 1 compress and 3 decompress engine per QAT device) - -- util_decomp0 = same as above for decompress engine 0. - -- util_decomp1 = same as above for decompress engine 1. - -- util_decomp2 = same as above for decompress engine 2. - -- util_xlt0 = same as above for translation engine 0. - - - ![image](https://user-images.githubusercontent.com/25432609/224027570-e433aeef-c2ed-418d-aa42-18eef0f1b645.png) - - -## Event config file: - -pcm-accel tool allows the user to customized the monitored performance events with the config file as advance feature. - -Customize fields of cfg file: - -- ev_sel and ev_cat field for IAA/DSA monitor event. -- ev_sel field for QAT monitor event.  -- multiplier/divider is for event data display calculation. -- vname is the event name string(column) displayed in the UI. - -Please refer to the spec or code to learn more about the event mapping if you want to customize it. - -- IAA/DSA: https://software.intel.com/en-us/download/intel-data-streaming-accelerator-preliminary-architecture-specification - -- QAT: please refer to the [mapping table in source code](https://github.com/intel/pcm/blob/f20013f7563714cf592d7a59f169c1ddee3cf8ba/src/cpucounters.cpp#L915) - - -Here is the content of the event cfg file(opCode-6-143-accel.txt as example) - -![image](https://user-images.githubusercontent.com/25432609/224027717-1dcdae9e-6701-4b6f-90a0-8108c4ea4550.png) - diff --git a/_codeql_build_dir/bin/PCM_IIO_README.md b/_codeql_build_dir/bin/PCM_IIO_README.md deleted file mode 100644 index cc2e0ab6..00000000 --- a/_codeql_build_dir/bin/PCM_IIO_README.md +++ /dev/null @@ -1,35 +0,0 @@ -## Purpose: - -PCM-IIO tool monitors PCIe transactions with a breakdown per PCIe bus (IIO stack) and/or PCIe devices. - -## Tool UI introduction: - -Inbound (PCIe device DMA into system) metrics: - -* IB write (inbound write): the number of bytes per second that the PCIe device requested to write to main memory through DMA -* IB read (inbound read): the number of bytes per second that the PCIe device requested to read from main memory through DMA - -Outbound (CPU MMIO to the PCIe device) metrics: - -* OB read (outbound read): the number of bytes per second that the CPU requested to read from the PCIe device through MMIO (memory-mapped I/O) -* OB write (outbound write): the number of bytes per second that the CPU requested to write to the PCIe device through MMIO (memory-mapped I/O) - -IOMMU metrics: - -* IOTLB Lookup: IOTLB lookups per second -* IOTLB Miss: IOTLB misses per second -* Ctxt Cache Hit: Context cache hits per second -* 256T Cache Hit: Second Level Page Walk Cache Hits to a 256T page per second -* 512G Cache Hit: Second Level Page Walk Cache Hits to a 512G page per second -* 1G Cache Hit: Second Level Page Walk Cache Hits to a 1G page per second -* 2M Cache Hit: Second Level Page Walk Cache Hits to a 2M page per second -* IOMMU Mem Access: IOMMU memory accesses per second - -Sample output: - -![image](https://github.com/user-attachments/assets/e8cce396-b210-49d5-ac95-dc43f9ae69d3) - -## Event config file: - -pcm-iio tool allows the user to customize the performance events with a config file as an advanced feature. The event config files are in opCode-x-y.txt files where x/y is cpu family is model id, for example 6/143 for Sapphire Rapids. - diff --git a/_codeql_build_dir/bin/PCM_RAW_README.md b/_codeql_build_dir/bin/PCM_RAW_README.md deleted file mode 100644 index 585e0b35..00000000 --- a/_codeql_build_dir/bin/PCM_RAW_README.md +++ /dev/null @@ -1,251 +0,0 @@ --------------------------------------------------------------------------------- -PCM Raw Utility --------------------------------------------------------------------------------- - -Disclaimer: in contrast to other PCM utilities this one is for expert usage only. - -*pcm-raw* allows to collect arbitrary core and uncore PMU events by providing raw PMU event ID encoding. It can become handy if other low-level PMU tools (e.g. emon, Linux perf) can not be used for some reason. For example: -- emon kernel driver is not compatible with the currently used Linux kernel or operating system -- loading emon Linux kernel driver is forbidden due to system administration policies -- Linux kernel is too old to support modern processor PMU and can not be upgraded - -Currently supported PMUs: core, m3upi, upi(ll)/qpi(ll), imc, m2m, pcu, cha/cbo, iio, ubox - -Recommended usage (as privileged/root user): -1. Install VTune which also contains emon (emon/sep driver installation is not needed): [free download](https://software.intel.com/content/www/us/en/develop/tools/vtune-profiler.html) -2. Run emon with `--dry-run -m` options to obtain raw PMU event encodings for event of interest. For example: -``` -# emon -C BR_MISP_RETIRED.ALL_BRANCHES,UNC_CHA_CLOCKTICKS,UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0,UNC_UPI_TxL_FLITS.NON_DATA --dry-run -m -Event Set 0 - BR_MISP_RETIRED.ALL_BRANCHES (PerfEvtSel0 (0x186) = 0x00000000004300c5) - CC=ALL PC=0x0 UMASK=0x0 E=0x1 INT=0x0 INV=0x0 CMASK=0x0 AMT=0x0 -cha Uncore Event Set 0 - UNC_CHA_CLOCKTICKS (CHA Counter 0 (0xe01) = 0x0000000000400000) - -qpill Uncore Event Set 0 - UNC_UPI_TxL_FLITS.NON_DATA (QPILL Counter 0 (0x350) = 0x0000000000409702) - -iio Uncore Event Set 0 - UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 (IIO Counter 0 (0xa48) = 0x0000701000400183) -``` -3. Run *pcm-raw* by specifying the obtained raw event encodings to collect into csv file. Example: -``` -pcm-raw -e core/config=0x00000000004300c5,name=BR_MISP_RETIRED.ALL_BRANCHES -e cha/config=0x0000000000400000,name=UNC_CHA_CLOCKTICKS -e qpi/config=0x0000000000409702,name=UNC_UPI_TxL_FLITS.NON_DATA -e iio/config=0x0000701000400183,name=UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 -csv=out.csv -``` -4. View/process the csv file using your favorite method. For example just open it in Excel. - --------------------------------------------------------------------------------- -Collecting Register Values --------------------------------------------------------------------------------- - -pcm-raw supports collecting raw MSR and PCICFG (CSR) register values. The syntax is described below: - -Model Specific Registers (MSRs): - -``` -package_msr/config=,config1=[,name=] -``` - -static_or_freerun encoding: -* 0 : static (last value reported in csv) -* 1 : freerun (delta to last value reported in csv) - -Examples: -``` -package_msr/config=0x34,config1=0,name=SMI_COUNT -thread_msr/config=0x10,config1=1,name=TSC_DELTA -thread_msr/config=0x10,config1=0,name=TSC -``` - -If the name is not specified the first event will show up as package_msr:0x34:static, with the name it will show up as SMI_COUNT in csv. - -PCI Configuration Registers - PCICFG (CSR): - -``` -pcicfg/config=,config1=,config2=,width=[,name=] -``` - -* dev_id: Intel PCI device id where the register is located -* offset: offset of the register -* static_or_freerun: same syntax as for MSR registers -* width: register width in bits (16,32,64) - -Example: - -``` -pcicfg/config=0xe20,config1=0x180,config2=0x0,width=32,name=CHANERR_INT -``` -From: https://www.intel.la/content/dam/www/public/us/en/documents/datasheets/xeon-e7-v2-datasheet-vol-2.pdf - -MMIO Registers: - -``` -mmio/config=,config1=,config2=,config3=[,config4=],width=[,name=] -``` - -The MEMBAR is computed by logically ORing the result of membar_bits1 and membar_bits1 computation described below (PCICFG read + bit extraction and shift). The final MMIO register address = MEMBAR + offset. - -* width: register width in bits (16,32,64) -* dev_id: Intel PCI device id where the membar address registers are located -* membar_bits1: mmioBase register bits to compute membar (base address) - - bits 0-15 : PCICFG register offset to read membar1 bits - - bits 16-23: source position of membar bits in the PCICFG register - - bits 24-31: number of bits - - bits 32-39: destination bit position in the membar -* membar_bits2: mmioBase register bits to compute membar (base address), can be zero if only membar_bits1 is sufficient for locating the register. - - bits 0-15 : PCICFG register offset to read membar2 bits - - bits 16-23: source position of membar bits in the PCICFG register - - bits 24-31: number of bits - - bits 32-39: destination bit position in the membar -* offset: offset of the MMIO register relative to the membar -* static_or_freerun: same syntax as for MSR registers - -Example (Icelake server iMC PMON MMIO register read): - -``` -mmio/config=0x3451,config1=0x22808,config2=1,config3=0x171D0000D0,config4=0x0c0b0000d8,width=64 -``` - -TPMI Registers: - -TPMI ([Topology Aware Register and PM Capsule Interface](https://github.com/intel/tpmi_power_management)) can be read with pcm-raw as follows: - -``` -tpmi/config=,config1=,config2=[,name=] -``` - -* tpmi_id: TPMI id -* offset: offset of the register -* static_or_freerun: same syntax as for MSR registers - -Example: - -``` -tpmi/config=0x2,config1=0x18,name=BHS_UFS_CONTROL -``` - -From: https://github.com/intel/tpmi_power_management/blob/main/UFS_TPMI_public_disclosure_FINAL_rev4.pdf - --------------------------------------------------------------------------------- -Collecting Events By Names From Event Lists (https://github.com/intel/perfmon/) --------------------------------------------------------------------------------- - -pcm-raw can also automatically lookup the events from the json event lists (https://github.com/intel/perfmon/) and translate them to raw encodings itself. To make this work you need to checkout PCM with simdjson submodule: - -* use git clone --recursive flag when cloning pcm repository, or -* update submodule with command `git submodule update --init --recursive`, or -* download simdjson library in the PCM source directory and recompile PCM: - -1. change to PCM 'src/' directory -2. git clone https://github.com/simdjson/simdjson.git -3. re-compile pcm - -Example of usage (on Intel Xeon Scalable processor): - -``` -pcm-raw -tr -e INST_RETIRED.ANY -e CPU_CLK_UNHALTED.THREAD -e CPU_CLK_UNHALTED.REF_TSC -e LD_BLOCKS.STORE_FORWARD -e UNC_CHA_CLOCKTICKS -e UNC_M_CAS_COUNT.RD -``` - -or with event groups specified in event_file.txt (with event multiplexing): - -``` -pcm-raw -tr -el event_file.txt -``` - -where event_file.txt contains event groups separated by a semicolon: - -``` -# group 1 -INST_RETIRED.ANY -CPU_CLK_UNHALTED.REF_TSC -CPU_CLK_UNHALTED.THREAD -DTLB_LOAD_MISSES.STLB_HIT -L1D_PEND_MISS.PENDING_CYCLES_ANY -MEM_INST_RETIRED.LOCK_LOADS -UOPS_EXECUTED.X87 -UNC_CHA_DIR_LOOKUP.SNP -UNC_CHA_DIR_LOOKUP.NO_SNP -UNC_M_CAS_COUNT.RD -UNC_M_CAS_COUNT.WR -UNC_UPI_CLOCKTICKS -UNC_UPI_TxL_FLITS.ALL_DATA -UNC_UPI_TxL_FLITS.NON_DATA -UNC_UPI_L1_POWER_CYCLES -; -# group 2 -INST_RETIRED.ANY -CPU_CLK_UNHALTED.REF_TSC -CPU_CLK_UNHALTED.THREAD -OFFCORE_REQUESTS_BUFFER.SQ_FULL -MEM_LOAD_L3_HIT_RETIRED.XSNP_HIT -MEM_LOAD_L3_HIT_RETIRED.XSNP_HITM -MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS -UNC_CHA_DIR_UPDATE.HA -UNC_CHA_DIR_UPDATE.TOR -UNC_M2M_DIRECTORY_UPDATE.ANY -UNC_M_CAS_COUNT.RD -UNC_M_CAS_COUNT.WR -UNC_M_PRE_COUNT.PAGE_MISS -UNC_UPI_TxL0P_POWER_CYCLES -UNC_UPI_RxL0P_POWER_CYCLES -UNC_UPI_RxL_FLITS.ALL_DATA -UNC_UPI_RxL_FLITS.NON_DATA -; -``` - -Sample csv output (date,time,event_name,milliseconds_between_samples,TSC_cycles_between_samples,unit0_event_count,unit1_event_count,unit2_event_count,...): - -``` -2021-09-27,00:07:40.507,UNC_CHA_DIR_LOOKUP.SNP,1000,2102078418,76,70,56,91,88,75,76,158,74,60,77,81,75,74,71,95,99,95,125,87,68,136,54,91,65,84,69,46,75,100,92,68,67,70,68,80,72,88,80,76,130,71,102,98,79,73,71,109 -2021-09-27,00:07:40.507,UNC_CHA_DIR_LOOKUP.NO_SNP,1000,2102078418,1218,1280,1187,1310,1268,1287,1282,1331,1265,1267,1300,1270,1258,1307,1289,1300,1410,1378,1312,1316,1367,1337,1332,1317,1584,1519,1569,1557,1483,1537,1545,1520,1562,1527,1575,1540,1530,1581,1476,1525,1610,1680,1581,1657,1565,1613,1596,1600 -2021-09-27,00:07:40.507,INST_RETIRED.ANY,1000,2102078418,705400,44587,45923,238392,53910,69547,46644,46172,44740,44732,45692,44864,46105,45352,45057,217052,46511,46671,46893,46459,53739,47021,114133,46339,61649,59027,142096,48048,98178,48288,162122,474329,48046,49795,78239,425635,105512,69933,49827,48913,71549,48451,294858,312316,149586,540477,49115,55144,46788,61681,82964,81127,116227,85776,453369,145979,81007,82269,83580,73595,73355,73751,72599,47169,47767,48191,48131,48359,48621,67664,48227,532184,49686,48704,324264,48539,48795,48609,60275,518368,116077,163734,526815,50650,140337,666605,47935,1368049,47243,337542,47153,46882,46925,62373,70186,466927 -2021-09-27,00:07:40.507,CPU_CLK_UNHALTED.REF_TSC,1000,2102078418,3618636,384720,589092,2143512,766752,724164,803124,627312,541548,538188,534324,509964,535164,527436,529284,1366176,488124,491820,533148,543900,608580,577920,1145172,602196,919632,824544,1429344,692916,1092756,700644,1298640,2487156,736344,841344,1324008,1855476,1260084,1104768,658308,5805324,851424,766080,1909740,2170392,1313592,3986892,683844,986832,659064,642432,682668,772128,1076628,710220,2514876,1085112,715344,700812,676452,594468,577668,590856,574056,597996,525336,551460,548520,561624,569352,741468,623196,3124212,592032,596400,2265312,556584,593124,546756,766752,2547216,1047396,1280160,2704884,525336,1200444,3255000,497700,13643700,481572,1601040,515592,523740,503664,854280,603120,2305128 -2021-09-27,00:07:40.507,CPU_CLK_UNHALTED.THREAD,1000,2102078418,1723000,183219,280560,1020631,365140,344897,382467,298699,257868,256243,254471,242757,254794,251172,252091,650377,232442,234209,253807,259024,289817,275179,545244,286717,437888,392646,680513,329759,520244,333662,618356,1184347,350594,400648,630580,1517122,599939,525847,313441,2765951,405441,364827,909395,1033366,625655,1898427,325614,881026,312798,305884,325245,367890,512845,338440,1197524,516836,341497,334581,322975,283138,275031,281300,273347,284616,250171,262581,261182,267455,271097,353013,296757,1487751,282516,283651,1076725,265489,282845,260889,365411,1212743,498705,611118,1287439,360493,571158,1549944,236616,6499483,229820,762766,245338,248648,239640,406676,287582,1714659 -2021-09-27,00:07:40.507,DTLB_LOAD_MISSES.STLB_HIT,1000,2102078418,10093,1178,1186,2593,1184,1356,1182,1201,1187,1200,1191,1179,1189,1179,1177,1444,1218,1205,1158,1183,1216,1190,1789,1184,1388,1347,2207,1384,1566,1352,1541,3221,1374,1398,1580,11223,1690,1427,1398,1356,1531,1388,3429,3567,2136,2639,1354,1393,1181,1188,1457,1456,1801,1437,4698,1697,1426,1434,1418,1452,1396,1394,1434,1164,1349,1349,1356,1318,1354,1528,1349,18546,1168,1160,8935,1166,1172,1167,1194,4432,1801,2341,3152,1190,1777,4328,1178,4396,1170,1939,1199,1150,1158,1197,1187,12441 -2021-09-27,00:07:40.507,L1D_PEND_MISS.PENDING_CYCLES_ANY,1000,2102078418,682630,81530,114229,363299,169260,134931,441644,183870,89947,95379,98135,81156,75366,77990,78734,178321,52738,53883,57241,56306,65514,94824,152070,227164,87723,80980,300491,70675,148506,70130,173723,628031,142178,161405,503099,383743,255465,317627,67134,1509172,105102,242908,300344,336683,157280,555052,84017,615357,526290,88531,117674,387708,192129,157226,451213,201430,103646,106302,112452,86251,83203,82880,80239,189044,72389,73820,75135,70746,84963,106517,168907,249006,117006,109389,320326,98291,168531,100734,206075,647276,167155,154684,495947,359092,257614,322235,78189,1473756,148139,278653,308380,343576,166510,556816,90475,306546 -2021-09-27,00:07:40.507,MEM_INST_RETIRED.LOCK_LOADS,1000,2102078418,3462,231,235,1159,259,277,239,237,236,238,236,239,238,237,237,1114,237,237,238,237,265,237,555,237,277,278,542,237,431,240,389,906,239,238,385,3973,435,280,238,238,401,238,847,1238,604,1948,238,238,235,275,266,267,428,277,1287,399,271,277,272,239,240,239,239,237,237,237,237,237,238,347,237,4266,238,238,1174,238,238,238,270,1361,526,697,1101,238,615,2172,238,4276,236,642,236,237,236,275,299,2842 -2021-09-27,00:07:40.507,UOPS_EXECUTED.X87,1000,2102078418,1152,12,13,496,46,17,27,12,11,13,10,14,11,27,12,1591,11,10,11,13,23,11,257,12,64,52,216,31,231,31,1668,5944,31,30,85,710,101,54,34,41,100,33,1852,1561,423,2348,28,46,14,23,155,57,82,172,2776,281,19,52,107,18,36,18,19,14,11,10,10,10,26,57,10,108,31,33,151,31,32,30,63,3700,361,509,4610,31,396,1814,31,5607,33,4175,31,30,32,47,78,471 -2021-09-27,00:07:40.507,UNC_M_CAS_COUNT.RD,1000,2102078418,37565,33584,0,0,0,0,40306,0,37373,0,0,0 -2021-09-27,00:07:40.507,UNC_M_CAS_COUNT.WR,1000,2102078418,58994,53007,0,0,0,0,25088,0,21901,0,0,0 -2021-09-27,00:07:40.507,UNC_UPI_CLOCKTICKS,1000,2102078418,1300347171,1300351441,1200328715,1300297715,1300303139,1200283803 -2021-09-27,00:07:40.507,UNC_UPI_TxL_FLITS.ALL_DATA,1000,2102078418,132768,150840,0,285147,269190,0 -2021-09-27,00:07:40.507,UNC_UPI_TxL_FLITS.NON_DATA,1000,2102078418,298203,319302,0,293389,264875,0 -2021-09-27,00:07:40.507,UNC_UPI_L1_POWER_CYCLES,1000,2102078418,0,0,1200328715,0,0,1200283803 -``` -The unit can be logical core, memory channel, CHA, etc, depending on the event type. - - -Show events available for the processor on the system: -``` -pcm-raw -? -``` - --------------------------------------------------------------------------------- -Low-level access to Intel PMT telemetry data --------------------------------------------------------------------------------- - -pcm-raw can read raw telemetry data from Intel PMT (https://github.com/intel/Intel-PMT/). - -Syntax for a PMT raw telemetry counter: - -``` -pmt/config=,config1=,config2=,config3=[,name=] - -``` - -The fields are the values for the counter from the Intel PMT aggregator XML: - -* uniqueid : Intel PMT Telemetry unique identifier -* sampleID : sample ID of the counter -* sampleType counter encoding: - - 0 : Snapshot (last value reported in csv) - - non-zero : Counter (delta to last value reported in csv) -* lsb : lsb field -* msb : msb field - -Example for https://github.com/intel/Intel-PMT/blob/868049006ad2770a75e5fc7526fd0c4b22438e27/xml/SPR/OOBMSM/CORE/spr_aggregator.xml#L15428: -``` -pmt/config=0x87b6fef1,config1=770,config2=0,config3=32,config4=63,name="Temperature_histogram_range_5_(50.5-57.5C)_counter_for_core_0" -``` - -Current limitations: this feature (PMT access) is currently only available on Linux (with Intel PMT Linux driver). diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json deleted file mode 100644 index 3f1fcc2b..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-4F-1.json +++ /dev/null @@ -1,122 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "Filter0": {"Config": 1, "Position": 0, "Width": 64, "DefaultValue": 0}, - "TID": {"Config": 1, "Position": 0, "Width": 6, "DefaultValue": 0}, - "State": {"Config": 1, "Position": 17, "Width": 7, "DefaultValue": 0}, - "Filter1": {"Config": 2, "Position": 0, "Width": 64, "DefaultValue": 59}, - "OPC": {"Config": 2, "Position": 20, "Width": 9, "DefaultValue": 0}, - "NC": {"Config": 2, "Position": 30, "Width": 1, "DefaultValue": 0}, - "ISOC": {"Config": 2, "Position": 31, "Width": 1, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ubox" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json deleted file mode 100644 index 9b08c471..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-55-4.json +++ /dev/null @@ -1,136 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "Filter0": {"Config": 1, "Position": 0, "Width": 64, "DefaultValue": 0}, - "TID": {"Config": 1, "Position": 0, "Width": 9, "DefaultValue": 0}, - "Filter1": {"Config": 2, "Position": 0, "Width": 64, "DefaultValue": 59} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ubox" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 8}, - "FCMask": {"Config": 0, "Position": 44, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json deleted file mode 100644 index ee0d516d..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-6A-0.json +++ /dev/null @@ -1,144 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed3" : { - "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "TIDEnable": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 9, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ubox" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json deleted file mode 100644 index f564e4fa..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-86-5.json +++ /dev/null @@ -1,103 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json deleted file mode 100644 index 9955c1dc..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8E-C.json +++ /dev/null @@ -1,57 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "AnyThread": {"Config": 0, "Position": 21, "Width": 1}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 2, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 6, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "AnyThread": {"Config": 0, "Position": 10, "Width": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json deleted file mode 100644 index 0cc35641..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-8F-6.json +++ /dev/null @@ -1,152 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed3" : { - "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ubox" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json deleted file mode 100644 index d68375b7..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AD-0.json +++ /dev/null @@ -1,158 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed3" : { - "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex8" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex16" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json deleted file mode 100644 index d68375b7..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AE-0.json +++ /dev/null @@ -1,158 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed3" : { - "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex8" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex16" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json deleted file mode 100644 index e3b4a8ed..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-AF-0.json +++ /dev/null @@ -1,145 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex8" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex16" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json deleted file mode 100644 index e3b4a8ed..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-B6-0.json +++ /dev/null @@ -1,145 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex8" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "pciex16" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json b/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json deleted file mode 100644 index 0cc35641..00000000 --- a/_codeql_build_dir/bin/PMURegisterDeclarations/GenuineIntel-6-CF-1.json +++ /dev/null @@ -1,152 +0,0 @@ -{ - "core" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "User": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 1}, - "OS": {"Config": 0, "Position": 17, "Width": 1, "DefaultValue": 1}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1}, - "PinControl": {"Config": 0, "Position": 19, "Width": 1, "DefaultValue": 0}, - "APICInt": {"Config": 0, "Position": 20, "Width": 1, "DefaultValue": 0}, - "Enable": {"Config": 0, "Position": 22, "Width": 1, "DefaultValue": 1}, - "Invert": {"Config": 0, "Position": 23, "Width": 1}, - "CounterMask": {"Config": 0, "Position": 24, "Width": 8}, - "InTX": {"Config": 0, "Position": 32, "Width": 1, "DefaultValue": 0}, - "InTXCheckpointed": {"Config": 0, "Position": 33, "Width": 1, "DefaultValue": 0}, - "MSRIndex": { - "0x1a6" : {"Config": 1, "Position": 0, "Width": 64}, - "0x1a7" : {"Config": 2, "Position": 0, "Width": 64}, - "0x3f6" : {"Config": 3, "Position": 0, "Width": 64}, - "0x3f7" : {"Config": 4, "Position": 0, "Width": 64} - } - }, - "fixed0" : { - "OS": {"Config": 0, "Position": 0, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 1, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 3, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed1" : { - "OS": {"Config": 0, "Position": 4, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 5, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 7, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed2" : { - "OS": {"Config": 0, "Position": 8, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 9, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 11, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"} - }, - "fixed3" : { - "OS": {"Config": 0, "Position": 12, "Width": 1, "DefaultValue": 1}, - "User": {"Config": 0, "Position": 13, "Width": 1, "DefaultValue": 1}, - "EnablePMI": {"Config": 0, "Position": 15, "Width": 1, "DefaultValue": 0}, - "EventCode": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "UMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "EdgeDetect": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "Invert": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "CounterMask": {"Config": 0, "Position": -1, "__comment": "position=-1 means field ignored"}, - "PerfMetrics": {"Config": 2, "Position": 0, "Width": 1, "DefaultValue": 0, "__comment": "fake field to tell the collector to also print the L1 top-down metrics, not just raw slots count"} - } - }, - "cha" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "TIDEnable": {"Config": 0, "Position": 16, "Width": 1, "DefaultValue": 0}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 26}, - "TID": {"Config": 1, "Position": 0, "Width": 10, "DefaultValue": 0} - } - }, - "imc" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "xpi" : { - "__comment" : "this is for UPI LL and QPI LL uncore PMUs", - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 24} - } - }, - "m2m" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0}, - "UMaskExt": {"Config": 0, "Position": 32, "Width": 8} - } - }, - "m3upi" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "mdf" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "irp" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "ubox" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 8, "DefaultValue": 0} - } - }, - "pcu" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0} - } - }, - "iio" : { - "programmable" : { - "EventCode": {"Config": 0, "Position": 0, "Width": 8}, - "UMask": {"Config": 0, "Position": 8, "Width": 8}, - "EdgeDetect": {"Config": 0, "Position": 18, "Width": 1, "DefaultValue": 0}, - "Threshold": {"Config": 0, "Position": 24, "Width": 12, "DefaultValue": 0}, - "PortMask": {"Config": 0, "Position": 36, "Width": 12}, - "FCMask": {"Config": 0, "Position": 48, "Width": 3} - } - } -} diff --git a/_codeql_build_dir/bin/STARS.md b/_codeql_build_dir/bin/STARS.md deleted file mode 100644 index 3755531f..00000000 --- a/_codeql_build_dir/bin/STARS.md +++ /dev/null @@ -1,3 +0,0 @@ -## Git Hub Star History for PCM Project - -[![Star History Chart](https://api.star-history.com/svg?repos=intel/pcm&type=Date)](https://star-history.com/#intel/pcm&Date) diff --git a/_codeql_build_dir/bin/WINDOWS_HOWTO.md b/_codeql_build_dir/bin/WINDOWS_HOWTO.md deleted file mode 100644 index 4ad1a03b..00000000 --- a/_codeql_build_dir/bin/WINDOWS_HOWTO.md +++ /dev/null @@ -1,163 +0,0 @@ -**COMPILATION AND INSTALLATION OF UTILITIES** - -_For support of systems with more than _**_64_**_ logical cores you need to compile all binaries below in “_**_x64_**_” platform mode (not the default “_**_Win32_**_” mode)._ - -## Command-line utility - -1. Follow [Compile the Windows MSR driver](#compile-the-windows-msr-driver) to compile the Windows MSR driver (msr.sys). For Windows 7 and later versions you have to [sign the msr.sys driver additionally](#sign-the-windows-msr-driver). To enable loading test-signed drivers on the system: in administrator cmd console run `bcdedit /set testsigning on` and reboot. - -2. Build the *pcm.exe* utility: - ``` - cmake -B build - cmake --build build --config Release --parallel - ``` - alternatively you can perform `cmake -B build`, open *PCM.sln* form *build* folder in and build required project in Visual Studio. - .exe and .dll files will be located in *build\bin\Release* folder -3. As Administrator create PCM directory in Windows "Program Files" directory (e.g. `C:\Program Files (x86)\PCM\`) -4. As Administrator copy the msr.sys driver and pcm.exe into the PCM directory -5. Run pcm.exe utility from the PCM directory as Administrator - -For Windows 7+ and Windows Server 2008+ R2 the PCM utilities need to be run as Administrator: - -Alternatively you can achieve the same using the “Properties” Windows menu of the executable (“Privilege level” setting in the “Compatibility” tab): Right mouse click -> Properties -> Compatibility -> Privilege level -> Set “Run this program as an administrator”. - -![Screenshot](run-as-administrator.png) - -If you are getting the error `Starting MSR service failed with error 3 The system cannot find the path specified.` try to uninstall the driver by running `pcm --uninstallDriver` and optionally reboot the system. - -## Graphical Perfmon front end - -1. Follow [Compile the windows MSR driver](#compile-the-windows-msr-driver) to compile the windows MSR driver (msr.sys). For Windows 7 and later versions you have to sign the msr.sys driver additionally ([http://msdn.microsoft.com/en-us/library/ms537361(VS.85).aspx](http://msdn.microsoft.com/en-us/library/ms537361(VS.85).aspx)). - -2. Copy msr.sys into the c:\windows\system32 directory - -3. Build pcm-lib.dll using Microsoft Visual Studio or cmake - -4. Build 'PCM-Service.exe' using Microsoft Visual Studio or cmake - -5. Copy PCM-Service.exe, PCM-Service.exe.config, and pcm-lib.dll files into the PCM sub-directory in Windows "Program Files" directory (see above) - -The config file enables support for legacy security policy. Without this configuration switch, you will get an exception like this: - -Unhandled Exception: System.NotSupportedException: This method implicitly uses CAS policy, which has been obsoleted by the .NET Framework. - -6. With administrator rights execute '"PCM-Service.exe" -Install' from this directory - -7. With administrator rights execute 'net start pcmservice' - -8. Start perfmon and find new PCM\* counters - -If you do not want or cannot compile the msr.sys driver you might use a third-party open source WinRing0 driver instead (experimental only, for testing environments only). -Instructions: - -1. Download the free RealTemp utility package from [http://www.techpowerup.com/realtemp/](http://www.techpowerup.com/realtemp/) or any other free utility that uses the open-source WinRing0 driver (like OpenHardwareMonitor [http://code.google.com/p/open-hardware-monitor/downloads/list](http://code.google.com/p/open-hardware-monitor/downloads/list)). -2. Copy WinRing0.dll, WinRing0.sys, WinRing0x64.dll, WinRing0x64.sys files from there into the PCM.exe binary location, into the PCM-Service.exe location and into c:\windows\system32 -3. Run the PCM.exe tool and/or go to step 6 (perfmon utility). - -## Compile the Windows MSR driver - -1. Download Visual Studio ([Visual Studio download](https://visualstudio.microsoft.com/downloads/)). -When you install Visual Studio, also install related packages: - - under `Workloads`, select `Desktop development with C++` -(select `C++ CMake tools for Windows` in this workload) and `.NET desktop development`. - - under `Individual components`, search `Libs for Spectre` and select `MSVC v143 - VS -2022 C++ x64/x86 Spectre-mitigated libs(Latest)`. - -2. Download and install SDK ([windows-sdk](https://developer.microsoft.com/en-us/windows/downloads/windows-sdk/)) - -3. Download and install WDK ([windows-wdk](https://learn.microsoft.com/en-us/windows-hardware/drivers/download-the-wdk)). Please select `Install Windows Driver Kit Visual Studio extension` when you install WDK. - -4. Open **a terminal in Visual Studio**, then go to `src\WinMSRDriver`, and run the following command to compile the driver. Then you will see `MSR.sys` in `src\WinMSRDriver\x64\Release`. - ``` - MSBuild.exe MSR.vcxproj -property:Configuration=Release -property:Platform=x64 - ``` - -## Sign the Windows MSR driver - -Run the following in PowerShell, in the directory where `MSR.sys` is located: - -``` -$cert = New-SelfSignedCertificate -Type CodeSigning -Subject "CN=TestCert" -CertStoreLocation "Cert:\CurrentUser\My" -KeyExportPolicy Exportable -$pwd = Read-Host -Prompt "Enter the password for the PFX file" -AsSecureString -Export-PfxCertificate -Cert $cert -FilePath TestCert.pfx -Password $pwd -signtool sign /fd SHA256 /f TestCert.pfx /p ([Runtime.InteropServices.Marshal]::PtrToStringAuto([Runtime.InteropServices.Marshal]::SecureStringToBSTR($pwd))) /t http://timestamp.digicert.com MSR.sys -``` - -Afterwards, double-click `TestCert.pfx`. Install to "Current User" and when able to pick "Place all ...", browse for "Trusted Root Certification Authorities". - -## Known limitations - -Running PCM.exe under Cygwin shell is possible, but due to incompatibilities of signals/events handling between Windows and Cygwin, the PCM may not cleanup PMU configuration after Ctrl+C or Ctrl+Break pressed. The subsequent run of PCM will require to do PMU configuration reset, so adding -r command line option to PCM will be required. - -PCM-Service FAQ: -Q: Help my service won't start, what can I do to diagnose the problem? -A: Please check in the Windows Application "Event Viewer" under "Windows Logs" and then under "Application". PCM-Service writes its messages here, just look for errors. If you can't figure it out how to fix it, create a bug report and make sure to paste the text from the Event Viewer in the bug report so we can diagnose the issue. - -Q: I see a message in the Events Viewer that PCM-Service does not start because the "custom counter file view is out of memory", how do I fix this? -A: Despite that PCM-Service is reserving more memory than the standard 512kB this error can still occur if there is another application that uses performance counters is initialized before PCM. There are two options: -1. identify the application or service that starts before PCM-Service and stop or disable it and consequently reboot and try again -2. [find your machine.config file](https://stackoverflow.com/questions/2325473/where-is-machine-config) and add -` - -` -to that file - -## pcm-sensor-server (HTTP/HTTPS server for Grafana integration) - -Starting from this release, **pcm-sensor-server** is now supported on Windows. This utility exposes PCM metrics over HTTP in JSON or Prometheus format for integration with Grafana dashboards. - -### Building pcm-sensor-server on Windows - -1. Follow the **Compile the Windows MSR driver** and **Sign the Windows MSR driver** sections above to compile, sign, and install the MSR driver (`msr.sys`) - -2. Build pcm-sensor-server: - ``` - cmake -B build - cmake --build build --config Release --target pcm-sensor-server - ``` - - The executable will be located in `build\bin\Release\pcm-sensor-server.exe` - -3. (Optional) For HTTPS support, ensure OpenSSL is installed and available to CMake - -### Running pcm-sensor-server on Windows - -1. Choose or create a directory for PCM (e.g., `C:\Program Files\PCM\` or `C:\Program Files (x86)\PCM\`). Copy `msr.sys` and `pcm-sensor-server.exe` to this directory. - -2. Run as Administrator (required for MSR access): - ``` - pcm-sensor-server.exe - ``` - - The server will start on the default port 9738 - -3. Common command-line options: - - `-p ` : Run on a specific port (default is 9738) - - `-D ` : Set debug verbosity level (0 = no debug, higher = more verbose) - - `-s` : Enable HTTPS (requires OpenSSL and certificate files) - - `-h` or `--help` : Show all available options - -4. Access the metrics: - - JSON format: http://localhost:9738/ (with `Accept: application/json` header) - - Prometheus format: http://localhost:9738/metrics - -### Windows-specific limitations - -- **Daemon mode not supported**: The `-d` (daemon/background) option is not available on Windows. The server runs in foreground mode only. -- **Real-time priority not supported**: The `-R` (real-time priority) option is not available on Windows. -- **Signal handling**: Use Ctrl+C to gracefully stop the server instead of SIGTERM/SIGINT. - -### Example: Running with Grafana on Windows - -1. Start pcm-sensor-server as Administrator: - ``` - pcm-sensor-server.exe -p 9738 - ``` - -2. Configure Prometheus to scrape from `http://localhost:9738/metrics` - -3. Configure Grafana to use your Prometheus data source - -4. Import the PCM Grafana dashboard (see [scripts/grafana/README.md](../scripts/grafana/README.md)) - -For more details on using pcm-sensor-server with Grafana, see [PCM-EXPORTER.md](PCM-EXPORTER.md). diff --git a/_codeql_build_dir/bin/generate_summary_readme.md b/_codeql_build_dir/bin/generate_summary_readme.md deleted file mode 100644 index f202a926..00000000 --- a/_codeql_build_dir/bin/generate_summary_readme.md +++ /dev/null @@ -1,25 +0,0 @@ -Step 1 - -```pip3 install pipreqs``` - -Step 2 - -```cd /path/to/pcm/scripts``` - -Step 3 - -```python3 -m pipreqs.pipreqs --encoding utf-8 .``` - -Step 4 - -```pip3 install -r requirements.txt``` - -Step 5 - -```python3 generate_summary.py --help``` - -Step 6 - -```python3 generate_summary.py -{argument1} -{argument2} ....-{argumentN}``` - - diff --git a/_codeql_build_dir/bin/license.txt b/_codeql_build_dir/bin/license.txt deleted file mode 100644 index 976fed2c..00000000 --- a/_codeql_build_dir/bin/license.txt +++ /dev/null @@ -1,28 +0,0 @@ -This notice belongs to the code originating from "Intel Performance Counter Monitor". - -Copyright (c) 2009-2016, Intel Corporation -All rights reserved. -Redistribution and use in source and binary forms, with or without -modification, are permitted provided that the following conditions are met: - -* Redistributions of source code must retain the above copyright notice, this - list of conditions and the following disclaimer. -* Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation - and/or other materials provided with the distribution. - -* Neither the name of Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived from - this software without specific prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, -THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE -FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - diff --git a/_codeql_build_dir/bin/opCode-6-106.txt b/_codeql_build_dir/bin/opCode-6-106.txt deleted file mode 100644 index 2bd1077e..00000000 --- a/_codeql_build_dir/bin/opCode-6-106.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-108.txt b/_codeql_build_dir/bin/opCode-6-108.txt deleted file mode 100644 index 2bd1077e..00000000 --- a/_codeql_build_dir/bin/opCode-6-108.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-134.txt b/_codeql_build_dir/bin/opCode-6-134.txt deleted file mode 100644 index 4c8e744f..00000000 --- a/_codeql_build_dir/bin/opCode-6-134.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 (4th x4) -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 (4th x4) -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=4K Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x40,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total \ No newline at end of file diff --git a/_codeql_build_dir/bin/opCode-6-143-accel.txt b/_codeql_build_dir/bin/opCode-6-143-accel.txt deleted file mode 100644 index 8c6429a7..00000000 --- a/_codeql_build_dir/bin/opCode-6-143-accel.txt +++ /dev/null @@ -1,20 +0,0 @@ -# IAA events -ctr=0,ev_sel=0x1,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=IAA,vname=Inbound_BW(Bps) -ctr=1,ev_sel=0x2,ev_cat=0x1,en=1,multiplier=512,divider=1,hname=IAA,vname=Outbound_BW(Bps) -ctr=2,ev_sel=0x5,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=IAA,vname=ShareWQ_ReqNb -ctr=3,ev_sel=0x10,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=IAA,vname=DedicateWQ_ReqNb - -# DSA events -ctr=0,ev_sel=0x1,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=DSA,vname=Inbound_BW(Bps) -ctr=1,ev_sel=0x2,ev_cat=0x1,en=1,multiplier=32,divider=1,hname=DSA,vname=Outbound_BW(Bps) -ctr=2,ev_sel=0x5,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=DSA,vname=ShareWQ_ReqNb -ctr=3,ev_sel=0x10,ev_cat=0x0,en=1,multiplier=1,divider=1,hname=DSA,vname=DedicateWQ_ReqNb - -# QAT events -ctr=0,ev_sel=0x6,ev_cat=0x1,en=1,multiplier=1048576,divider=1,hname=QAT,vname=Inbound_BW(Bps) -ctr=1,ev_sel=0x7,ev_cat=0x1,en=1,multiplier=1048576,divider=1,hname=QAT,vname=Outbound_BW(Bps) -ctr=2,ev_sel=0xB,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_comp0(%) -ctr=3,ev_sel=0xC,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp0(%) -ctr=4,ev_sel=0xD,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp1(%) -ctr=5,ev_sel=0xE,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_decomp2(%) -ctr=6,ev_sel=0xF,ev_cat=0x1,en=1,multiplier=1,divider=1,hname=QAT,vname=util_xlt0(%) diff --git a/_codeql_build_dir/bin/opCode-6-143.txt b/_codeql_build_dir/bin/opCode-6-143.txt deleted file mode 100644 index 7a4dfc3d..00000000 --- a/_codeql_build_dir/bin/opCode-6-143.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-173.txt b/_codeql_build_dir/bin/opCode-6-173.txt deleted file mode 100644 index 821de1c2..00000000 --- a/_codeql_build_dir/bin/opCode-6-173.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-174.txt b/_codeql_build_dir/bin/opCode-6-174.txt deleted file mode 100644 index 821de1c2..00000000 --- a/_codeql_build_dir/bin/opCode-6-174.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-175.txt b/_codeql_build_dir/bin/opCode-6-175.txt deleted file mode 100644 index 821de1c2..00000000 --- a/_codeql_build_dir/bin/opCode-6-175.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-182.txt b/_codeql_build_dir/bin/opCode-6-182.txt deleted file mode 100644 index 821de1c2..00000000 --- a/_codeql_build_dir/bin/opCode-6-182.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-207.txt b/_codeql_build_dir/bin/opCode-6-207.txt deleted file mode 100644 index 7a4dfc3d..00000000 --- a/_codeql_build_dir/bin/opCode-6-207.txt +++ /dev/null @@ -1,45 +0,0 @@ -#Clockticks -#ctr=0,unit=iio,ev_sel=0x1,umask=0x0,en=1,ch_mask=0,fc_mask=0x0,multiplier=1,hname=Clockticks,vname=Total -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB write,vname=Part7 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part0 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part1 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part2 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part3 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=16,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part4 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=32,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part5 -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=64,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part6 -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,ch_mask=128,fc_mask=0x7,multiplier=4,hname=IB read,vname=Part7 -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part0 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part1 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part2 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part3 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part4 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part5 -ctr=2,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part6 -ctr=3,unit=iio,ev_sel=0x83,umask=0x80,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB read,vname=Part7 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part0 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part1 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part2 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part3 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=16,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part4 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=32,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part5 -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=64,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part6 -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,ch_mask=128,fc_mask=0x7,multiplier=4,hname=OB write,vname=Part7 -# IOMMU events -ctr=0,unit=iio,ev_sel=0x40,umask=0x01,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Lookup,vname=Total -ctr=1,unit=iio,ev_sel=0x40,umask=0x20,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x40,umask=0x80,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=Ctxt Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x10,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=256T Cache Hit,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=512G Cache Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x04,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=1G Cache Hit,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=2M Cache Hit,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0xc0,ch_mask=0x0,fc_mask=0x0,multiplier=1,hname=IOMMU Mem Access,vname=Total diff --git a/_codeql_build_dir/bin/opCode-6-85.txt b/_codeql_build_dir/bin/opCode-6-85.txt deleted file mode 100644 index 73d93176..00000000 --- a/_codeql_build_dir/bin/opCode-6-85.txt +++ /dev/null @@ -1,26 +0,0 @@ -# Inbound (PCIe device DMA into system) payload events -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB write (bytes),vname=Part3 (4th x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part0 (1st x16/x8/x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part1 (2nd x4) -ctr=0,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part2 (2nd x8/3rd x4) -ctr=1,unit=iio,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=IB read (bytes),vname=Part3 (4th x4) -# Outbound (CPU MMIO to the PCIe device) payload events -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB read (bytes),vname=Part3 (4th x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part0 (1st x16/x8/x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part1 (2nd x4) -ctr=2,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part2 (2nd x8/3rd x4) -ctr=3,unit=iio,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,hname=OB write (bytes),vname=Part3 (4th x4) -# VTd events -ctr=0,unit=iio,ev_sel=0x41,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=IOTLB Hit,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x20,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=IOTLB Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x41,umask=0x02,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d CTXT Miss,vname=Total -ctr=3,unit=iio,ev_sel=0x41,umask=0x04,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d L1 Miss,vname=Total -ctr=0,unit=iio,ev_sel=0x41,umask=0x08,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,hname=VT-d L2 Miss,vname=Total -ctr=1,unit=iio,ev_sel=0x41,umask=0x10,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,hname=VT-d L3 Miss,vname=Total -ctr=2,unit=iio,ev_sel=0x84,umask=0x04,en=1,ch_mask=0x10,fc_mask=0x7,multiplier=1,hname=VT-d Mem Read,vname=Total diff --git a/_codeql_build_dir/bin/pcm b/_codeql_build_dir/bin/pcm deleted file mode 100755 index d8abab5c20f96f31578b36e53b27aac9880d81df..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1473920 zcmbTf30TbE_Xqx-Y09*k5?U&Yl1B`^>j_{?GG2kC!{0xpVHh=bn4+dEa@z?`(9MGLgw(P-2py z##8iPH9uG)7LUA9wz402MNvG;no@@U2UCM6IpESYdE{NmvXO~zh)Xu9Cj%w@ISu+n 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- - -#============================================================================= -# Special targets to cleanup operation of make. - -# Special rule to run CMake to check the build system integrity. -# No rule that depends on this can have commands that come from listfiles -# because they might be regenerated. -cmake_check_build_system: - cd /home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir && $(CMAKE_COMMAND) -S$(CMAKE_SOURCE_DIR) -B$(CMAKE_BINARY_DIR) --check-build-system CMakeFiles/Makefile.cmake 0 -.PHONY : cmake_check_build_system - diff --git a/_codeql_build_dir/tests/cmake_install.cmake b/_codeql_build_dir/tests/cmake_install.cmake deleted file mode 100644 index 15773584..00000000 --- a/_codeql_build_dir/tests/cmake_install.cmake +++ /dev/null @@ -1,50 +0,0 @@ -# Install script for directory: /home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/tests - -# Set the install prefix -if(NOT DEFINED CMAKE_INSTALL_PREFIX) - set(CMAKE_INSTALL_PREFIX "/usr/local") -endif() -string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}") - -# Set the install configuration name. -if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME) - if(BUILD_TYPE) - string(REGEX REPLACE "^[^A-Za-z0-9_]+" "" - CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}") - else() - set(CMAKE_INSTALL_CONFIG_NAME "Release") - endif() - message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"") -endif() - -# Set the component getting installed. -if(NOT CMAKE_INSTALL_COMPONENT) - if(COMPONENT) - message(STATUS "Install component: \"${COMPONENT}\"") - set(CMAKE_INSTALL_COMPONENT "${COMPONENT}") - else() - set(CMAKE_INSTALL_COMPONENT) - endif() -endif() - -# Install shared libraries without execute permission? -if(NOT DEFINED CMAKE_INSTALL_SO_NO_EXE) - set(CMAKE_INSTALL_SO_NO_EXE "1") -endif() - -# Is this installation the result of a crosscompile? -if(NOT DEFINED CMAKE_CROSSCOMPILING) - set(CMAKE_CROSSCOMPILING "FALSE") -endif() - -# Set path to fallback-tool for dependency-resolution. -if(NOT DEFINED CMAKE_OBJDUMP) - set(CMAKE_OBJDUMP "/usr/bin/objdump") -endif() - -string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT - "${CMAKE_INSTALL_MANIFEST_FILES}") -if(CMAKE_INSTALL_LOCAL_ONLY) - file(WRITE "/home/runner/work/applications.analyzers.pcm/applications.analyzers.pcm/_codeql_build_dir/tests/install_local_manifest.txt" - "${CMAKE_INSTALL_MANIFEST_CONTENT}") -endif() From 1ea5a9b39bb6d44178bb43678e895ed2ed726083 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 14:30:18 +0000 Subject: [PATCH 06/33] Fix Windows compilation error and improve macro safety - Add WIN32_LEAN_AND_MEAN to prevent winsock.h/winsock2.h conflicts - Use parentheses in INVALID_SOCKET and SOCKET_ERROR macros for safety - Add comment explaining the include order requirement Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 9f5b1488..4593cd08 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -16,6 +16,8 @@ constexpr unsigned int DEFAULT_HTTPS_PORT = DEFAULT_HTTP_PORT; // Platform-specific includes #ifdef _WIN32 +// Must include winsock2.h before windows.h to avoid conflicts +#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers #include #include #include @@ -37,8 +39,8 @@ inline int close(SOCKET s) { return closesocket(s); } #include #include typedef int socket_t; -#define INVALID_SOCKET -1 -#define SOCKET_ERROR -1 +#define INVALID_SOCKET (-1) +#define SOCKET_ERROR (-1) #endif #include From 36c943a14f709a504db25c9af10a264f959a7aa2 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 14:49:40 +0000 Subject: [PATCH 07/33] Fix Windows build - define WIN32_LEAN_AND_MEAN before all includes The previous fix didn't work because types.h (included transitively through pcm-accel-common.h -> cpucounters.h) includes windows.h before we could define WIN32_LEAN_AND_MEAN. This caused windows.h to automatically include the old winsock.h, which conflicts with winsock2.h. Solution: Define WIN32_LEAN_AND_MEAN at the very top of the file, before any includes that might transitively pull in windows.h. This ensures that when types.h includes windows.h, it respects our flag and doesn't include the old winsock.h. Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 4593cd08..ab2ccdad 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1,6 +1,11 @@ // SPDX-License-Identifier: BSD-3-Clause // Copyright (c) 2016-2022, Intel Corporation +// Windows: Define WIN32_LEAN_AND_MEAN before ANY includes to prevent winsock.h conflicts +#ifdef _WIN32 +#define WIN32_LEAN_AND_MEAN +#endif + // Use port allocated for PCM in prometheus: // https://github.com/prometheus/prometheus/wiki/Default-port-allocations constexpr unsigned int DEFAULT_HTTP_PORT = 9738; @@ -16,11 +21,9 @@ constexpr unsigned int DEFAULT_HTTPS_PORT = DEFAULT_HTTP_PORT; // Platform-specific includes #ifdef _WIN32 -// Must include winsock2.h before windows.h to avoid conflicts -#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers +// winsock2.h must be included before windows.h (already included by pcm-accel-common.h -> cpucounters.h -> types.h) #include #include -#include #pragma comment(lib, "ws2_32.lib") // Define UNIX-like types for Windows typedef SOCKET socket_t; From 650f275c8f81de2f34dceccbe36e46beb207e1f4 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 15:09:45 +0000 Subject: [PATCH 08/33] Fix JSONPrinter ambiguous symbol error on Windows Wrap JSONPrinter and PrometheusPrinter classes in an anonymous namespace to avoid symbol conflicts on Windows. The ambiguity error occurred because with the new header include order (winsock2.h before windows.h), the Windows SDK or transitive headers were introducing a conflicting symbol that made the compiler unable to resolve which JSONPrinter was being referenced in the template member function definitions. Using an anonymous namespace ensures these file-local classes are in their own scope and won't conflict with any external symbols. Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index ab2ccdad..2ed414b7 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -297,6 +297,8 @@ class SignalHandler { socket_t SignalHandler::networkSocket_ = INVALID_SOCKET; HTTPServer* SignalHandler::httpServer_ = nullptr; +namespace { // Anonymous namespace to avoid symbol conflicts on Windows + class JSONPrinter : Visitor { public: @@ -926,6 +928,8 @@ void PrometheusPrinter::iterateVectorAndCallAccept(Vector const& v) { } }; +} // end anonymous namespace + #if defined (USE_SSL) void closeSSLConnectionAndFD( socket_t fd, SSL* ssl ) { int ret; From d4a0c1e97d3ee0f2cef80338904bab1e93e6c199 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 15:27:01 +0000 Subject: [PATCH 09/33] Fix DELETE macro conflict on Windows Windows SDK defines DELETE as a macro in winnt.h (as 0x00010000L for file access rights). This conflicts with the HTTPRequestMethod::DELETE enum value, causing syntax errors on Windows. Solution: Undefine the DELETE macro after including Windows headers. This is safe because: 1. We don't use Windows file operations that need the DELETE access right 2. The enum value is only used internally for HTTP method handling 3. The #undef is scoped to this file only Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 2ed414b7..9a50e35d 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -33,6 +33,8 @@ typedef SOCKET socket_t; #define EAGAIN WSAEWOULDBLOCK #define EWOULDBLOCK WSAEWOULDBLOCK inline int close(SOCKET s) { return closesocket(s); } +// Undefine Windows macros that conflict with our code +#undef DELETE // Conflicts with HTTPRequestMethod::DELETE enum #else #include #include From f845a42aba701fddc0ead6ecff16c99147ae78cf Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 15:44:06 +0000 Subject: [PATCH 10/33] Rename DELETE enum to HTTP_DELETE to avoid Windows macro conflict Instead of undefining the Windows DELETE macro (which breaks windriver.h), rename the HTTPRequestMethod::DELETE enum value to HTTP_DELETE. This avoids the conflict while keeping the Windows SDK macro intact. The DELETE macro is required by windriver.h for Windows service management (SERVICE_START | DELETE | SERVICE_STOP access rights). The enum value is only used internally and doesn't affect the HTTP protocol string "DELETE". Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 9a50e35d..02677086 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -33,8 +33,6 @@ typedef SOCKET socket_t; #define EAGAIN WSAEWOULDBLOCK #define EWOULDBLOCK WSAEWOULDBLOCK inline int close(SOCKET s) { return closesocket(s); } -// Undefine Windows macros that conflict with our code -#undef DELETE // Conflicts with HTTPRequestMethod::DELETE enum #else #include #include @@ -1487,7 +1485,7 @@ enum HTTPRequestMethod { HEAD, POST, PUT, - DELETE, + HTTP_DELETE, // Renamed from DELETE to avoid conflict with Windows macro CONNECT, OPTIONS, TRACE, @@ -1624,15 +1622,15 @@ class HTTPMethodProperties { } std::vector const httpMethodProperties = { - { GET, "GET", HTTPRequestHasBody::No, true }, - { HEAD, "HEAD", HTTPRequestHasBody::No, false }, - { POST, "POST", HTTPRequestHasBody::Required, true }, - { PUT, "PUT", HTTPRequestHasBody::Required, true }, - { DELETE, "DELETE", HTTPRequestHasBody::No, true }, - { CONNECT, "CONNECT", HTTPRequestHasBody::Required, true }, - { OPTIONS, "OPTIONS", HTTPRequestHasBody::Optional, true }, - { TRACE, "TRACE", HTTPRequestHasBody::No, true }, - { PATCH, "PATCH", HTTPRequestHasBody::Required, true } + { GET, "GET", HTTPRequestHasBody::No, true }, + { HEAD, "HEAD", HTTPRequestHasBody::No, false }, + { POST, "POST", HTTPRequestHasBody::Required, true }, + { PUT, "PUT", HTTPRequestHasBody::Required, true }, + { HTTP_DELETE, "DELETE", HTTPRequestHasBody::No, true }, + { CONNECT, "CONNECT", HTTPRequestHasBody::Required, true }, + { OPTIONS, "OPTIONS", HTTPRequestHasBody::Optional, true }, + { TRACE, "TRACE", HTTPRequestHasBody::No, true }, + { PATCH, "PATCH", HTTPRequestHasBody::Required, true } }; }; From 761f7bc0c5af05cbfb75bbc5fc20918f3a900b40 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 18:38:59 +0000 Subject: [PATCH 11/33] Rename URL struct to HTTPUrl to avoid Windows SDK conflict The Windows SDK defines a URL type in WinInet.h and other networking headers. When windows.h is included (via types.h), this conflicts with our URL struct, causing bracket matching errors in MSVC at line 1874. Solution: Renamed our URL struct to HTTPUrl throughout the file. This is more descriptive and avoids any conflicts with Windows SDK types. Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 50 +++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 02677086..c6754e21 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1811,16 +1811,16 @@ class HTTPHeaderProperties { }; }; -// This URL class tries to follow RFC 3986 +// This HTTPUrl class tries to follow RFC 3986 // the updates in 6874 and 8820 are not taken into account -struct URL { +struct HTTPUrl { public: - URL() : scheme_( "" ), user_( "" ), passwd_( "" ), host_( "" ), path_( "" ), fragment_( "" ), port_( 0 ), + HTTPUrl() : scheme_( "" ), user_( "" ), passwd_( "" ), host_( "" ), path_( "" ), fragment_( "" ), port_( 0 ), hasScheme_( false ), hasUser_ ( false ), hasPasswd_( false ), hasHost_( false ), hasPort_( false ), hasQuery_( false ), hasFragment_( false ), pathIsStar_( false ) {} - URL( URL const & ) = default; - ~URL() = default; - URL& operator=( URL const & ) = default; + HTTPUrl( HTTPUrl const & ) = default; + ~HTTPUrl() = default; + HTTPUrl& operator=( HTTPUrl const & ) = default; private: int charToNumber( std::string::value_type c ) const { @@ -1857,11 +1857,11 @@ struct URL { int n = 0; if ( '%' == c ) { if ( ++ci == s.end() ) - throw std::runtime_error( "Malformed URL, percent found but no next char" ); + throw std::runtime_error( "Malformed HTTPUrl, percent found but no next char" ); n += charToNumber(*ci); n *= 16; if ( ++ci == s.end() ) - throw std::runtime_error( "Malformed URL, percent found but no next next char" ); // better error message needed :-) + throw std::runtime_error( "Malformed HTTPUrl, percent found but no next next char" ); // better error message needed :-) n += charToNumber(*ci); r << (unsigned char)n; continue; @@ -1871,9 +1871,9 @@ struct URL { return r.str(); } - static URL parse( std::string fullURL ) { + static HTTPUrl parse( std::string fullURL ) { DBG( 3, "fullURL: '", fullURL, "'" ); - URL url; + HTTPUrl url; size_t pathBeginPos = 0; size_t pathEndPos = std::string::npos; size_t questionMarkPos = 0; @@ -1906,7 +1906,7 @@ struct URL { url.scheme_ = scheme; url.hasScheme_ = true; } else - throw std::runtime_error( "URL does not start with / and has no scheme" ); + throw std::runtime_error( "HTTPUrl does not start with / and has no scheme" ); size_t authorityPos = fullURL.find( "//", schemeColonPos+1 ); size_t authorityEndPos; @@ -2007,7 +2007,7 @@ struct URL { } } if ( port >= 65536 ) - throw std::runtime_error( "URL::parse: port too large" ); + throw std::runtime_error( "HTTPUrl::parse: port too large" ); url.port_ = (unsigned short)port; url.hasPort_ = true; DBG( 3, "port: ", port ); @@ -2038,7 +2038,7 @@ struct URL { if ( queryString.empty() ) { url.hasQuery_ = false; - throw std::runtime_error( "Invalid URL: query not found after question mark" ); + throw std::runtime_error( "Invalid HTTPUrl: query not found after question mark" ); } else { url.hasQuery_ = true; @@ -2071,11 +2071,11 @@ struct URL { DBG( 3, "path: '", url.path_, "'" ); } - // Now make sure the URL does not contain %xx values + // Now make sure the HTTPUrl does not contain %xx values size_t percentPos = url.path_.find( '%' ); if ( std::string::npos != percentPos ) { // throwing an error mentioning a dev issue - throw std::runtime_error( std::string("DEV: Some URL component still contains percent encoded values, please report the URL: ") + url.path_ ); + throw std::runtime_error( std::string("DEV: Some HTTPUrl component still contains percent encoded values, please report the HTTPUrl: ") + url.path_ ); } // Done! @@ -2083,7 +2083,7 @@ struct URL { } void printURL( std::ostream& os ) const { - DBG( 3, "URL::printURL: debug level 3 to see more" ); + DBG( 3, "HTTPUrl::printURL: debug level 3 to see more" ); std::stringstream ss; DBG( 3, " hasScheme_: ", hasScheme_, ", scheme_: ", scheme_ ); if ( hasScheme_ ) { @@ -2131,7 +2131,7 @@ struct URL { ss << '#' << fragment_; } os << ss.str() << "\n"; - DBG( 3, "URL::printURL: done" ); + DBG( 3, "HTTPUrl::printURL: done" ); } public: @@ -2153,7 +2153,7 @@ struct URL { bool pathIsStar_; }; -std::ostream& operator<<( std::ostream& os, URL const & url ) { +std::ostream& operator<<( std::ostream& os, HTTPUrl const & url ) { url.printURL( os ); return os; } @@ -2513,14 +2513,14 @@ class HTTPRequest : public HTTPMessage { return method_; } - URL const & url() const { + HTTPUrl const & url() const { return url_; } void debugPrint() { DBG( 3, "HTTPRequest::debugPrint:" ); DBG( 3, "Method : \"", method_, "\"" ); - DBG( 3, "URL : \"", url_, "\"" ); + DBG( 3, "HTTPUrl : \"", url_, "\"" ); DBG( 3, "Protocol: \"", protocol_, "\"" ); for ( auto& header: headers_ ) DBG( 3, "Header : \"", header.first, "\" ==> \"", header.second.headerValueAsString(), "\"" ); @@ -2529,7 +2529,7 @@ class HTTPRequest : public HTTPMessage { private: enum HTTPRequestMethod method_; - URL url_; + HTTPUrl url_; }; class HTTPResponse : public HTTPMessage { @@ -2735,7 +2735,7 @@ basic_socketstream& operator>>( basic_socketstream url = requestLine.substr( firstSpace+1, secondSpace-firstSpace-1 ); DBG( 3, "url: ", url ); if ( url.size() == 0 ) - throw std::runtime_error( "Not a valid request string: URL is empty" ); + throw std::runtime_error( "Not a valid request string: HTTPUrl is empty" ); protocol = requestLine.substr( secondSpace+1, std::string::npos ); DBG( 3, "protocol: ", protocol ); if ( protocol.size() == 0 ) @@ -2746,7 +2746,7 @@ basic_socketstream& operator>>( basic_socketstream m.setProtocol( protocol ); m.method_ = HTTPMethodProperties::getMethodAsEnum( method ); - m.url_ = URL::parse( url ); + m.url_ = HTTPUrl::parse( url ); m.setInitialized(); // m.debugPrint(); @@ -3693,7 +3693,7 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } format = mimeTypeToOutputFormat[ mt ]; - URL url; + HTTPUrl url; url = req.url(); DBG( 3, "PATH=\"", url.path_, "\", size=", url.path_.size() ); @@ -3809,7 +3809,7 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } } } else if ( 8 == url.path_.size() && 0 == url.path_.find( "/metrics", 0 ) ) { - DBG( 3, "Special snowflake prometheus wants a /metrics URL, it can't be bothered to use its own mimetype in the Accept header" ); + DBG( 3, "Special snowflake prometheus wants a /metrics HTTPUrl, it can't be bothered to use its own mimetype in the Accept header" ); format = Prometheus_0_0_4; aggregatorPair = getNullAndCurrentAggregator(); } else { From 8d9ba079f8b301b28a9ac878222aea597445a2a4 Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 20:11:38 +0100 Subject: [PATCH 12/33] compile fixes Change-Id: I0128e0d10cfe3975b57bbc4362afefac29fc0f1e --- src/CMakeLists.txt | 8 +++----- src/dashboard.cpp | 4 ++++ src/pcm-sensor-server.cpp | 8 ++++---- 3 files changed, 11 insertions(+), 9 deletions(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 225fd496..ec023c17 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -8,12 +8,10 @@ set(PROJECT_NAMES pcm pcm-numa pcm-latency pcm-power pcm-msr pcm-memory pcm-tsx set(MINIMUM_OPENSSL_VERSION 1.1.1) -file(GLOB COMMON_SOURCES pcm-accel-common.cpp msr.cpp cpucounters.cpp pci.cpp mmio.cpp tpmi.cpp pmt.cpp bw.cpp utils.cpp topology.cpp debug.cpp threadpool.cpp uncore_pmu_discovery.cpp pcm-iio-pmu.cpp pcm-iio-topology.cpp lspci.cpp ${PCM_PUGIXML_CPP}) +file(GLOB COMMON_SOURCES pcm-accel-common.cpp msr.cpp cpucounters.cpp pci.cpp mmio.cpp tpmi.cpp pmt.cpp bw.cpp utils.cpp topology.cpp debug.cpp threadpool.cpp uncore_pmu_discovery.cpp pcm-iio-pmu.cpp pcm-iio-topology.cpp lspci.cpp dashboard.cpp ${PCM_PUGIXML_CPP}) -if (APPLE) - file(GLOB UNIX_SOURCES dashboard.cpp) -else() - file(GLOB UNIX_SOURCES dashboard.cpp resctrl.cpp) +if (NOT APPLE) + file(GLOB UNIX_SOURCES resctrl.cpp) endif() if (LINUX) diff --git a/src/dashboard.cpp b/src/dashboard.cpp index f793492a..47232ce6 100644 --- a/src/dashboard.cpp +++ b/src/dashboard.cpp @@ -3,7 +3,11 @@ #include #include +#include + +#ifndef _MSC_VER #include +#endif #include "pcm-accel-common.h" #include "dashboard.h" diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index c6754e21..a9f5220b 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -297,7 +297,7 @@ class SignalHandler { socket_t SignalHandler::networkSocket_ = INVALID_SOCKET; HTTPServer* SignalHandler::httpServer_ = nullptr; -namespace { // Anonymous namespace to avoid symbol conflicts on Windows +namespace pcm { class JSONPrinter : Visitor { @@ -1917,7 +1917,7 @@ struct HTTPUrl { throw std::runtime_error( "Something between : and //" ); pathBeginPos = fullURL.find( '/', authorityPos+2 ); - authorityEndPos = std::min( { pathBeginPos, questionMarkPos, numberPos } ); + authorityEndPos = (std::min)( { pathBeginPos, questionMarkPos, numberPos } ); authority = fullURL.substr( authorityPos+2, authorityEndPos - (authorityPos + 2) ); DBG( 3, "authority: '", authority, "'" ); @@ -2023,7 +2023,7 @@ struct HTTPUrl { } } - pathEndPos = std::min( {questionMarkPos, numberPos} ); + pathEndPos = (std::min)( {questionMarkPos, numberPos} ); if ( std::string::npos != pathBeginPos ) { url.path_ = fullURL.substr( pathBeginPos, pathEndPos - pathBeginPos ); } else { @@ -3214,7 +3214,7 @@ class HTTPServer : public Server { throw std::runtime_error("BUG: getAggregator: both indices are equal. Fix the code!" ); // simply wait until we have enough samples to return - while( agVector_.size() < ( std::max( index, index2 ) + 1 ) ) + while( agVector_.size() < ( (std::max)( index, index2 ) + 1 ) ) std::this_thread::sleep_for(std::chrono::seconds(1)); agVectorMutex_.lock(); From 72394f1d63b330ff1173538415ff0b531f34e0ea Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 20:14:55 +0100 Subject: [PATCH 13/33] Revert "Rename URL struct to HTTPUrl to avoid Windows SDK conflict" This reverts commit 683644a03cd6b18781459442cabcd19bb88c543b. --- src/pcm-sensor-server.cpp | 50 +++++++++++++++++++-------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index a9f5220b..445a37c2 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1811,16 +1811,16 @@ class HTTPHeaderProperties { }; }; -// This HTTPUrl class tries to follow RFC 3986 +// This URL class tries to follow RFC 3986 // the updates in 6874 and 8820 are not taken into account -struct HTTPUrl { +struct URL { public: - HTTPUrl() : scheme_( "" ), user_( "" ), passwd_( "" ), host_( "" ), path_( "" ), fragment_( "" ), port_( 0 ), + URL() : scheme_( "" ), user_( "" ), passwd_( "" ), host_( "" ), path_( "" ), fragment_( "" ), port_( 0 ), hasScheme_( false ), hasUser_ ( false ), hasPasswd_( false ), hasHost_( false ), hasPort_( false ), hasQuery_( false ), hasFragment_( false ), pathIsStar_( false ) {} - HTTPUrl( HTTPUrl const & ) = default; - ~HTTPUrl() = default; - HTTPUrl& operator=( HTTPUrl const & ) = default; + URL( URL const & ) = default; + ~URL() = default; + URL& operator=( URL const & ) = default; private: int charToNumber( std::string::value_type c ) const { @@ -1857,11 +1857,11 @@ struct HTTPUrl { int n = 0; if ( '%' == c ) { if ( ++ci == s.end() ) - throw std::runtime_error( "Malformed HTTPUrl, percent found but no next char" ); + throw std::runtime_error( "Malformed URL, percent found but no next char" ); n += charToNumber(*ci); n *= 16; if ( ++ci == s.end() ) - throw std::runtime_error( "Malformed HTTPUrl, percent found but no next next char" ); // better error message needed :-) + throw std::runtime_error( "Malformed URL, percent found but no next next char" ); // better error message needed :-) n += charToNumber(*ci); r << (unsigned char)n; continue; @@ -1871,9 +1871,9 @@ struct HTTPUrl { return r.str(); } - static HTTPUrl parse( std::string fullURL ) { + static URL parse( std::string fullURL ) { DBG( 3, "fullURL: '", fullURL, "'" ); - HTTPUrl url; + URL url; size_t pathBeginPos = 0; size_t pathEndPos = std::string::npos; size_t questionMarkPos = 0; @@ -1906,7 +1906,7 @@ struct HTTPUrl { url.scheme_ = scheme; url.hasScheme_ = true; } else - throw std::runtime_error( "HTTPUrl does not start with / and has no scheme" ); + throw std::runtime_error( "URL does not start with / and has no scheme" ); size_t authorityPos = fullURL.find( "//", schemeColonPos+1 ); size_t authorityEndPos; @@ -2007,7 +2007,7 @@ struct HTTPUrl { } } if ( port >= 65536 ) - throw std::runtime_error( "HTTPUrl::parse: port too large" ); + throw std::runtime_error( "URL::parse: port too large" ); url.port_ = (unsigned short)port; url.hasPort_ = true; DBG( 3, "port: ", port ); @@ -2038,7 +2038,7 @@ struct HTTPUrl { if ( queryString.empty() ) { url.hasQuery_ = false; - throw std::runtime_error( "Invalid HTTPUrl: query not found after question mark" ); + throw std::runtime_error( "Invalid URL: query not found after question mark" ); } else { url.hasQuery_ = true; @@ -2071,11 +2071,11 @@ struct HTTPUrl { DBG( 3, "path: '", url.path_, "'" ); } - // Now make sure the HTTPUrl does not contain %xx values + // Now make sure the URL does not contain %xx values size_t percentPos = url.path_.find( '%' ); if ( std::string::npos != percentPos ) { // throwing an error mentioning a dev issue - throw std::runtime_error( std::string("DEV: Some HTTPUrl component still contains percent encoded values, please report the HTTPUrl: ") + url.path_ ); + throw std::runtime_error( std::string("DEV: Some URL component still contains percent encoded values, please report the URL: ") + url.path_ ); } // Done! @@ -2083,7 +2083,7 @@ struct HTTPUrl { } void printURL( std::ostream& os ) const { - DBG( 3, "HTTPUrl::printURL: debug level 3 to see more" ); + DBG( 3, "URL::printURL: debug level 3 to see more" ); std::stringstream ss; DBG( 3, " hasScheme_: ", hasScheme_, ", scheme_: ", scheme_ ); if ( hasScheme_ ) { @@ -2131,7 +2131,7 @@ struct HTTPUrl { ss << '#' << fragment_; } os << ss.str() << "\n"; - DBG( 3, "HTTPUrl::printURL: done" ); + DBG( 3, "URL::printURL: done" ); } public: @@ -2153,7 +2153,7 @@ struct HTTPUrl { bool pathIsStar_; }; -std::ostream& operator<<( std::ostream& os, HTTPUrl const & url ) { +std::ostream& operator<<( std::ostream& os, URL const & url ) { url.printURL( os ); return os; } @@ -2513,14 +2513,14 @@ class HTTPRequest : public HTTPMessage { return method_; } - HTTPUrl const & url() const { + URL const & url() const { return url_; } void debugPrint() { DBG( 3, "HTTPRequest::debugPrint:" ); DBG( 3, "Method : \"", method_, "\"" ); - DBG( 3, "HTTPUrl : \"", url_, "\"" ); + DBG( 3, "URL : \"", url_, "\"" ); DBG( 3, "Protocol: \"", protocol_, "\"" ); for ( auto& header: headers_ ) DBG( 3, "Header : \"", header.first, "\" ==> \"", header.second.headerValueAsString(), "\"" ); @@ -2529,7 +2529,7 @@ class HTTPRequest : public HTTPMessage { private: enum HTTPRequestMethod method_; - HTTPUrl url_; + URL url_; }; class HTTPResponse : public HTTPMessage { @@ -2735,7 +2735,7 @@ basic_socketstream& operator>>( basic_socketstream url = requestLine.substr( firstSpace+1, secondSpace-firstSpace-1 ); DBG( 3, "url: ", url ); if ( url.size() == 0 ) - throw std::runtime_error( "Not a valid request string: HTTPUrl is empty" ); + throw std::runtime_error( "Not a valid request string: URL is empty" ); protocol = requestLine.substr( secondSpace+1, std::string::npos ); DBG( 3, "protocol: ", protocol ); if ( protocol.size() == 0 ) @@ -2746,7 +2746,7 @@ basic_socketstream& operator>>( basic_socketstream m.setProtocol( protocol ); m.method_ = HTTPMethodProperties::getMethodAsEnum( method ); - m.url_ = HTTPUrl::parse( url ); + m.url_ = URL::parse( url ); m.setInitialized(); // m.debugPrint(); @@ -3693,7 +3693,7 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } format = mimeTypeToOutputFormat[ mt ]; - HTTPUrl url; + URL url; url = req.url(); DBG( 3, "PATH=\"", url.path_, "\", size=", url.path_.size() ); @@ -3809,7 +3809,7 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } } } else if ( 8 == url.path_.size() && 0 == url.path_.find( "/metrics", 0 ) ) { - DBG( 3, "Special snowflake prometheus wants a /metrics HTTPUrl, it can't be bothered to use its own mimetype in the Accept header" ); + DBG( 3, "Special snowflake prometheus wants a /metrics URL, it can't be bothered to use its own mimetype in the Accept header" ); format = Prometheus_0_0_4; aggregatorPair = getNullAndCurrentAggregator(); } else { From 4f33dfe1107cde23abd986ec7c2c79e82fd2ac8f Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 19:26:44 +0000 Subject: [PATCH 14/33] Fix gethostname linker error on Windows dashboard.cpp uses gethostname() which is provided by unistd.h on UNIX but by winsock2.h on Windows. Added conditional include for Windows to include winsock2.h and link against ws2_32.lib, resolving the unresolved external symbol error. This fixes the linker error: "dashboard.obj : error LNK2019: unresolved external symbol gethostname" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/dashboard.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/dashboard.cpp b/src/dashboard.cpp index 47232ce6..6fa951dd 100644 --- a/src/dashboard.cpp +++ b/src/dashboard.cpp @@ -5,7 +5,10 @@ #include #include -#ifndef _MSC_VER +#ifdef _MSC_VER +#include +#pragma comment(lib, "ws2_32.lib") +#else #include #endif From 244e562dc6b0261d28ce89564eabfcde867e9580 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 20:54:17 +0000 Subject: [PATCH 15/33] Fix missing main function linker error on Windows pcm-sensor-server.cpp was missing an include for utils.h, which defines the PCM_MAIN_NOTHROW macro that expands to create the main() entry point function. Without this include, the macro at line 3906 wasn't being expanded, causing the linker to fail with "unresolved external symbol main". Added #include "utils.h" to ensure the PCM_MAIN_NOTHROW macro is properly defined before use. This fixes the linker error: "LIBCMT.lib(exe_main.obj) : error LNK2019: unresolved external symbol main" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 445a37c2..4484e63f 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -56,6 +56,7 @@ typedef int socket_t; #include "debug.h" #include "topology.h" #include "dashboard.h" +#include "utils.h" #define PCMWebServerVersion "0.1" #if defined (USE_SSL) From c9f0a2f2ed89cab163e1435cc13c9419abb531b5 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 29 Oct 2025 21:19:04 +0000 Subject: [PATCH 16/33] Add tchar.h include to utils.h for Windows _T macro support The PCM_SET_DLL_DIR macro in utils.h uses the _T macro with SetDllDirectory, but _T was not properly defined because was not included. This caused the PCM_MAIN_NOTHROW macro expansion to fail on Windows, preventing the main() function from being generated. Added #include in the Windows-specific section of utils.h to ensure the _T macro is properly defined for use in PCM_SET_DLL_DIR. This fixes the persistent linker error: "LIBCMT.lib(exe_main.obj) : error LNK2019: unresolved external symbol main" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/utils.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/utils.h b/src/utils.h index 7b8d112e..35d15109 100644 --- a/src/utils.h +++ b/src/utils.h @@ -34,6 +34,7 @@ #include #else #include +#include // For _T macro used in PCM_SET_DLL_DIR #endif #include #include From 10826a1f03b71403596d0d9abd72cb7b15b39d17 Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 22:29:11 +0100 Subject: [PATCH 17/33] simplify src/CMakeLists.txt Change-Id: I3177e50f67a6be21aab83a4b1dbeb65aec8dce16 --- src/CMakeLists.txt | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index ec023c17..79458f01 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -4,7 +4,7 @@ include(FindOpenSSL) # All pcm-* executables -set(PROJECT_NAMES pcm pcm-numa pcm-latency pcm-power pcm-msr pcm-memory pcm-tsx pcm-pcie pcm-core pcm-iio pcm-pcicfg pcm-mmio pcm-tpmi pcm-raw pcm-accel) +set(PROJECT_NAMES pcm pcm-numa pcm-latency pcm-power pcm-msr pcm-memory pcm-tsx pcm-pcie pcm-core pcm-iio pcm-pcicfg pcm-mmio pcm-tpmi pcm-raw pcm-accel pcm-sensor-server) set(MINIMUM_OPENSSL_VERSION 1.1.1) @@ -43,7 +43,6 @@ if(UNIX) # LINUX, FREE_BSD, APPLE if (NOT APPLE) set(CMAKE_EXE_LINKER_FLAGS_RELEASE "${CMAKE_EXE_LINKER_FLAGS} -s") # --strip-unneeded for packaging endif() - list(APPEND PROJECT_NAMES pcm-sensor-server) list(APPEND PROJECT_NAMES pcm-sensor) # libpcm.a @@ -130,9 +129,6 @@ if(MSVC) set_target_properties(pcm-service PROPERTIES LINK_FLAGS "/INCREMENTAL:NO" COMMON_LANGUAGE_RUNTIME "") set_property(TARGET pcm-service PROPERTY VS_DOTNET_REFERENCES "System;System.Configuration.Install;System.Data;System.Management;System.ServiceProcess;System.Xml") target_link_libraries(pcm-service pcm-lib) - - # pcm-sensor-server now also supported on Windows - list(APPEND PROJECT_NAMES pcm-sensor-server) endif(MSVC) From 9f6f751ad2c8a35fc942887b5ae1a72c3e070d53 Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 22:33:13 +0100 Subject: [PATCH 18/33] fix compilation/linking on Windows Change-Id: If478ebf272bdd566e568c58962099712bfb05449 --- src/pcm-sensor-server.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 4484e63f..ca9f6466 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -3902,7 +3902,8 @@ void printHelpText( std::string const & programName ) { print_help_force_rtm_abort_mode(25, ":"); } -#if not defined( UNIT_TEST ) +#ifndef UNIT_TEST + /* Main */ PCM_MAIN_NOTHROW; From 8049ed01c8975db8f82a0d6533410238dc7ddb8b Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 22:33:42 +0100 Subject: [PATCH 19/33] Revert "Fix missing main function linker error on Windows" This reverts commit 910be79eea8dd353f52e79b3dc0fc82b332c47ee. --- src/pcm-sensor-server.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index ca9f6466..ec98a308 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -56,7 +56,6 @@ typedef int socket_t; #include "debug.h" #include "topology.h" #include "dashboard.h" -#include "utils.h" #define PCMWebServerVersion "0.1" #if defined (USE_SSL) From a895e6465e2c9689ae71560ae2755b03a13173ca Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 29 Oct 2025 22:34:06 +0100 Subject: [PATCH 20/33] Revert "Add tchar.h include to utils.h for Windows _T macro support" This reverts commit f8fe7604588dcd7948085d4fc08def5df2732040. --- src/utils.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/utils.h b/src/utils.h index 35d15109..7b8d112e 100644 --- a/src/utils.h +++ b/src/utils.h @@ -34,7 +34,6 @@ #include #else #include -#include // For _T macro used in PCM_SET_DLL_DIR #endif #include #include From 39de00967af3f877f2074b9839f50ec89dad0034 Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Thu, 30 Oct 2025 09:22:42 +0100 Subject: [PATCH 21/33] improve error message Change-Id: I51cfad2f1b728982c103dc9767eabe85eb814d84 --- src/pcm-sensor-server.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index ec98a308..002b6b3e 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1434,9 +1434,9 @@ class Server { if ( INVALID_SOCKET == sockfd ) { #ifdef _WIN32 - throw std::runtime_error( std::string("Server Constructor: Can´t create socket: ") + std::to_string(WSAGetLastError()) ); + throw std::runtime_error( std::string("Server Constructor: Can't create socket. WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); #else - throw std::runtime_error( "Server Constructor: Can´t create socket" ); + throw std::runtime_error( "Server Constructor: Can't create socket" ); #endif } From f63bb6d84ad53907a0be90e444ef47fcf0223ecc Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Thu, 30 Oct 2025 08:31:19 +0000 Subject: [PATCH 22/33] Fix Winsock initialization - verify version 2.2 is available WSA error 10106 (WSAVERNOTSUPPORTED) can occur if WSAStartup succeeds but returns an incompatible Winsock version. Added validation after WSAStartup to check that we actually got Winsock version 2.2 or higher. If the version check fails, we now call WSACleanup() and throw a clear error message showing what version was found vs what was requested. This should fix the runtime error: "Can't create socket. WSAGetLastError: 10106" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 002b6b3e..1c62edd0 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1397,6 +1397,12 @@ class Server { if (result != 0) { throw std::runtime_error(std::string("WSAStartup failed: ") + std::to_string(result)); } + // Verify that Winsock 2.2 or higher is available + if (LOBYTE(wsaData.wVersion) < 2 || (LOBYTE(wsaData.wVersion) == 2 && HIBYTE(wsaData.wVersion) < 2)) { + WSACleanup(); + throw std::runtime_error(std::string("Winsock 2.2 or higher required. Found version: ") + + std::to_string(LOBYTE(wsaData.wVersion)) + "." + std::to_string(HIBYTE(wsaData.wVersion))); + } #endif serverSocket_ = initializeServerSocket(); SignalHandler* shi = SignalHandler::getInstance(); From 16e28dcb5748767901da4c15eb9ab6b84d75c01c Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Thu, 30 Oct 2025 08:45:10 +0000 Subject: [PATCH 23/33] Add IPv4 fallback for Windows socket creation WSA error 10106 occurs when calling socket(AF_INET6, ...) because IPv6 may not be enabled or supported on all Windows systems. Added fallback logic to try IPv4 (AF_INET) if IPv6 socket creation fails on Windows. The server now: 1. Tries to create an IPv6 socket first (for dual-stack support) 2. If that fails on Windows, tries IPv4 instead 3. Updates bind address accordingly (in6addr_any vs INADDR_ANY) 4. Logs which protocol is being used This ensures pcm-sensor-server works on Windows systems regardless of IPv6 configuration, fixing the runtime error: "Can't create socket. WSAGetLastError: 10106" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 59 +++++++++++++++++++++++++++++---------- 1 file changed, 45 insertions(+), 14 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 1c62edd0..a226e4e6 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1436,11 +1436,19 @@ class Server { if ( port_ == 0 ) throw std::runtime_error( "Server Constructor: No port specified." ); + bool useIPv4 = false; socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); if ( INVALID_SOCKET == sockfd ) { #ifdef _WIN32 - throw std::runtime_error( std::string("Server Constructor: Can't create socket. WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); + // On Windows, IPv6 might not be enabled. Try IPv4 as fallback. + std::cerr << "IPv6 socket creation failed (WSAGetLastError: " << WSAGetLastError() << "), trying IPv4..." << std::endl; + sockfd = ::socket( AF_INET, SOCK_STREAM, 0 ); + if ( INVALID_SOCKET == sockfd ) + { + throw std::runtime_error( std::string("Server Constructor: Can't create socket (IPv4 or IPv6). WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); + } + useIPv4 = true; #else throw std::runtime_error( "Server Constructor: Can't create socket" ); #endif @@ -1448,21 +1456,44 @@ class Server { int retval = 0; - struct sockaddr_in6 serv; - serv.sin6_family = AF_INET6; - serv.sin6_port = htons( port_ ); - if ( listenIP_.empty() ) - serv.sin6_addr = in6addr_any; - else { - if ( 1 != ::inet_pton( AF_INET6, listenIP_.c_str(), &(serv.sin6_addr) ) ) - { - DBG( 3, "close clientsocketFD" ); - ::close(sockfd); - throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); + if (useIPv4) { +#ifdef _WIN32 + // Use IPv4 + struct sockaddr_in serv4; + memset(&serv4, 0, sizeof(serv4)); + serv4.sin_family = AF_INET; + serv4.sin_port = htons( port_ ); + if ( listenIP_.empty() ) + serv4.sin_addr.s_addr = INADDR_ANY; + else { + if ( 1 != ::inet_pton( AF_INET, listenIP_.c_str(), &(serv4.sin_addr) ) ) + { + DBG( 3, "close clientsocketFD" ); + ::close(sockfd); + throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); + } + } + socklen_t len = sizeof( struct sockaddr_in ); + retval = ::bind( sockfd, reinterpret_cast(&serv4), len ); +#endif + } else { + // Use IPv6 + struct sockaddr_in6 serv; + serv.sin6_family = AF_INET6; + serv.sin6_port = htons( port_ ); + if ( listenIP_.empty() ) + serv.sin6_addr = in6addr_any; + else { + if ( 1 != ::inet_pton( AF_INET6, listenIP_.c_str(), &(serv.sin6_addr) ) ) + { + DBG( 3, "close clientsocketFD" ); + ::close(sockfd); + throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); + } } + socklen_t len = sizeof( struct sockaddr_in6 ); + retval = ::bind( sockfd, reinterpret_cast(&serv), len ); } - socklen_t len = sizeof( struct sockaddr_in6 ); - retval = ::bind( sockfd, reinterpret_cast(&serv), len ); if ( 0 != retval ) { DBG( 3, "close clientsocketFD" ); ::close( sockfd ); From e5e5f19c6ef1da92de7c1d5bb49416f958f982a3 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Thu, 30 Oct 2025 08:55:35 +0000 Subject: [PATCH 24/33] Fix socket creation by explicitly specifying IPPROTO_TCP on Windows WSA error 10106 (WSAVERNOTSUPPORTED) was occurring because socket() was called with protocol parameter 0. On Windows, some systems require the protocol to be explicitly specified for socket creation. Changed socket() calls on Windows to use IPPROTO_TCP explicitly: - socket(AF_INET6, SOCK_STREAM, IPPROTO_TCP) for IPv6 - socket(AF_INET, SOCK_STREAM, IPPROTO_TCP) for IPv4 fallback This matches Windows best practices and ensures compatibility across all Windows systems, fixing the runtime error: "Can't create socket. WSAGetLastError: 10106" Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index a226e4e6..73d5b33b 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1437,13 +1437,18 @@ class Server { throw std::runtime_error( "Server Constructor: No port specified." ); bool useIPv4 = false; +#ifdef _WIN32 + // On Windows, explicitly specify IPPROTO_TCP for better compatibility + socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, IPPROTO_TCP ); +#else socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); +#endif if ( INVALID_SOCKET == sockfd ) { #ifdef _WIN32 // On Windows, IPv6 might not be enabled. Try IPv4 as fallback. std::cerr << "IPv6 socket creation failed (WSAGetLastError: " << WSAGetLastError() << "), trying IPv4..." << std::endl; - sockfd = ::socket( AF_INET, SOCK_STREAM, 0 ); + sockfd = ::socket( AF_INET, SOCK_STREAM, IPPROTO_TCP ); if ( INVALID_SOCKET == sockfd ) { throw std::runtime_error( std::string("Server Constructor: Can't create socket (IPv4 or IPv6). WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); From d55c371a252d06eabd62fb0ccf56047d04f115c2 Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Thu, 30 Oct 2025 14:14:14 +0100 Subject: [PATCH 25/33] do not delete env var SystemRoot because it is required for winsock Change-Id: If175ab93c8615432e66e5ba673a3239afb3d270d --- src/utils.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/utils.h b/src/utils.h index 7b8d112e..6873ceed 100644 --- a/src/utils.h +++ b/src/utils.h @@ -97,7 +97,7 @@ int mainThrows(int argc, char * argv[]); \ int main(int argc, char * argv[]) \ { \ try { \ - eraseEnvironmentVariables({PCM_STRING("POSIXLY_CORRECT")}); \ + eraseEnvironmentVariables({PCM_STRING("POSIXLY_CORRECT"), PCM_STRING("SystemRoot")}); \ } catch(const std::exception & e) \ { \ std::cerr << "PCM ERROR. Exception in eraseEnvironmentVariables: " << e.what() << "\n"; \ From f8d01939786e1610a198b5591d43337862acc832 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Thu, 30 Oct 2025 13:37:40 +0000 Subject: [PATCH 26/33] Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 73d5b33b..61e8968f 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1492,7 +1492,11 @@ class Server { if ( 1 != ::inet_pton( AF_INET6, listenIP_.c_str(), &(serv.sin6_addr) ) ) { DBG( 3, "close clientsocketFD" ); +#ifdef _WIN32 + closesocket(sockfd); +#else ::close(sockfd); +#endif throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); } } @@ -1501,14 +1505,22 @@ class Server { } if ( 0 != retval ) { DBG( 3, "close clientsocketFD" ); +#ifdef _WIN32 + closesocket( sockfd ); +#else ::close( sockfd ); +#endif throw std::runtime_error( std::string("Server Constructor: Cannot bind to port ") + std::to_string(port_) ); } retval = listen( sockfd, 64 ); if ( 0 != retval ) { DBG( 3, "close clientsocketFD" ); +#ifdef _WIN32 + closesocket( sockfd ); +#else ::close( sockfd ); +#endif throw std::runtime_error( "Server Constructor: Cannot listen on socket" ); } // Here everything should be fine, return socket fd From 7eb7c2c4cd52efee2db7063f5db613d3c7c5ed80 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Thu, 30 Oct 2025 16:56:32 +0000 Subject: [PATCH 27/33] Make IPv4 default on Windows instead of IPv6 Changed Windows socket creation to use IPv4 (AF_INET) by default instead of trying IPv6 first with a fallback. This provides better compatibility and avoids potential IPv6 configuration issues on Windows systems. On UNIX systems (Linux, macOS, FreeBSD), IPv6 remains the default as before since it supports dual-stack with IPv4 compatibility built-in. This change simplifies the Windows implementation and ensures reliable socket creation without needing IPv6 enabled. Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 61e8968f..f80b5cfe 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1438,26 +1438,20 @@ class Server { bool useIPv4 = false; #ifdef _WIN32 - // On Windows, explicitly specify IPPROTO_TCP for better compatibility - socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, IPPROTO_TCP ); + // On Windows, use IPv4 by default for better compatibility + socket_t sockfd = ::socket( AF_INET, SOCK_STREAM, IPPROTO_TCP ); + if ( INVALID_SOCKET == sockfd ) + { + throw std::runtime_error( std::string("Server Constructor: Can't create socket. WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); + } + useIPv4 = true; #else socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); -#endif if ( INVALID_SOCKET == sockfd ) { -#ifdef _WIN32 - // On Windows, IPv6 might not be enabled. Try IPv4 as fallback. - std::cerr << "IPv6 socket creation failed (WSAGetLastError: " << WSAGetLastError() << "), trying IPv4..." << std::endl; - sockfd = ::socket( AF_INET, SOCK_STREAM, IPPROTO_TCP ); - if ( INVALID_SOCKET == sockfd ) - { - throw std::runtime_error( std::string("Server Constructor: Can't create socket (IPv4 or IPv6). WSAGetLastError: ") + std::to_string(WSAGetLastError()) ); - } - useIPv4 = true; -#else throw std::runtime_error( "Server Constructor: Can't create socket" ); -#endif } +#endif int retval = 0; From 90482142943a9a9bb2de2e80db1fdc637b67dfcb Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Fri, 31 Oct 2025 19:32:07 +0100 Subject: [PATCH 28/33] clean up PMU before the server is stopped on windows because the process is killed earlier Change-Id: Ied8931fa24f82bbf4fd3c98344f34086c01253dd --- src/pcm-sensor-server.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index f80b5cfe..0ebd4cf0 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -3325,11 +3325,11 @@ BOOL WINAPI SignalHandler::handleSignal( DWORD signum ) std::cerr << "handleSignal: signal " << signum << " caught.\n"; std::cerr << "handleSignal: closing socket " << networkSocket_ << "\n"; ::close( networkSocket_ ); + std::cerr << "Cleaning up PMU:\n"; + PCM::getInstance()->cleanup(); std::cerr << "Stopping HTTPServer\n"; if (httpServer_) httpServer_->stop(); - std::cerr << "Cleaning up PMU:\n"; - PCM::getInstance()->cleanup(); std::cerr << "handleSignal: exiting with exit code 1...\n"; exit(1); return TRUE; From e2aabcd4871a5cf6be23c3a0924fcb7006c024d3 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 17:41:38 +0000 Subject: [PATCH 29/33] Add --listen option to specify listening IP address for pcm-sensor-server - Added -l/--listen command-line option to accept IP address parameter - Updated startHTTPServer() and startHTTPSServer() to accept listenAddr parameter - Updated help text to document the new --listen option - Improved server startup messages to show binding address - Default behavior unchanged: empty string binds to all interfaces (0.0.0.0) - Examples: -l 127.0.0.1 for localhost only, -l 192.168.1.10 for specific IP Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 0ebd4cf0..7bb30ab4 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -3889,8 +3889,8 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } } -int startHTTPServer( unsigned short port ) { - HTTPServer server( "", port ); +int startHTTPServer( const std::string& listenAddr, unsigned short port ) { + HTTPServer server( listenAddr, port ); try { // HEAD is GET without body, we will remove the body in execute() server.registerCallback( HTTPRequestMethod::GET, my_get_callback ); @@ -3904,8 +3904,8 @@ int startHTTPServer( unsigned short port ) { } #if defined (USE_SSL) -int startHTTPSServer( unsigned short port, std::string const & cFile, std::string const & pkFile) { - HTTPSServer server( "", port ); +int startHTTPSServer( const std::string& listenAddr, unsigned short port, std::string const & cFile, std::string const & pkFile) { + HTTPSServer server( listenAddr, port ); try { server.setPrivateKeyFile ( pkFile ); server.setCertificateFile( cFile ); @@ -3932,6 +3932,7 @@ void printHelpText( std::string const & programName ) { std::cout << " -s : Use https protocol (default port " << DEFAULT_HTTPS_PORT << ")\n"; #endif std::cout << " -p portnumber : Run on port (default port is " << DEFAULT_HTTP_PORT << ")\n"; + std::cout << " -l|--listen address : Listen on IP address

      (default: all interfaces)\n"; std::cout << " -r|--reset : Reset programming of the performance counters.\n"; std::cout << " -D|--debug level : level = 0: no debug info, > 0 increase verbosity.\n"; #if !defined(__APPLE__) && !defined(_WIN32) @@ -3972,6 +3973,7 @@ int mainThrows(int argc, char * argv[]) { bool printTopology = false; unsigned short port = 0; unsigned short debug_level = 0; + std::string listenAddress = ""; // Empty string means listen on all interfaces std::string certificateFile; std::string privateKeyFile; AcceleratorCounterState *accs_ = AcceleratorCounterState::getInstance(); @@ -4008,6 +4010,14 @@ int mainThrows(int argc, char * argv[]) { throw std::runtime_error( "main: Error no port argument given" ); } } + else if ( check_argument_equals( argv[i], {"-l", "--listen"} ) ) + { + if ( (++i) < argc ) { + listenAddress = argv[i]; + } else { + throw std::runtime_error( "main: Error no listen address argument given" ); + } + } #if defined (USE_SSL) else if ( check_argument_equals( argv[i], {"-s"} ) ) { @@ -4292,15 +4302,17 @@ int mainThrows(int argc, char * argv[]) { if ( useSSL ) { if ( port == 0 ) port = DEFAULT_HTTPS_PORT; - std::cerr << "Starting SSL enabled server on https://localhost:" << port << "/\n"; - startHTTPSServer( port, certificateFile, privateKeyFile ); + std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; + std::cerr << "Starting SSL enabled server on https://" << displayAddr << ":" << port << "/\n"; + startHTTPSServer( listenAddress, port, certificateFile, privateKeyFile ); } else #endif { if ( port == 0 ) port = DEFAULT_HTTP_PORT; - std::cerr << "Starting plain HTTP server on http://localhost:" << port << "/\n"; - startHTTPServer( port ); + std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; + std::cerr << "Starting plain HTTP server on http://" << displayAddr << ":" << port << "/\n"; + startHTTPServer( listenAddress, port ); } delete pcmInstance; } else if ( pid > 0 ) { From 5f418711f20be7465190a5065215e2a3ab2c2d1b Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 17:48:09 +0000 Subject: [PATCH 30/33] Update documentation with --listen option usage examples Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- doc/PCM-EXPORTER.md | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/doc/PCM-EXPORTER.md b/doc/PCM-EXPORTER.md index 15ac3433..c8d4327e 100644 --- a/doc/PCM-EXPORTER.md +++ b/doc/PCM-EXPORTER.md @@ -20,6 +20,7 @@ Usage: ./pcm-sensor-server [OPTION] Valid Options: -d : Run in the background (Linux/macOS only) -p portnumber : Run on port (default port is 9738) + -l|--listen address : Listen on IP address
      (default: all interfaces) -r|--reset : Reset programming of the performance counters. -D|--debug level : level = 0: no debug info, > 0 increase verbosity. -R|--real-time : If possible the daemon will run with real time @@ -28,6 +29,19 @@ Valid Options: -h|--help : This information ``` +The `-l`/`--listen` option allows you to specify which IP address the server should bind to. This is useful in multi-homed servers, containerized deployments, or restricted monitoring networks: + +```bash +# Bind to localhost only (accessible only from the local machine) +sudo ./pcm-sensor-server -l 127.0.0.1 -p 9738 + +# Bind to a specific management network interface +sudo ./pcm-sensor-server -l 192.168.1.10 + +# Bind to all interfaces (default behavior) +sudo ./pcm-sensor-server +``` + ## Windows Support pcm-sensor-server now runs natively on Windows. Key points: From 62d6b93d17d2cfe292f80c1d0bcc5789e14ceae0 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 18:07:58 +0000 Subject: [PATCH 31/33] Add IP address validation in command-line parsing - Added isValidIPAddress() function to validate IPv4/IPv6 addresses - Validation uses inet_pton() to check address format before passing to Server - Provides clear error message for invalid addresses at command-line parsing stage - Addresses code review feedback to validate user input early Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 7bb30ab4..c0cd7818 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -3922,6 +3922,27 @@ int startHTTPSServer( const std::string& listenAddr, unsigned short port, std::s } #endif +// Validate IP address string (IPv4 or IPv6) +bool isValidIPAddress( const std::string& ipAddress ) { + if ( ipAddress.empty() ) { + return true; // Empty string is valid - means bind to all interfaces + } + + // Try IPv4 first + struct sockaddr_in sa4; + if ( 1 == ::inet_pton( AF_INET, ipAddress.c_str(), &(sa4.sin_addr) ) ) { + return true; + } + + // Try IPv6 + struct sockaddr_in6 sa6; + if ( 1 == ::inet_pton( AF_INET6, ipAddress.c_str(), &(sa6.sin6_addr) ) ) { + return true; + } + + return false; +} + void printHelpText( std::string const & programName ) { std::cout << "Usage: " << programName << " [OPTION]\n\n"; std::cout << "Valid Options:\n"; @@ -4014,6 +4035,11 @@ int mainThrows(int argc, char * argv[]) { { if ( (++i) < argc ) { listenAddress = argv[i]; + if ( !isValidIPAddress( listenAddress ) ) { + std::cerr << "Error: Invalid IP address '" << listenAddress << "'. "; + std::cerr << "Please provide a valid IPv4 or IPv6 address.\n"; + exit( 1 ); + } } else { throw std::runtime_error( "main: Error no listen address argument given" ); } From cd0d604445bac5766cbae5c5ac2ae800c8649090 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Wed, 12 Nov 2025 17:15:37 +0000 Subject: [PATCH 32/33] Add IPv4 command line option for pcm-sensor-server on non-Windows OS Co-authored-by: rdementi <25432609+rdementi@users.noreply.github.com> --- src/pcm-sensor-server.cpp | 48 ++++++++++++++++++++++++++++----------- 1 file changed, 35 insertions(+), 13 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index c0cd7818..7c36a123 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1388,7 +1388,7 @@ typedef basic_socketstream wsocketstream; class Server { public: Server() = delete; - Server( const std::string & listenIP, uint16_t port ) noexcept( false ) : listenIP_(listenIP), wq_( WorkQueue::getInstance() ), port_( port ) { + Server( const std::string & listenIP, uint16_t port, bool useIPv4 = false ) noexcept( false ) : listenIP_(listenIP), wq_( WorkQueue::getInstance() ), port_( port ), useIPv4_( useIPv4 ) { DBG( 3, "Initializing Server" ); #ifdef _WIN32 // Initialize Winsock on Windows @@ -1446,10 +1446,21 @@ class Server { } useIPv4 = true; #else - socket_t sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); - if ( INVALID_SOCKET == sockfd ) - { - throw std::runtime_error( "Server Constructor: Can't create socket" ); + // On non-Windows systems, use IPv6 by default unless IPv4 is explicitly requested + useIPv4 = useIPv4_; + socket_t sockfd; + if ( useIPv4 ) { + sockfd = ::socket( AF_INET, SOCK_STREAM, 0 ); + if ( INVALID_SOCKET == sockfd ) + { + throw std::runtime_error( "Server Constructor: Can't create IPv4 socket" ); + } + } else { + sockfd = ::socket( AF_INET6, SOCK_STREAM, 0 ); + if ( INVALID_SOCKET == sockfd ) + { + throw std::runtime_error( "Server Constructor: Can't create IPv6 socket" ); + } } #endif @@ -1526,6 +1537,7 @@ class Server { WorkQueue* wq_; socket_t serverSocket_; uint16_t port_; + bool useIPv4_; }; enum HTTPRequestMethod { @@ -3200,7 +3212,7 @@ class HTTPServer : public Server { SignalHandler::getInstance()->setHTTPServer( this ); } - HTTPServer( std::string const & ip, uint16_t port ) : Server( ip, port ), stopped_( false ) { + HTTPServer( std::string const & ip, uint16_t port, bool useIPv4 = false ) : Server( ip, port, useIPv4 ), stopped_( false ) { DBG( 3, "HTTPServer::HTTPServer( ip=", ip, ", port=", port, " )" ); callbackList_.resize( 256 ); createPeriodicCounterFetcher(); @@ -3455,7 +3467,7 @@ void HTTPServer::run() { class HTTPSServer : public HTTPServer { public: HTTPSServer() : HTTPServer( "", 443 ) {} - HTTPSServer( std::string const & ip, uint16_t port ) : HTTPServer( ip, port ), sslCTX_( nullptr ) {} + HTTPSServer( std::string const & ip, uint16_t port, bool useIPv4 = false ) : HTTPServer( ip, port, useIPv4 ), sslCTX_( nullptr ) {} HTTPSServer( HTTPSServer const & ) = delete; HTTPSServer & operator = ( HTTPSServer const & ) = delete; virtual ~HTTPSServer() { @@ -3889,8 +3901,8 @@ void my_get_callback( HTTPServer* hs, HTTPRequest const & req, HTTPResponse & re } } -int startHTTPServer( const std::string& listenAddr, unsigned short port ) { - HTTPServer server( listenAddr, port ); +int startHTTPServer( const std::string& listenAddr, unsigned short port, bool useIPv4 = false ) { + HTTPServer server( listenAddr, port, useIPv4 ); try { // HEAD is GET without body, we will remove the body in execute() server.registerCallback( HTTPRequestMethod::GET, my_get_callback ); @@ -3904,8 +3916,8 @@ int startHTTPServer( const std::string& listenAddr, unsigned short port ) { } #if defined (USE_SSL) -int startHTTPSServer( const std::string& listenAddr, unsigned short port, std::string const & cFile, std::string const & pkFile) { - HTTPSServer server( listenAddr, port ); +int startHTTPSServer( const std::string& listenAddr, unsigned short port, std::string const & cFile, std::string const & pkFile, bool useIPv4 = false ) { + HTTPSServer server( listenAddr, port, useIPv4 ); try { server.setPrivateKeyFile ( pkFile ); server.setCertificateFile( cFile ); @@ -3954,6 +3966,9 @@ void printHelpText( std::string const & programName ) { #endif std::cout << " -p portnumber : Run on port (default port is " << DEFAULT_HTTP_PORT << ")\n"; std::cout << " -l|--listen address : Listen on IP address
      (default: all interfaces)\n"; +#ifndef _WIN32 + std::cout << " -4|--ipv4 : Use IPv4 instead of IPv6 (non-Windows only)\n"; +#endif std::cout << " -r|--reset : Reset programming of the performance counters.\n"; std::cout << " -D|--debug level : level = 0: no debug info, > 0 increase verbosity.\n"; #if !defined(__APPLE__) && !defined(_WIN32) @@ -3992,6 +4007,7 @@ int mainThrows(int argc, char * argv[]) { #endif bool forceRTMAbortMode = false; bool printTopology = false; + bool useIPv4 = false; unsigned short port = 0; unsigned short debug_level = 0; std::string listenAddress = ""; // Empty string means listen on all interfaces @@ -4044,6 +4060,12 @@ int mainThrows(int argc, char * argv[]) { throw std::runtime_error( "main: Error no listen address argument given" ); } } +#ifndef _WIN32 + else if ( check_argument_equals( argv[i], {"-4", "--ipv4"} ) ) + { + useIPv4 = true; + } +#endif #if defined (USE_SSL) else if ( check_argument_equals( argv[i], {"-s"} ) ) { @@ -4330,7 +4352,7 @@ int mainThrows(int argc, char * argv[]) { port = DEFAULT_HTTPS_PORT; std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; std::cerr << "Starting SSL enabled server on https://" << displayAddr << ":" << port << "/\n"; - startHTTPSServer( listenAddress, port, certificateFile, privateKeyFile ); + startHTTPSServer( listenAddress, port, certificateFile, privateKeyFile, useIPv4 ); } else #endif { @@ -4338,7 +4360,7 @@ int mainThrows(int argc, char * argv[]) { port = DEFAULT_HTTP_PORT; std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; std::cerr << "Starting plain HTTP server on http://" << displayAddr << ":" << port << "/\n"; - startHTTPServer( listenAddress, port ); + startHTTPServer( listenAddress, port, useIPv4 ); } delete pcmInstance; } else if ( pid > 0 ) { From e1a3e3d4a506cfb4c4137525e87bf903aea3369c Mon Sep 17 00:00:00 2001 From: "Dementiev, Roman" Date: Wed, 12 Nov 2025 18:35:01 +0100 Subject: [PATCH 33/33] improve messages Change-Id: I09fd8ac412a48509d3f11647ac5e189c609ee0f9 --- src/pcm-sensor-server.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/pcm-sensor-server.cpp b/src/pcm-sensor-server.cpp index 7c36a123..febbf2a1 100644 --- a/src/pcm-sensor-server.cpp +++ b/src/pcm-sensor-server.cpp @@ -1480,7 +1480,7 @@ class Server { { DBG( 3, "close clientsocketFD" ); ::close(sockfd); - throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); + throw std::runtime_error(std::string("Server Constructor: Cannot convert IP string ") + listenIP_ + " to IPv4 address"); } } socklen_t len = sizeof( struct sockaddr_in ); @@ -1502,7 +1502,7 @@ class Server { #else ::close(sockfd); #endif - throw std::runtime_error( "Server Constructor: Cannot convert IP string" ); + throw std::runtime_error( std::string("Server Constructor: Cannot convert IP string ") + listenIP_ + " to IPv6 address" ); } } socklen_t len = sizeof( struct sockaddr_in6 ); @@ -4350,7 +4350,7 @@ int mainThrows(int argc, char * argv[]) { if ( useSSL ) { if ( port == 0 ) port = DEFAULT_HTTPS_PORT; - std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; + std::string displayAddr = listenAddress.empty() ? "localhost" : listenAddress; std::cerr << "Starting SSL enabled server on https://" << displayAddr << ":" << port << "/\n"; startHTTPSServer( listenAddress, port, certificateFile, privateKeyFile, useIPv4 ); } else @@ -4358,7 +4358,7 @@ int mainThrows(int argc, char * argv[]) { { if ( port == 0 ) port = DEFAULT_HTTP_PORT; - std::string displayAddr = listenAddress.empty() ? "all interfaces" : listenAddress; + std::string displayAddr = listenAddress.empty() ? "localhost" : listenAddress; std::cerr << "Starting plain HTTP server on http://" << displayAddr << ":" << port << "/\n"; startHTTPServer( listenAddress, port, useIPv4 ); }

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