CLX push

.gitignore

@@ -27,3 +27,4 @@ Release64
 .metadata/
 html/
 latex/
+*.swp

pcm-core.cpp

@@ -295,6 +295,7 @@ int main(int argc, char * argv[])
 	bool show_partial_core_output = false;
 	std::bitset<MAX_CORES> ycores;
 
+
         PCM * m = PCM::getInstance();
 
 	conf.fixedCfg = NULL; // default

pcm-sensor.cpp

@@ -70,6 +70,8 @@ int main()
             for (uint32 a = 0; a < counters.getNumSockets(); ++a) {
                 cout << "Socket" << a << "/BytesReadFromMC\tfloat" << endl;
                 cout << "Socket" << a << "/BytesWrittenToMC\tfloat" << endl;
+                cout << "Socket" << a << "/BytesReadFromPMM\tfloat" << endl;
+                cout << "Socket" << a << "/BytesWrittenToPMM\tfloat" << endl;
                 cout << "Socket" << a << "/Frequency\tfloat" << endl;
                 cout << "Socket" << a << "/IPC\tfloat" << endl;
                 cout << "Socket" << a << "/L2CacheHitRatio\tfloat" << endl;
@@ -258,6 +260,13 @@ int main()
                 cout << "read from MC Socket" << i << "\t0\t\tGB" << endl;
             }
         }
+        for (uint32 i = 0; i < counters.getNumSockets(); ++i) {
+            stringstream c;
+            c << "Socket" << i << "/BytesReadFromPMM?";
+            if (s == c.str()) {
+                cout << "read from PMM memory on Socket" << i << "\t0\t\tGB" << endl;
+            }
+        }
         for (uint32 i = 0; i < counters.getNumSockets(); ++i) {
             stringstream c;
             c << "Socket" << i << "/DRAMEnergy?";
@@ -337,9 +346,9 @@ int main()
         }
         for (uint32 i = 0; i < counters.getNumSockets(); ++i) {
             stringstream c;
-            c << "Socket" << i << "/BytesWrittenToMC?";
+            c << "Socket" << i << "/BytesWrittenToPMM?";
             if (s == c.str()) {
-                cout << "written to MC Socket" << i << "\t0\t\tGB" << endl;
+                cout << "written to PMM memory on Socket" << i << "\t0\t\tGB" << endl;
                 //cout << "CPU" << i << "\tBytes written to memory channel\t0\t1\t GB" << endl;
             }
         }
@@ -613,6 +622,8 @@ int main()
         OUTPUT_SOCKET_METRIC("/ThermalHeadroom", (counters.getSocket<int32, ::getThermalHeadroom>(i)))
         OUTPUT_SOCKET_METRIC("/BytesReadFromMC", (double(counters.getSocket<uint64, ::getBytesReadFromMC>(i)) / 1024 / 1024 / 1024))
         OUTPUT_SOCKET_METRIC("/BytesWrittenToMC", (double(counters.getSocket<uint64, ::getBytesWrittenToMC>(i)) / 1024 / 1024 / 1024))
+        OUTPUT_SOCKET_METRIC("/BytesReadFromPMM", (double(counters.getSocket<uint64, ::getBytesReadFromPMM>(i)) / 1024 / 1024 / 1024))
+        OUTPUT_SOCKET_METRIC("/BytesWrittenToPMM", (double(counters.getSocket<uint64, ::getBytesWrittenToPMM>(i)) / 1024 / 1024 / 1024))
         OUTPUT_SOCKET_METRIC("/Frequency", (counters.getSocket<double, ::getAverageFrequency>(i) / 1000000))
         OUTPUT_SOCKET_METRIC("/IPC", (counters.getSocket<double, ::getIPC>(i)))
         OUTPUT_SOCKET_METRIC("/L2CacheHitRatio", (counters.getSocket<double, ::getL2CacheHitRatio>(i)))

pcm.cpp

@@ -179,6 +179,8 @@ void print_output(PCM * m,
     if (m->memoryTrafficMetricsAvailable()) cout << " READ  : bytes read from main memory controller (in GBytes)" << "\n";
     if (m->memoryTrafficMetricsAvailable()) cout << " WRITE : bytes written to main memory controller (in GBytes)" << "\n";
     if (m->LLCReadMissLatencyMetricsAvailable()) cout << "LLCRDMISSLAT: average latency of last level cache miss for reads and prefetches (in ns)";
+    if (m->PMMTrafficMetricsAvailable()) cout << " PMM RD : bytes read from PMM memory (in GBytes)" << "\n";
+    if (m->PMMTrafficMetricsAvailable()) cout << " PMM WR : bytes written to PMM memory (in GBytes)" << "\n";
     if (m->MCDRAMmemoryTrafficMetricsAvailable()) cout << " MCDRAM READ  : bytes read from MCDRAM controller (in GBytes)" << "\n";
     if (m->MCDRAMmemoryTrafficMetricsAvailable()) cout << " MCDRAM WRITE : bytes written to MCDRAM controller (in GBytes)" << "\n";
     if (m->memoryIOTrafficMetricAvailable()) cout << " IO    : bytes read/written due to IO requests to memory controller (in GBytes); this may be an over estimate due to same-cache-line partial requests" << "\n";
@@ -345,7 +347,6 @@ void print_output(PCM * m,
         {
             cout << "\n" << "Intel(r) "<< m->xPI() <<" traffic estimation in bytes (data and non-data traffic outgoing from CPU/socket through "<< m->xPI() <<" links):" << "\n" << "\n";
 
-
             const uint32 qpiLinks = (uint32)m->getQPILinksPerSocket();
 
             cout << "              ";
@@ -381,6 +382,8 @@ void print_output(PCM * m,
         cout << "MEM (GB)->|";
         if (m->memoryTrafficMetricsAvailable())
             cout << "  READ |  WRITE |";
+        if (m->PMMTrafficMetricsAvailable())
+            cout << " PMM RD | PMM WR |";
         if (m->MCDRAMmemoryTrafficMetricsAvailable())
             cout << " MCDRAM READ | MCDRAM WRITE |";
         if (m->memoryIOTrafficMetricAvailable())
@@ -399,6 +402,9 @@ void print_output(PCM * m,
                 if (m->memoryTrafficMetricsAvailable())
                     cout << "    " << setw(5) << getBytesReadFromMC(sktstate1[i], sktstate2[i]) / double(1e9) <<
                             "    " << setw(5) << getBytesWrittenToMC(sktstate1[i], sktstate2[i]) / double(1e9);
+                if (m->PMMTrafficMetricsAvailable())
+                    cout << "     " << setw(5) << getBytesReadFromPMM(sktstate1[i], sktstate2[i]) / double(1e9) <<
+                            "     " << setw(5) << getBytesWrittenToPMM(sktstate1[i], sktstate2[i]) / double(1e9);
                 if (m->MCDRAMmemoryTrafficMetricsAvailable())
                     cout << "   " << setw(11) << getBytesReadFromEDC(sktstate1[i], sktstate2[i]) / double(1e9) <<
                             "    " << setw(11) << getBytesWrittenToEDC(sktstate1[i], sktstate2[i]) / double(1e9);
@@ -424,6 +430,9 @@ void print_output(PCM * m,
             if (m->memoryTrafficMetricsAvailable())
                 cout << "    " << setw(5) << getBytesReadFromMC(sstate1, sstate2) / double(1e9) <<
                         "    " << setw(5) << getBytesWrittenToMC(sstate1, sstate2) / double(1e9);
+            if (m->PMMTrafficMetricsAvailable())
+                cout << "     " << setw(5) << getBytesReadFromPMM(sstate1, sstate2) / double(1e9) <<
+                        "     " << setw(5) << getBytesWrittenToPMM(sstate1, sstate2) / double(1e9);
             if (m->memoryIOTrafficMetricAvailable())
                 cout << "    " << setw(5) << getIORequestBytesFromMC(sstate1, sstate2) / double(1e9);
             cout << "     ";
@@ -499,6 +508,9 @@ void print_csv_header(PCM * m,
         if (m->memoryTrafficMetricsAvailable())
             cout << ";;";
 
+    if (m->PMMTrafficMetricsAvailable())
+        cout << ";;";
+
         if (m->MCDRAMmemoryTrafficMetricsAvailable())
             cout << ";;";
 
@@ -540,6 +552,8 @@ void print_csv_header(PCM * m,
                 cout << ";";
             if (m->memoryTrafficMetricsAvailable())
                 cout << ";;";
+            if (m->PMMTrafficMetricsAvailable())
+                 cout << ";;";
             if (m->MCDRAMmemoryTrafficMetricsAvailable())
                 cout << ";;";
         }
@@ -639,6 +653,9 @@ void print_csv_header(PCM * m,
         if (m->memoryTrafficMetricsAvailable())
                 cout << "READ;WRITE;";
 
+        if (m->PMMTrafficMetricsAvailable())
+            cout << "PMM_RD;PMM_WR;";
+
         if (m->MCDRAMmemoryTrafficMetricsAvailable())
                 cout << "MCDRAM_READ;MCDRAM_WRITE;";
 
@@ -680,6 +697,8 @@ void print_csv_header(PCM * m,
                  cout << "RMB;";
              if (m->memoryTrafficMetricsAvailable())
                  cout << "READ;WRITE;";
+             if (m->PMMTrafficMetricsAvailable())
+                 cout << "PMM_RD;PMM_WR;";
              if (m->MCDRAMmemoryTrafficMetricsAvailable())
                  cout << "MCDRAM_READ;MCDRAM_WRITE;";
              cout << "TEMP;";
@@ -835,6 +854,10 @@ void print_csv(PCM * m,
                 cout << getBytesReadFromMC(sstate1, sstate2) / double(1e9) <<
                 ';' << getBytesWrittenToMC(sstate1, sstate2) / double(1e9) << ';';
 
+        if (m->PMMTrafficMetricsAvailable())
+            cout << getBytesReadFromPMM(sstate1, sstate2) / double(1e9) <<
+            ';' << getBytesWrittenToPMM(sstate1, sstate2) / double(1e9) << ';';
+
         if (m->MCDRAMmemoryTrafficMetricsAvailable())
                 cout << getBytesReadFromEDC(sstate1, sstate2) / double(1e9) <<
                 ';' << getBytesWrittenToEDC(sstate1, sstate2) / double(1e9) << ';';
@@ -880,6 +903,9 @@ void print_csv(PCM * m,
             if (m->memoryTrafficMetricsAvailable())
                 cout << ';' << getBytesReadFromMC(sktstate1[i], sktstate2[i]) / double(1e9) <<
                     ';' << getBytesWrittenToMC(sktstate1[i], sktstate2[i]) / double(1e9);
+            if (m->PMMTrafficMetricsAvailable())
+                cout << ';' << getBytesReadFromPMM(sktstate1[i], sktstate2[i]) / double(1e9) <<
+                ';' << getBytesWrittenToPMM(sktstate1[i], sktstate2[i]) / double(1e9);
             if (m->MCDRAMmemoryTrafficMetricsAvailable())
                 cout << ';' << getBytesReadFromEDC(sktstate1[i], sktstate2[i]) / double(1e9) <<
                 ';' << getBytesWrittenToEDC(sktstate1[i], sktstate2[i]) / double(1e9);

types.h

@@ -574,7 +574,6 @@ struct BecktonUncorePMUCNTCTLRegister
 #define KNL_EDC7_ECLK_REGISTER_DEV_ADDR (31)
 #define KNL_EDC7_ECLK_REGISTER_FUNC_ADDR (2)
 
-
 /**
  * XPF_ for Xeons: SNB, IVT, HSX, BDW, etc.
  * KNX_ for Xeon Phi (Knights *) processors
@@ -651,6 +650,26 @@ struct BecktonUncorePMUCNTCTLRegister
 #define QPI_PORT1_MISC_REGISTER_FUNC_ADDR (0)
 #define QPI_PORT2_MISC_REGISTER_FUNC_ADDR (0)
 
+#define SKX_M2M_0_REGISTER_DEV_ADDR  (8)
+#define SKX_M2M_0_REGISTER_FUNC_ADDR (0)
+#define SKX_M2M_1_REGISTER_DEV_ADDR  (9)
+#define SKX_M2M_1_REGISTER_FUNC_ADDR (0)
+
+#define M2M_PCI_PMON_BOX_CTL_ADDR (0x258)
+
+#define M2M_PCI_PMON_CTL0_ADDR (0x228)
+#define M2M_PCI_PMON_CTL1_ADDR (0x230)
+#define M2M_PCI_PMON_CTL2_ADDR (0x238)
+#define M2M_PCI_PMON_CTL3_ADDR (0x240)
+
+#define M2M_PCI_PMON_CTR0_ADDR (0x200)
+#define M2M_PCI_PMON_CTR1_ADDR (0x208)
+#define M2M_PCI_PMON_CTR2_ADDR (0x210)
+#define M2M_PCI_PMON_CTR3_ADDR (0x218)
+
+#define PCM_INVALID_DEV_ADDR (~(uint32)0UL)
+#define PCM_INVALID_FUNC_ADDR (~(uint32)0UL)
+
 #define Q_P_PCI_PMON_BOX_CTL_ADDR (0x0F4)
 
 #define Q_P_PCI_PMON_CTL3_ADDR (0x0E4)
@@ -847,6 +866,15 @@ struct BecktonUncorePMUCNTCTLRegister
 #define IIO_MSR_PMON_CTL_CH_MASK(x) ((x) << 36ULL)
 #define IIO_MSR_PMON_CTL_FC_MASK(x) ((x) << 44ULL)
 
+#define M2M_PCI_PMON_CTL_EVENT(x)   ((x) << 0)
+#define M2M_PCI_PMON_CTL_UMASK(x)   ((x) << 8)
+#define M2M_PCI_PMON_CTL_RST        (1 << 17)
+#define M2M_PCI_PMON_CTL_EDGE_DET   (1 << 18)
+#define M2M_PCI_PMON_CTL_OV_EN      (1 << 20)
+#define M2M_PCI_PMON_CTL_EN         (1 << 22)
+#define M2M_PCI_PMON_CTL_INVERT     (1 << 23)
+#define M2M_PCI_PMON_CTL_THRESH(x)  ((x) << 24ULL)
+
 #define UCLK_FIXED_CTL_OV_EN (1 << 20)
 #define UCLK_FIXED_CTL_EN    (1 << 22)