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Fix cache segfaults due to unaligned atomics on 32b architectures #75
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@@ -244,7 +244,7 @@ func (c *lruCache) SetWithExpiration(key interface{}, value interface{}, expirat | |||
ent.value = value | |||
ent.expiration = exp | |||
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atomic.AddUint64(&c.stats.Writes, 1) | |||
c.stats.Writes++ |
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This was the only place that was using an atomic increment against c.stats
. It wasn't clear why the atomic increment was necessary.
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Hmmm, seems like a leftover, probably from cloning the ttlCache.go code initially.
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Forgot to point out earlier that this is also within c.Lock()
/ok-to-test |
Anything else needed here? This has been idle for a while. |
Environment where the issue was encountered:
Linux pi-03 4.19.66-v7l+ #1253 SMP Thu Aug 15 12:02:08 BST 2019 armv7l GNU/Linux
Per the atomic library docs:
I was able to reproduce the segfault with the following test code (
main.go
):The above can be built as a static ARM7 binary via the following
go build
command:Error 1: atomic increment of unaligned within lock in
lruCache.go
, fix was to just remove the atomic increment since it's within a lock and none of the other stats do this:Error 2: unaligned
baseTimeNanos
inttlCache.go
, fix was to move the value to the start of the type to ensure alignment as recommended byatomic
docs:After both fixes: