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Fix cache segfaults due to unaligned atomics on 32b architectures #75
Environment where the issue was encountered:
Per the atomic library docs:
I was able to reproduce the segfault with the following test code (
The above can be built as a static ARM7 binary via the following
Error 1: atomic increment of unaligned within lock in
Error 2: unaligned
After both fixes:
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Hi @nickbp. Thanks for your PR.
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