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Added a 'latency model' option to configuration.

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1 parent 3483d2c commit 7ba0bac2544d02ea937499a0c7d6cb1b4f46440d @jameshanlon committed Jan 31, 2012
Showing with 75 additions and 43 deletions.
  1. +35 −11 Config.cpp
  2. +21 −8 Config.h
  3. +16 −12 LatencyModel.cpp
  4. +1 −9 LatencyModel.h
  5. +2 −3 main.cpp
View
46 Config.cpp
@@ -5,7 +5,7 @@
#include "Config.h"
#define BUF_LEN 1000
-#define READ_PARAM(key, var) \
+#define READ_VAL_PARAM(key, var) \
do { \
if (!strncmp(key, line, strlen(key))) { \
sscanf(line, key " %[(:-~)*]%u", str, &(var)); \
@@ -22,6 +22,7 @@ do { \
int Config::read(const std::string &file) {
FILE *fp = fopen(file.c_str(), "r");
char line[BUF_LEN];
+ char junk[BUF_LEN];
char str[BUF_LEN];
if(!fp) {
@@ -31,19 +32,41 @@ int Config::read(const std::string &file) {
// Read configuration parameters
while(fscanf(fp, "%[^\n]\n", line) != EOF) {
- READ_PARAM("ram-size-log", ramSizeLog);
- READ_PARAM("switches-per-chip", switchesPerChip);
- READ_PARAM("cores-per-switch", coresPerSwitch);
- READ_PARAM("latency-memory", latencyMemory);
- READ_PARAM("latency-switch", latencySwitch);
- READ_PARAM("latency-thread", latencyThread);
- READ_PARAM("latency-on-chip", latencyOnChip);
- READ_PARAM("latency-off-chip", latencyOffChip);
+ READ_VAL_PARAM("ram-size-log", ramSizeLog);
+ READ_VAL_PARAM("switches-per-chip", switchesPerChip);
+ READ_VAL_PARAM("cores-per-switch", coresPerSwitch);
+ READ_VAL_PARAM("latency-memory", latencyMemory);
+ READ_VAL_PARAM("latency-switch", latencySwitch);
+ READ_VAL_PARAM("latency-thread", latencyThread);
+ READ_VAL_PARAM("latency-on-chip", latencyOnChip);
+ READ_VAL_PARAM("latency-off-chip", latencyOffChip);
+ if (!strncmp("latency-model", line, strlen("latency-model"))) {
+ sscanf(line, "latency-model%[^\"]\"%[(:-~)*]\"", junk, str);
+ if (!strncmp("sp-2dmesh", str, strlen("sp-2dmesh"))) {
+ latencyModelType = SP_2DMESH;
+ }
+ if (!strncmp("sp-2dtorus", str, strlen("sp-2dtorus"))) {
+ latencyModelType = SP_2DTORUS;
+ }
+ if (!strncmp("sp-hypercube", str, strlen("sp-hypercube"))) {
+ latencyModelType = SP_HYPERCUBE;
+ }
+ if (!strncmp("sp-clos", str, strlen("sp-clos"))) {
+ latencyModelType = SP_CLOS;
+ }
+ if (!strncmp("sp-fattree", str, strlen("sp-fattree"))) {
+ latencyModelType = SP_FATTREE;
+ }
+ else {
+ std::cout << "ERROR: Invalid latency model.\n";
+ return 0;
+ }
+ continue;
+ }
}
- // Calculate consequential parameters
+ // (Re)calculate consequential parameters
ramSize = 1 << ramSizeLog;
- ramBase = 1 << DEFAULT_RAM_SIZE_LOG;
coresPerChip = switchesPerChip * coresPerSwitch;
return 1;
@@ -62,5 +85,6 @@ void Config::display() {
PRINT_PARAM("Latency thread", latencyThread);
PRINT_PARAM("Latency on-chip", latencyOnChip);
PRINT_PARAM("Latency off-chip", latencyOffChip);
+ PRINT_PARAM("Latency model", latencyModelType);
}
View
29 Config.h
@@ -106,6 +106,14 @@ typedef uint64_t ticks_t;
class Config {
public:
+ enum tLatencyModel {
+ SP_2DMESH,
+ SP_2DTORUS,
+ SP_HYPERCUBE,
+ SP_CLOS,
+ SP_FATTREE,
+ NONE
+ };
uint32_t ramSizeLog;
uint32_t ramSize;
uint32_t ramBase;
@@ -117,17 +125,22 @@ class Config {
unsigned latencyThread;
unsigned latencyOnChip;
unsigned latencyOffChip;
+ tLatencyModel latencyModelType;
Config() {
// Set defaults
- ramSizeLog = DEFAULT_RAM_SIZE_LOG;
- switchesPerChip = DEFAULT_SWITCHES_PER_CHIP;
- coresPerSwitch = DEFAULT_CORES_PER_SWITCH;
- latencyMemory = 0;
- latencySwitch = 0;
- latencyThread = 0;
- latencyOnChip = 0;
- latencyOffChip = 0;
+ ramSizeLog = DEFAULT_RAM_SIZE_LOG;
+ ramSize = 1 << ramSizeLog;
+ ramBase = 1 << DEFAULT_RAM_SIZE_LOG;
+ switchesPerChip = DEFAULT_SWITCHES_PER_CHIP;
+ coresPerSwitch = DEFAULT_CORES_PER_SWITCH;
+ coresPerChip = switchesPerChip * coresPerSwitch;
+ latencyMemory = 0;
+ latencySwitch = 0;
+ latencyThread = 0;
+ latencyOnChip = 0;
+ latencyOffChip = 0;
+ latencyModelType = NONE;
}
int read(const std::string &file);
void display();
View
28 LatencyModel.cpp
@@ -3,7 +3,6 @@
#include <cmath>
#include <algorithm>
#include "LatencyModel.h"
-#include "Config.h"
/*
* n := number of processors
@@ -17,8 +16,8 @@
#define MAX_CACHED 100000
//#define DEBUG
-LatencyModel::LatencyModel(const Config &cfg, ModelType type, int numCores) :
- cfg(cfg), type(type), numCores(numCores) {
+LatencyModel::LatencyModel(const Config &cfg, int numCores) :
+ cfg(cfg), numCores(numCores) {
switchDim = (int) sqrt(cfg.switchesPerChip);
chipsDim = (numCores/cfg.coresPerSwitch) / switchDim;
#ifdef DEBUG
@@ -65,10 +64,10 @@ int LatencyModel::calc2DArray(int s, int t) {
int onChipX, onChipY, offChipX, offChipY;
int latency;
- switch(type) {
+ switch(cfg.latencyModelType) {
default: assert(0);
- case SP_MESH:
+ case Config::SP_2DMESH:
// Inter-thread
if (s == t) {
latency = cfg.latencyThread;
@@ -100,7 +99,7 @@ int LatencyModel::calc2DArray(int s, int t) {
cfg.latencyOffChip * (offChipX + offChipY);
break;
- case SP_TORUS:
+ case Config::SP_2DTORUS:
// Inter-thread
if (s == t) {
latency = cfg.latencyThread;
@@ -161,24 +160,29 @@ ticks_t LatencyModel::calc(int s, int t) {
int latency;
- switch(type) {
+ switch(cfg.latencyModelType) {
default: assert(0);
- case NONE:
+ case Config::NONE:
latency = 0;
break;
- case SP_MESH:
- case SP_TORUS:
+ case Config::SP_2DMESH:
+ case Config::SP_2DTORUS:
latency = calc2DArray(s, t);
break;
- case SP_CLOS:
+ case Config::SP_HYPERCUBE:
+ // TODO
+ latency = 0;
+ break;
+
+ case Config::SP_CLOS:
// Roughly
latency = cfg.latencySwitch + (2 * cfg.latencyOffChip);
break;
- case SP_FATTREE:
+ case Config::SP_FATTREE:
// TODO
latency = 0;
break;
View
10 LatencyModel.h
@@ -6,19 +6,11 @@
class LatencyModel {
public:
- enum ModelType {
- SP_MESH,
- SP_TORUS,
- SP_CLOS,
- SP_FATTREE,
- NONE
- };
- LatencyModel(const Config &cfg, ModelType type, int numCores);
+ LatencyModel(const Config &cfg, int numCores);
ticks_t calc(int s, int t);
private:
const Config &cfg;
- ModelType type;
int numCores;
std::map<std::pair<int, int>, ticks_t> cache;
// Dimensions for mesh and tori
View
5 main.cpp
@@ -930,7 +930,7 @@ createSystemFromConfig(const Config &cfg, const char *filename,
xmlNode *root = xmlDocGetRootElement(doc);
xmlNode *system = findChild(root, "System");
xmlNode *nodes = findChild(system, "Nodes");
- LatencyModel *latencyModel = new LatencyModel(cfg, LatencyModel::NONE, 0);
+ LatencyModel *latencyModel = new LatencyModel(cfg, 0);
std::auto_ptr<SystemState> systemState(new SystemState(cfg));
std::map<long,Node*> nodeNumberMap;
for (xmlNode *child = nodes->children; child; child = child->next) {
@@ -1037,8 +1037,7 @@ readXE(const Config &cfg, const char *filename, SymbolInfo &SI,
static inline std::auto_ptr<SystemState>
createSESystem(const Config &cfg, const char *filename, int numCores)
{
- LatencyModel *latencyModel = new LatencyModel(cfg,
- LatencyModel::SP_TORUS, numCores);
+ LatencyModel *latencyModel = new LatencyModel(cfg, numCores);
std::auto_ptr<SystemState> systemState(new SystemState(cfg));
std::map<long, Node*> nodeNumberMap;

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