diff --git a/code/.scala_dependencies b/code/.scala_dependencies index f595e61..08f2d7c 100644 --- a/code/.scala_dependencies +++ b/code/.scala_dependencies @@ -30,18 +30,15 @@ /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/Consumer.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ConsumerBarrier.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AlertException.scala -/Users/jallen/sandbox/disruptor/sdisruptor/code/src/test/scala/com/jamieallen/sdisruptor/support/StubEntry.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala -/Users/jallen/sandbox/disruptor/sdisruptor/code/src/test/scala/com/jamieallen/sdisruptor/support/StubEntry.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryFactory.scala -/Users/jallen/sandbox/disruptor/sdisruptor/code/src/test/scala/com/jamieallen/sdisruptor/support/StubEntry.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/test/scala/com/jamieallen/sdisruptor/support/StubEntry.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceBatch.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceBatch.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryTranslator.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryTranslator.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryTranslator.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/FatalExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ExceptionHandler.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/FatalExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/FatalExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/FatalExceptionHandler.scala +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackerCallback.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala -/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackerCallback.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/BatchHandler.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/NoOpConsumer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/NoOpConsumer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala @@ -69,3 +66,51 @@ /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala ------- +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/RingBuffer$$anonfun$nextEntries$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/RingBuffer.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/RingBuffer$ConsumerTrackingConsumerBarrier.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/RingBuffer$$anonfun$fill$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ExceptionHandler.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ConsumerBarrier.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ConsumerBarrier.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AlertException.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/AlertException$.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AlertException.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/AlertException.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryFactory.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/EntryFactory.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/IgnoreExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/IgnoreExceptionHandler.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/Consumer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/Consumer.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/LifecycleAware.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/LifecycleAware.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ProducerBarrier.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ProducerBarrier.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$BlockingStrategy$$anonfun$waitFor$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$BusySpinStrategy$$anonfun$waitFor$2.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$BlockingStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$BusySpinStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$YieldingStrategy$$anonfun$waitFor$4.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$YieldingStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$BusySpinStrategy$$anonfun$waitFor$3.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/WaitStrategy$YieldingStrategy$$anonfun$waitFor$5.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceBatch.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/SequenceBatch.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/EntryTranslator.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/EntryTranslator.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/FatalExceptionHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/FatalExceptionHandler.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackingHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/SequenceTrackingHandler.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/NoOpConsumer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/NoOpConsumer.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/Util.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/Util$$anonfun$getMinimumSequence$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/Util.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/Util$.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/Util.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/Util.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/SequenceTrackerCallback.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/SequenceTrackerCallback.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/BatchConsumer.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/BatchConsumer.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/BatchHandler.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/BatchHandler.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ClaimStrategy$.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ClaimStrategy$MultiThreadedStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ClaimStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/ClaimStrategy$SingleThreadedStrategy.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$getMean$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$count$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$addObservations$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$addObservations$2.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$validateBounds$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$getUpperBoundForFactor$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$clear$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/collections/Histogram.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/collections/Histogram$$anonfun$toString$1.class +/Users/jallen/sandbox/disruptor/sdisruptor/code/src/main/scala/com/jamieallen/sdisruptor/AbstractEntry.scala -> /Users/jallen/sandbox/disruptor/sdisruptor/code/bin/com/jamieallen/sdisruptor/AbstractEntry.class diff --git a/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala b/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala index 79bf245..abcbda3 100644 --- a/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala +++ b/code/src/main/scala/com/jamieallen/sdisruptor/ClaimStrategy.scala @@ -18,10 +18,10 @@ package com.jamieallen.sdisruptor import java.util.concurrent.atomic.AtomicLong; object ClaimStrategy { - val MultiThreaded = 'multiThreaded - val SingleThreaded = 'singleThreaded + val MultiThreaded = "multiThreaded" + val SingleThreaded = "singleThreaded" - def newInstance(option: Symbol): ClaimStrategy = { + def newInstance(option: String): ClaimStrategy = { option match { case SingleThreaded => new SingleThreadedStrategy case MultiThreaded => new MultiThreadedStrategy diff --git a/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala b/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala index f45296a..0d026fd 100644 --- a/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala +++ b/code/src/main/scala/com/jamieallen/sdisruptor/RingBuffer.scala @@ -27,8 +27,8 @@ import java.util.concurrent.TimeUnit; */ class RingBuffer[T <: AbstractEntry : ClassManifest](entryFactory: EntryFactory[T], size: Int, - var claimStrategyOption: Symbol, - var waitStrategyOption: Symbol) extends ProducerBarrier[T] { + var claimStrategyOption: String, + var waitStrategyOption: String) extends ProducerBarrier[T] { if (claimStrategyOption == null) claimStrategyOption = ClaimStrategy.MultiThreaded if (waitStrategyOption == null) waitStrategyOption = WaitStrategy.Blocking diff --git a/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala b/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala index 8f18969..af58a17 100644 --- a/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala +++ b/code/src/main/scala/com/jamieallen/sdisruptor/WaitStrategy.scala @@ -23,11 +23,11 @@ import java.util.concurrent.locks.ReentrantLock; import scala.util.control.Breaks._ object WaitStrategy { - val Blocking = 'blocking - val BusySpin = 'busySpin - val Yielding = 'yielding + val Blocking = "blocking" + val BusySpin = "busySpin" + val Yielding = "yielding" - def newInstance(option: Symbol): WaitStrategy = { + def newInstance(option: String): WaitStrategy = { option match { case Blocking => new BlockingStrategy case BusySpin => new BusySpinStrategy diff --git a/code/src/test/java/com/lmax/disruptor/BatchConsumerTest.java b/code/src/test/java/com/lmax/disruptor/BatchConsumerTest.java index 57184d6..c731497 100644 --- a/code/src/test/java/com/lmax/disruptor/BatchConsumerTest.java +++ b/code/src/test/java/com/lmax/disruptor/BatchConsumerTest.java @@ -63,7 +63,7 @@ public void shouldThrowExceptionOnSettingNullExceptionHandler() @Test public void shouldReturnUnderlyingBarrier() { - assertEquals(consumerBarrier, batchConsumer.consumerBarrier()); + assertEquals(consumerBarrier, batchConsumer.consumerBarrier); } @Test diff --git a/code/src/test/java/com/lmax/disruptor/RingBufferTest.java b/code/src/test/java/com/lmax/disruptor/RingBufferTest.java index 20f50cf..a7326b2 100644 --- a/code/src/test/java/com/lmax/disruptor/RingBufferTest.java +++ b/code/src/test/java/com/lmax/disruptor/RingBufferTest.java @@ -45,7 +45,7 @@ public class RingBufferTest { private final ExecutorService EXECUTOR = Executors.newSingleThreadExecutor(new DaemonThreadFactory()); - private final RingBuffer ringBuffer = new RingBuffer(StubEntry.ENTRY_FACTORY, 20, null, null); + private final RingBuffer ringBuffer = new RingBuffer(StubEntry.ENTRY_FACTORY, 20, (String)null, (String)null); private final ConsumerBarrier consumerBarrier = ringBuffer.createConsumerBarrier(new Consumer[0]); { final NoOpConsumer noOpConsumer = new NoOpConsumer(ringBuffer); diff --git a/presentation/preso/presentation.md b/presentation/preso/presentation.md index 15926ff..8fbe6d5 100644 --- a/presentation/preso/presentation.md +++ b/presentation/preso/presentation.md @@ -28,7 +28,7 @@ This is a decidedly NOT functional implementation. No referential transparency, !SLIDE transition=fade # How Did They Arrive at the Disruptor -.notes Initiative started several years ago at Betfair with Martin Thompson and Matt Youill (CTO of Betfair), with the Flywheel and 100x projects, trying to glean more performance from their system +.notes Initiative started several years ago at Betfair with Martin Thompson, at that time head of emerging technologies and then solutions architect for new ventures, and Matt Youill, Chief Scientist of Betfair. Flywheel and 100x projects, trying to glean more performance from their system. The 100x system did perform for a limited subset of the application with good throughput using SEDA but the latency was unacceptable for finance and it incurred significant GC Looked into J2EE, SEDA, Actors, etc - couldn't get the throughput they desired SEDA: complex, event-driven application divided into stages connected by queues, supporting back pressure and load management Actors are a subset of SEDA, with lock-free semantics @@ -40,7 +40,7 @@ Neither project made it to production due to legacy integration issues !SLIDE transition=fade # How Did They Arrive at the Disruptor -.notes Betfair spun off Tradefair into LMAX, Martin Thompson leaves Matt Youill, works with Mike Barker and the rest of the team on their clean slate, greenfield Disruptor implementation +.notes Betfair spun off Tradefair into LMAX, Martin Thompson works with Mike Barker and the rest of the team on their clean slate, greenfield Disruptor implementation So named because it has elements for dealing with graphs of dependencies comparable to the Java7 Phaser concurrency type, introduced in support of ForkJoin And if there's a Phaser, there should be a Disruptor, right? (TOBY) Disruptor serves the purpose of a queue in a SEDA architecture @@ -62,12 +62,13 @@ But why implement it on the JVM instead of C++ or a native implementation? .notes Processors are much faster than memory now, and to optimize their performance, they use varying levels of caches (registers, store buffers, L1, L2, L3 and main memory) to support the execution of instructions, and they are kept coherent via message passing protocols Speed of cache access is measured in cycles, but generally occurs in nanoseconds Registers are obvious (on-processor storage for WIP) -Store buffers disambiguate memory access and manage dependencies for instructions (loads and stores) occurring out of program order. While a request for data to be stored to an L2 cache line is outstanding, the data is temporarily stored on one or more store buffers on the processor itself. On an Intel CPU, you only get 4 at a time. No loop should write to more than these 4 spaces at a time for maximum speed (write combining). Split logic up so that separate loop iterations execute sequentially for more speed. +Store buffers disambiguate memory access and manage dependencies for instructions (loads and stores) occurring out of program order. CPUs typically have load and store buffers which are associative queues of separate load and store instructions that are outstanding to the cache which can be snooped to preserve program order. Write combining store buffers are a different beast and are used when an L2 cache miss occurs. Up to four are available to a *core* at a time. No loop should write to more than these 4 spaces at a time for maximum speed (write combining). Split logic up so that separate loop iterations execute sequentially for more speed. Note that store barriers are flushed when a memory barrier is hit - best to model a problem so that barriers are hit at the boundary of the work unit. Change a variable last. Caches are STATIC Random Access Memory (bistable latching circuitry), does not need to be periodically refreshed like DYNAMIC RAM used in main memory (charged capacitors "leak" the charge denoting whether the bit is 0 or 1, so data "fades"). DRAM is much simpler - one transistor and a capacitor per bit versus 6 in SRAM, and thus much higher densities (hundreds of billions of transistors and capacitors on a single memory chip). There's even non-volatile SRAM which maintains data even when power is lost. Note: Your fancy i7 processor has an 8MB on-die unified L3 cache that is inclusive, shared by all cores Some processors have rules for the caches, such strictly inclusive, where all data in L1 must also be in L2. Athlon processors are exclusive and can hold more data, which is great when L1 is comparable in size to L2, diminishes when L2 is many times larger. Not universal, so you have to know your processors policy. One of the most expensive operations for a process is a cache read miss - when data is looked for in one of the caches and not found, so it must allocate space (evicting something else) and go to the next level to retrieve the data (note: write misses have no penalty because the data can be copied in background) +The timings for different memory access should be: registers 1 clock cycle, store buffers ~1 clock cycle, L1 cache ~3-4 clock cycles, L2 cache ~8-10 clock cycles, L3 cache ~32-34 cycles, main memory on same socket 65 ns (note not clocks), Main memory on another socket have to add 20ns per QPI traversal. The cache "hit rate" measures the effectiveness of your program/algorithm in using a cache