Cosmetic refactor of muldiv module.
Fixed comment in DE-1 demo top entity.
Adapted "hello" sample to latest changes in common support code.
Updated the DE-1 demo to use the 27 Mz clock rather than the 50 MHz one.
Added new sample programette, the all-time classic BLINKY.
Added common support code: HAL layer to be used in code samples.
Fixed bug in GPIO WB interface that caused spurious writes.
Adapted DE-1 demo project to latest changes in RTL.
Moved interface modules used in application demo to application direc…
Fixed address decoding for GPIO block.
Added a simple GPIO block to the application module (address decoding…
Forgot to add these two makefile fragments to the project in the last…
Modified "hello" program to use new makefiles.
Cleaned up the makefiles and the build scheme for the code samples.
Updated front page
Improved test for supported COP2 opcodes.
Added COP2_STUB module to repository.
Implemented first draft of COP2 interface.
Modiied core and application test benches to include COP2_STUB module.
Enabled debug register test in tb_core so the WB can be debugged here :)
Implemented COP0.Status.IE as global IRQ flag.
Cleaned up the COP0.
Implemented COP0.Cause.IP fields in sw simulator an don COP0 RTL.
Added a Quartus-2 project "demo" for the core aimed at Terasic's DE-1…
Added new test bench for the WB bridge, standalone.
Fixed a few confusions here and there about the size of the TCM.
Fixed bug: TCM sizes given sometimes in bytes and sometimes in words.
Updated comments in WB arbiter entity.
Created new tiny WB arbiter for the I/D cache refill ports.
Updated cputest with minitest for shift opcodes.
Updated cputest to test load/store opcodes including LBU and LHU.
Added branch opcode tests to the cputest program.
Enlarged simulated C-TCM size in swsim to make room for growing tests…
Fixed bug in CPU: SLTIU immediate data was being sign extended.
Added SLTIU tests to cputest.
Fixed bug in SLTU: wrong bit (32 vs. 31) was being used to test sign …
Upgraded cputest to test SLT/U.
Sign of remainder in DIV instruction
Added a few DIV/U tests to cputest.s.
Modified the SW simulator DIV implementation for the remainder.
Tests modified a bit to try uncached WB bridge on tb_core.