Hacky pass at lea-ifying add/sub/shl

Author: jcdavis

compiler/src/org.graalvm.compiler.core.amd64/src/org/graalvm/compiler/core/amd64/AMD64ArithmeticLIRGenerator.java

@@ -224,7 +224,7 @@ private Variable emitBinaryConst(LIRKind resultKind, AMD64BinaryArithmetic op, O
                 }
             }
 
-            getLIRGen().append(new AMD64Binary.ConstOp(op, size, result, a, constant));
+            getLIRGen().append(new AMD64Binary.ConstOp(op, size, result, a, constant, setFlags));
             return result;
         } else {
             return emitBinaryVar(resultKind, op.getRMOpcode(size), size, commutative, a, getLIRGen().asAllocatable(b));
@@ -695,7 +695,7 @@ private Variable emitShift(AMD64Shift op, OperandSize size, Value a, Value b) {
                  * c is implicitly masked to 5 or 6 bits by the CPU, so casting it to (int) is
                  * always correct, even without the NumUtil.is32bit() test.
                  */
-                getLIRGen().append(new AMD64Binary.ConstOp(op.miOp, size, result, input, (int) c.asLong()));
+                getLIRGen().append(new AMD64Binary.ConstOp(op.miOp, size, result, input, (int) c.asLong(), false));
             }
         } else {
             getLIRGen().emitMove(RCX_I, b);

compiler/src/org.graalvm.compiler.lir.amd64/src/org/graalvm/compiler/lir/amd64/AMD64Binary.java

@@ -32,6 +32,7 @@
 import static jdk.vm.ci.code.ValueUtil.isRegister;
 import static jdk.vm.ci.code.ValueUtil.isStackSlot;
 
+import jdk.vm.ci.code.Register;
 import org.graalvm.compiler.core.common.NumUtil;
 import org.graalvm.compiler.asm.amd64.AMD64Address;
 import org.graalvm.compiler.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic;
@@ -218,23 +219,39 @@ public static class ConstOp extends AMD64LIRInstruction {
         @Def({REG, HINT}) protected AllocatableValue result;
         @Use({REG}) protected AllocatableValue x;
         private final int y;
+        private final boolean setFlags;
 
-        public ConstOp(AMD64BinaryArithmetic opcode, OperandSize size, AllocatableValue result, AllocatableValue x, int y) {
-            this(opcode.getMIOpcode(size, NumUtil.isByte(y)), size, result, x, y);
+        public ConstOp(AMD64BinaryArithmetic opcode, OperandSize size, AllocatableValue result, AllocatableValue x, int y, boolean setFlags) {
+            this(opcode.getMIOpcode(size, NumUtil.isByte(y)), size, result, x, y, setFlags);
         }
 
-        public ConstOp(AMD64MIOp opcode, OperandSize size, AllocatableValue result, AllocatableValue x, int y) {
+        public ConstOp(AMD64MIOp opcode, OperandSize size, AllocatableValue result, AllocatableValue x, int y, boolean setFlags) {
             super(TYPE);
             this.opcode = opcode;
             this.size = size;
 
             this.result = result;
             this.x = x;
             this.y = y;
+            this.setFlags = setFlags;
         }
 
         @Override
         public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
+            if (!setFlags && isRegister(result) && isRegister(x) && !result.equals(x)) {
+                if (opcode.toString().equals("ADD")) {
+                    masm.leaq(asRegister(result), new AMD64Address(asRegister(x), y));
+                    return;
+                }
+                if (opcode.toString().equals("SUB")) {
+                    masm.leaq(asRegister(result), new AMD64Address(asRegister(x), -y));
+                    return;
+                }
+                if (opcode.toString().equals("SHL") && y >= 1 && y <= 3) {
+                    masm.leaq(asRegister(result), new AMD64Address(Register.None, asRegister(x), AMD64Address.Scale.fromShift(y)));
+                    return;
+                }
+            }
             AMD64Move.move(crb, masm, result, x);
             opcode.emit(masm, size, asRegister(result), y);
         }