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br tree sync

Signed-off-by: J.C. Woltz <jwoltz@gmail.com>
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commit 2096c922c55e41a27b9e49acc210a93239afc5b0 1 parent d5bc830
@jcwoltz authored
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8 br-e10-next/arch/Config.in.arm
@@ -29,10 +29,14 @@ config BR2_arm1176jz_s
bool "arm1176jz-s"
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
+config BR2_cortex_a5
+ bool "cortex-A5"
config BR2_cortex_a8
bool "cortex-A8"
config BR2_cortex_a9
bool "cortex-A9"
+config BR2_cortex_a15
+ bool "cortex-A15"
config BR2_sa110
bool "sa110"
config BR2_sa1100
@@ -83,8 +87,10 @@ config BR2_GCC_TARGET_TUNE
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
+ default "cortex-a5" if BR2_cortex_a5
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
+ default "cortex-a15" if BR2_cortex_a15
default "strongarm110" if BR2_sa110
default "strongarm1100" if BR2_sa1100
default "xscale" if BR2_xscale
@@ -102,8 +108,10 @@ config BR2_GCC_TARGET_ARCH
default "armv6j" if BR2_arm1136jf_s
default "armv6zk" if BR2_arm1176jz_s
default "armv6zk" if BR2_arm1176jzf_s
+ default "armv7-a" if BR2_cortex_a5
default "armv7-a" if BR2_cortex_a8
default "armv7-a" if BR2_cortex_a9
+ default "armv7-a" if BR2_cortex_a15
default "armv4" if BR2_sa110
default "armv4" if BR2_sa1100
default "armv5te" if BR2_xscale
View
15 br-e10-next/arch/Config.in.powerpc
@@ -18,6 +18,14 @@ config BR2_powerpc_440
bool "440"
config BR2_powerpc_440fp
bool "440 with FPU"
+config BR2_powerpc_464
+ bool "464"
+config BR2_powerpc_464fp
+ bool "464 with FPU"
+config BR2_powerpc_476
+ bool "476"
+config BR2_powerpc_476fp
+ bool "476 with FPU"
config BR2_powerpc_505
bool "505"
config BR2_powerpc_601
@@ -44,8 +52,6 @@ config BR2_powerpc_7450
bool "7450"
config BR2_powerpc_750
bool "750"
-config BR2_powerpc_801
- bool "801"
config BR2_powerpc_821
bool "821"
config BR2_powerpc_823
@@ -95,6 +101,10 @@ config BR2_GCC_TARGET_TUNE
default "405fp" if BR2_powerpc_405fp
default "440" if BR2_powerpc_440
default "440fp" if BR2_powerpc_440fp
+ default "464" if BR2_powerpc_464
+ default "464fp" if BR2_powerpc_464fp
+ default "476" if BR2_powerpc_476
+ default "476fp" if BR2_powerpc_476fp
default "505" if BR2_powerpc_505
default "601" if BR2_powerpc_601
default "602" if BR2_powerpc_602
@@ -108,7 +118,6 @@ config BR2_GCC_TARGET_TUNE
default "7400" if BR2_powerpc_7400
default "7450" if BR2_powerpc_7450
default "750" if BR2_powerpc_750
- default "801" if BR2_powerpc_801
default "821" if BR2_powerpc_821
default "823" if BR2_powerpc_823
default "860" if BR2_powerpc_860
View
2  br-e10-next/package/rt-tests/Config.in
@@ -17,4 +17,4 @@ config BR2_PACKAGE_RT_TESTS
http://rt.wiki.kernel.org
comment "rt-tests requires a toolchain with threads support"
- !BR2_TOOLCHAIN_HAS_THREADS
+ depends on !BR2_TOOLCHAIN_HAS_THREADS
View
6 br-e10-next/toolchain/gcc/Config.in
@@ -15,15 +15,15 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
- depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
+ depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
- depends on !BR2_avr32 && !BR2_x86_atom
+ depends on !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.4.x"
config BR2_GCC_VERSION_4_5_X
- depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
+ depends on !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
bool "gcc 4.5.x"
config BR2_GCC_VERSION_4_6_X
View
8 br-e10-recv/arch/Config.in.arm
@@ -29,10 +29,14 @@ config BR2_arm1176jz_s
bool "arm1176jz-s"
config BR2_arm1176jzf_s
bool "arm1176jzf-s"
+config BR2_cortex_a5
+ bool "cortex-A5"
config BR2_cortex_a8
bool "cortex-A8"
config BR2_cortex_a9
bool "cortex-A9"
+config BR2_cortex_a15
+ bool "cortex-A15"
config BR2_sa110
bool "sa110"
config BR2_sa1100
@@ -83,8 +87,10 @@ config BR2_GCC_TARGET_TUNE
default "arm1136jf-s" if BR2_arm1136jf_s
default "arm1176jz-s" if BR2_arm1176jz_s
default "arm1176jzf-s" if BR2_arm1176jzf_s
+ default "cortex-a5" if BR2_cortex_a5
default "cortex-a8" if BR2_cortex_a8
default "cortex-a9" if BR2_cortex_a9
+ default "cortex-a15" if BR2_cortex_a15
default "strongarm110" if BR2_sa110
default "strongarm1100" if BR2_sa1100
default "xscale" if BR2_xscale
@@ -102,8 +108,10 @@ config BR2_GCC_TARGET_ARCH
default "armv6j" if BR2_arm1136jf_s
default "armv6zk" if BR2_arm1176jz_s
default "armv6zk" if BR2_arm1176jzf_s
+ default "armv7-a" if BR2_cortex_a5
default "armv7-a" if BR2_cortex_a8
default "armv7-a" if BR2_cortex_a9
+ default "armv7-a" if BR2_cortex_a15
default "armv4" if BR2_sa110
default "armv4" if BR2_sa1100
default "armv5te" if BR2_xscale
View
15 br-e10-recv/arch/Config.in.powerpc
@@ -18,6 +18,14 @@ config BR2_powerpc_440
bool "440"
config BR2_powerpc_440fp
bool "440 with FPU"
+config BR2_powerpc_464
+ bool "464"
+config BR2_powerpc_464fp
+ bool "464 with FPU"
+config BR2_powerpc_476
+ bool "476"
+config BR2_powerpc_476fp
+ bool "476 with FPU"
config BR2_powerpc_505
bool "505"
config BR2_powerpc_601
@@ -44,8 +52,6 @@ config BR2_powerpc_7450
bool "7450"
config BR2_powerpc_750
bool "750"
-config BR2_powerpc_801
- bool "801"
config BR2_powerpc_821
bool "821"
config BR2_powerpc_823
@@ -95,6 +101,10 @@ config BR2_GCC_TARGET_TUNE
default "405fp" if BR2_powerpc_405fp
default "440" if BR2_powerpc_440
default "440fp" if BR2_powerpc_440fp
+ default "464" if BR2_powerpc_464
+ default "464fp" if BR2_powerpc_464fp
+ default "476" if BR2_powerpc_476
+ default "476fp" if BR2_powerpc_476fp
default "505" if BR2_powerpc_505
default "601" if BR2_powerpc_601
default "602" if BR2_powerpc_602
@@ -108,7 +118,6 @@ config BR2_GCC_TARGET_TUNE
default "7400" if BR2_powerpc_7400
default "7450" if BR2_powerpc_7450
default "750" if BR2_powerpc_750
- default "801" if BR2_powerpc_801
default "821" if BR2_powerpc_821
default "823" if BR2_powerpc_823
default "860" if BR2_powerpc_860
View
2  br-e10-recv/package/rt-tests/Config.in
@@ -17,4 +17,4 @@ config BR2_PACKAGE_RT_TESTS
http://rt.wiki.kernel.org
comment "rt-tests requires a toolchain with threads support"
- !BR2_TOOLCHAIN_HAS_THREADS
+ depends on !BR2_TOOLCHAIN_HAS_THREADS
View
6 br-e10-recv/toolchain/gcc/Config.in
@@ -15,15 +15,15 @@ choice
bool "gcc 4.2.2-avr32-2.1.5"
config BR2_GCC_VERSION_4_3_X
- depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc
+ depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.3.x"
config BR2_GCC_VERSION_4_4_X
- depends on !BR2_avr32 && !BR2_x86_atom
+ depends on !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp
bool "gcc 4.4.x"
config BR2_GCC_VERSION_4_5_X
- depends on !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
+ depends on !BR2_avr32 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
bool "gcc 4.5.x"
config BR2_GCC_VERSION_4_6_X
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