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VHDL C Other
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Lemberg is a time-predictable VLIW processor optimized for performance. Lemberg can execute up to four instructions per cycle in a four-stage pipeline. The processor includes one to four ALUs, a jump- and a memory-unit, and optionally also a floating-point unit for single and double precision floating-point numbers. Instructions are cached in a method cache, and data may be cached in a stack cache, direct-mapped cache or a fully associative cache. Lemberg is time-predictable in the sense that the worst case execution time of program fragments can be computed easily. The caches have been designed to reduce the overestimation for worst-case execution time analysis as much as possible. Branch prediction is optional and was designed with analyzability in mind. The processor in its largest configuration runs at 66 MHz on an Altera DE2-70 board, where it consumes about 45K logic cells and 62KB of on-chip memory, including the floating-point unit and caches. Naturally, smaller configurations require fewer resources and usually can run at higher clock frequencies. Along with the hardware implementation come an assembler, a back-end for LLVM, and a basic port of the newlib libc implementation.