FPGA Firmware Release Notes

Peter Kazanzides edited this page Jun 23, 2018 · 7 revisions

Rev 6.0

  • Improved Ethernet support (for FPGA V2.X)
  • Improved efficiency of FireWire broadcast protocol by skipping boards that are on the bus, but not used by the current configuration.
  • Improved timeliness of velocity estimation by measuring time between all encoder edges (e.g., A-up to A-up, A-down to A-down, B-up to B-up, B-down to B-down) and by providing additional data to enable the higher-level software to estimate acceleration from the backward difference of the last two velocities. Increased time measurement clock from 768 kHz to 3.072 MHz for better resolution and increased range from 16 bits to 22 bits (for time between encoder edges of same type).
  • Corrected PWM and single-shot behaviors on digital outputs for QLA Rev 1.4+
  • Added bit to status register to indicate motor voltage fault, MV-FLT (QLA Rev 1.4+)
  • Clear Watchdog Timeout (bit 23) and Feedback Current Check (bits 7-4) when enabling board power or amplifier power. In prior versions of the firmware, these bits were cleared by any write command and thus could easily be missed.

Rev 5.0

  • There are now two versions of firmware: FPGA1394-QLA (for FPGA V1.X) and FPGA1394Eth-QLA (for FPGA V2.X, with Ethernet connector). The FPGA pin assignments are different so the firmware is not interchangeable.
  • Added register for Ethernet IO and Status; most significant bit is '1' if Ethernet firmware is present; '0' otherwise.
  • Reversed order of digital outputs to match schematics.
  • Auto-detect whether digital output is Open Drain (MOSFET) or bi-directional transceiver.
  • Added support for PWM and single-shot behaviors on digital outputs.

Rev 4.0

  • Improved estimation of velocity from encoder feedback
  • Added support for broadcast communication between PC and FPGA boards
  • Added Encoder A, B, I input state to digital feedback (0x0A)
  • Added 25AA128 module (PROM on QLA board): byte R/W and block R/W
  • Initial support for USB virtual COM port -- echos received character
  • Changed FireWire address for FPGA prom from 0xC0 to 0x2000

Rev 3.0

  • Changed feedback motor current check that was introduced in Rev 2
    • Disable motor power if magnitude of measured current is more than 440 mA larger than commanded current for 50 msec, except when:
      • Measured motor current is small (less than 150 mA)
      • Commanded motor current is within 440 mA of maximum value
  • Added bits to status register to indicate when motor power turned off due to feedback current check (bits 7-4)
    • Bits are cleared by any write to the board, so it is possible to miss them (same is true for watchdog timeout)

Rev 2.0

  • Watchdog
    • Turn on watchdog by default (default watchdog is 340 ms)
    • Turn off auto reenable amplifier (need new data to reenable)
  • Add 40 ms sleep after board power enable
  • Check feedback motor current against command motor current
    • disable amplifier if current error is more than 900 mA

Rev 1.0

  • Initial release
You can’t perform that action at this time.
You signed in with another tab or window. Reload to refresh your session. You signed out in another tab or window. Reload to refresh your session.
Press h to open a hovercard with more details.