FPGA Program

Peter Kazanzides edited this page Nov 20, 2018 · 20 revisions

How to program the FPGA controller board

Updating the Firmware (end users)

If your FPGA board has already been programmed, you can reprogram it via the Firewire interface. This provides the following benefits:

  • No special cable is needed
  • It is much faster than the Xilinx programmer
  • If you have the hex file (MCS file), then you don't even need the Xilinx ISE software and you can ignore the rest of this page
  • Download the current firmware version from tag:Rev6. Note that you only need the file FPGA1394-QLA.mcs (for Rev 1.x boards) or the file FPGA1394Eth-QLA.mcs (for Rev 2.x boards, with Ethernet connector).

To do this, compile the pgm1394 program in Software/programmer and run it as follows:

  ./pgm1394 <board-id> [<mcs-file>] [-pP]

where board-id is the board ID switch setting (0-15), mcs-file is the name of the MCS file containing the FPGA firmware (the software chooses the correct default, either FPGA1394-QLA.mcs or FPGA1394Eth-QLA.mcs, depending on which FPGA version is detected Do not specify the mcs file unless you need to force a specific firmware type), and P is the port number (default is FireWire port 0) or port name (e.g., fw0 or eth0).

Before you get started, we strongly recommend to disconnect the FireWire cables from all controllers except the one you plan to upgrade. Then check that you see the 2 FireWire nodes for the controller (1 for the SUJ controller) using ls /dev/fw*. You should see fw0, fw1 and fw2. To identify the board IDs in the controller you're about to upgrade, start qladisp without any command line option. Please note the two board IDs. You will then sequentially upgrade the firmware on both boards without powering the controller in between. Power cycle the controller only once both FPGA boards have been upgraded.

Finally, make sure you're using the latest software to program your boards, the program pgm1394 will display the version of the library it is built against, it should be at least 1.3.0.

Detailed Steps:

# download firmware Rev6 (05-09-2018), please download the current revision 
cd ~/Downloads 
wget https://raw.githubusercontent.com/jhu-cisst/mechatronics-firmware/Rev6/FPGA1394_QLA/Generated/FPGA1394-QLA.mcs
wget https://raw.githubusercontent.com/jhu-cisst/mechatronics-firmware/Rev6/FPGA1394_QLA/Generated/FPGA1394Eth-QLA.mcs

# program firmware (for board 0)

# NOTE: for users NOT using ROS catkin tools
# for ROS users, source your devel/setup.bash and pgm1394 will be in your path
cd ~/dev/cisst/build/cisst/bin    # cd to pgm1394 path (non ROS users!)

# Do not specify the MCS file!  pgm1394 will automatically detect which one to use
# The 0 should be replaced by the board ID you plan to upgrade
./pgm1394 0

# 1 - press 1 to program firmware
# 2 - press 2 to verify firmware

If this is the first board, start the pgm1394 with the second board ID. Once you've programmed the second board in the controller, power-cycle the controller. You can now use qladisp to verify firmware version on both boards.

NOTE: The last step is important; if you do not power-cycle the board, you will still read the old firmware version in qladisp.

NOTE: If the board id is reported incorrectly after programming, it means that you somehow programmed the wrong firmware image (i.e., programmed V1.x firmware on a V2.x board or V2.x firmware on a V1.x board). The V1.x and V2.x boards have different bit orderings for the board-id switch; the easiest solution is to set the switch to 0 (which is 0 regardless of the bit order) and then program the correct firmware version.

Programming Setup (programmers only)

Everything below is for the FPGA programmers, if you're an end user you can skip this altogether.

The boards can always be programmed via the JTAG interface, which requires the following hardware and software:

FPGA Firmware

Getting FPGA code

   git clone git@github.com:jhu-cisst/mechatronics-firmware.git 

About Xilinx ISE project

If you are familiar with ISE and FPGA you can skip this section, otherwise the following info would be useful to you.

File structure

  • FPGA1394_QLA
    • Simulation: simulation codes (xxx.do) are in this folder
    • Verilog:
      • xxx.v: verilog format source code
      • XC6S45.ucf: User Constraint File (see next section for details)
    • FPGA1394-QLA.ipf: iMPACT Programming File
    • FPGA1394-QLA.xise: ISE project file (Rev 1.x boards)
    • FPGA1394Eth-QLA.xise: ISE project file (Rev 2.x boards)

File type

  • .xise file
    • Xilinx ISE project file
    • NOTE: if you want to open a xise file created by newer version, one hack is to edit the .xise file using a text editor and change the ISE version number.
  • .ipf file
    • This is the iMPACT Programming File (ipf), which stores all information about programming the FPGA chip.
    • Specify different .ipf file at PROM/ACS properties
  • .ucf file
    • User Constraint File: store FPGA PIN assignment and time constraints information
    • Create .ucf file: http://www.xilinx.com/itp/xilinx10/books/docs/qst/qst.pdf
    • NOTE: .ucf file is linked to one top-module configuration, so if you change your project top module then chances are you need to create a new .ucf file or just relink the existing ucf file to your new top module by adding the source file to the top-module.
  • .mcs file

"Compiling" & Programming FPGA

  1. Generate PROM file
  2. Open iMPACT downloader
  3. Connect programming cable to PC and FPGA board
  4. Power on FPGA board
  5. Generate .mcs file
  6. Load firmware
    1. To FPGA: select FPGA chip and program (fast but will lose after reboot)
    2. To PROM: add SPI device and choose M25P16 as the PROM chip then program it

The fastest method to program a blank board is to use the above method to first program the FPGA chip and then use the Firewire programmer (pgm1394) to program the PROM.

Renaming a Xilinx project

  • Step 1: Rename old.xise and old.ipf to new.xise and new.ipf
  • Step 2: Relink new.ipf file to the new project, Compile & Download & Test
  • Step 3: Rename top-module name and relink .ucf to this new top module and Compile it
  • Step 4: In iMPACT, regenerate .mcs file and download
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