FPGA Program

Anton Deguet edited this page Dec 21, 2016 · 15 revisions

How to program the FPGA controller board

Updating the Firmware

If your FPGA board has already been programmed, you can reprogram it via the Firewire interface. This provides the following benefits:

  • No special cable is needed
  • It is much faster than the Xilinx programmer
  • If you have the hex file (MCS file), then you don't even need the Xilinx ISE software and you can ignore the rest of this page

To do this, compile the pgm1394 program in Software/programmer and run it as follows:

  ./pgm1394 <board-id> [<mcs-file>] [-pP]

where board-id is the board ID switch setting (0-15), mcs-file is the name of the MCS file containing the FPGA firmware (the software chooses the correct default, either FPGA1394-QLA.mcs or FPGA1394Eth-QLA.mcs, depending on which FPGA version is detected), and P is the port number (default is FireWire port 0) or port name (e.g., fw0 or eth0).

Detailed Steps:

# download firmware Rev5 (04-27-2016), please download the current revision 
cd ~/Downloads 

wget https://raw.githubusercontent.com/jhu-cisst/mechatronics-firmware/Rev5/FPGA1394_QLA/Generated/FPGA1394-QLA.mcs
wget https://raw.githubusercontent.com/jhu-cisst/mechatronics-firmware/Rev5/FPGA1394_QLA/Generated/FPGA1394Eth-QLA.mcs

# program firmware (for board 0)

# for users not using ROS catkin tools
# for ROS users, source your devel/setup.bash and pgm1394 will be in your path
cd ~/dev/cisst/build/cisst/bin    # cd to pgm1394 path (non ROS users!)

# Do not specify the MCS file!  pgm1394 will automatically detect which one to use
./pgm1394 0

# 1 - press 1 to program firmware
# 2 - press 2 to verify firmware
# 3 - power-cycle the board 
# 4 - use qladisp to verify firmware version

NOTE: Step 3 is important; if you do not power-cycle the board, you will still read the old firmware version in qladisp.

Programming Setup

The boards can always be programmed via the JTAG interface, which requires the following hardware and software:

FPGA Firmware

Getting FPGA code

    git clone git@github.com:jhu-cisst/mechatronics-firmware.git 

About Xilinx ISE project

If you are familiar with ISE and FPGA you can skip this section, otherwise the following info would be useful to you.

File structure

  • FPGA1394_QLA
    • Simulation: simulation codes (xxx.do) are in this folder
    • Verilog:
      • xxx.v: verilog format source code
      • XC6S45.ucf: User Constraint File (see next section for details)
    • FPGA1394-QLA.ipf: iMPACT Programming File
    • FPGA1394-QLA.xise: ISE project file (Rev 1.x boards)
    • FPGA1394Eth-QLA.xise: ISE project file (Rev 2.x boards)

File type

  • .xise file
    • Xilinx ISE project file
    • NOTE: if you want to open a xise file created by newer version, one hack is to edit the .xise file using a text editor and change the ISE version number.
  • .ipf file
    • This is the iMPACT Programming File (ipf), which stores all information about programming the FPGA chip.
    • Specify different .ipf file at PROM/ACS properties
  • .ucf file
    • User Constraint File: store FPGA PIN assignment and time constraints information
    • Create .ucf file: http://www.xilinx.com/itp/xilinx10/books/docs/qst/qst.pdf
    • NOTE: .ucf file is linked to one top-module configuration, so if you change your project top module then chances are you need to create a new .ucf file or just relink the existing ucf file to your new top module by adding the source file to the top-module.
  • .mcs file

"Compiling" & Programming FPGA

  1. Generate PROM file
  2. Open iMPACT downloader
  3. Connect programming cable to PC and FPGA board
  4. Power on FPGA board
  5. Generate .mcs file
  6. Load firmware
    1. To FPGA: select FPGA chip and program (fast but will lose after reboot)
    2. To PROM: add SPI device and choose M25P16 as the PROM chip then program it

The fastest method to program a blank board is to use the above method to first program the FPGA chip and then use the Firewire programmer (pgm1394) to program the PROM.

Renaming a Xilinx project

  • Step 1: Rename old.xise and old.ipf to new.xise and new.ipf
  • Step 2: Relink new.ipf file to the new project, Compile & Download & Test
  • Step 3: Rename top-module name and relink .ucf to this new top module and Compile it
  • Step 4: In iMPACT, regenerate .mcs file and download