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Add support for STM32F4 hardware cryptography.

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jmichelp committed Jan 15, 2018
1 parent 6091c2f commit 161193877a702a8b53310a13fe6781bd13bcc321
@@ -12,7 +12,7 @@ EXTRAINCDIRS += $(HALPATH)

#Manually have to update these lists...
PLATFORM_LIST = CW301_AVR CW303 CW304 CW308_MEGARF CW308_SAM4L \
CW308_STM32F0 CW308_STM32F1 CW308_STM32F2 CW308_STM32F3 CW308_STM32F4
CW308_STM32F0 CW308_STM32F1 CW308_STM32F2 CW308_STM32F3 CW308_STM32F4 CW308_STM32F415

define KNOWN_PLATFORMS

@@ -93,6 +93,10 @@ else ifeq ($(PLATFORM),CW308_STM32F3)
else ifeq ($(PLATFORM),CW308_STM32F4)
HAL = stm32f4
PLTNAME = CW308T: STM32F4 Target
else ifeq ($(PLATFORM),CW308_STM32F415)
HAL = stm32f4
PLTNAME = CW308T: STM32F4 Target w/ HW crypto
CDEFS += -DHWCRYPTO=1
else
$(error Invalid or empty PLATFORM: $(PLATFORM). Known platforms: $(KNOWN_PLATFORMS))
$(error haHA)
@@ -84,3 +84,80 @@ void putch(char c)
HAL_UART_Transmit(&UartHandle, &d, 1, 5000);
}

#ifdef HWCRYPTO

#define CRYP_DataType_1b (0x3U << (CRYP_CR_DATATYPE_Pos))
#define CRYP_DataType_8b (0x2U << (CRYP_CR_DATATYPE_Pos))
#define CRYP_DataType_16b (0x1U << (CRYP_CR_DATATYPE_Pos))
#define CRYP_DataType_32b (0x0U << (CRYP_CR_DATATYPE_Pos))

#define CRYP_KeySize_128b (0x0U << (CRYP_CR_KEYSIZE_Pos))
#define CRYP_KeySize_192b (0x1U << (CRYP_CR_KEYSIZE_Pos))
#define CRYP_KeySize_256b (0x2U << (CRYP_CR_KEYSIZE_Pos))

#define CRYP_AlgoDir_Encrypt (0x0U << (CRYP_CR_ALGODIR_Pos))
#define CRYP_AlgoDir_Decrypt (0x1U << (CRYP_CR_ALGODIR_Pos))

static void CRYP_wait_busy(void)
{
while (CRYP->SR & CRYP_SR_BUSY)
;
}

void HW_AES128_Init(void)
{
__HAL_RCC_CRYP_CLK_ENABLE();
}

void HW_AES128_LoadKey(uint8_t* key)
{
uint32_t* k = (uint32_t*) key;
uint32_t config = 0;

// Disable CRYP core
CRYP->CR &= ~CRYP_CR_CRYPEN;

CRYP->K2LR = __REV(k[0]);
CRYP->K2RR = __REV(k[1]);
CRYP->K3LR = __REV(k[2]);
CRYP->K3RR = __REV(k[3]);
CRYP->K1RR = 0;
CRYP->K1LR = 0;
CRYP->K0RR = 0;
CRYP->K0LR = 0;

config |= CRYP_KeySize_128b;
config |= CRYP_DataType_8b;
config |= CRYP_CR_ALGOMODE_AES_ECB;
config |= CRYP_AlgoDir_Encrypt;
config |= CRYP_CR_FFLUSH;
config |= CRYP_CR_CRYPEN;

CRYP->CR = config; //0x0000C0A0;
CRYP_wait_busy();
}

void HW_AES128_Enc(uint8_t* pt)
{
int rd = 0, wr = 0;
static const int kAesBlocks = 4;
uint32_t* buff = (uint32_t*) pt;

CRYP->CR |= CRYP_CR_CRYPEN;

while (rd != kAesBlocks) {
if ((wr < kAesBlocks) && (CRYP->SR & CRYP_SR_IFNF)) {
CRYP->DR = buff[wr];
wr++;
}
if (CRYP->SR & CRYP_SR_OFNE) {
buff[rd] = CRYP->DOUT;
rd++;
}
}

CRYP_wait_busy();
CRYP->CR &= ~CRYP_CR_CRYPEN;
}

#endif
@@ -12,4 +12,10 @@ void trigger_setup(void);
void trigger_low(void);
void trigger_high(void);

#ifdef HWCRYPTO
void HW_AES128_Init(void);
void HW_AES128_LoadKey(unsigned char*);
void HW_AES128_Enc(unsigned char*);
#endif

#endif // STM32F4_HAL_H
@@ -15,4 +15,4 @@ PLATFORM = CW303
#802.15.4 Attack Platform (ATMega128RFA1)
#PLATFORM = CW308_MEGARF
#F_CPU = 16000000
#CDEFS += -DHWCRYPTO=1
#CDEFS += -DHWCRYPTO=1

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