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memory.cpp
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memory.cpp
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/*
* Copyright (C) 2002-2021 The DOSBox Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <stdint.h>
#include <assert.h>
#include "dosbox.h"
#include "dos_inc.h"
#include "logging.h"
#include "mem.h"
#include "menu.h"
#include "inout.h"
#include "setup.h"
#include "paging.h"
#include "programs.h"
#include "zipfile.h"
#include "regs.h"
#ifndef WIN32
# include <stdlib.h>
# include <unistd.h>
# include <stdio.h>
#endif
#include "voodoo.h"
#include "glidedef.h"
#include <string.h>
#if C_GAMELINK
#include "../gamelink/gamelink.h"
#endif // C_GAMELINK
// ACPI memory region allocation.
// Most ACPI BIOSes actually use some region at top of memory, but the
// design of DOSBox-X doesn't make that possible, so the ACPI tables are
// written to a high memory region just below the top 4GB region and the
// RSD PTR in the legacy BIOS region (0xE0000-0xFFFFF) will point at that.
// A memory address is chosen, which must be maintained once tables are
// generated because tables point at each other by physical memory address.
// A fixed size region is chosen within which the tables are written.
//
// NTS: ACPI didn't happen until the Pentium era when it became quite rare
// for CPUs to have less than 32 address bits. No 26-bit 486SX limits
// here. For this reason, ACPI is not supported unless all 32 address
// bits are enabled.
bool ACPI_enabled = false;
bool acpi_mem_setup = false;
uint32_t ACPI_BASE=0;
uint32_t ACPI_REGION_SIZE=0; // power of 2
uint32_t ACPI_version=0;
unsigned char *ACPI_buffer=NULL;
size_t ACPI_buffer_size=0;
int ACPI_IRQ=-1;
unsigned int ACPI_SMI_CMD=0;
class ACPIPageHandler : public PageHandler {
public:
ACPIPageHandler() : PageHandler(PFLAG_NOCODE|PFLAG_READABLE|PFLAG_WRITEABLE) {}
ACPIPageHandler(Bitu flags) : PageHandler(flags) {}
HostPt GetHostReadPt(Bitu phys_page) override {
assert(ACPI_buffer != NULL);
assert(ACPI_buffer_size >= 4096);
phys_page -= (ACPI_BASE >> 12);
phys_page &= (ACPI_REGION_SIZE >> 12) - 1;
if (phys_page >= (ACPI_buffer_size >> 12)) phys_page = (ACPI_buffer_size >> 12) - 1;
return ACPI_buffer + (phys_page << 12);
}
HostPt GetHostWritePt(Bitu phys_page) override {
assert(ACPI_buffer != NULL);
assert(ACPI_buffer_size >= 4096);
phys_page -= (ACPI_BASE >> 12);
phys_page &= (ACPI_REGION_SIZE >> 12) - 1;
if (phys_page >= (ACPI_buffer_size >> 12)) phys_page = (ACPI_buffer_size >> 12) - 1;
return ACPI_buffer + (phys_page << 12);
}
};
static ACPIPageHandler acpi_mem_handler;
PageHandler* acpi_memio_cb(MEM_CalloutObject &co,Bitu phys_page) {
(void)co;//UNUSED
(void)phys_page;//UNUSED
if (ACPI_buffer != NULL && ACPI_REGION_SIZE != 0 && phys_page >= (ACPI_BASE/4096) && phys_page < ((ACPI_BASE+ACPI_REGION_SIZE)/4096))
return &acpi_mem_handler;
return NULL;
}
void MEM_ResetPageHandler_Unmapped(Bitu phys_page, Bitu pages);
void ACPI_mem_enable(const bool enable) {
if (enable && !acpi_mem_setup) {
if (ACPI_BASE != 0 && ACPI_REGION_SIZE != 0) {
MEM_SetPageHandler( ACPI_BASE/4096, ACPI_REGION_SIZE/4096, &acpi_mem_handler );
acpi_mem_setup = true;
PAGING_ClearTLB();
}
}
else if (!enable && acpi_mem_setup) {
if (ACPI_BASE != 0 && ACPI_REGION_SIZE != 0) {
MEM_ResetPageHandler_Unmapped( ACPI_BASE/4096, ACPI_REGION_SIZE/4096 );
acpi_mem_setup = false;
PAGING_ClearTLB();
}
}
}
void ACPI_free() {
if (ACPI_buffer != NULL) {
delete[] ACPI_buffer;
ACPI_buffer = NULL;
}
ACPI_buffer_size = 0;
}
bool ACPI_init() {
if (ACPI_buffer == NULL) {
if (ACPI_REGION_SIZE == 0 || ACPI_REGION_SIZE > (8ul << 20ull))
return false;
ACPI_buffer_size = ACPI_REGION_SIZE;
ACPI_buffer = new unsigned char [ACPI_buffer_size];
if (ACPI_buffer == NULL)
return false;
}
return (ACPI_buffer != NULL);
}
static MEM_Callout_t lfb_mem_cb = MEM_Callout_t_none;
static MEM_Callout_t lfb_mmio_cb = MEM_Callout_t_none;
#define MEM_callouts_max (MEM_TYPE_MAX - MEM_TYPE_MIN)
#define MEM_callouts_index(t) (t - MEM_TYPE_MIN)
class MEM_callout_vector : public std::vector<MEM_CalloutObject> {
public:
MEM_callout_vector() : std::vector<MEM_CalloutObject>() { };
public:
unsigned int getcounter = 0;
unsigned int alloc_from = 0;
};
static MEM_callout_vector MEM_callouts[MEM_callouts_max];
extern bool isa_memory_hole_15mb;
bool a20_guest_changeable = true;
bool a20_fake_changeable = false;
bool a20_fast_changeable = false;
bool enable_port92 = true;
bool has_Init_RAM = false;
bool has_Init_MemHandles = false;
bool has_Init_MemoryAccessArray = false;
extern Bitu rombios_minimum_location;
extern bool force_conversion;
extern bool VIDEO_BIOS_always_carry_14_high_font;
extern bool VIDEO_BIOS_always_carry_16_high_font;
static struct MemoryBlock {
Bitu pages = 0;
Bitu handler_pages = 0;
Bitu reported_pages = 0;
PageHandler * * phandlers = NULL;
MemHandle * mhandles = NULL;
struct {
Bitu start_page;
Bitu end_page;
Bitu pages;
PageHandler *handler;
} lfb = {};
struct {
Bitu start_page;
Bitu end_page;
Bitu pages;
PageHandler *handler;
} lfb_mmio = {};
struct {
bool enabled;
uint8_t controlport;
} a20 = {};
uint32_t mem_alias_pagemask = 0;
uint32_t mem_alias_pagemask_active = 0;
uint32_t address_bits = 0;
} memory;
uint32_t MEM_get_address_bits() {
return memory.address_bits;
}
HostPt MemBase = NULL;
class UnmappedPageHandler : public PageHandler {
public:
UnmappedPageHandler() : PageHandler(PFLAG_INIT|PFLAG_NOCODE) {}
uint8_t readb(PhysPt addr) override {
(void)addr;//UNUSED
return 0xFF; /* Real hardware returns 0xFF not 0x00 */
}
void writeb(PhysPt addr,uint8_t val) override {
(void)addr;//UNUSED
(void)val;//UNUSED
}
};
class IllegalPageHandler : public PageHandler {
public:
IllegalPageHandler() : PageHandler(PFLAG_INIT|PFLAG_NOCODE) {}
uint8_t readb(PhysPt addr) override {
(void)addr;
#if C_DEBUG
LOG_MSG("Warning: Illegal read from %x, CS:IP %8x:%8x",addr,SegValue(cs),reg_eip);
#else
static Bits lcount=0;
if (lcount<1000) {
lcount++;
//LOG_MSG("Warning: Illegal read from %x, CS:IP %8x:%8x",addr,SegValue(cs),reg_eip);
}
#endif
return 0xFF; /* Real hardware returns 0xFF not 0x00 */
}
void writeb(PhysPt addr,uint8_t val) override {
(void)addr;//UNUSED
(void)val;//UNUSED
#if C_DEBUG
LOG_MSG("Warning: Illegal write to %x, CS:IP %8x:%8x",addr,SegValue(cs),reg_eip);
#else
static Bits lcount=0;
if (lcount<1000) {
lcount++;
//LOG_MSG("Warning: Illegal write to %x, CS:IP %8x:%8x",addr,SegValue(cs),reg_eip);
}
#endif
}
};
class RAMPageHandler : public PageHandler {
public:
RAMPageHandler() : PageHandler(PFLAG_READABLE|PFLAG_WRITEABLE) {}
RAMPageHandler(Bitu flags) : PageHandler(flags) {}
HostPt GetHostReadPt(Bitu phys_page) override {
if (!a20_fast_changeable || (phys_page & (~0xFul/*64KB*/)) == 0x100ul/*@1MB*/)
return MemBase+(phys_page&memory.mem_alias_pagemask_active)*MEM_PAGESIZE;
return MemBase+phys_page*MEM_PAGESIZE;
}
HostPt GetHostWritePt(Bitu phys_page) override {
if (!a20_fast_changeable || (phys_page & (~0xFul/*64KB*/)) == 0x100ul/*@1MB*/)
return MemBase+(phys_page&memory.mem_alias_pagemask_active)*MEM_PAGESIZE;
return MemBase+phys_page*MEM_PAGESIZE;
}
};
class ROMAliasPageHandler : public PageHandler {
public:
ROMAliasPageHandler() {
flags=PFLAG_READABLE|PFLAG_HASROM;
}
HostPt GetHostReadPt(Bitu phys_page) override {
return MemBase+((phys_page&0xF)+0xF0)*MEM_PAGESIZE;
}
HostPt GetHostWritePt(Bitu phys_page) override {
return MemBase+((phys_page&0xF)+0xF0)*MEM_PAGESIZE;
}
};
class ROMPageHandler : public RAMPageHandler {
public:
ROMPageHandler() {
flags=PFLAG_READABLE|PFLAG_HASROM;
}
void writeb(PhysPt addr,uint8_t val) override {
if (IS_PC98_ARCH && (addr & ~0x7FFF) == 0xE0000u)
{ /* Many PC-98 games and programs will zero 0xE0000-0xE7FFF whether or not the 4th bitplane is mapped */ }
else
LOG(LOG_CPU,LOG_ERROR)("Write %x to rom at %x",(int)val,(int)addr);
}
void writew(PhysPt addr,uint16_t val) override {
if (IS_PC98_ARCH && (addr & ~0x7FFF) == 0xE0000u)
{ /* Many PC-98 games and programs will zero 0xE0000-0xE7FFF whether or not the 4th bitplane is mapped */ }
else
LOG(LOG_CPU,LOG_ERROR)("Write %x to rom at %x",(int)val,(int)addr);
}
void writed(PhysPt addr,uint32_t val) override {
if (IS_PC98_ARCH && (addr & ~0x7FFF) == 0xE0000u)
{ /* Many PC-98 games and programs will zero 0xE0000-0xE7FFF whether or not the 4th bitplane is mapped */ }
else
LOG(LOG_CPU,LOG_ERROR)("Write %x to rom at %x",(int)val,(int)addr);
}
};
static UnmappedPageHandler unmapped_page_handler;
static IllegalPageHandler illegal_page_handler;
static RAMPageHandler ram_page_handler;
static ROMPageHandler rom_page_handler;
static ROMAliasPageHandler rom_page_alias_handler;
PageHandler &Get_ROM_page_handler(void) {
return rom_page_handler;
}
extern bool pcibus_enable;
template <enum MEM_Type_t iotype> static unsigned int MEM_Gen_Callout(Bitu &ret,PageHandler* &f,Bitu page) {
int actual = iotype - MEM_TYPE_MIN;
MEM_callout_vector &vec = MEM_callouts[actual];
unsigned int match = 0;
PageHandler *t_f;
size_t scan = 0;
(void)ret;//UNUSED
while (scan < vec.size()) {
MEM_CalloutObject &obj = vec[scan++];
if (!obj.isInstalled()) continue;
if (obj.m_handler == NULL) continue;
if (!obj.MatchPage(page)) continue;
t_f = obj.m_handler(obj,page);
if (t_f != NULL) {
if (match == 0) {
f = t_f;
}
else {
/* device conflict! */
/* TODO: to handle it properly, we would need to know whether this was a memory read or memory write,
* and then have some way for the slow mem page handler to call each page handler one by one
* and either write to each or read from each and combine. */
/* TODO: as usual, if iotype is PCI, multiple writes are permitted, but break out after finding one match for read. */
break;
}
match++;
}
}
return match;
}
static unsigned int MEM_Motherboard_Callout(Bitu &ret,PageHandler* &f,Bitu page) {
return MEM_Gen_Callout<MEM_TYPE_MB>(ret,f,page);
}
static unsigned int MEM_PCI_Callout(Bitu &ret,PageHandler* &f,Bitu page) {
return MEM_Gen_Callout<MEM_TYPE_PCI>(ret,f,page);
}
static unsigned int MEM_ISA_Callout(Bitu &ret,PageHandler* &f,Bitu page) {
return MEM_Gen_Callout<MEM_TYPE_ISA>(ret,f,page);
}
static PageHandler *MEM_SlowPath(Bitu page) {
PageHandler *f = &unmapped_page_handler;
unsigned int match = 0;
Bitu ret = ~0ul;
if (page >= memory.handler_pages)
return &illegal_page_handler;
/* TEMPORARY, REMOVE LATER. SHOULD NOT HAPPEN. */
if (page < memory.reported_pages) {
if (page >= 0xf00 && page <= 0xfff && isa_memory_hole_15mb) { /* 0xF00000-0xFFFFFF (15MB-16MB) */
/* ignore, ISA memory hole */
}
else {
LOG(LOG_MISC,LOG_WARN)("MEM_SlowPath called within system RAM at page %x",(unsigned int)page);
f = (PageHandler*)(&ram_page_handler);
}
}
/* check motherboard devices (ROM BIOS, system RAM, etc.) */
match = MEM_Motherboard_Callout(/*&*/ret,/*&*/f,page);
if (match == 0) {
/* first PCI bus device, then ISA. */
if (pcibus_enable) {
/* PCI and PCI/ISA bridge emulation */
match = MEM_PCI_Callout(/*&*/ret,/*&*/f,page);
if (match == 0) {
/* PCI didn't take it, ask ISA bus */
match = MEM_ISA_Callout(/*&*/ret,/*&*/f,page);
}
}
else {
/* Pure ISA emulation */
match = MEM_ISA_Callout(/*&*/ret,/*&*/f,page);
}
}
/* if nothing matched, assign default handler to MEM handler slot.
* if one device responded, assign its handler to the MEM handler slot.
* if more than one responded, then do not update the MEM handler slot. */
// assert(iolen >= 1 && iolen <= 4);
// porti = (iolen >= 4) ? 2 : (iolen - 1); /* 1 2 x 4 -> 0 1 1 2 */
LOG(LOG_MISC,LOG_DEBUG)("MEM slow path page=%x: device matches=%u",(unsigned int)page,(unsigned int)match);
if (match <= 1) memory.phandlers[page] = f;
return f;
}
void MEM_RegisterHandler(Bitu phys_page,PageHandler * handler,Bitu page_range) {
assert((phys_page+page_range) <= memory.handler_pages);
while (page_range--) memory.phandlers[phys_page++]=handler;
}
void MEM_InvalidateCachedHandler(Bitu phys_page,Bitu range) {
assert((phys_page+range) <= memory.handler_pages);
while (range--) memory.phandlers[phys_page++]=NULL;
}
void MEM_FreeHandler(Bitu phys_page,Bitu page_range) {
MEM_InvalidateCachedHandler(phys_page,page_range);
}
void MEM_CalloutObject::InvalidateCachedHandlers(void) {
Bitu p;
/* for both the base page, as well as its aliases, revert the pages back to "slow path" */
for (p=m_base;p < memory.handler_pages;p += alias_mask+1)
MEM_InvalidateCachedHandler(p,range_mask+1);
}
void MEM_CalloutObject::Install(Bitu page,Bitu pagemask/*MEMMASK_ISA_10BIT, etc.*/,MEM_CalloutHandler *handler) {
if(!installed) {
if (pagemask == 0 || (pagemask & ~0xFFFFFFFU)) {
LOG(LOG_MISC,LOG_ERROR)("MEM_CalloutObject::Install: Page mask %x is invalid",(unsigned int)pagemask);
return;
}
/* we need a mask for the distance between aliases of the port, and the range of I/O ports. */
/* only the low part of the mask where bits are zero, not the upper.
* This loop is the reason portmask cannot be ~0 else it would become an infinite loop.
* This also serves to check that the mask is a proper combination of ISA masking and
* I/O port range (example: IOMASK_ISA_10BIT & (~0x3) == 0x3FF & 0xFFFFFFFC = 0x3FC for a device with 4 I/O ports).
* A proper mask has (from MSB to LSB):
* - zero or more 0 bits from MSB
* - 1 or more 1 bits in the middle
* - zero or more 0 bits to LSB */
{
Bitu m = 1;
Bitu test;
/* compute range mask from zero bits at LSB */
range_mask = 0;
test = pagemask ^ 0xFFFFFFFU;
while ((test & m) == m) {
range_mask = m;
m = (m << 1) + 1;
}
/* DEBUG */
if ((pagemask & range_mask) != 0 ||
((range_mask + 1) & range_mask) != 0/* should be a mask, therefore AND by itself + 1 should be zero (think (0xF + 1) & 0xF = 0x10 & 0xF = 0x0) */) {
LOG(LOG_MISC,LOG_ERROR)("MEM_CalloutObject::Install: pagemask(%x) & range_mask(%x) != 0 (%x). You found a corner case that broke this code, fix it.",
(unsigned int)pagemask,
(unsigned int)range_mask,
(unsigned int)(pagemask & range_mask));
return;
}
/* compute alias mask from middle 1 bits */
alias_mask = range_mask;
test = pagemask + range_mask; /* will break if portmask & range_mask != 0 */
while ((test & m) == m) {
alias_mask = m;
m = (m << 1) + 1;
}
/* any bits after that should be zero. */
/* confirm this by XORing portmask by (alias_mask ^ range_mask). */
/* we already confirmed that portmask & range_mask == 0. */
/* Example:
*
* Sound Blaster at port 220-22Fh with 10-bit ISA decode would be 0x03F0 therefore:
* portmask = 0x03F0
* range_mask = 0x000F
* alias_mask = 0x03FF
*
* portmask ^ range_mask = 0x3FF
* portmask ^ range_mask ^ alias_mask = 0x0000
*
* Example of invalid portmask 0x13F0:
* portmask = 0x13F0
* range_mask = 0x000F
* alias_mask = 0x03FF
*
* portmask ^ range_mask = 0x13FF
* portmask ^ range_mask ^ alias_mask = 0x1000 */
if ((pagemask ^ range_mask ^ alias_mask) != 0 ||
((alias_mask + 1) & alias_mask) != 0/* should be a mask, therefore AND by itself + 1 should be zero */) {
LOG(LOG_MISC,LOG_ERROR)("MEM_CalloutObject::Install: pagemask(%x) ^ range_mask(%x) ^ alias_mask(%x) != 0 (%x). Invalid portmask.",
(unsigned int)pagemask,
(unsigned int)range_mask,
(unsigned int)alias_mask,
(unsigned int)(pagemask ^ range_mask ^ alias_mask));
return;
}
if (page & range_mask) {
LOG(LOG_MISC,LOG_ERROR)("MEM_CalloutObject::Install: page %x and page mask %x not aligned (range_mask %x)",
(unsigned int)page,(unsigned int)pagemask,(unsigned int)range_mask);
return;
}
}
installed=true;
m_base=page;
mem_mask=pagemask;
m_handler=handler;
/* add this object to the callout array.
* don't register any I/O handlers. those will be registered during the "slow path"
* callout process when the CPU goes to access them. to encourage that to happen,
* we invalidate the I/O ranges */
LOG(LOG_MISC,LOG_DEBUG)("MEM_CalloutObject::Install added device with page=0x%x mem_mask=0x%x rangemask=0x%x aliasmask=0x%x",
(unsigned int)page,(unsigned int)mem_mask,(unsigned int)range_mask,(unsigned int)alias_mask);
InvalidateCachedHandlers();
}
}
void MEM_CalloutObject::Uninstall() {
if(!installed) return;
InvalidateCachedHandlers();
installed=false;
}
/* callers maintain a handle to it.
* if they need to touch it, they get a pointer, which they then have to put back.
* The way DOSBox/DOSbox-X code handles MEM callbacks it's common to declare an MEM object,
* call the install, but then never touch it again, so this should work fine.
*
* this allows us to maintain ready-made MEM callout objects to return quickly rather
* than write more complicated code where the caller has to make an MEM_CalloutObject
* and then call install and we have to add its pointer to a list/vector/whatever.
* It also avoids problems where if we have to resize the vector, the pointers become
* invalid, because callers have only handles and they have to put all the pointers
* back in order for us to resize the vector. */
MEM_Callout_t MEM_AllocateCallout(MEM_Type_t t) {
if (t < MEM_TYPE_MIN || t >= MEM_TYPE_MAX)
return MEM_Callout_t_none;
MEM_callout_vector &vec = MEM_callouts[t - MEM_TYPE_MIN];
try_again:
while (vec.alloc_from < vec.size()) {
MEM_CalloutObject &obj = vec[vec.alloc_from];
if (!obj.alloc) {
obj.alloc = true;
assert(obj.isInstalled() == false);
return MEM_Callout_t_comb(t,vec.alloc_from++); /* make combination, then increment alloc_from */
}
vec.alloc_from++;
}
/* okay, double the size of the vector within reason.
* if anyone has pointers out to our elements, then we cannot resize. vector::resize() may invalidate them. */
if (vec.size() < 4096 && vec.getcounter == 0) {
size_t nsz = vec.size() * 2;
LOG(LOG_MISC,LOG_WARN)("MEM_AllocateCallout type %u expanding array to %u",(unsigned int)t,(unsigned int)nsz);
vec.alloc_from = (unsigned int)vec.size(); /* allocate from end of old vector size */
vec.resize(nsz);
goto try_again;
}
LOG(LOG_MISC,LOG_WARN)("MEM_AllocateCallout type %u no free entries",(unsigned int)t);
return MEM_Callout_t_none;
}
void MEM_FreeCallout(MEM_Callout_t c) {
enum MEM_Type_t t = MEM_Callout_t_type(c);
if (t < MEM_TYPE_MIN || t >= MEM_TYPE_MAX)
return;
MEM_callout_vector &vec = MEM_callouts[t - MEM_TYPE_MIN];
uint32_t idx = MEM_Callout_t_index(c);
if (idx >= vec.size())
return;
MEM_CalloutObject &obj = vec[idx];
if (!obj.alloc) return;
if (obj.isInstalled())
obj.Uninstall();
obj.alloc = false;
if (vec.alloc_from > idx)
vec.alloc_from = idx; /* an empty slot just opened up, you can alloc from there */
}
MEM_CalloutObject *MEM_GetCallout(MEM_Callout_t c) {
enum MEM_Type_t t = MEM_Callout_t_type(c);
if (t < MEM_TYPE_MIN || t >= MEM_TYPE_MAX)
return NULL;
MEM_callout_vector &vec = MEM_callouts[t - MEM_TYPE_MIN];
uint32_t idx = MEM_Callout_t_index(c);
if (idx >= vec.size())
return NULL;
MEM_CalloutObject &obj = vec[idx];
if (!obj.alloc) return NULL;
obj.getcounter++;
return &obj;
}
void MEM_PutCallout(MEM_CalloutObject *obj) {
if (obj == NULL) return;
if (obj->getcounter == 0) return;
obj->getcounter--;
}
void lfb_mem_cb_free(void) {
if (lfb_mem_cb != MEM_Callout_t_none) {
MEM_FreeCallout(lfb_mem_cb);
lfb_mem_cb = MEM_Callout_t_none;
}
if (lfb_mmio_cb != MEM_Callout_t_none) {
MEM_FreeCallout(lfb_mmio_cb);
lfb_mmio_cb = MEM_Callout_t_none;
}
}
PageHandler* lfb_memio_cb(MEM_CalloutObject &co,Bitu phys_page) {
(void)co;//UNUSED
if (memory.lfb.start_page == 0 || memory.lfb.pages == 0)
return NULL;
if (phys_page >= memory.lfb.start_page && phys_page < memory.lfb.end_page)
return memory.lfb.handler;
if (phys_page >= memory.lfb_mmio.start_page && phys_page < memory.lfb_mmio.end_page)
return memory.lfb_mmio.handler;
return NULL;
}
void lfb_mem_cb_init() {
if (lfb_mem_cb == MEM_Callout_t_none) {
lfb_mem_cb = MEM_AllocateCallout(pcibus_enable ? MEM_TYPE_PCI : MEM_TYPE_ISA);
if (lfb_mem_cb == MEM_Callout_t_none) E_Exit("Unable to allocate mem cb for LFB");
}
if (lfb_mmio_cb == MEM_Callout_t_none) {
lfb_mmio_cb = MEM_AllocateCallout(pcibus_enable ? MEM_TYPE_PCI : MEM_TYPE_ISA);
if (lfb_mmio_cb == MEM_Callout_t_none) E_Exit("Unable to allocate mmio cb for LFB");
}
{
MEM_CalloutObject *cb = MEM_GetCallout(lfb_mem_cb);
assert(cb != NULL);
cb->Uninstall();
if (memory.lfb.pages != 0) {
Bitu p2sz = 1;
/* make p2sz the largest power of 2 that covers the LFB */
while (p2sz < memory.lfb.pages) p2sz <<= (Bitu)1;
cb->Install(memory.lfb.start_page,MEMMASK_Combine(MEMMASK_FULL,MEMMASK_Range(p2sz)),lfb_memio_cb);
}
MEM_PutCallout(cb);
}
{
MEM_CalloutObject *cb = MEM_GetCallout(lfb_mmio_cb);
assert(cb != NULL);
cb->Uninstall();
if (memory.lfb_mmio.pages != 0) {
Bitu p2sz = 1;
/* make p2sz the largest power of 2 that covers the LFB */
while (p2sz < memory.lfb_mmio.pages) p2sz <<= (Bitu)1;
cb->Install(memory.lfb_mmio.start_page,MEMMASK_Combine(MEMMASK_FULL,MEMMASK_Range(p2sz)),lfb_memio_cb);
}
MEM_PutCallout(cb);
}
}
/* TODO: At some point, this common code needs to be removed and the S3 emulation (or whatever else)
* needs to provide LFB and/or MMIO mapping. */
void MEM_SetLFB(Bitu page, Bitu pages, PageHandler *handler, PageHandler *mmiohandler) {
if (page == memory.lfb.start_page && memory.lfb.end_page == (page+pages) &&
memory.lfb.pages == pages && memory.lfb.handler == handler &&
memory.lfb_mmio.handler == mmiohandler)
return;
memory.lfb.handler=handler;
if (handler != NULL) {
memory.lfb.start_page=page;
memory.lfb.end_page=page+pages;
memory.lfb.pages=pages;
}
else {
memory.lfb.start_page=0;
memory.lfb.end_page=0;
memory.lfb.pages=0;
}
memory.lfb_mmio.handler=mmiohandler;
if (mmiohandler != NULL) {
/* FIXME: Why is this hard-coded? There's more than just S3 emulation in this code's future! */
if (svgaCard == SVGA_S3Trio && (s3Card == S3_Trio64V || s3Card == S3_Vision868 || s3Card == S3_Vision968 || s3Card == S3_ViRGE || s3Card == S3_ViRGEVX)) {
/* 64MB BAR. According to the datasheet, this 64MB region is split into two 32MB halves,
* the lower half "little endian" and the upper half "big endian". Within the 32MB region,
* the low 16MB is video memory and the high 16MB is MMIO. */
memory.lfb_mmio.start_page=page+(0x01000000/4096);
memory.lfb_mmio.end_page=page+(0x01000000/4096)+16;
memory.lfb_mmio.pages=16;
}
else {
/* 8MB BAR, MMIO at +16MB */
memory.lfb_mmio.start_page=page+(0x01000000/4096);
memory.lfb_mmio.end_page=page+(0x01000000/4096)+16;
memory.lfb_mmio.pages=16;
}
}
else {
memory.lfb_mmio.start_page=0;
memory.lfb_mmio.end_page=0;
memory.lfb_mmio.pages=0;
}
if (pages == 0 || page == 0) {
lfb_mem_cb_free();
LOG(LOG_MISC,LOG_DEBUG)("MEM: Linear framebuffer disabled");
}
else {
lfb_mem_cb_init();
LOG(LOG_MISC,LOG_DEBUG)("MEM: Linear framebuffer is now set to 0x%lx-0x%lx (%uKB)",
(unsigned long)(page*4096),
(unsigned long)(((page+pages)*4096)-1),
(unsigned int)(pages*4));
// FIXME: Because this code emulates S3 by hardcoding the MMIO address!
LOG(LOG_MISC,LOG_DEBUG)("MEM: Linear framebuffer MMIO is now set to 0x%lx-0x%lx (%uKB)",
(unsigned long)(page*4096)+0x01000000,
(unsigned long)(((page+16)*4096)+0x01000000-1),
(unsigned int)(16*4));
}
PAGING_ClearTLB();
}
PageHandler * MEM_GetPageHandler(Bitu phys_page) {
phys_page &= memory.mem_alias_pagemask_active;
if (glide.enabled && (phys_page>=(GLIDE_LFB>>12)) && (phys_page<(GLIDE_LFB>>12)+GLIDE_PAGES))
return (PageHandler*)glide.lfb_pagehandler;
else if (phys_page<memory.handler_pages) {
if (memory.phandlers[phys_page] != NULL) /*likely*/
return memory.phandlers[phys_page];
return MEM_SlowPath(phys_page); /* will also fill in phandlers[] if zero or one matches, so the next access is very fast */
}
return &illegal_page_handler;
}
void MEM_SetPageHandler(Bitu phys_page,Bitu pages,PageHandler * handler) {
for (;pages>0;pages--) {
memory.phandlers[phys_page]=handler;
phys_page++;
}
}
void MEM_ResetPageHandler_RAM(Bitu phys_page, Bitu pages) {
PageHandler *ram_ptr = (PageHandler*)(&ram_page_handler);
for (;pages>0;pages--) {
memory.phandlers[phys_page]=ram_ptr;
phys_page++;
}
}
void MEM_ResetPageHandler_Unmapped(Bitu phys_page, Bitu pages) {
for (;pages>0;pages--) {
memory.phandlers[phys_page]=&unmapped_page_handler;
phys_page++;
}
}
Bitu mem_strlen(PhysPt pt) {
uint16_t x=0;
while (x<1024) {
if (!mem_readb_inline(pt+x)) return x;
x++;
}
return 0; //Hope this doesn't happen
}
void mem_strcpy(PhysPt dest,PhysPt src) {
uint8_t r;
while ( (r = mem_readb(src++)) ) mem_writeb_inline(dest++,r);
mem_writeb_inline(dest,0);
}
void mem_memcpy(PhysPt dest,PhysPt src,Bitu size) {
while (size--) mem_writeb_inline(dest++,mem_readb_inline(src++));
}
void MEM_BlockRead(PhysPt pt,void * data,Bitu size) {
uint8_t * write=reinterpret_cast<uint8_t *>(data);
while (size--) {
*write++=mem_readb_inline(pt++);
}
}
void MEM_BlockWrite(PhysPt pt, const void *data, size_t size) {
const uint8_t* read = static_cast<const uint8_t *>(data);
if (size==0)
return;
if ((pt >> 12) == ((pt+size-1)>>12)) { // Always same TLB entry
HostPt tlb_addr=get_tlb_write(pt);
if (!tlb_addr) {
uint8_t val = *read++;
get_tlb_writehandler(pt)->writeb(pt,val);
tlb_addr=get_tlb_write(pt);
pt++; size--;
if (!tlb_addr) {
// Slow path
while (size--) {
mem_writeb_inline(pt++,*read++);
}
return;
}
}
// Fast path
memcpy(tlb_addr+pt, read, size);
}
else {
const Bitu current = (((pt>>12)+1)<<12) - pt;
Bitu remainder = size - current;
MEM_BlockWrite(pt, data, current);
MEM_BlockWrite((PhysPt)(pt + current), reinterpret_cast<uint8_t const*>(data) + current, remainder);
}
}
void MEM_BlockRead32(PhysPt pt,void * data,Bitu size) {
uint32_t * write=(uint32_t *) data;
size>>=2;
while (size--) {
*write++=mem_readd_inline(pt);
pt+=4;
}
}
void MEM_BlockWrite32(PhysPt pt,void * data,Bitu size) {
uint32_t * read=(uint32_t *) data;
size>>=2;
while (size--) {
mem_writed_inline(pt,*read++);
pt+=4;
}
}
void MEM_BlockCopy(PhysPt dest,PhysPt src,Bitu size) {
mem_memcpy(dest,src,size);
}
void MEM_StrCopy(PhysPt pt,char * data,Bitu size) {
while (size--) {
uint8_t r=mem_readb_inline(pt++);
if (!r) break;
*data++=(char)r;
}
*data=0;
}
Bitu MEM_TotalPages(void) {
return memory.reported_pages;
}
Bitu MEM_FreeLargest(void) {
Bitu size=0;Bitu largest=0;
Bitu index=XMS_START;
while (index<memory.reported_pages) {
if (!memory.mhandles[index]) {
size++;
} else {
if (size>largest) largest=size;
size=0;
}
index++;
}
if (size>largest) largest=size;
return largest;
}
Bitu MEM_FreeTotal(void) {
Bitu free=0;
Bitu index=XMS_START;
while (index<memory.reported_pages) {
if (!memory.mhandles[index]) free++;
index++;
}
return free;
}
Bitu MEM_AllocatedPages(MemHandle handle)
{
Bitu pages = 0;
while (handle>0) {
pages++;
handle=memory.mhandles[handle];
}
return pages;
}
//TODO Maybe some protection for this whole allocation scheme
INLINE uint32_t BestMatch(Bitu size) {
uint32_t index=XMS_START;
uint32_t first=0;
uint32_t best=0xfffffff;
uint32_t best_first=0;
while (index<memory.reported_pages) {
/* Check if we are searching for first free page */
if (!first) {
/* Check if this is a free page */
if (!memory.mhandles[index]) {
first=index;
}
} else {
/* Check if this still is used page */
if (memory.mhandles[index]) {
uint32_t pages=index-first;
if (pages==size) {
return first;
} else if (pages>size) {
if (pages<best) {
best=pages;
best_first=first;
}
}
first=0; //Always reset for new search
}
}
index++;
}
/* Check for the final block if we can */
if (first && (index-first>=size) && (index-first<best)) {
return first;
}
return best_first;
}
/* alternate copy, that will only allocate memory on addresses
* where the 20th address bit is zero. memory allocated in this
* way will always be accessible no matter the state of the A20 gate */
INLINE uint32_t BestMatch_A20_friendly(Bitu size) {
uint32_t index=XMS_START;
uint32_t first=0;
uint32_t best=0xfffffff;
uint32_t best_first=0;
/* if the memory to allocate is more than 1MB this function will never work. give up now. */
if (size > 0x100)
return 0;
/* TODO: For EMS allocation this would put things in the middle of extended memory space,
* which would increase possible memory fragmentation! Could we avoid memory fragmentation
* by instead scanning from the top down i.e. so the EMS system memory takes the top of
* extended memory and the DOS program is free to gobble up a large continuous range from
* below? */
while (index<memory.reported_pages) {
/* Check if we are searching for first free page */
if (!first) {
/* if the index is now on an odd megabyte, skip forward and try again */
if (index & 0x100) {
index = (index|0xFF)+1; /* round up to an even megabyte */
continue;
}