Skip to content

HTTPS clone URL

Subversion checkout URL

You can clone with HTTPS or Subversion.

Download ZIP
Newer
Older
100644 430 lines (385 sloc) 15.433 kb
68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47 *
48 */
49 #include "hw.h"
50 #include "ppc.h"
51 #include "ppc_mac.h"
52 #include "mac_dbdma.h"
53 #include "nvram.h"
54 #include "pc.h"
55 #include "pci.h"
56 #include "usb-ohci.h"
57 #include "net.h"
58 #include "sysemu.h"
59 #include "boards.h"
60 #include "fw_cfg.h"
61 #include "escc.h"
62 #include "openpic.h"
63 #include "ide.h"
64 #include "loader.h"
65 #include "elf.h"
66 #include "kvm.h"
67 #include "kvm_ppc.h"
68 #include "hw/usb.h"
69 #include "blockdev.h"
70
71 #define MAX_IDE_BUS 2
72 #define CFG_ADDR 0xf0000510
73
74 /* debug UniNorth */
75 //#define DEBUG_UNIN
76
77 #ifdef DEBUG_UNIN
78 #define UNIN_DPRINTF(fmt, ...) \
79 do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
80 #else
81 #define UNIN_DPRINTF(fmt, ...)
82 #endif
83
84 /* UniN device */
85 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
86 {
87 UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
88 }
89
90 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
91 {
92 uint32_t value;
93
94 value = 0;
95 UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
96
97 return value;
98 }
99
100 static CPUWriteMemoryFunc * const unin_write[] = {
101 &unin_writel,
102 &unin_writel,
103 &unin_writel,
104 };
105
106 static CPUReadMemoryFunc * const unin_read[] = {
107 &unin_readl,
108 &unin_readl,
109 &unin_readl,
110 };
111
112 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
113 {
114 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
115 return 0;
116 }
117
118 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
119 {
120 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
121 }
122
123 /* PowerPC Mac99 hardware initialisation */
124 static void ppc_core99_init (ram_addr_t ram_size,
125 const char *boot_device,
126 const char *kernel_filename,
127 const char *kernel_cmdline,
128 const char *initrd_filename,
129 const char *cpu_model)
130 {
131 CPUState *env = NULL;
132 char *filename;
133 qemu_irq *pic, **openpic_irqs;
134 int unin_memory;
135 int linux_boot, i;
136 ram_addr_t ram_offset, bios_offset;
137 uint32_t kernel_base, initrd_base;
138 long kernel_size, initrd_size;
139 PCIBus *pci_bus;
140 MacIONVRAMState *nvr;
141 int nvram_mem_index;
142 int bios_size;
143 int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
144 int ide_mem_index[3];
145 int ppc_boot_device;
146 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
147 void *fw_cfg;
148 void *dbdma;
149 int machine_arch;
150
151 linux_boot = (kernel_filename != NULL);
152
153 /* init CPUs */
154 if (cpu_model == NULL)
155 #ifdef TARGET_PPC64
156 cpu_model = "970fx";
157 #else
158 cpu_model = "G4";
159 #endif
160 for (i = 0; i < smp_cpus; i++) {
161 env = cpu_init(cpu_model);
162 if (!env) {
163 fprintf(stderr, "Unable to find PowerPC CPU definition\n");
164 exit(1);
165 }
166 /* Set time-base frequency to 100 Mhz */
167 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
168 qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
169 }
170
171 /* allocate RAM */
172 ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
173 cpu_register_physical_memory(0, ram_size, ram_offset);
174
175 /* allocate and load BIOS */
176 bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
177 if (bios_name == NULL)
178 bios_name = PROM_FILENAME;
179 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
180 cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
181
182 /* Load OpenBIOS (ELF) */
183 if (filename) {
184 bios_size = load_elf(filename, NULL, NULL, NULL,
185 NULL, NULL, 1, ELF_MACHINE, 0);
186
187 qemu_free(filename);
188 } else {
189 bios_size = -1;
190 }
191 if (bios_size < 0 || bios_size > BIOS_SIZE) {
192 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
193 exit(1);
194 }
195
196 if (linux_boot) {
197 uint64_t lowaddr = 0;
198 int bswap_needed;
199
200 #ifdef BSWAP_NEEDED
201 bswap_needed = 1;
202 #else
203 bswap_needed = 0;
204 #endif
205 kernel_base = KERNEL_LOAD_ADDR;
206
207 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
208 NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
209 if (kernel_size < 0)
210 kernel_size = load_aout(kernel_filename, kernel_base,
211 ram_size - kernel_base, bswap_needed,
212 TARGET_PAGE_SIZE);
213 if (kernel_size < 0)
214 kernel_size = load_image_targphys(kernel_filename,
215 kernel_base,
216 ram_size - kernel_base);
217 if (kernel_size < 0) {
218 hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
219 exit(1);
220 }
221 /* load initrd */
222 if (initrd_filename) {
223 initrd_base = INITRD_LOAD_ADDR;
224 initrd_size = load_image_targphys(initrd_filename, initrd_base,
225 ram_size - initrd_base);
226 if (initrd_size < 0) {
227 hw_error("qemu: could not load initial ram disk '%s'\n",
228 initrd_filename);
229 exit(1);
230 }
231 } else {
232 initrd_base = 0;
233 initrd_size = 0;
234 }
235 ppc_boot_device = 'm';
236 } else {
237 kernel_base = 0;
238 kernel_size = 0;
239 initrd_base = 0;
240 initrd_size = 0;
241 ppc_boot_device = '\0';
242 /* We consider that NewWorld PowerMac never have any floppy drive
243 * For now, OHW cannot boot from the network.
244 */
245 for (i = 0; boot_device[i] != '\0'; i++) {
246 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
247 ppc_boot_device = boot_device[i];
248 break;
249 }
250 }
251 if (ppc_boot_device == '\0') {
252 fprintf(stderr, "No valid boot device for Mac99 machine\n");
253 exit(1);
254 }
255 }
256
257 isa_mem_base = 0x80000000;
258
259 /* Register 8 MB of ISA IO space */
260 isa_mmio_init(0xf2000000, 0x00800000);
261
262 /* UniN init */
263 unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL,
264 DEVICE_NATIVE_ENDIAN);
265 cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
266
267 openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
268 openpic_irqs[0] =
269 qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
270 for (i = 0; i < smp_cpus; i++) {
271 /* Mac99 IRQ connection between OpenPIC outputs pins
272 * and PowerPC input pins
273 */
274 switch (PPC_INPUT(env)) {
275 case PPC_FLAGS_INPUT_6xx:
276 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
277 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
278 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
279 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
280 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
281 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
282 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
283 /* Not connected ? */
284 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
285 /* Check this */
286 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
287 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
288 break;
289 #if defined(TARGET_PPC64)
290 case PPC_FLAGS_INPUT_970:
291 openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
292 openpic_irqs[i][OPENPIC_OUTPUT_INT] =
293 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
294 openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
295 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
296 openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
297 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
298 /* Not connected ? */
299 openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
300 /* Check this */
301 openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
302 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
303 break;
304 #endif /* defined(TARGET_PPC64) */
305 default:
306 hw_error("Bus model not supported on mac99 machine\n");
307 exit(1);
308 }
309 }
310 pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
311 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
312 /* 970 gets a U3 bus */
313 pci_bus = pci_pmac_u3_init(pic);
314 machine_arch = ARCH_MAC99_U3;
315 } else {
316 pci_bus = pci_pmac_init(pic);
317 machine_arch = ARCH_MAC99;
318 }
319 /* init basic PC hardware */
320 pci_vga_init(pci_bus);
321
322 escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
323 serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
324
325 for(i = 0; i < nb_nics; i++)
326 pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
327
328 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
329 fprintf(stderr, "qemu: too many IDE bus\n");
330 exit(1);
331 }
332 dbdma = DBDMA_init(&dbdma_mem_index);
333
334 /* We only emulate 2 out of 3 IDE controllers for now */
335 ide_mem_index[0] = -1;
336 hd[0] = drive_get(IF_IDE, 0, 0);
337 hd[1] = drive_get(IF_IDE, 0, 1);
338 ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
339 hd[0] = drive_get(IF_IDE, 1, 0);
340 hd[1] = drive_get(IF_IDE, 1, 1);
341 ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
342
343 /* cuda also initialize ADB */
344 if (machine_arch == ARCH_MAC99_U3) {
345 usb_enabled = 1;
346 }
347 cuda_init(&cuda_mem_index, pic[0x19]);
348
349 adb_kbd_init(&adb_bus);
350 adb_mouse_init(&adb_bus);
351
352 macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
353 dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
354 escc_mem_index);
355
356 if (usb_enabled) {
357 usb_ohci_init_pci(pci_bus, -1);
358 }
359
360 /* U3 needs to use USB for input because Linux doesn't support via-cuda
361 on PPC64 */
362 if (machine_arch == ARCH_MAC99_U3) {
363 usbdevice_create("keyboard");
364 usbdevice_create("mouse");
365 }
366
367 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
368 graphic_depth = 15;
369
370 /* The NewWorld NVRAM is not located in the MacIO device */
371 nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
372 pmac_format_nvram_partition(nvr, 0x2000);
373 macio_nvram_map(nvr, 0xFFF04000);
374 /* No PCI init: the BIOS will do it */
375
376 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
377 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
378 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
379 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
380 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
381 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
382 if (kernel_cmdline) {
383 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
384 pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
385 } else {
386 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
387 }
388 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
389 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
390 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
391
392 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
393 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
394 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
395
396 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
397 if (kvm_enabled()) {
398 #ifdef CONFIG_KVM
399 uint8_t *hypercall;
400
401 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
402 hypercall = qemu_malloc(16);
403 kvmppc_get_hypercall(env, hypercall, 16);
404 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
405 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
406 #endif
407 } else {
408 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
409 }
410
411 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
412 }
413
414 static QEMUMachine core99_machine = {
415 .name = "mac99",
416 .desc = "Mac99 based PowerMAC",
417 .init = ppc_core99_init,
418 .max_cpus = MAX_CPUS,
419 #ifdef TARGET_PPC64
420 .is_default = 1,
421 #endif
422 };
423
424 static void core99_machine_init(void)
425 {
426 qemu_register_machine(&core99_machine);
427 }
428
429 machine_init(core99_machine_init);
Something went wrong with that request. Please try again.