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68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 */
9
10 /*
11 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
12 * http://www.linux-mips.org/wiki/Fulong
13 *
14 * Loongson 2e user manual:
15 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
16 */
17
18 #include "hw.h"
19 #include "pc.h"
20 #include "fdc.h"
21 #include "net.h"
22 #include "boards.h"
23 #include "smbus.h"
24 #include "block.h"
25 #include "flash.h"
26 #include "mips.h"
27 #include "mips_cpudevs.h"
28 #include "pci.h"
29 #include "usb-uhci.h"
30 #include "qemu-char.h"
31 #include "sysemu.h"
32 #include "audio/audio.h"
33 #include "qemu-log.h"
34 #include "loader.h"
35 #include "mips-bios.h"
36 #include "ide.h"
37 #include "elf.h"
38 #include "vt82c686.h"
39 #include "mc146818rtc.h"
40 #include "blockdev.h"
41
42 #define DEBUG_FULONG2E_INIT
43
44 #define ENVP_ADDR 0x80002000l
45 #define ENVP_NB_ENTRIES 16
46 #define ENVP_ENTRY_SIZE 256
47
48 #define MAX_IDE_BUS 2
49
50 /*
51 * PMON is not part of qemu and released with BSD license, anyone
52 * who want to build a pmon binary please first git-clone the source
53 * from the git repository at:
54 * http://www.loongson.cn/support/git/pmon
55 * Then follow the "Compile Guide" available at:
56 * http://dev.lemote.com/code/pmon
57 *
58 * Notes:
59 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
60 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
61 * in the "Compile Guide".
62 */
63 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
64
65 /* PCI SLOT in fulong 2e */
66 #define FULONG2E_VIA_SLOT 5
67 #define FULONG2E_ATI_SLOT 6
68 #define FULONG2E_RTL8139_SLOT 7
69
70 static PITState *pit;
71
72 static struct _loaderparams {
73 int ram_size;
74 const char *kernel_filename;
75 const char *kernel_cmdline;
76 const char *initrd_filename;
77 } loaderparams;
78
79 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
80 const char *string, ...)
81 {
82 va_list ap;
83 int32_t table_addr;
84
85 if (index >= ENVP_NB_ENTRIES)
86 return;
87
88 if (string == NULL) {
89 prom_buf[index] = 0;
90 return;
91 }
92
93 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
94 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
95
96 va_start(ap, string);
97 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
98 va_end(ap);
99 }
100
101 static int64_t load_kernel (CPUState *env)
102 {
103 int64_t kernel_entry, kernel_low, kernel_high;
104 int index = 0;
105 long initrd_size;
106 ram_addr_t initrd_offset;
107 uint32_t *prom_buf;
108 long prom_size;
109
110 if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
111 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
112 (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
113 fprintf(stderr, "qemu: could not load kernel '%s'\n",
114 loaderparams.kernel_filename);
115 exit(1);
116 }
117
118 /* load initrd */
119 initrd_size = 0;
120 initrd_offset = 0;
121 if (loaderparams.initrd_filename) {
122 initrd_size = get_image_size (loaderparams.initrd_filename);
123 if (initrd_size > 0) {
124 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
125 if (initrd_offset + initrd_size > ram_size) {
126 fprintf(stderr,
127 "qemu: memory too small for initial ram disk '%s'\n",
128 loaderparams.initrd_filename);
129 exit(1);
130 }
131 initrd_size = load_image_targphys(loaderparams.initrd_filename,
132 initrd_offset, ram_size - initrd_offset);
133 }
134 if (initrd_size == (target_ulong) -1) {
135 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
136 loaderparams.initrd_filename);
137 exit(1);
138 }
139 }
140
141 /* Setup prom parameters. */
142 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
143 prom_buf = qemu_malloc(prom_size);
144
145 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
146 if (initrd_size > 0) {
147 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
148 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
149 loaderparams.kernel_cmdline);
150 } else {
151 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
152 }
153
154 /* Setup minimum environment variables */
155 prom_set(prom_buf, index++, "busclock=33000000");
156 prom_set(prom_buf, index++, "cpuclock=100000000");
157 prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
158 prom_set(prom_buf, index++, "modetty0=38400n8r");
159 prom_set(prom_buf, index++, NULL);
160
161 rom_add_blob_fixed("prom", prom_buf, prom_size,
162 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
163
164 return kernel_entry;
165 }
166
167 static void write_bootloader (CPUState *env, uint8_t *base, int64_t kernel_addr)
168 {
169 uint32_t *p;
170
171 /* Small bootloader */
172 p = (uint32_t *) base;
173
174 stl_raw(p++, 0x0bf00010); /* j 0x1fc00040 */
175 stl_raw(p++, 0x00000000); /* nop */
176
177 /* Second part of the bootloader */
178 p = (uint32_t *) (base + 0x040);
179
180 stl_raw(p++, 0x3c040000); /* lui a0, 0 */
181 stl_raw(p++, 0x34840002); /* ori a0, a0, 2 */
182 stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
183 stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
184 stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
185 stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
186 stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
187 stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
188 stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
189 stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
190 stl_raw(p++, 0x03e00008); /* jr ra */
191 stl_raw(p++, 0x00000000); /* nop */
192 }
193
194
195 static void main_cpu_reset(void *opaque)
196 {
197 CPUState *env = opaque;
198
199 cpu_reset(env);
200 /* TODO: 2E reset stuff */
201 if (loaderparams.kernel_filename) {
202 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
203 }
204 }
205
206 uint8_t eeprom_spd[0x80] = {
207 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
208 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
209 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
210 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
211 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
212 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
213 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
214 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
215 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
216 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
217 0x20,0x30,0x20
218 };
219
220 /* Audio support */
221 static void audio_init (PCIBus *pci_bus)
222 {
223 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
224 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
225 }
226
227 /* Network support */
228 static void network_init (void)
229 {
230 int i;
231
232 for(i = 0; i < nb_nics; i++) {
233 NICInfo *nd = &nd_table[i];
234 const char *default_devaddr = NULL;
235
236 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
237 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
238 default_devaddr = "07";
239 }
240
241 pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
242 }
243 }
244
245 static void cpu_request_exit(void *opaque, int irq, int level)
246 {
247 CPUState *env = cpu_single_env;
248
249 if (env && level) {
250 cpu_exit(env);
251 }
252 }
253
254 static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
255 const char *kernel_filename, const char *kernel_cmdline,
256 const char *initrd_filename, const char *cpu_model)
257 {
258 char *filename;
259 unsigned long ram_offset, bios_offset;
260 long bios_size;
261 int64_t kernel_entry;
262 qemu_irq *i8259;
263 qemu_irq *cpu_exit_irq;
264 int via_devfn;
265 PCIBus *pci_bus;
266 uint8_t *eeprom_buf;
267 i2c_bus *smbus;
268 int i;
269 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
270 DeviceState *eeprom;
271 CPUState *env;
272
273 /* init CPUs */
274 if (cpu_model == NULL) {
275 cpu_model = "Loongson-2E";
276 }
277 env = cpu_init(cpu_model);
278 if (!env) {
279 fprintf(stderr, "Unable to find CPU definition\n");
280 exit(1);
281 }
282
283 register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env);
284 qemu_register_reset(main_cpu_reset, env);
285
286 /* fulong 2e has 256M ram. */
287 ram_size = 256 * 1024 * 1024;
288
289 /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
290 bios_size = 1024 * 1024;
291
292 /* allocate RAM */
293 ram_offset = qemu_ram_alloc(NULL, "fulong2e.ram", ram_size);
294 bios_offset = qemu_ram_alloc(NULL, "fulong2e.bios", bios_size);
295
296 cpu_register_physical_memory(0, ram_size, ram_offset);
297 cpu_register_physical_memory(0x1fc00000LL,
298 bios_size, bios_offset | IO_MEM_ROM);
299
300 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
301 * Please use -L to set the BIOS path and -bios to set bios name. */
302
303 if (kernel_filename) {
304 loaderparams.ram_size = ram_size;
305 loaderparams.kernel_filename = kernel_filename;
306 loaderparams.kernel_cmdline = kernel_cmdline;
307 loaderparams.initrd_filename = initrd_filename;
308 kernel_entry = load_kernel (env);
309 write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry);
310 } else {
311 if (bios_name == NULL) {
312 bios_name = FULONG_BIOSNAME;
313 }
314 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
315 if (filename) {
316 bios_size = load_image_targphys(filename, 0x1fc00000LL,
317 BIOS_SIZE);
318 qemu_free(filename);
319 } else {
320 bios_size = -1;
321 }
322
323 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
324 fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
325 exit(1);
326 }
327 }
328
329 /* Init internal devices */
330 cpu_mips_irq_init_cpu(env);
331 cpu_mips_clock_init(env);
332
333 /* Interrupt controller */
334 /* The 8259 -> IP5 */
335 i8259 = i8259_init(env->irq[5]);
336
337 /* North bridge, Bonito --> IP2 */
338 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
339
340 /* South bridge */
341 if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
342 fprintf(stderr, "qemu: too many IDE bus\n");
343 exit(1);
344 }
345
346 for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
347 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
348 }
349
350 via_devfn = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
351 if (via_devfn < 0) {
352 fprintf(stderr, "vt82c686b_init error \n");
353 exit(1);
354 }
355
356 isa_bus_irqs(i8259);
357 vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
358 usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
359 usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));
360
361 smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
362 0xeee1, NULL);
363 eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
364 memcpy(eeprom_buf, eeprom_spd, sizeof(eeprom_spd));
365 /* TODO: Populate SPD eeprom data. */
366 eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
367 qdev_prop_set_uint8(eeprom, "address", 0x50);
368 qdev_prop_set_ptr(eeprom, "data", eeprom_buf);
369 qdev_init_nofail(eeprom);
370
371 /* init other devices */
372 pit = pit_init(0x40, isa_get_irq(0));
373 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
374 DMA_init(0, cpu_exit_irq);
375
376 /* Super I/O */
377 isa_create_simple("i8042");
378
379 rtc_init(2000, NULL);
380
381 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
382 if (serial_hds[i]) {
383 serial_isa_init(i, serial_hds[i]);
384 }
385 }
386
387 if (parallel_hds[0]) {
388 parallel_init(0, parallel_hds[0]);
389 }
390
391 /* Sound card */
392 audio_init(pci_bus);
393 /* Network card */
394 network_init();
395 }
396
397 QEMUMachine mips_fulong2e_machine = {
398 .name = "fulong2e",
399 .desc = "Fulong 2e mini pc",
400 .init = mips_fulong2e_init,
401 };
402
403 static void mips_fulong2e_machine_init(void)
404 {
405 qemu_register_machine(&mips_fulong2e_machine);
406 }
407
408 machine_init(mips_fulong2e_machine_init);
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