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68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
1 /*
2 * qemu/kvm integration, x86 specific code
3 *
4 * Copyright (C) 2006-2008 Qumranet Technologies
5 *
6 * Licensed under the terms of the GNU GPL version 2 or higher.
7 */
8
9 #include "config.h"
10 #include "config-host.h"
11
12 #include <string.h>
13 #include "hw/hw.h"
14 #include "gdbstub.h"
fa9a236 @rmustacc HVM-388 Run native kvm with qemu-v0.14.x
rmustacc authored
15 #ifdef __linux__
68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
16 #include <sys/io.h>
fa9a236 @rmustacc HVM-388 Run native kvm with qemu-v0.14.x
rmustacc authored
17 #endif
68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
18
19 #include "qemu-kvm.h"
20 #include "libkvm.h"
21 #include <pthread.h>
22 #include <sys/utsname.h>
fa9a236 @rmustacc HVM-388 Run native kvm with qemu-v0.14.x
rmustacc authored
23 #ifdef CONFIG_KVM_PARA
68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
24 #include <linux/kvm_para.h>
fa9a236 @rmustacc HVM-388 Run native kvm with qemu-v0.14.x
rmustacc authored
25 #endif
68396ea @rmustacc Initial commit of d32e8d0b8d9e0ef7cf7ab2e74548982972789dfc from qemu-kvm
rmustacc authored
26 #include <sys/ioctl.h>
27
28 #include "kvm.h"
29 #include "hw/apic.h"
30
31 #define MSR_IA32_TSC 0x10
32
33 static struct kvm_msr_list *kvm_msr_list;
34 extern unsigned int kvm_shadow_memory;
35
36 int kvm_set_tss_addr(kvm_context_t kvm, unsigned long addr)
37 {
38 int r;
39
40 r = kvm_vm_ioctl(kvm_state, KVM_SET_TSS_ADDR, addr);
41 if (r < 0) {
42 fprintf(stderr, "kvm_set_tss_addr: %m\n");
43 return r;
44 }
45 return 0;
46 }
47
48 static int kvm_init_tss(kvm_context_t kvm)
49 {
50 int r;
51
52 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR);
53 if (r > 0) {
54 /*
55 * this address is 3 pages before the bios, and the bios should present
56 * as unavaible memory
57 */
58 r = kvm_set_tss_addr(kvm, 0xfeffd000);
59 if (r < 0) {
60 fprintf(stderr, "kvm_init_tss: unable to set tss addr\n");
61 return r;
62 }
63 } else {
64 fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
65 }
66 return 0;
67 }
68
69 static int kvm_set_identity_map_addr(kvm_context_t kvm, uint64_t addr)
70 {
71 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
72 int r;
73
74 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
75 if (r > 0) {
76 r = kvm_vm_ioctl(kvm_state, KVM_SET_IDENTITY_MAP_ADDR, &addr);
77 if (r == -1) {
78 fprintf(stderr, "kvm_set_identity_map_addr: %m\n");
79 return -errno;
80 }
81 return 0;
82 }
83 #endif
84 return -ENOSYS;
85 }
86
87 static int kvm_init_identity_map_page(kvm_context_t kvm)
88 {
89 #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
90 int r;
91
92 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_SET_IDENTITY_MAP_ADDR);
93 if (r > 0) {
94 /*
95 * this address is 4 pages before the bios, and the bios should present
96 * as unavaible memory
97 */
98 r = kvm_set_identity_map_addr(kvm, 0xfeffc000);
99 if (r < 0) {
100 fprintf(stderr, "kvm_init_identity_map_page: "
101 "unable to set identity mapping addr\n");
102 return r;
103 }
104 }
105 #endif
106 return 0;
107 }
108
109 static int kvm_create_pit(kvm_context_t kvm)
110 {
111 #ifdef KVM_CAP_PIT
112 int r;
113
114 kvm_state->pit_in_kernel = 0;
115 if (!kvm->no_pit_creation) {
116 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_PIT);
117 if (r > 0) {
118 r = kvm_vm_ioctl(kvm_state, KVM_CREATE_PIT);
119 if (r >= 0) {
120 kvm_state->pit_in_kernel = 1;
121 } else {
122 fprintf(stderr, "Create kernel PIC irqchip failed\n");
123 return r;
124 }
125 }
126 }
127 #endif
128 return 0;
129 }
130
131 int kvm_arch_create(kvm_context_t kvm, unsigned long phys_mem_bytes,
132 void **vm_mem)
133 {
134 int r = 0;
135
136 r = kvm_init_tss(kvm);
137 if (r < 0) {
138 return r;
139 }
140
141 r = kvm_init_identity_map_page(kvm);
142 if (r < 0) {
143 return r;
144 }
145
146 /*
147 * Tell fw_cfg to notify the BIOS to reserve the range.
148 */
149 if (e820_add_entry(0xfeffc000, 0x4000, E820_RESERVED) < 0) {
150 perror("e820_add_entry() table is full");
151 exit(1);
152 }
153
154 r = kvm_create_pit(kvm);
155 if (r < 0) {
156 return r;
157 }
158
159 r = kvm_init_coalesced_mmio(kvm);
160 if (r < 0) {
161 return r;
162 }
163
164 return 0;
165 }
166
167 #ifdef KVM_EXIT_TPR_ACCESS
168
169 static int kvm_handle_tpr_access(CPUState *env)
170 {
171 struct kvm_run *run = env->kvm_run;
172 kvm_tpr_access_report(env,
173 run->tpr_access.rip,
174 run->tpr_access.is_write);
175 return 0;
176 }
177
178
179 int kvm_enable_vapic(CPUState *env, uint64_t vapic)
180 {
181 struct kvm_vapic_addr va = {
182 .vapic_addr = vapic,
183 };
184
185 return kvm_vcpu_ioctl(env, KVM_SET_VAPIC_ADDR, &va);
186 }
187
188 #endif
189
190 int kvm_arch_run(CPUState *env)
191 {
192 int r = 0;
193 struct kvm_run *run = env->kvm_run;
194
195 switch (run->exit_reason) {
196 #ifdef KVM_EXIT_SET_TPR
197 case KVM_EXIT_SET_TPR:
198 break;
199 #endif
200 #ifdef KVM_EXIT_TPR_ACCESS
201 case KVM_EXIT_TPR_ACCESS:
202 r = kvm_handle_tpr_access(env);
203 break;
204 #endif
205 default:
206 r = 1;
207 break;
208 }
209
210 return r;
211 }
212
213 #ifdef KVM_CAP_IRQCHIP
214
215 int kvm_get_lapic(CPUState *env, struct kvm_lapic_state *s)
216 {
217 int r = 0;
218
219 if (!kvm_irqchip_in_kernel()) {
220 return r;
221 }
222
223 r = kvm_vcpu_ioctl(env, KVM_GET_LAPIC, s);
224 if (r < 0) {
225 fprintf(stderr, "KVM_GET_LAPIC failed\n");
226 }
227 return r;
228 }
229
230 int kvm_set_lapic(CPUState *env, struct kvm_lapic_state *s)
231 {
232 int r = 0;
233
234 if (!kvm_irqchip_in_kernel()) {
235 return 0;
236 }
237
238 r = kvm_vcpu_ioctl(env, KVM_SET_LAPIC, s);
239
240 if (r < 0) {
241 fprintf(stderr, "KVM_SET_LAPIC failed\n");
242 }
243 return r;
244 }
245
246 #endif
247
248 #ifdef KVM_CAP_PIT
249
250 int kvm_get_pit(kvm_context_t kvm, struct kvm_pit_state *s)
251 {
252 if (!kvm_pit_in_kernel()) {
253 return 0;
254 }
255 return kvm_vm_ioctl(kvm_state, KVM_GET_PIT, s);
256 }
257
258 int kvm_set_pit(kvm_context_t kvm, struct kvm_pit_state *s)
259 {
260 if (!kvm_pit_in_kernel()) {
261 return 0;
262 }
263 return kvm_vm_ioctl(kvm_state, KVM_SET_PIT, s);
264 }
265
266 #ifdef KVM_CAP_PIT_STATE2
267 int kvm_get_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
268 {
269 if (!kvm_pit_in_kernel()) {
270 return 0;
271 }
272 return kvm_vm_ioctl(kvm_state, KVM_GET_PIT2, ps2);
273 }
274
275 int kvm_set_pit2(kvm_context_t kvm, struct kvm_pit_state2 *ps2)
276 {
277 if (!kvm_pit_in_kernel()) {
278 return 0;
279 }
280 return kvm_vm_ioctl(kvm_state, KVM_SET_PIT2, ps2);
281 }
282
283 #endif
284 #endif
285
286 int kvm_has_pit_state2(kvm_context_t kvm)
287 {
288 int r = 0;
289
290 #ifdef KVM_CAP_PIT_STATE2
291 r = kvm_check_extension(kvm_state, KVM_CAP_PIT_STATE2);
292 #endif
293 return r;
294 }
295
296 void kvm_show_code(CPUState *env)
297 {
298 #define SHOW_CODE_LEN 50
299 struct kvm_regs regs;
300 struct kvm_sregs sregs;
301 int r, n;
302 int back_offset;
303 unsigned char code;
304 char code_str[SHOW_CODE_LEN * 3 + 1];
305 unsigned long rip;
306
307 r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
308 if (r < 0 ) {
309 perror("KVM_GET_SREGS");
310 return;
311 }
312 r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
313 if (r < 0) {
314 perror("KVM_GET_REGS");
315 return;
316 }
317 rip = sregs.cs.base + regs.rip;
318 back_offset = regs.rip;
319 if (back_offset > 20) {
320 back_offset = 20;
321 }
322 *code_str = 0;
323 for (n = -back_offset; n < SHOW_CODE_LEN-back_offset; ++n) {
324 if (n == 0) {
325 strcat(code_str, " -->");
326 }
327 cpu_physical_memory_rw(rip + n, &code, 1, 1);
328 sprintf(code_str + strlen(code_str), " %02x", code);
329 }
330 fprintf(stderr, "code:%s\n", code_str);
331 }
332
333
334 /*
335 * Returns available msr list. User must free.
336 */
337 static struct kvm_msr_list *kvm_get_msr_list(void)
338 {
339 struct kvm_msr_list sizer, *msrs;
340 int r;
341
342 sizer.nmsrs = 0;
343 r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, &sizer);
344 if (r < 0 && r != -E2BIG) {
345 return NULL;
346 }
347 /* Old kernel modules had a bug and could write beyond the provided
348 memory. Allocate at least a safe amount of 1K. */
349 msrs = qemu_malloc(MAX(1024, sizeof(*msrs) +
350 sizer.nmsrs * sizeof(*msrs->indices)));
351
352 msrs->nmsrs = sizer.nmsrs;
353 r = kvm_ioctl(kvm_state, KVM_GET_MSR_INDEX_LIST, msrs);
354 if (r < 0) {
355 free(msrs);
356 errno = r;
357 return NULL;
358 }
359 return msrs;
360 }
361
362 static void print_seg(FILE *file, const char *name, struct kvm_segment *seg)
363 {
364 fprintf(stderr,
365 "%s %04x (%08llx/%08x p %d dpl %d db %d s %d type %x l %d"
366 " g %d avl %d)\n",
367 name, seg->selector, seg->base, seg->limit, seg->present,
368 seg->dpl, seg->db, seg->s, seg->type, seg->l, seg->g,
369 seg->avl);
370 }
371
372 static void print_dt(FILE *file, const char *name, struct kvm_dtable *dt)
373 {
374 fprintf(stderr, "%s %llx/%x\n", name, dt->base, dt->limit);
375 }
376
377 void kvm_show_regs(CPUState *env)
378 {
379 struct kvm_regs regs;
380 struct kvm_sregs sregs;
381 int r;
382
383 r = kvm_vcpu_ioctl(env, KVM_GET_REGS, &regs);
384 if (r < 0) {
385 perror("KVM_GET_REGS");
386 return;
387 }
388 fprintf(stderr,
389 "rax %016llx rbx %016llx rcx %016llx rdx %016llx\n"
390 "rsi %016llx rdi %016llx rsp %016llx rbp %016llx\n"
391 "r8 %016llx r9 %016llx r10 %016llx r11 %016llx\n"
392 "r12 %016llx r13 %016llx r14 %016llx r15 %016llx\n"
393 "rip %016llx rflags %08llx\n",
394 regs.rax, regs.rbx, regs.rcx, regs.rdx,
395 regs.rsi, regs.rdi, regs.rsp, regs.rbp,
396 regs.r8, regs.r9, regs.r10, regs.r11,
397 regs.r12, regs.r13, regs.r14, regs.r15,
398 regs.rip, regs.rflags);
399 r = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
400 if (r < 0) {
401 perror("KVM_GET_SREGS");
402 return;
403 }
404 print_seg(stderr, "cs", &sregs.cs);
405 print_seg(stderr, "ds", &sregs.ds);
406 print_seg(stderr, "es", &sregs.es);
407 print_seg(stderr, "ss", &sregs.ss);
408 print_seg(stderr, "fs", &sregs.fs);
409 print_seg(stderr, "gs", &sregs.gs);
410 print_seg(stderr, "tr", &sregs.tr);
411 print_seg(stderr, "ldt", &sregs.ldt);
412 print_dt(stderr, "gdt", &sregs.gdt);
413 print_dt(stderr, "idt", &sregs.idt);
414 fprintf(stderr, "cr0 %llx cr2 %llx cr3 %llx cr4 %llx cr8 %llx"
415 " efer %llx\n",
416 sregs.cr0, sregs.cr2, sregs.cr3, sregs.cr4, sregs.cr8,
417 sregs.efer);
418 }
419
420 static void kvm_set_cr8(CPUState *env, uint64_t cr8)
421 {
422 env->kvm_run->cr8 = cr8;
423 }
424
425 int kvm_set_shadow_pages(kvm_context_t kvm, unsigned int nrshadow_pages)
426 {
427 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
428 int r;
429
430 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
431 KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
432 if (r > 0) {
433 r = kvm_vm_ioctl(kvm_state, KVM_SET_NR_MMU_PAGES, nrshadow_pages);
434 if (r < 0) {
435 fprintf(stderr, "kvm_set_shadow_pages: %m\n");
436 return r;
437 }
438 return 0;
439 }
440 #endif
441 return -1;
442 }
443
444 int kvm_get_shadow_pages(kvm_context_t kvm, unsigned int *nrshadow_pages)
445 {
446 #ifdef KVM_CAP_MMU_SHADOW_CACHE_CONTROL
447 int r;
448
449 r = kvm_ioctl(kvm_state, KVM_CHECK_EXTENSION,
450 KVM_CAP_MMU_SHADOW_CACHE_CONTROL);
451 if (r > 0) {
452 *nrshadow_pages = kvm_vm_ioctl(kvm_state, KVM_GET_NR_MMU_PAGES);
453 return 0;
454 }
455 #endif
456 return -1;
457 }
458
459 #ifdef KVM_CAP_VAPIC
460 static int kvm_enable_tpr_access_reporting(CPUState *env)
461 {
462 int r;
463 struct kvm_tpr_access_ctl tac = { .enabled = 1 };
464
465 r = kvm_ioctl(env->kvm_state, KVM_CHECK_EXTENSION, KVM_CAP_VAPIC);
466 if (r <= 0) {
467 return -ENOSYS;
468 }
469 return kvm_vcpu_ioctl(env, KVM_TPR_ACCESS_REPORTING, &tac);
470 }
471 #endif
472
473 #ifdef KVM_CAP_ADJUST_CLOCK
474 static struct kvm_clock_data kvmclock_data;
475
476 static void kvmclock_pre_save(void *opaque)
477 {
478 struct kvm_clock_data *cl = opaque;
479
480 kvm_vm_ioctl(kvm_state, KVM_GET_CLOCK, cl);
481 }
482
483 static int kvmclock_post_load(void *opaque, int version_id)
484 {
485 struct kvm_clock_data *cl = opaque;
486
487 return kvm_vm_ioctl(kvm_state, KVM_SET_CLOCK, cl);
488 }
489
490 static const VMStateDescription vmstate_kvmclock= {
491 .name = "kvmclock",
492 .version_id = 1,
493 .minimum_version_id = 1,
494 .minimum_version_id_old = 1,
495 .pre_save = kvmclock_pre_save,
496 .post_load = kvmclock_post_load,
497 .fields = (VMStateField []) {
498 VMSTATE_U64(clock, struct kvm_clock_data),
499 VMSTATE_END_OF_LIST()
500 }
501 };
502 #endif
503
504 int kvm_arch_qemu_create_context(void)
505 {
506 int r;
507 struct utsname utsname;
508
509 uname(&utsname);
510 lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
511
512 if (kvm_shadow_memory) {
513 kvm_set_shadow_pages(kvm_context, kvm_shadow_memory);
514 }
515
516 /* initialize has_msr_star/has_msr_hsave_pa */
517 r = kvm_get_supported_msrs(kvm_state);
518 if (r < 0) {
519 return r;
520 }
521
522 kvm_msr_list = kvm_get_msr_list();
523 if (!kvm_msr_list) {
524 return -1;
525 }
526
527 #ifdef KVM_CAP_ADJUST_CLOCK
528 if (kvm_check_extension(kvm_state, KVM_CAP_ADJUST_CLOCK)) {
529 vmstate_register(NULL, 0, &vmstate_kvmclock, &kvmclock_data);
530 }
531 #endif
532
533 r = kvm_set_boot_cpu_id(0);
534 if (r < 0 && r != -ENOSYS) {
535 return r;
536 }
537
538 return 0;
539 }
540
541 static void kvm_arch_save_mpstate(CPUState *env)
542 {
543 #ifdef KVM_CAP_MP_STATE
544 int r;
545 struct kvm_mp_state mp_state;
546
547 r = kvm_get_mpstate(env, &mp_state);
548 if (r < 0) {
549 env->mp_state = -1;
550 } else {
551 env->mp_state = mp_state.mp_state;
552 if (kvm_irqchip_in_kernel()) {
553 env->halted = (env->mp_state == KVM_MP_STATE_HALTED);
554 }
555 }
556 #else
557 env->mp_state = -1;
558 #endif
559 }
560
561 static void kvm_arch_load_mpstate(CPUState *env)
562 {
563 #ifdef KVM_CAP_MP_STATE
564 struct kvm_mp_state mp_state;
565
566 /*
567 * -1 indicates that the host did not support GET_MP_STATE ioctl,
568 * so don't touch it.
569 */
570 if (env->mp_state != -1) {
571 mp_state.mp_state = env->mp_state;
572 kvm_set_mpstate(env, &mp_state);
573 }
574 #endif
575 }
576
577 #define XSAVE_CWD_RIP 2
578 #define XSAVE_CWD_RDP 4
579 #define XSAVE_MXCSR 6
580 #define XSAVE_ST_SPACE 8
581 #define XSAVE_XMM_SPACE 40
582 #define XSAVE_XSTATE_BV 128
583 #define XSAVE_YMMH_SPACE 144
584
585 void kvm_arch_load_regs(CPUState *env, int level)
586 {
587 int rc;
588
589 assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
590
591 kvm_getput_regs(env, 1);
592
593 kvm_put_xsave(env);
594 kvm_put_xcrs(env);
595
596 kvm_put_sregs(env);
597
598 rc = kvm_put_msrs(env, level);
599 if (rc < 0) {
600 perror("kvm__msrs FAILED");
601 }
602
603 if (level >= KVM_PUT_RESET_STATE) {
604 kvm_arch_load_mpstate(env);
605 kvm_load_lapic(env);
606 }
607 if (level == KVM_PUT_FULL_STATE) {
608 if (env->kvm_vcpu_update_vapic) {
609 kvm_tpr_enable_vapic(env);
610 }
611 }
612
613 kvm_put_vcpu_events(env, level);
614 kvm_put_debugregs(env);
615
616 /* must be last */
617 kvm_guest_debug_workarounds(env);
618 }
619
620 void kvm_arch_save_regs(CPUState *env)
621 {
622 int rc;
623
624 assert(kvm_cpu_is_stopped(env) || env->thread_id == kvm_get_thread_id());
625
626 kvm_getput_regs(env, 0);
627
628 kvm_get_xsave(env);
629 kvm_get_xcrs(env);
630
631 kvm_get_sregs(env);
632
633 rc = kvm_get_msrs(env);
634 if (rc < 0) {
635 perror("kvm_get_msrs FAILED");
636 }
637
638 kvm_arch_save_mpstate(env);
639 kvm_save_lapic(env);
640 kvm_get_vcpu_events(env);
641 kvm_get_debugregs(env);
642 }
643
644 static int _kvm_arch_init_vcpu(CPUState *env)
645 {
646 kvm_arch_reset_vcpu(env);
647
648 #ifdef KVM_EXIT_TPR_ACCESS
649 kvm_enable_tpr_access_reporting(env);
650 #endif
651 return 0;
652 }
653
654 int kvm_arch_halt(CPUState *env)
655 {
656
657 if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
658 (env->eflags & IF_MASK)) &&
659 !(env->interrupt_request & CPU_INTERRUPT_NMI)) {
660 env->halted = 1;
661 }
662 return 1;
663 }
664
665 int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
666 {
667 if (!kvm_irqchip_in_kernel()) {
668 kvm_set_cr8(env, cpu_get_apic_tpr(env->apic_state));
669 }
670 return 0;
671 }
672
673 int kvm_arch_has_work(CPUState *env)
674 {
675 if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
676 (env->eflags & IF_MASK)) ||
677 (env->interrupt_request & CPU_INTERRUPT_NMI)) {
678 return 1;
679 }
680 return 0;
681 }
682
683 int kvm_arch_try_push_interrupts(void *opaque)
684 {
685 CPUState *env = cpu_single_env;
686 int r, irq;
687
688 if (kvm_is_ready_for_interrupt_injection(env) &&
689 (env->interrupt_request & CPU_INTERRUPT_HARD) &&
690 (env->eflags & IF_MASK)) {
691 env->interrupt_request &= ~CPU_INTERRUPT_HARD;
692 irq = cpu_get_pic_interrupt(env);
693 if (irq >= 0) {
694 r = kvm_inject_irq(env, irq);
695 if (r < 0) {
696 printf("cpu %d fail inject %x\n", env->cpu_index, irq);
697 }
698 }
699 }
700
701 return (env->interrupt_request & CPU_INTERRUPT_HARD) != 0;
702 }
703
704 #ifdef KVM_CAP_USER_NMI
705 void kvm_arch_push_nmi(void *opaque)
706 {
707 CPUState *env = cpu_single_env;
708 int r;
709
710 if (likely(!(env->interrupt_request & CPU_INTERRUPT_NMI))) {
711 return;
712 }
713
714 env->interrupt_request &= ~CPU_INTERRUPT_NMI;
715 r = kvm_inject_nmi(env);
716 if (r < 0) {
717 printf("cpu %d fail inject NMI\n", env->cpu_index);
718 }
719 }
720 #endif /* KVM_CAP_USER_NMI */
721
722 static int kvm_reset_msrs(CPUState *env)
723 {
724 struct {
725 struct kvm_msrs info;
726 struct kvm_msr_entry entries[100];
727 } msr_data;
728 int n;
729 struct kvm_msr_entry *msrs = msr_data.entries;
730 uint32_t index;
731 uint64_t data;
732
733 if (!kvm_msr_list) {
734 return -1;
735 }
736
737 for (n = 0; n < kvm_msr_list->nmsrs; n++) {
738 index = kvm_msr_list->indices[n];
739 switch (index) {
740 case MSR_PAT:
741 data = 0x0007040600070406ULL;
742 break;
743 default:
744 data = 0;
745 }
746 kvm_msr_entry_set(&msrs[n], kvm_msr_list->indices[n], data);
747 }
748
749 msr_data.info.nmsrs = n;
750
751 return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
752 }
753
754
755 void kvm_arch_cpu_reset(CPUState *env)
756 {
757 kvm_reset_msrs(env);
758 kvm_arch_reset_vcpu(env);
759 }
760
761 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
762 void kvm_arch_do_ioperm(void *_data)
763 {
764 struct ioperm_data *data = _data;
765 ioperm(data->start_port, data->num, data->turn_on);
766 }
767 #endif
768
769 /*
770 * Setup x86 specific IRQ routing
771 */
772 int kvm_arch_init_irq_routing(void)
773 {
774 int i, r;
775
776 if (kvm_irqchip && kvm_has_gsi_routing()) {
777 kvm_clear_gsi_routes();
778 for (i = 0; i < 8; ++i) {
779 if (i == 2) {
780 continue;
781 }
782 r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_MASTER, i);
783 if (r < 0) {
784 return r;
785 }
786 }
787 for (i = 8; i < 16; ++i) {
788 r = kvm_add_irq_route(i, KVM_IRQCHIP_PIC_SLAVE, i - 8);
789 if (r < 0) {
790 return r;
791 }
792 }
793 for (i = 0; i < 24; ++i) {
794 if (i == 0 && irq0override) {
795 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, 2);
796 } else if (i != 2 || !irq0override) {
797 r = kvm_add_irq_route(i, KVM_IRQCHIP_IOAPIC, i);
798 }
799 if (r < 0) {
800 return r;
801 }
802 }
803 kvm_commit_irq_routes();
804 }
805 return 0;
806 }
807
808 void kvm_arch_process_irqchip_events(CPUState *env)
809 {
810 if (env->interrupt_request & CPU_INTERRUPT_INIT) {
811 kvm_cpu_synchronize_state(env);
812 do_cpu_init(env);
813 }
814 if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
815 kvm_cpu_synchronize_state(env);
816 do_cpu_sipi(env);
817 }
818 }
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