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Update for config changes.

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commit 61897316b951c2d1fbbb96313535ebbb2c54420d 1 parent b475791
thorpej authored

Showing 1 changed file with 278 additions and 0 deletions. Show diff stats Hide diff stats

  1. +278 0 sys/dev/pci/pci.c
278 sys/dev/pci/pci.c
... ... @@ -0,0 +1,278 @@
  1 +/* $NetBSD: pci.c,v 1.30.2.2 1998/01/12 09:40:12 thorpej Exp $ */
  2 +
  3 +/*
  4 + * Copyright (c) 1995, 1996, 1997
  5 + * Christopher G. Demetriou. All rights reserved.
  6 + * Copyright (c) 1994 Charles Hannum. All rights reserved.
  7 + *
  8 + * Redistribution and use in source and binary forms, with or without
  9 + * modification, are permitted provided that the following conditions
  10 + * are met:
  11 + * 1. Redistributions of source code must retain the above copyright
  12 + * notice, this list of conditions and the following disclaimer.
  13 + * 2. Redistributions in binary form must reproduce the above copyright
  14 + * notice, this list of conditions and the following disclaimer in the
  15 + * documentation and/or other materials provided with the distribution.
  16 + * 3. All advertising materials mentioning features or use of this software
  17 + * must display the following acknowledgement:
  18 + * This product includes software developed by Charles Hannum.
  19 + * 4. The name of the author may not be used to endorse or promote products
  20 + * derived from this software without specific prior written permission.
  21 + *
  22 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  23 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  24 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  25 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  26 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 + */
  33 +
  34 +/*
  35 + * PCI bus autoconfiguration.
  36 + */
  37 +
  38 +#include <sys/param.h>
  39 +#include <sys/systm.h>
  40 +#include <sys/device.h>
  41 +
  42 +#include <dev/pci/pcireg.h>
  43 +#include <dev/pci/pcivar.h>
  44 +
  45 +#ifdef __BROKEN_INDIRECT_CONFIG
  46 +int pcimatch __P((struct device *, void *, void *));
  47 +#else
  48 +int pcimatch __P((struct device *, struct cfdata *, void *));
  49 +#endif
  50 +void pciattach __P((struct device *, struct device *, void *));
  51 +
  52 +struct cfattach pci_ca = {
  53 + sizeof(struct device), pcimatch, pciattach
  54 +};
  55 +
  56 +int pciprint __P((void *, const char *));
  57 +#ifdef __BROKEN_INDIRECT_CONFIG
  58 +int pcisubmatch __P((struct device *, void *, void *));
  59 +#else
  60 +int pcisubmatch __P((struct device *, struct cfdata *, void *));
  61 +#endif
  62 +
  63 +/*
  64 + * Callback so that ISA/EISA bridges can attach their child busses
  65 + * after PCI configuration is done.
  66 + *
  67 + * This works because:
  68 + * (1) there can be at most one ISA/EISA bridge per PCI bus, and
  69 + * (2) any ISA/EISA bridges must be attached to primary PCI
  70 + * busses (i.e. bus zero).
  71 + *
  72 + * That boils down to: there can only be one of these outstanding
  73 + * at a time, it is cleared when configuring PCI bus 0 before any
  74 + * subdevices have been found, and it is run after all subdevices
  75 + * of PCI bus 0 have been found.
  76 + *
  77 + * This is needed because there are some (legacy) PCI devices which
  78 + * can show up as ISA/EISA devices as well (the prime example of which
  79 + * are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
  80 + * and the bridge is seen before the video board is, the board can show
  81 + * up as an ISA device, and that can (bogusly) complicate the PCI device's
  82 + * attach code, or make the PCI device not be properly attached at all.
  83 + */
  84 +static void (*pci_isa_bridge_callback) __P((void *));
  85 +static void *pci_isa_bridge_callback_arg;
  86 +
  87 +int
  88 +#ifdef __BROKEN_INDIRECT_CONFIG
  89 +pcimatch(parent, match, aux)
  90 +#else
  91 +pcimatch(parent, cf, aux)
  92 +#endif
  93 + struct device *parent;
  94 +#ifdef __BROKEN_INDIRECT_CONFIG
  95 + void *match;
  96 +#else
  97 + struct cfdata *cf;
  98 +#endif
  99 + void *aux;
  100 +{
  101 +#ifdef __BROKEN_INDIRECT_CONFIG
  102 + struct cfdata *cf = match;
  103 +#endif
  104 + struct pcibus_attach_args *pba = aux;
  105 +
  106 + if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
  107 + return (0);
  108 +
  109 + /* Check the locators */
  110 + if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
  111 + cf->pcibuscf_bus != pba->pba_bus)
  112 + return (0);
  113 +
  114 + /* sanity */
  115 + if (pba->pba_bus < 0 || pba->pba_bus > 255)
  116 + return (0);
  117 +
  118 + /*
  119 + * XXX check other (hardware?) indicators
  120 + */
  121 +
  122 + return 1;
  123 +}
  124 +
  125 +void
  126 +pciattach(parent, self, aux)
  127 + struct device *parent, *self;
  128 + void *aux;
  129 +{
  130 + struct pcibus_attach_args *pba = aux;
  131 + bus_space_tag_t iot, memt;
  132 + pci_chipset_tag_t pc;
  133 + int bus, device, maxndevs, function, nfunctions;
  134 +
  135 + pci_attach_hook(parent, self, pba);
  136 + printf("\n");
  137 +
  138 + iot = pba->pba_iot;
  139 + memt = pba->pba_memt;
  140 + pc = pba->pba_pc;
  141 + bus = pba->pba_bus;
  142 + maxndevs = pci_bus_maxdevs(pc, bus);
  143 +
  144 + if (bus == 0)
  145 + pci_isa_bridge_callback = NULL;
  146 +
  147 + for (device = 0; device < maxndevs; device++) {
  148 + pcitag_t tag;
  149 + pcireg_t id, class, intr, bhlcr, csr;
  150 + struct pci_attach_args pa;
  151 + int pin;
  152 +
  153 + tag = pci_make_tag(pc, bus, device, 0);
  154 + id = pci_conf_read(pc, tag, PCI_ID_REG);
  155 + if (id == 0 || id == 0xffffffff)
  156 + continue;
  157 +
  158 + bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
  159 + nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
  160 +
  161 + for (function = 0; function < nfunctions; function++) {
  162 + tag = pci_make_tag(pc, bus, device, function);
  163 + id = pci_conf_read(pc, tag, PCI_ID_REG);
  164 + if (id == 0 || id == 0xffffffff)
  165 + continue;
  166 + csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
  167 + class = pci_conf_read(pc, tag, PCI_CLASS_REG);
  168 + intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
  169 +
  170 + pa.pa_iot = iot;
  171 + pa.pa_memt = memt;
  172 + pa.pa_dmat = pba->pba_dmat;
  173 + pa.pa_pc = pc;
  174 + pa.pa_device = device;
  175 + pa.pa_function = function;
  176 + pa.pa_tag = tag;
  177 + pa.pa_id = id;
  178 + pa.pa_class = class;
  179 +
  180 + /* set up memory and I/O enable flags as appropriate */
  181 + pa.pa_flags = 0;
  182 + if ((pba->pba_flags & PCI_FLAGS_IO_ENABLED) &&
  183 + (csr & PCI_COMMAND_IO_ENABLE))
  184 + pa.pa_flags |= PCI_FLAGS_IO_ENABLED;
  185 + if ((pba->pba_flags & PCI_FLAGS_MEM_ENABLED) &&
  186 + (csr & PCI_COMMAND_MEM_ENABLE))
  187 + pa.pa_flags |= PCI_FLAGS_MEM_ENABLED;
  188 +
  189 + if (bus == 0) {
  190 + pa.pa_intrswiz = 0;
  191 + pa.pa_intrtag = tag;
  192 + } else {
  193 + pa.pa_intrswiz = pba->pba_intrswiz + device;
  194 + pa.pa_intrtag = pba->pba_intrtag;
  195 + }
  196 + pin = PCI_INTERRUPT_PIN(intr);
  197 + if (pin == PCI_INTERRUPT_PIN_NONE) {
  198 + /* no interrupt */
  199 + pa.pa_intrpin = 0;
  200 + } else {
  201 + /*
  202 + * swizzle it based on the number of
  203 + * busses we're behind and our device
  204 + * number.
  205 + */
  206 + pa.pa_intrpin = /* XXX */
  207 + ((pin + pa.pa_intrswiz - 1) % 4) + 1;
  208 + }
  209 + pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
  210 +
  211 + config_found_sm(self, &pa, pciprint, pcisubmatch);
  212 + }
  213 + }
  214 +
  215 + if (bus == 0 && pci_isa_bridge_callback != NULL)
  216 + (*pci_isa_bridge_callback)(pci_isa_bridge_callback_arg);
  217 +}
  218 +
  219 +int
  220 +pciprint(aux, pnp)
  221 + void *aux;
  222 + const char *pnp;
  223 +{
  224 + register struct pci_attach_args *pa = aux;
  225 + char devinfo[256];
  226 +
  227 + if (pnp) {
  228 + pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
  229 + printf("%s at %s", devinfo, pnp);
  230 + }
  231 + printf(" dev %d function %d", pa->pa_device, pa->pa_function);
  232 +#if 0
  233 + printf(" (%si/o, %smem)",
  234 + pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "" : "no ",
  235 + pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "" : "no ");
  236 +#endif
  237 + return (UNCONF);
  238 +}
  239 +
  240 +int
  241 +#ifdef __BROKEN_INDIRECT_CONFIG
  242 +pcisubmatch(parent, match, aux)
  243 +#else
  244 +pcisubmatch(parent, cf, aux)
  245 +#endif
  246 + struct device *parent;
  247 +#ifdef __BROKEN_INDIRECT_CONFIG
  248 + void *match;
  249 +#else
  250 + struct cfdata *cf;
  251 +#endif
  252 + void *aux;
  253 +{
  254 +#ifdef __BROKEN_INDIRECT_CONFIG
  255 + struct cfdata *cf = match;
  256 +#endif
  257 + struct pci_attach_args *pa = aux;
  258 +
  259 + if (cf->pcicf_dev != PCI_UNK_DEV &&
  260 + cf->pcicf_dev != pa->pa_device)
  261 + return 0;
  262 + if (cf->pcicf_function != PCI_UNK_FUNCTION &&
  263 + cf->pcicf_function != pa->pa_function)
  264 + return 0;
  265 + return ((*cf->cf_attach->ca_match)(parent, cf, aux));
  266 +}
  267 +
  268 +void
  269 +set_pci_isa_bridge_callback(fn, arg)
  270 + void (*fn) __P((void *));
  271 + void *arg;
  272 +{
  273 +
  274 + if (pci_isa_bridge_callback != NULL)
  275 + panic("set_pci_isa_bridge_callback");
  276 + pci_isa_bridge_callback = fn;
  277 + pci_isa_bridge_callback_arg = arg;
  278 +}

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