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Merge pull request #11 from Deradon/instruction-counter

"Add instruction counter to the emulator"
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2 parents 0f19fe5 + 4bb961f commit f8e6614080e063e94d7aa862cd6df6076074102b @judofyr committed Apr 10, 2012
Showing with 28 additions and 5 deletions.
  1. +19 −5 lib/rcpu.rb
  2. +9 −0 lib/rcpu/emulator.rb
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@@ -29,24 +29,29 @@ def self.from_code(code, a, b)
def execute(emu)
case name
when :SET
+ emu.cycle += 1
emu[a] = emu[b]
when :ADD
+ emu.cycle += 2
res = emu[a] + emu[b]
emu[:O] = res > 0xFFFF ? 1 : 0
emu[a] = res
when :SUB
+ emu.cycle += 2
res = emu[a] - emu[b]
emu[:O] = res < 0 ? 0xFFFF : 0
emu[a] = res
when :MUL
+ emu.cycle += 2
va, vb = emu[a], emu[b]
emu[:O] = ((va*vb)>>16)&0xffff
emu[a] = va * vb
when :DIV # DIV
+ emu.cycle += 3
va, vb = emu[a], emu[b]
res = 0
if vb.zero?
@@ -58,39 +63,49 @@ def execute(emu)
emu[a] = res
when :MOD
+ emu.cycle += 3
va, vb = emu[a], emu[b]
emu[a] = vb.zero? ? 0 : va % vb
when :SHL
+ emu.cycle += 2
va, vb = emu[a], emu[b]
emu[:O] = (va << vb) >> 16
emu[a] = va << vb
when :SHR
+ emu.cycle += 2
va, vb = emu[a], emu[b]
emu[:O] = (va << 16) >> vb
emu[a] = va >> vb
when :AND
+ emu.cycle += 1
emu[a] = emu[a] & emu[b]
when :BOR
+ emu.cycle += 1
emu[a] = emu[a] | emu[b]
when :XOR
+ emu.cycle += 1
emu[a] = emu[a] ^ emu[b]
when :IFE
- emu.skip unless emu[a] == emu[b]
+ emu.cycle += 2
+ (emu.cycle += 1) and emu.skip unless emu[a] == emu[b]
when :IFN
- emu.skip unless emu[a] != emu[b]
+ emu.cycle += 2
+ (emu.cycle += 1) and emu.skip unless emu[a] != emu[b]
when :IFG
- emu.skip unless emu[a] > emu[b]
+ emu.cycle += 2
+ (emu.cycle += 1) and emu.skip unless emu[a] > emu[b]
when :IFB
- emu.skip unless (emu[a] & emu[b]) != 0
+ emu.cycle += 2
+ (emu.cycle += 1) and emu.skip unless (emu[a] & emu[b]) != 0
else
raise "Missing basic: #{name}"
@@ -269,4 +284,3 @@ def to_machine(mem = [])
require 'rcpu/libraries'
require 'rcpu/debugger'
-
View
@@ -55,6 +55,7 @@ def slice(*a) @array.slice(*a) end
end
attr_reader :memory, :registers, :next_instruction
+ attr_accessor :cycle
class Immediate < Struct.new(:value)
end
@@ -63,6 +64,8 @@ def initialize(program)
@size = program.size
@memory = Memory.new(program)
@registers = Hash.new(0)
+ @cycle = 0
+ @instruction_count = 0
end
def start; @memory.start end
@@ -89,6 +92,8 @@ def dump
puts " 0x#{hex(@memory[x])}"
end
end
+ puts "Cycle: #{@cycle}"
+ puts " Inst: #{@instruction_count}"
end
def next_instruction
@@ -118,6 +123,7 @@ def dispatch
# Run one instruction
def tick
+ @instruction_count += 1
next_instruction[1].execute(self)
@next_instruction = nil
end
@@ -191,6 +197,7 @@ def value(v)
reg = Register.from_code(v - 0x08)
Indirection.new(reg)
when 0x10..0x17 # [register + next word]
+ self.cycle += 1
reg = Register.from_code(v - 0x10)
PlusRegister.new(reg, @memory[next_word])
when 0x18 # POP
@@ -206,8 +213,10 @@ def value(v)
when 0x1D
Register.new(:O)
when 0x1E
+ self.cycle += 1
Indirection.new(Literal.new(@memory[next_word]))
when 0x1F
+ self.cycle += 1
Literal.new(@memory[next_word])
when 0x20..0x3F
Literal.new(v - 0x20)

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