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Converted state machine to use integer states.
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Yosys seems to detect and optimize the FSM on it's own so we can write
it this way too.
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@esden
esden committed Feb 13, 2019
1 parent 727ffc9 commit 4c4ee7e
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Showing 5 changed files with 68 additions and 65 deletions.
27 changes: 14 additions & 13 deletions include/led-delay.v
View file
Expand Up @@ -130,17 +130,18 @@ module led_driver #(
output [15:0] LED_PANEL);

// State machine.
localparam S_START = 9'b0_0000_0001;
localparam S_R1 = 9'b0_0000_0011;
localparam S_R1E = 9'b0_0000_0010;
localparam S_R2 = 9'b0_0000_0101;
localparam S_R2E = 9'b0_0000_0100;
localparam S_SDELAY = 9'b0_0000_1000;
localparam S_SHIFT0 = 9'b0_0001_0000;
localparam S_SHIFT = 9'b0_0010_0000;
localparam S_SHIFTN = 9'b0_0100_0000;
localparam S_BLANK = 9'b0_1000_0000;
localparam S_UNBLANK = 9'b1_0000_0000;
localparam
S_START = 0,
S_R1 = 1,
S_R1E = 2,
S_R2 = 3,
S_R2E = 4,
S_SDELAY = 5,
S_SHIFT0 = 6,
S_SHIFT = 7,
S_SHIFTN = 8,
S_BLANK = 9,
S_UNBLANK = 10;

// FM6126 Init Values
localparam FM_R1 = 16'h7FFF;
Expand Down Expand Up @@ -169,7 +170,7 @@ module led_driver #(
assign LED_PANEL = {P1B10, P1B9, P1B8, P1B7, P1B4, P1B3, P1B2, P1B1,
P1A10, P1A9, P1A8, P1A7, P1A4, P1A3, P1A2, P1A1};

assign ready = (state[2:0] == 0);
assign ready = (state > 4);

// Dimensions
localparam db = $clog2(DELAY); // delay bits
Expand All @@ -192,7 +193,7 @@ module led_driver #(
reg [1:0] blank;
reg [1:0] latch;
reg [1:0] sclk;
reg [8:0] state;
reg [3:0] state;
reg [15:0] init_reg;
reg [6:0] init_lcnt;

Expand Down
27 changes: 14 additions & 13 deletions include/led-pdm-gamma.v
View file
Expand Up @@ -156,17 +156,18 @@ module led_driver #(
output [15:0] LED_PANEL);

// State machine.
localparam S_START = 9'b0_0000_0001;
localparam S_R1 = 9'b0_0000_0011;
localparam S_R1E = 9'b0_0000_0010;
localparam S_R2 = 9'b0_0000_0101;
localparam S_R2E = 9'b0_0000_0100;
localparam S_SDELAY = 9'b0_0000_1000;
localparam S_SHIFT0 = 9'b0_0001_0000;
localparam S_SHIFT = 9'b0_0010_0000;
localparam S_SHIFTN = 9'b0_0100_0000;
localparam S_BLANK = 9'b0_1000_0000;
localparam S_UNBLANK = 9'b1_0000_0000;
localparam
S_START = 0,
S_R1 = 1,
S_R1E = 2,
S_R2 = 3,
S_R2E = 4,
S_SDELAY = 5,
S_SHIFT0 = 6,
S_SHIFT = 7,
S_SHIFTN = 8,
S_BLANK = 9,
S_UNBLANK = 10;

// FM6126 Init Values
localparam FM_R1 = 16'h7FFF;
Expand Down Expand Up @@ -195,7 +196,7 @@ module led_driver #(
assign LED_PANEL = {P1B10, P1B9, P1B8, P1B7, P1B4, P1B3, P1B2, P1B1,
P1A10, P1A9, P1A8, P1A7, P1A4, P1A3, P1A2, P1A1};

assign ready = (state[2:0] == 0);
assign ready = (state > 4);

// Dimensions
localparam DB = $clog2(DELAY); // delay bits
Expand All @@ -218,7 +219,7 @@ module led_driver #(
reg [1:0] blank;
reg [1:0] latch;
reg [1:0] sclk;
reg [8:0] state;
reg [3:0] state;
reg [15:0] init_reg;
reg [6:0] init_lcnt;

Expand Down
28 changes: 14 additions & 14 deletions include/led-pwm-gamma.v
View file
Expand Up @@ -219,18 +219,18 @@ module led_driver #(
output [15:0] LED_PANEL);

// State machine.
localparam S_START = 9'b0_0000_0001;
localparam S_R1 = 9'b0_0000_0011;
localparam S_R1E = 9'b0_0000_0010;
localparam S_R2 = 9'b0_0000_0101;
localparam S_R2E = 9'b0_0000_0100;
localparam S_SDELAY = 9'b0_0000_1000;
localparam S_SHIFT0 = 9'b0_0001_0000;
localparam S_SHIFT = 9'b0_0010_0000;
localparam S_SHIFTN = 9'b0_0100_0000;
localparam S_BLANK = 9'b0_1000_0000;
localparam S_UNBLANK = 9'b1_0000_0000;

localparam
S_START = 0,
S_R1 = 1,
S_R1E = 2,
S_R2 = 3,
S_R2E = 4,
S_SDELAY = 5,
S_SHIFT0 = 6,
S_SHIFT = 7,
S_SHIFTN = 8,
S_BLANK = 9,
S_UNBLANK = 10;

// FM6126 Init Values
localparam FM_R1 = 16'h7FFF;
Expand Down Expand Up @@ -259,7 +259,7 @@ module led_driver #(
assign LED_PANEL = {P1B10, P1B9, P1B8, P1B7, P1B4, P1B3, P1B2, P1B1,
P1A10, P1A9, P1A8, P1A7, P1A4, P1A3, P1A2, P1A1};

assign ready = (state[2:0] == 0);
assign ready = (state > 4);

// Dimensions
localparam db = $clog2(DELAY); // delay bits
Expand All @@ -282,7 +282,7 @@ module led_driver #(
reg [1:0] blank;
reg [1:0] latch;
reg [1:0] sclk;
reg [8:0] state;
reg [3:0] state;
reg [15:0] init_reg;
reg [6:0] init_lcnt;

Expand Down
28 changes: 14 additions & 14 deletions include/led-pwm.v
View file
Expand Up @@ -180,18 +180,18 @@ module led_driver #(
output [15:0] LED_PANEL);

// State machine.
localparam S_START = 9'b0_0000_0001;
localparam S_R1 = 9'b0_0000_0011;
localparam S_R1E = 9'b0_0000_0010;
localparam S_R2 = 9'b0_0000_0101;
localparam S_R2E = 9'b0_0000_0100;
localparam S_SDELAY = 9'b0_0000_1000;
localparam S_SHIFT0 = 9'b0_0001_0000;
localparam S_SHIFT = 9'b0_0010_0000;
localparam S_SHIFTN = 9'b0_0100_0000;
localparam S_BLANK = 9'b0_1000_0000;
localparam S_UNBLANK = 9'b1_0000_0000;

localparam
S_START = 0,
S_R1 = 1,
S_R1E = 2,
S_R2 = 3,
S_R2E = 4,
S_SDELAY = 5,
S_SHIFT0 = 6,
S_SHIFT = 7,
S_SHIFTN = 8,
S_BLANK = 9,
S_UNBLANK = 10;

// FM6126 Init Values
localparam FM_R1 = 16'h7FFF;
Expand Down Expand Up @@ -220,7 +220,7 @@ module led_driver #(
assign LED_PANEL = {P1B10, P1B9, P1B8, P1B7, P1B4, P1B3, P1B2, P1B1,
P1A10, P1A9, P1A8, P1A7, P1A4, P1A3, P1A2, P1A1};

assign ready = (state[2:0] == 0);
assign ready = (state > 4);

// Dimensions
localparam db = $clog2(DELAY); // delay bits
Expand All @@ -243,7 +243,7 @@ module led_driver #(
reg [1:0] blank;
reg [1:0] latch;
reg [1:0] sclk;
reg [8:0] state;
reg [3:0] state;
reg [15:0] init_reg;
reg [6:0] init_lcnt;

Expand Down
23 changes: 12 additions & 11 deletions include/led-simple.v
View file
Expand Up @@ -57,16 +57,17 @@ module led_driver (
output [15:0] LED_PANEL);

// State machine.
localparam S_START = 8'b0000_0001;
localparam S_R1 = 8'b0000_0011;
localparam S_R1E = 8'b0000_0010;
localparam S_R2 = 8'b0000_0101;
localparam S_R2E = 8'b0000_0100;
localparam S_SHIFT0 = 8'b0000_1000;
localparam S_SHIFT = 8'b0001_0000;
localparam S_SHIFTN = 8'b0010_0000;
localparam S_BLANK = 8'b0100_0000;
localparam S_UNBLANK = 8'b1000_0000;
localparam
S_START = 0,
S_R1 = 1,
S_R1E = 2,
S_R2 = 3,
S_R2E = 4,
S_SHIFT0 = 5,
S_SHIFT = 6,
S_SHIFTN = 7,
S_BLANK = 8,
S_UNBLANK = 9;

// FM6126 Init Values
localparam FM_R1 = 16'h7FFF;
Expand Down Expand Up @@ -103,12 +104,12 @@ module led_driver (
wire [2:0] rgb0, rgb1;

reg [31:0] cnt;
reg [7:0] state;
reg [1:0] blank;
reg [1:0] latch;
reg [1:0] sclk;
reg [15:0] init_reg;
reg [6:0] init_lcnt;
reg [3:0] state;

assign {frame, subframe, addr, x} = cnt;
assign y0 = {1'b0, addr};
Expand Down

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