r82xx: register batching

keenerd · Aug 3, 2014 · a0b613183d212695bcec573063140ef44357a7ef · a0b6131 · 0xFACE · Aug 6, 2014
1 parent 4198f7d
commit a0b613183d212695bcec573063140ef44357a7ef
Unified Split

Showing with 52 additions and 3 deletions.

+1 −0 include/tuner_r82xx.h

+51 −3 src/tuner_r82xx.c
diff --git a/include/tuner_r82xx.h b/include/tuner_r82xx.h
@@ -87,6 +87,7 @@ struct r82xx_priv {
 	int				init_done;
 	int				disable_dither;
 	int				reg_cache;
+	int				reg_batch, reg_low, reg_high;

 	/* Store current mode */
 	uint32_t			delsys;
diff --git a/src/tuner_r82xx.c b/src/tuner_r82xx.c
@@ -300,6 +300,14 @@ static int r82xx_write_reg(struct r82xx_priv *priv, uint8_t reg, uint8_t val)
 {
 	if (priv->reg_cache && r82xx_read_cache_reg(priv, reg) == val)
 		return 0;
+	if (priv->reg_batch) {
+		shadow_store(priv, reg, &val, 1);
+		if (reg < priv->reg_low)
+			priv->reg_low = reg;
+		if (reg > priv->reg_high)
+			priv->reg_high = reg;
+		return 0;
+	}
 	return r82xx_write(priv, reg, &val, 1);
 }

@@ -313,9 +321,34 @@ static int r82xx_write_reg_mask(struct r82xx_priv *priv, uint8_t reg, uint8_t va

 	val = (rc & ~bit_mask) | (val & bit_mask);

-	if (priv->reg_cache && r82xx_read_cache_reg(priv, reg) == val)
-		return 0;
-	return r82xx_write(priv, reg, &val, 1);
+	return r82xx_write_reg(priv, reg, val);
+}
+
+static int r82xx_write_batch_init(struct r82xx_priv *priv)
+{
+	priv->reg_batch = 0;
+	if (priv->reg_cache) {
+		priv->reg_batch = 1;
+		priv->reg_low = NUM_REGS;
+		priv->reg_high = 0;
+	}
+	return 0;
+}
+
+static int r82xx_write_batch_sync(struct r82xx_priv *priv)
+{
+	int rc, offset, len;
+	if (!priv->reg_cache)
+		return -1;
+	if (!priv->reg_batch)
+		return -1;
+	priv->reg_batch = 0;
+	if (priv->reg_low > priv->reg_high)
+		return -1;
+	offset = priv->reg_low - REG_SHADOW_START;
+	len = priv->reg_high - priv->reg_low + 1;
+	rc = r82xx_write(priv, priv->reg_low, priv->regs+offset, len);
+	return rc;
 }

 static uint8_t r82xx_bitrev(uint8_t byte)
@@ -437,6 +470,8 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
 	uint8_t ni, si, nint, vco_fine_tune, val;
 	uint8_t data[5];

+	r82xx_write_batch_init(priv);
+
 	/* Frequency in kHz */
 	freq_khz = (freq + 500) / 1000;
 	pll_ref = priv->cfg->xtal;
@@ -535,6 +570,14 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
 	if (rc < 0)
 		return rc;

+	if (priv->reg_batch) {
+		rc = r82xx_write_batch_sync(priv);
+		if (rc < 0) {
+			fprintf(stderr, "[R82XX] Batch error in PLL for %u Hz!\n", freq);
+			return rc;
+		}
+	}
+
 	for (i = 0; i < 2; i++) {
 //		usleep_range(sleep_time, sleep_time + 1000);

@@ -1026,6 +1069,8 @@ int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq)
 	uint32_t lo_freq = freq + priv->int_freq;
 	uint8_t air_cable1_in;

+	r82xx_write_batch_init(priv);
+
 	rc = r82xx_set_mux(priv, lo_freq);
 	if (rc < 0)
 		goto err;
@@ -1046,6 +1091,9 @@ int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq)
 		rc = r82xx_write_reg_mask(priv, 0x05, air_cable1_in, 0x60);
 	}

+	if (priv->reg_batch) {
+		rc = r82xx_write_batch_sync(priv);
+	}
 err:
 	if (rc < 0)
 		fprintf(stderr, "%s: failed=%d\n", __FUNCTION__, rc);