diff --git a/ArduinoUniqueID.ino.elf b/ArduinoUniqueID.ino.elf new file mode 100755 index 000000000..986bf6997 Binary files /dev/null and b/ArduinoUniqueID.ino.elf differ diff --git a/ArduinoUniqueID.ino.hex b/ArduinoUniqueID.ino.hex new file mode 100644 index 000000000..dd6afa553 --- /dev/null +++ b/ArduinoUniqueID.ino.hex @@ -0,0 +1,127 @@ +:100000000C9435000C945D000C945D000C945D0024 +:100010000C945D000C945D000C945D000C945D00EC +:100020000C945D000C945D000C945D000C945D00DC +:100030000C945D000C945D000C945D000C945D00CC +:100040000C943A020C945D000C9408020C94E201AA +:100050000C945D000C945D000C945D000C945D00AC +:100060000C945D000C945D00800311241FBECFEF43 +:10007000D8E0DEBFCDBF11E0A0E0B1E0EEEAF7E0EE +:1000800002C005900D92AA32B107D9F721E0AAE289 +:10009000B1E001C01D92A03DB207E1F710E0C5E359 +:1000A000D0E004C02197FE010E94CF03C433D107E2 +:1000B000C9F70E9484020C94D5030C940000AF92FF +:1000C000BF92CF92DF92EF92FF920F931F93CF9345 +:1000D000DF936C017B018B01040F151FEB015E01A7 +:1000E000AE18BF08C017D10759F06991D601ED913C +:1000F000FC910190F081E02DC6010995892B79F7DB +:10010000C501DF91CF911F910F91FF90EF90DF908C +:10011000CF90BF90AF900895FC01538D448D252F53 +:1001200030E0842F90E0821B930B541710F0CF9691 +:10013000089501970895FC01918D828D981761F0C3 +:10014000A28DAE0FBF2FB11D5D968C91928D9F5FDA +:100150009F73928F90E008958FEF9FEF0895FC01B9 +:10016000918D828D981731F0828DE80FF11D858D6C +:1001700090E008958FEF9FEF0895FC01918D228DFF +:10018000892F90E0805C9F4F821B91098F73992784 +:10019000089583E391E00E94BD0021E0892B09F4DA +:1001A00020E0822F089580E090E0892B29F00E94C2 +:1001B000C90081110C9400000895FC01A48DA80FC2 +:1001C000B92FB11DA35ABF4F2C91848D90E0019699 +:1001D0008F739927848FA689B7892C93A089B189B9 +:1001E0008C91837080648C93938D848D981306C05A +:1001F0000288F389E02D80818F7D80830895EF92BE +:10020000FF920F931F93CF93DF93EC0181E0888FD0 +:100210009B8D8C8D98131AC0E889F989808185FFA0 +:1002200015C09FB7F894EE89FF896083E889F98942 +:1002300080818370806480839FBF81E090E0DF9144 +:10024000CF911F910F91FF90EF900895F62E0B8D97 +:1002500010E00F5F1F4F0F731127E02E8C8D8E1152 +:100260000CC00FB607FCFACFE889F989808185FFB9 +:10027000F5CFCE010E94DD00F1CFEB8DEC0FFD2F0D +:10028000F11DE35AFF4FF0829FB7F8940B8FEA8974 +:10029000FB8980818062CFCFCF93DF93EC01888D83 +:1002A0008823B9F0AA89BB89E889F9898C9185FDF1 +:1002B00003C0808186FD0DC00FB607FCF7CF8C917F +:1002C00085FFF2CF808185FFEDCFCE010E94DD005A +:1002D000E9CFDF91CF9108953FB7F89480912F0136 +:1002E00090913001A0913101B091320126B5A89BC7 +:1002F00005C02F3F19F00196A11DB11D3FBFBA2FB8 +:10030000A92F982F8827BC01CD01620F711D811D77 +:10031000911D42E0660F771F881F991F4A95D1F7FC +:100320000895FC0101900020E9F73197AF01481BC7 +:10033000590BBC0183E391E00C945F008F929F9274 +:10034000AF92BF920F931F93CF93DF93CDB7DEB7DA +:10035000A1970FB6F894DEBF0FBECDBF19A24230F1 +:1003600008F44AE08E010F5D1F4F842E912CB12CB2 +:10037000A12CA50194010E94AD03E62FB901CA0189 +:10038000EA30F4F4E05DD801EE938D01232B242BA9 +:10039000252B79F790E080E0109719F0CD010E94AD +:1003A0009101A1960FB6F894DEBF0FBECDBFDF91CD +:1003B000CF911F910F91BF90AF909F908F90089514 +:1003C000E95CE1CF1F920F920FB60F9211242F9389 +:1003D0003F934F935F936F937F938F939F93AF93CD +:1003E000BF93EF93FF9383E391E00E94DD00FF91C1 +:1003F000EF91BF91AF919F918F917F916F915F919D +:100400004F913F912F910F900FBE0F901F90189515 +:100410001F920F920FB60F9211242F938F939F93D9 +:10042000EF93FF93E0914301F09144018081E091CB +:100430004901F0914A0182FD1BC0908180914C01DD +:100440008F5F8F7320914D01821741F0E0914C0135 +:10045000F0E0ED5CFE4F958F80934C01FF91EF91A2 +:100460009F918F912F910F900FBE0F901F90189515 +:100470008081F4CF1F920F920FB60F9211242F9309 +:100480003F938F939F93AF93BF9380912B01909154 +:100490002C01A0912D01B0912E0130912A0123E071 +:1004A000230F2D3758F50196A11DB11D20932A0168 +:1004B00080932B0190932C01A0932D01B0932E01DA +:1004C00080912F0190913001A0913101B0913201C2 +:1004D0000196A11DB11D80932F0190933001A0932F +:1004E0003101B0933201BF91AF919F918F913F91B4 +:1004F0002F910F900FBE0F901F90189526E8230F95 +:100500000296A11DB11DD2CF789484B5826084BDBE +:1005100084B5816084BD85B5826085BD85B5816007 +:1005200085BD80916E00816080936E001092810085 +:100530008091810082608093810080918100816040 +:100540008093810080918000816080938000809101 +:10055000B10084608093B1008091B000816080938D +:10056000B00080917A00846080937A0080917A0054 +:10057000826080937A0080917A00816080937A0013 +:1005800080917A00806880937A001092C100E09197 +:100590004301F091440182E08083E0913F01F091BA +:1005A00040011082E0914101F09142018FEC808383 +:1005B00010924B01E0914701F091480186E0808361 +:1005C000E0914501F0914601808180618083E09156 +:1005D0004501F0914601808188608083E09145016A +:1005E000F0914601808180688083E0914501F0911F +:1005F000460180818F7D808382E191E00E9491019C +:100600008DE191E00E949101D0E0C0E011E2E1E0D3 +:10061000F0E0C630D10510F4F0E0E0E0BE01625F2A +:100620007F4FE60FF71F10935700E4916E2F70E095 +:1006300090E080E04AE00E949E012196C930D105F9 +:1006400031F78DE191E00E94910191E2B92E00E035 +:1006500010E00E946C016B017C0188EE482E83E063 +:10066000582E612C712C0E946C016C197D098E0929 +:100670009F09683E734081059105A8F321E0421A65 +:1006800051086108710888EEC80E83E0D81EE11C8D +:10069000F11C411451046104710429F780E291E0D6 +:1006A0000E9491018DE191E00E949101D0E0C0E0B3 +:1006B000FE013E9661E070E0C630D10510F470E0B6 +:1006C00060E0E60FF71FB0925700649170E090E091 +:1006D00080E04AE00E949E012196C930D10541F791 +:1006E0008DE191E00E9491010115110509F4B1CF4E +:1006F0000E94C900882309F4ACCF0E940000A9CF52 +:10070000E3E3F1E01382128288EE93E0A0E0B0E030 +:1007100084839583A683B78384E091E0918380836B +:1007200085EC90E09587848784EC90E097878687B6 +:1007300080EC90E0918B808B81EC90E0938B828BAE +:1007400082EC90E0958B848B86EC90E0978B868B87 +:10075000118E128E138E148E0895A1E21A2EAA1BEA +:10076000BB1BFD010DC0AA1FBB1FEE1FFF1FA21761 +:10077000B307E407F50720F0A21BB30BE40BF50B5E +:10078000661F771F881F991F1A9469F760957095E7 +:10079000809590959B01AC01BD01CF010895EE0FAE +:0E07A000FF1F0590F491E02D0994F894FFCF0F +:1007AE0000000000FF005F008C004C01BD009B00AC +:1007BE00AF00696E2073657475702829000D0A00EC +:0A07CE00696E206C6F6F702829001F +:00000001FF diff --git a/ArduinoUniqueID/ArduinoUniqueID.ino b/ArduinoUniqueID/ArduinoUniqueID.ino new file mode 100644 index 000000000..34fa3d9ac --- /dev/null +++ b/ArduinoUniqueID/ArduinoUniqueID.ino @@ -0,0 +1,29 @@ +// https://microchipsupport.force.com/s/article/Serial-number-in-AVR---Mega-Tiny-devices + +#include + +void setup() +{ + Serial.begin(9600); + Serial.println("in setup()"); + + unsigned int UniqueIDsize = 9; + for (size_t i = 0; i < UniqueIDsize; i++) + { + Serial.print(boot_signature_byte_get(0x0E + i + (UniqueIDsize == 9 && i > 5 ? 1 : 0))); + } + Serial.println(); +} + +void loop() +{ + delay(1000); + Serial.println("in loop()"); + + unsigned int UniqueIDsize = 9; + for (size_t i = 0; i < UniqueIDsize; i++) + { + Serial.print(boot_signature_byte_get(0x0E + i + (UniqueIDsize == 9 && i > 5 ? 1 : 0))); + } + Serial.println(); +} diff --git a/README.md b/README.md index 489ddf1a5..dd5beee8e 100644 --- a/README.md +++ b/README.md @@ -149,3 +149,48 @@ And this is a gtkwave trace of what the firmware is doing. You can zoom in, meas in gtkwave, select trades to see etc. Quite a few other examples are available! + +Usage +----- + +Install build dependencies: + +``` +sudo apt-get install libelf-dev freeglut3 freeglut3-dev gcc-avr avr-libc gcc make +``` + +Clone and build the latest `simavr` code: + +``` +git clone https://github.com/buserror/simavr.git + +cd simavr + +make +``` + +Run sample programs: + +``` +./simavr/run_avr -f 16000000 -m atmega328p ArduinoUniqueID.ino.elf + +./simavr/run_avr -f 16000000 -m atmega328p ArduinoUniqueID.ino.hex +``` + +Sample run: + +``` +./simavr/run_avr -f 16000000 -m atmega328p ArduinoUniqueID.ino.hex +Loaded 1966 .text at address 0x0 +Loaded 42 .data +in setup().. +93012148930148930.. +in loop().. +93012148930148930.. +in loop().. +93012148930148930.. +in loop().. +93012148930148930.. +in loop().. +93012148930148930.. +``` diff --git a/simavr/cores/avr/iom328pb.h b/simavr/cores/avr/iom328pb.h new file mode 100644 index 000000000..0edc9fbe0 --- /dev/null +++ b/simavr/cores/avr/iom328pb.h @@ -0,0 +1,1220 @@ +/* + * Copyright (C) 2020, Microchip Technology Inc. and its subsidiaries ("Microchip") + * All rights reserved. + * + * This software is developed by Microchip Technology Inc. and its subsidiaries ("Microchip"). + * + * Redistribution and use in source and binary forms, with or without modification, are + * permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. Publication is not required when + * this file is used in an embedded application. + * + * 3. Microchip's name may not be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY MICROCHIP "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MICROCHIP BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING BUT NOT LIMITED TO + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWSOEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _AVR_ATMEGA328PB_H_INCLUDED +#define _AVR_ATMEGA328PB_H_INCLUDED + + +#ifndef _AVR_IO_H_ +# error "Include instead of this file." +#endif + +#ifndef _AVR_IOXXX_H_ +# define _AVR_IOXXX_H_ "iom328pb.h" +#else +# error "Attempt to include more than one file." +#endif + +/* Registers and associated bit numbers */ + +#define PINB _SFR_IO8(0x03) +#define PINB7 7 +#define PINB6 6 +#define PINB5 5 +#define PINB4 4 +#define PINB3 3 +#define PINB2 2 +#define PINB1 1 +#define PINB0 0 + +#define DDRB _SFR_IO8(0x04) +#define DDRB7 7 +// Inserted "DDB7" from "DDRB7" due to compatibility +#define DDB7 7 +#define DDRB6 6 +// Inserted "DDB6" from "DDRB6" due to compatibility +#define DDB6 6 +#define DDRB5 5 +// Inserted "DDB5" from "DDRB5" due to compatibility +#define DDB5 5 +#define DDRB4 4 +// Inserted "DDB4" from "DDRB4" due to compatibility +#define DDB4 4 +#define DDRB3 3 +// Inserted "DDB3" from "DDRB3" due to compatibility +#define DDB3 3 +#define DDRB2 2 +// Inserted "DDB2" from "DDRB2" due to compatibility +#define DDB2 2 +#define DDRB1 1 +// Inserted "DDB1" from "DDRB1" due to compatibility +#define DDB1 1 +#define DDRB0 0 +// Inserted "DDB0" from "DDRB0" due to compatibility +#define DDB0 0 + +#define PORTB _SFR_IO8(0x05) +#define PORTB7 7 +#define PORTB6 6 +#define PORTB5 5 +#define PORTB4 4 +#define PORTB3 3 +#define PORTB2 2 +#define PORTB1 1 +#define PORTB0 0 + +#define PINC _SFR_IO8(0x06) +#define PINC6 6 +#define PINC5 5 +#define PINC4 4 +#define PINC3 3 +#define PINC2 2 +#define PINC1 1 +#define PINC0 0 + +#define DDRC _SFR_IO8(0x07) +#define DDRC6 6 +// Inserted "DDC6" from "DDRC6" due to compatibility +#define DDC6 6 +#define DDRC5 5 +// Inserted "DDC5" from "DDRC5" due to compatibility +#define DDC5 5 +#define DDRC4 4 +// Inserted "DDC4" from "DDRC4" due to compatibility +#define DDC4 4 +#define DDRC3 3 +// Inserted "DDC3" from "DDRC3" due to compatibility +#define DDC3 3 +#define DDRC2 2 +// Inserted "DDC2" from "DDRC2" due to compatibility +#define DDC2 2 +#define DDRC1 1 +// Inserted "DDC1" from "DDRC1" due to compatibility +#define DDC1 1 +#define DDRC0 0 +// Inserted "DDC0" from "DDRC0" due to compatibility +#define DDC0 0 + +#define PORTC _SFR_IO8(0x08) +#define PORTC6 6 +#define PORTC5 5 +#define PORTC4 4 +#define PORTC3 3 +#define PORTC2 2 +#define PORTC1 1 +#define PORTC0 0 + +#define PIND _SFR_IO8(0x09) +#define PIND7 7 +#define PIND6 6 +#define PIND5 5 +#define PIND4 4 +#define PIND3 3 +#define PIND2 2 +#define PIND1 1 +#define PIND0 0 + +#define DDRD _SFR_IO8(0x0A) +#define DDRD7 7 +// Inserted "DDD7" from "DDRD7" due to compatibility +#define DDD7 7 +#define DDRD6 6 +// Inserted "DDD6" from "DDRD6" due to compatibility +#define DDD6 6 +#define DDRD5 5 +// Inserted "DDD5" from "DDRD5" due to compatibility +#define DDD5 5 +#define DDRD4 4 +// Inserted "DDD4" from "DDRD4" due to compatibility +#define DDD4 4 +#define DDRD3 3 +// Inserted "DDD3" from "DDRD3" due to compatibility +#define DDD3 3 +#define DDRD2 2 +// Inserted "DDD2" from "DDRD2" due to compatibility +#define DDD2 2 +#define DDRD1 1 +// Inserted "DDD1" from "DDRD1" due to compatibility +#define DDD1 1 +#define DDRD0 0 +// Inserted "DDD0" from "DDRD0" due to compatibility +#define DDD0 0 + +#define PORTD _SFR_IO8(0x0B) +#define PORTD7 7 +#define PORTD6 6 +#define PORTD5 5 +#define PORTD4 4 +#define PORTD3 3 +#define PORTD2 2 +#define PORTD1 1 +#define PORTD0 0 + +#define PINE _SFR_IO8(0x0C) +#define PINE3 3 +#define PINE2 2 +#define PINE1 1 +#define PINE0 0 + +#define DDRE _SFR_IO8(0x0D) +#define DDRE3 3 +// Inserted "DDE3" from "DDRE3" due to compatibility +#define DDE3 3 +#define DDRE2 2 +// Inserted "DDE2" from "DDRE2" due to compatibility +#define DDE2 2 +#define DDRE1 1 +// Inserted "DDE1" from "DDRE1" due to compatibility +#define DDE1 1 +#define DDRE0 0 +// Inserted "DDE0" from "DDRE0" due to compatibility +#define DDE0 0 + +#define PORTE _SFR_IO8(0x0E) +#define PORTE3 3 +#define PORTE2 2 +#define PORTE1 1 +#define PORTE0 0 + +/* Reserved [0x0F..0x14] */ + +#define TIFR0 _SFR_IO8(0x15) +#define TOV0 0 +#define OCF0A 1 +#define OCF0B 2 + +#define TIFR1 _SFR_IO8(0x16) +#define TOV1 0 +#define OCF1A 1 +#define OCF1B 2 +#define ICF1 5 + +#define TIFR2 _SFR_IO8(0x17) +#define TOV2 0 +#define OCF2A 1 +#define OCF2B 2 + +#define TIFR3 _SFR_IO8(0x18) +#define TOV3 0 +#define OCF3A 1 +#define OCF3B 2 +#define ICF3 5 + +#define TIFR4 _SFR_IO8(0x19) +#define TOV4 0 +#define OCF4A 1 +#define OCF4B 2 +#define ICF4 5 + +/* Reserved [0x1A] */ + +#define PCIFR _SFR_IO8(0x1B) +#define PCIF0 0 +#define PCIF1 1 +#define PCIF2 2 +#define PCIF3 3 + +#define EIFR _SFR_IO8(0x1C) +#define INTF0 0 +#define INTF1 1 + +#define EIMSK _SFR_IO8(0x1D) +#define INT0 0 +#define INT1 1 + +#define GPIOR0 _SFR_IO8(0x1E) + +#define EECR _SFR_IO8(0x1F) +#define EERE 0 +#define EEPE 1 +#define EEMPE 2 +#define EERIE 3 +#define EEPM0 4 +#define EEPM1 5 + +#define EEDR _SFR_IO8(0x20) + +/* Combine EEARL and EEARH */ +#define EEAR _SFR_IO16(0x21) + +#define EEARL _SFR_IO8(0x21) +#define EEARH _SFR_IO8(0x22) + +#define GTCCR _SFR_IO8(0x23) +#define PSRSYNC 0 +#define TSM 7 +#define PSRASY 1 + +#define TCCR0A _SFR_IO8(0x24) +#define WGM00 0 +#define WGM01 1 +#define COM0B0 4 +#define COM0B1 5 +#define COM0A0 6 +#define COM0A1 7 + +#define TCCR0B _SFR_IO8(0x25) +#define CS00 0 +#define CS01 1 +#define CS02 2 +#define WGM02 3 +#define FOC0B 6 +#define FOC0A 7 + +#define TCNT0 _SFR_IO8(0x26) + +#define OCR0A _SFR_IO8(0x27) + +#define OCR0B _SFR_IO8(0x28) + +/* Reserved [0x29] */ + +#define GPIOR1 _SFR_IO8(0x2A) + +#define GPIOR2 _SFR_IO8(0x2B) + +#define SPCR0 _SFR_IO8(0x2C) +#define SPR0 0 +#define SPR1 1 +#define CPHA 2 +#define CPOL 3 +#define MSTR 4 +#define DORD 5 +#define SPE 6 +#define SPIE 7 + +#define SPSR0 _SFR_IO8(0x2D) +#define SPI2X 0 +#define WCOL 6 +#define SPIF 7 + +#define SPDR0 _SFR_IO8(0x2E) + +#define ACSRB _SFR_IO8(0x2F) +#define ACOE 0 + +#define ACSRA _SFR_IO8(0x30) + +#define ACSR _SFR_IO8(0x30) +#define ACIS0 0 +#define ACIS1 1 +#define ACIC 2 +#define ACIE 3 +#define ACI 4 +#define ACO 5 +#define ACBG 6 +#define ACD 7 + +/* Reserved [0x31..0x32] */ + +#define SMCR _SFR_IO8(0x33) +#define SE 0 +#define SM0 1 +#define SM1 2 +#define SM2 3 + +#define MCUSR _SFR_IO8(0x34) +#define PORF 0 +#define EXTRF 1 +#define BORF 2 +#define WDRF 3 + +#define MCUCR _SFR_IO8(0x35) +#define IVCE 0 +#define IVSEL 1 +#define PUD 4 +#define BODSE 5 +#define BODS 6 + +/* Reserved [0x36] */ + +#define SPMCSR _SFR_IO8(0x37) +#define SPMEN 0 +#define PGERS 1 +#define PGWRT 2 +#define BLBSET 3 +#define RWWSRE 4 +#define SIGRD 5 +#define RWWSB 6 +#define SPMIE 7 + +/* Reserved [0x38..0x3C] */ + +/* SP [0x3D..0x3E] */ + +/* SREG [0x3F] */ + +#define WDTCSR _SFR_MEM8(0x60) +#define WDE 3 +#define WDCE 4 +#define WDP0 0 +#define WDP1 1 +#define WDP2 2 +#define WDP3 5 +#define WDIE 6 +#define WDIF 7 + +#define CLKPR _SFR_MEM8(0x61) +#define CLKPS0 0 +#define CLKPS1 1 +#define CLKPS2 2 +#define CLKPS3 3 +#define CLKPCE 7 + +#define XFDCSR _SFR_MEM8(0x62) +#define XFDIE 0 +#define XFDIF 1 + +/* Reserved [0x63] */ + +#define PRR0 _SFR_MEM8(0x64) +#define PRADC 0 +#define PRUSART0 1 +#define PRSPI0 2 +#define PRTIM1 3 +#define PRUSART1 4 +#define PRTIM0 5 +#define PRTIM2 6 +#define PRTWI0 7 + +#define __AVR_HAVE_PRR0 ((1<