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## Autogenerated on 2012-Feb-16 16:25 by edifToUcf.py
## Extracting designator U800 from EDIF netlist 01docmap.EDF
##
## modified by bunnie
## also by josh
###### Setting VCCAUX for Spartan 6 TMDS
CONFIG VCCAUX = 3.3;
###### clocks
NET "OSC_CLK" TNM_NET = "TNM_clk26";
TIMESPEC "TS_clk26" = PERIOD "TNM_clk26" 26 MHz HIGH 50;
NET "CAM_D[5]" LOC = C4;
NET "CAM_D[5]" IOSTANDARD = LVCMOS33;
###### power subsystem
## charger status pins
NET "CHG_ACP" LOC = T5;
NET "CHG_ACP" IOSTANDARD = LVCMOS33;
###### HDMI control
# HDMI CEC
NET "CEC" LOC = N5;
NET "CEC" IOSTANDARD = LVCMOS33;
# HDMI DDC pins
NET "DDC_SCL_LV_N" LOC = T4;
NET "DDC_SCL_LV_N" IOSTANDARD = LVCMOS33;
NET "DDC_SDA_LV_N" LOC = R5;
NET "DDC_SDA_LV_N" IOSTANDARD = LVCMOS33;
NET "DDC_SDA_PD" LOC = V4;
NET "DDC_SDA_PD" IOSTANDARD = LVCMOS33;
NET "DDC_SDA_PU" LOC = T3;
NET "DDC_SDA_PU" IOSTANDARD = LVCMOS33;
# HDMI hot plug detect ins
NET "HPD_N" LOC = P6;
NET "HPD_N" IOSTANDARD = LVCMOS33;
NET "HPD_OVERRIDE" LOC = R3;
NET "HPD_OVERRIDE" IOSTANDARD = LVCMOS33;
# HDMI genlock feedback
NET "VSYNC_STB" LOC = C7;
NET "VSYNC_STB" IOSTANDARD = LVCMOS33;
###### HDMI data
NET "RX0_TMDS_N[0]" LOC = V11;
NET "RX0_TMDS_N[0]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_P[0]" LOC = U11;
NET "RX0_TMDS_P[0]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_N[1]" LOC = V13;
NET "RX0_TMDS_N[1]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_P[1]" LOC = U13;
NET "RX0_TMDS_P[1]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_N[2]" LOC = V16;
NET "RX0_TMDS_N[2]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_P[2]" LOC = U16;
NET "RX0_TMDS_P[2]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_N[3]" LOC = V10;
NET "RX0_TMDS_N[3]" IOSTANDARD = TMDS_33;
NET "RX0_TMDS_P[3]" LOC = U10;
NET "RX0_TMDS_P[3]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_N[0]" LOC = V6;
NET "TX0_TMDS_N[0]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_P[0]" LOC = T6;
NET "TX0_TMDS_P[0]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_N[1]" LOC = V7;
NET "TX0_TMDS_N[1]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_P[1]" LOC = U7;
NET "TX0_TMDS_P[1]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_N[2]" LOC = V8;
NET "TX0_TMDS_N[2]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_P[2]" LOC = U8;
NET "TX0_TMDS_P[2]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_N[3]" LOC = V5;
NET "TX0_TMDS_N[3]" IOSTANDARD = TMDS_33;
NET "TX0_TMDS_P[3]" LOC = U5;
NET "TX0_TMDS_P[3]" IOSTANDARD = TMDS_33;
###### i/o controller digital interfaces
NET "DIG_ADC_CS[0]" LOC = M14;
NET "DIG_ADC_CS[0]" IOSTANDARD = LVCMOS33;
NET "DIG_ADC_CS[1]" LOC = T10;
NET "DIG_ADC_CS[1]" IOSTANDARD = LVCMOS33;
NET "DIG_ADC_IN" LOC = T13;
NET "DIG_ADC_IN" IOSTANDARD = LVCMOS33;
NET "DIG_ADC_OUT" LOC = R11;
NET "DIG_ADC_OUT" IOSTANDARD = LVCMOS33;
NET "DIG_ADC_SCLK" LOC = T11;
NET "DIG_ADC_SCLK" IOSTANDARD = LVCMOS33;
NET "DIG_CLR_N" LOC = P16;
NET "DIG_CLR_N" IOSTANDARD = LVCMOS33;
NET "DIG_IN" LOC = R10;
NET "DIG_IN" IOSTANDARD = LVCMOS33;
NET "DIG_OUT" LOC = L16;
NET "DIG_OUT" IOSTANDARD = LVCMOS33;
NET "DIG_RCLK" LOC = T14;
NET "DIG_RCLK" IOSTANDARD = LVCMOS33;
NET "DIG_SAMPLE" LOC = L15;
NET "DIG_SAMPLE" IOSTANDARD = LVCMOS33;
NET "DIG_SCLK" LOC = V14;
NET "DIG_SCLK" IOSTANDARD = LVCMOS33;
NET "DIG_SRLOAD" LOC = M16;
NET "DIG_SRLOAD" IOSTANDARD = LVCMOS33;
###### motor controller direct interfaces
## motors
NET "MBOT[0]" LOC = U17;
NET "MBOT[0]" IOSTANDARD = LVCMOS33;
NET "MTOP[0]" LOC = T17;
NET "MTOP[0]" IOSTANDARD = LVCMOS33;
NET "MBOT[1]" LOC = U18;
NET "MBOT[1]" IOSTANDARD = LVCMOS33;
NET "MTOP[1]" LOC = P15;
NET "MTOP[1]" IOSTANDARD = LVCMOS33;
NET "MBOT[2]" LOC = N16;
NET "MBOT[2]" IOSTANDARD = LVCMOS33;
NET "MTOP[2]" LOC = N15;
NET "MTOP[2]" IOSTANDARD = LVCMOS33;
NET "MBOT[3]" LOC = L14;
NET "MBOT[3]" IOSTANDARD = LVCMOS33;
NET "MTOP[3]" LOC = K14;
NET "MTOP[3]" IOSTANDARD = LVCMOS33;
NET "MOT_PWM" LOC = P12;
NET "MOT_PWM" IOSTANDARD = LVCMOS33;
## servos
NET "M_SERVO[0]" LOC = T9;
NET "M_SERVO[0]" IOSTANDARD = LVCMOS33;
NET "M_SERVO[1]" LOC = T8;
NET "M_SERVO[1]" IOSTANDARD = LVCMOS33;
NET "M_SERVO[2]" LOC = R7;
NET "M_SERVO[2]" IOSTANDARD = LVCMOS33;
NET "M_SERVO[3]" LOC = V9;
NET "M_SERVO[3]" IOSTANDARD = LVCMOS33;
###### external uart
#NET "EXT_TO_HOST_UART" LOC = D17;
#NET "EXT_TO_HOST_UART" IOSTANDARD = LVCMOS33;
#NET "HOST_TO_EXT_UART" LOC = V3;
#NET "HOST_TO_EXT_UART" IOSTANDARD = LVCMOS33;
###### IR modulator input
#NET "IR_RX" LOC = E16; # was: GPIO_102
#NET "IR_RX" IOSTANDARD = LVCMOS33;
###### pushbutton
NET "INPUT_SW0" LOC = B16;
NET "INPUT_SW0" IOSTANDARD = LVCMOS33;
###### audio pass-through interface
NET "I2S_CDCLK0" LOC = H18;
NET "I2S_CDCLK0" IOSTANDARD = LVCMOS33;
NET "I2S_CDCLK1" LOC = L13;
NET "I2S_CDCLK1" IOSTANDARD = LVCMOS33;
NET "I2S_CLK0" LOC = H17;
NET "I2S_CLK0" IOSTANDARD = LVCMOS33;
NET "I2S_CLK1" LOC = K16;
NET "I2S_CLK1" IOSTANDARD = LVCMOS33;
NET "I2S_DI0" LOC = F15;
NET "I2S_DI0" IOSTANDARD = LVCMOS33;
NET "I2S_DI1" LOC = C18;
NET "I2S_DI1" IOSTANDARD = LVCMOS33;
NET "I2S_DO0" LOC = G14;
NET "I2S_DO0" IOSTANDARD = LVCMOS33;
NET "I2S_DO1" LOC = C17;
NET "I2S_DO1" IOSTANDARD = LVCMOS33;
NET "I2S_LRCLK0" LOC = F16;
NET "I2S_LRCLK0" IOSTANDARD = LVCMOS33;
NET "I2S_LRCLK1" LOC = K15;
NET "I2S_LRCLK1" IOSTANDARD = LVCMOS33;
###### LCD interface
## includes pass-through and supplementary high-color bits
NET "LCDO_B[3]" LOC = E18;
NET "LCDO_B[3]" IOSTANDARD = LVCMOS33;
NET "LCDO_B[4]" LOC = F17;
NET "LCDO_B[4]" IOSTANDARD = LVCMOS33;
NET "LCDO_B[5]" LOC = F18;
NET "LCDO_B[5]" IOSTANDARD = LVCMOS33;
NET "LCDO_B[6]" LOC = G18;
NET "LCDO_B[6]" IOSTANDARD = LVCMOS33;
NET "LCDO_B[7]" LOC = H12;
NET "LCDO_B[7]" IOSTANDARD = LVCMOS33;
NET "LCDO_DEN" LOC = K13;
NET "LCDO_DEN" IOSTANDARD = LVCMOS33;
NET "LCDO_DOTCLK" LOC = L12;
NET "LCDO_DOTCLK" IOSTANDARD = LVCMOS33;
NET "LCDO_G[2]" LOC = G13;
NET "LCDO_G[2]" IOSTANDARD = LVCMOS33;
NET "LCDO_G[3]" LOC = J13;
NET "LCDO_G[3]" IOSTANDARD = LVCMOS33;
NET "LCDO_G[4]" LOC = J18;
NET "LCDO_G[4]" IOSTANDARD = LVCMOS33;
NET "LCDO_G[5]" LOC = K12;
NET "LCDO_G[5]" IOSTANDARD = LVCMOS33;
NET "LCDO_G[6]" LOC = K18;
NET "LCDO_G[6]" IOSTANDARD = LVCMOS33;
NET "LCDO_G[7]" LOC = K17;
NET "LCDO_G[7]" IOSTANDARD = LVCMOS33;
NET "LCDO_HSYNC" LOC = P17;
NET "LCDO_HSYNC" IOSTANDARD = LVCMOS33;
NET "LCDO_R[2]" LOC = L18;
NET "LCDO_R[2]" IOSTANDARD = LVCMOS33;
NET "LCDO_R[3]" LOC = L17;
NET "LCDO_R[3]" IOSTANDARD = LVCMOS33;
NET "LCDO_R[4]" LOC = M18;
NET "LCDO_R[4]" IOSTANDARD = LVCMOS33;
NET "LCDO_R[5]" LOC = N18;
NET "LCDO_R[5]" IOSTANDARD = LVCMOS33;
NET "LCDO_R[6]" LOC = N17;
NET "LCDO_R[6]" IOSTANDARD = LVCMOS33;
NET "LCDO_R[7]" LOC = P18;
NET "LCDO_R[7]" IOSTANDARD = LVCMOS33;
NET "LCDO_RESET_N" LOC = D18;
NET "LCDO_RESET_N" IOSTANDARD = LVCMOS33;
NET "LCDO_VSYNC" LOC = T18;
NET "LCDO_VSYNC" IOSTANDARD = LVCMOS33;
#NET "LCD_B[0]" LOC = A11;
#NET "LCD_B[0]" IOSTANDARD = LVCMOS33;
NET "LCD_B[1]" LOC = B11;
NET "LCD_B[1]" IOSTANDARD = LVCMOS33;
NET "LCD_B[2]" LOC = B2;
NET "LCD_B[2]" IOSTANDARD = LVCMOS33;
NET "LCD_B[3]" LOC = F13;
NET "LCD_B[3]" IOSTANDARD = LVCMOS33;
NET "LCD_B[4]" LOC = A12;
NET "LCD_B[4]" IOSTANDARD = LVCMOS33;
NET "LCD_B[5]" LOC = B12;
NET "LCD_B[5]" IOSTANDARD = LVCMOS33;
NET "LCD_DEN" LOC = A4;
NET "LCD_DEN" IOSTANDARD = LVCMOS33;
NET "LCD_G[0]" LOC = B3;
NET "LCD_G[0]" IOSTANDARD = LVCMOS33;
NET "LCD_G[1]" LOC = C14;
NET "LCD_G[1]" IOSTANDARD = LVCMOS33;
NET "LCD_G[2]" LOC = B8;
NET "LCD_G[2]" IOSTANDARD = LVCMOS33;
NET "LCD_G[3]" LOC = A8;
NET "LCD_G[3]" IOSTANDARD = LVCMOS33;
NET "LCD_G[4]" LOC = B4;
NET "LCD_G[4]" IOSTANDARD = LVCMOS33;
NET "LCD_G[5]" LOC = A2;
NET "LCD_G[5]" IOSTANDARD = LVCMOS33;
NET "LCD_HS" LOC = C15;
NET "LCD_HS" IOSTANDARD = LVCMOS33;
NET "LCD_R[0]" LOC = E13;
NET "LCD_R[0]" IOSTANDARD = LVCMOS33;
NET "LCD_R[1]" LOC = A3;
NET "LCD_R[1]" IOSTANDARD = LVCMOS33;
NET "LCD_R[2]" LOC = A6;
NET "LCD_R[2]" IOSTANDARD = LVCMOS33;
NET "LCD_R[3]" LOC = A5;
NET "LCD_R[3]" IOSTANDARD = LVCMOS33;
NET "LCD_R[4]" LOC = B6;
NET "LCD_R[4]" IOSTANDARD = LVCMOS33;
NET "LCD_R[5]" LOC = A7;
NET "LCD_R[5]" IOSTANDARD = LVCMOS33;
NET "ADC_BATT_SEL" LOC = H13;
NET "ADC_BATT_SEL" IOSTANDARD = LVCMOS33;
NET "LCD_VS" LOC = D14;
NET "LCD_VS" IOSTANDARD = LVCMOS33;
###### clock inputs
NET "LCD_CLK_T" LOC = A9; # output to the CPU
NET "LCD_CLK_T" IOSTANDARD = LVCMOS33;
NET "OSC_CLK" LOC = A10; # 26 MHz input from the CPU
NET "OSC_CLK" IOSTANDARD = LVCMOS33;
###### FPGA to CPU SPI interface
NET "FPGA_MISO" LOC = A16;
NET "FPGA_MISO" IOSTANDARD = LVCMOS33;
NET "FPGA_MOSI" LOC = F14;
NET "FPGA_MOSI" IOSTANDARD = LVCMOS33;
NET "FPGA_SCLK" LOC = C11;
NET "FPGA_SCLK" IOSTANDARD = LVCMOS33;
NET "FPGA_SYNC" LOC = A15;
NET "FPGA_SYNC" IOSTANDARD = LVCMOS33;
####### FPGA to cpu I2C interfaces
## this one is shared with audio, accelerometer, EEPROM, etc.
#NET "PWR_SCL" LOC = M13;
#NET "PWR_SCL" IOSTANDARD = LVCMOS33;
#NET "PWR_SDA" LOC = N14;
#NET "PWR_SDA" IOSTANDARD = LVCMOS33;
## this one is dedicated to the FPGA
###### Status LED... shared with HSWAPEN, so be careul with it.
#NET "FPGA_LED" LOC = D4;
#NET "FPGA_LED" IOSTANDARD = LVCMOS33;
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