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Machine model: allow itineraries to be shared by different processor …

…models.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159959 91177308-0d34-0410-b5e6-96231b3b80d8
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1 parent 70cb177 commit cb94192ff01fabdd492e9b229683e5d98aa2099f @atrick atrick committed Jul 9, 2012
Showing with 12 additions and 0 deletions.
  1. +12 −0 utils/TableGen/SubtargetEmitter.cpp
@@ -336,10 +336,16 @@ EmitStageAndOperandCycleData(raw_ostream &OS,
std::vector<std::vector<InstrItinerary> >
&ProcItinLists) {
+ // Multiple processor models may share an itinerary record. Emit it once.
+ SmallPtrSet<Record*, 8> ItinsDefSet;
+
// Emit functional units for all the itineraries.
for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
PE = SchedModels.procModelEnd(); PI != PE; ++PI) {
+ if (!ItinsDefSet.insert(PI->ItinsDef))
+ continue;
+
std::vector<Record*> FUs = PI->ItinsDef->getValueAsListOfDefs("FU");
if (FUs.empty())
continue;
@@ -508,12 +514,18 @@ void SubtargetEmitter::
EmitItineraries(raw_ostream &OS,
std::vector<std::vector<InstrItinerary> > &ProcItinLists) {
+ // Multiple processor models may share an itinerary record. Emit it once.
+ SmallPtrSet<Record*, 8> ItinsDefSet;
+
// For each processor's machine model
std::vector<std::vector<InstrItinerary> >::iterator
ProcItinListsIter = ProcItinLists.begin();
for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(),
PE = SchedModels.procModelEnd(); PI != PE; ++PI) {
+
Record *ItinsDef = PI->ItinsDef;
+ if (!ItinsDefSet.insert(ItinsDef))
+ continue;
// Get processor itinerary name
const std::string &Name = ItinsDef->getName();

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