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Commits on Jul 20, 2012
  1. name correction

    authored
  2. naming fix

    authored
  3. fix stack align printing

    authored
  4. initial relooper integration + some instruction generation, generated…

    authored
    … hello world looks almost ok if you squint your eyes
  5. nicer function headers

    authored
  6. start making global vars js-ey

    authored
Commits on Jul 19, 2012
Commits on Jul 18, 2012
  1. store operations

    authored
  2. make sethi a JS-like store

    authored
Commits on Jul 11, 2012
  1. ARM: Fix optimizeCompare to correctly check safe condition.

    Manman Ren authored
    It is safe if CPSR is killed or re-defined.
    When we are done with the basic block, check whether CPSR is live-out.
    Do not optimize away cmp if CPSR is live-out.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160090 91177308-0d34-0410-b5e6-96231b3b80d8
  2. Patch for Mips direct object generation.

    Jack Carter authored
    When WriteFragmentData() case FT_align called
    Asm.getBackend().writeNopData() is called, nothing
    is done since Mips implementation of writeNopData just
    returned "true".
    
    For some reason this has not caused problems in 32 bit
    mode, but in 64 bit mode it caused an assert when processing
    multiple function units.
    
    The test case included will assert without this patch. It
    runs twice with different flags to prevent false positives
    due to changes in code generation over time.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160084 91177308-0d34-0410-b5e6-96231b3b80d8
  3. Fixup broken doc link. Patch by Sean Silva <silvas@purdue.edu>.

    Chad Rosier authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160082 91177308-0d34-0410-b5e6-96231b3b80d8
  4. This change removes an "initialization" warning.

    Jack Carter authored
    Even though variable in question could not 
    be initialized before use, the code was such that 
    the compiler had no way of knowing that.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160081 91177308-0d34-0410-b5e6-96231b3b80d8
  5. @kaomoneus

    Fixed diff comparison.

    kaomoneus authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160076 91177308-0d34-0410-b5e6-96231b3b80d8
  6. @akyrtzi

    In MemoryBuffer::getOpenFile() don't verify that the mmap'ed

    akyrtzi authored
    file buffer is null-terminated.
    
    If the file is smaller than we thought, mmap will not allow dereferencing
    past the pages that are enough to cover the actual file size,
    even though we asked for a larger address range.
    
    rdar://11612916
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160075 91177308-0d34-0410-b5e6-96231b3b80d8
  7. In register classes in MipsRegisterInfo.td, list the registers in asc…

    Akira Hatanaka authored
    …ending
    
    order of binary encoding.
    
    Patch by Vladimir Medic.
    
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160073 91177308-0d34-0410-b5e6-96231b3b80d8
  8. [x86 fast-isel] Per discussion with Eric, add all cases to switch wit…

    Chad Rosier authored
    …h verbose
    
    comments.
    
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160069 91177308-0d34-0410-b5e6-96231b3b80d8
  9. Test case for r160036.

    Akira Hatanaka authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160067 91177308-0d34-0410-b5e6-96231b3b80d8
  10. X86: Update to peephole optimization to move Movr0 before (Sub, Cmp) …

    Manman Ren authored
    …pair.
    
    When Movr0 is between sub and cmp, we move Movr0 before sub if it enables
    removal of Cmp.
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160066 91177308-0d34-0410-b5e6-96231b3b80d8
  11. Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.

    Akira Hatanaka authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
  12. InstrEmitter::EmitSubregNode() optimize extract_subreg in this case:

    Evan Cheng authored
    r1025 = s/zext r1024, 4
    r1026 = extract_subreg r1025, 4
    
    to a copy:
    r1026 = copy r1024
    
    This is correct. However it uses TII->isCoalescableExtInstr() which can return
    true for instructions which essentially does a sext_in_reg so this can end up
    with an illegal copy where the source and destination register classes do not
    match. Add a check to avoid it. Sorry, no test case possible at this time.
    
    rdar://11849816
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160059 91177308-0d34-0410-b5e6-96231b3b80d8
  13. @d0k

    PR13326: Fix a subtle edge case in the udiv -> magic multiply generator.

    d0k authored
    This caused 6 of 65k possible 8 bit udivs to be wrong.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160058 91177308-0d34-0410-b5e6-96231b3b80d8
  14. @tstellarAMD

    test commit

    tstellarAMD authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160056 91177308-0d34-0410-b5e6-96231b3b80d8
  15. [x86 fast-isel] Rather then call llvm_unreachable() have fast-isel fa…

    Chad Rosier authored
    …ll back
    
    to Selection DAG isel.  Patch by Andrew Kaylor <andrew.kaylor@intel.com>.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160055 91177308-0d34-0410-b5e6-96231b3b80d8
  16. @nadavrot

    When ext-loading and trunc-storing vectors to memory, on x86 32bit sy…

    nadavrot authored
    …stems, allow loads/stores of 64bit values from xmm registers.
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160044 91177308-0d34-0410-b5e6-96231b3b80d8
  17. @nadavrot

    Rename many of the Tmp1, Tmp2, Tmp3 variables to names such as Chain,…

    nadavrot authored
    … Value, Ptr, etc.
    
    No functionality change.
    
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160042 91177308-0d34-0410-b5e6-96231b3b80d8
  18. @d0k

    Remove unused variable.

    d0k authored
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160040 91177308-0d34-0410-b5e6-96231b3b80d8
  19. @nadavrot

    Refactor the DAG Legalizer by extracting the legalization of

    nadavrot authored
    Load and Store nodes into their own functions.
    No functional change.
    
    
    
    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160037 91177308-0d34-0410-b5e6-96231b3b80d8
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