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Constrain VGA DAC timing. This fixes the 'gradient bug' that can occu…

…r depending on PAR results.
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sbourdeauducq committed Nov 30, 2011
1 parent 9e05e46 commit 39fc15389ef45e95982cff91a4ac99527c8de83c
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  1. +1 −0 boards/milkymist-one/synthesis/common.ucf
@@ -338,6 +338,7 @@ TIMESPEC "TSsdramout" = FROM FFS TO "GRPsdramout" 10 ns;
NET "vga/vga_iclk" TNM_NET = "GRPvga";
TIMESPEC "TSvga_async1" = FROM "GRPsys" TO "GRPvga" TIG;
TIMESPEC "TSvga_async2" = FROM "GRPvga" TO "GRPsys" TIG;
+OFFSET = OUT 5 ns AFTER "vga_clk";
TIMESPEC "TSac97_async1" = FROM "GRPsys" TO "GRPac97_clk" TIG;
TIMESPEC "TSac97_async2" = FROM "GRPac97_clk" TO "GRPsys" TIG;

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