Skip to content

HTTPS clone URL

Subversion checkout URL

You can clone with
or
.
Download ZIP
Browse files

switched to a single clock source from gps receiver also removed redu…

…ndant debug signals
  • Loading branch information...
commit 56a2e750220a8a395dadf0c90d1f577fa7b0513f 1 parent 01dccc7
@kristianpaul authored
View
8 boards/milkymist-one/rtl/setup.v
@@ -21,8 +21,8 @@
* but when working on a specific part, it's very useful to be
* able to cut down synthesis times.
*/
-`define ENABLE_MEMORYCARD
-`define ENABLE_ETHERNET
+//`define ENABLE_MEMORYCARD
+//`define ENABLE_ETHERNET
//`define ENABLE_USB
//`define ENABLE_AC97
@@ -42,12 +42,12 @@
/*
* System clock frequency in Hz.
*/
-`define CLOCK_FREQUENCY 80000000
+`define CLOCK_FREQUENCY 81920000
/*
* System clock period in ns (must be in sync with CLOCK_FREQUENCY).
*/
-`define CLOCK_PERIOD 12.5
+`define CLOCK_PERIOD 61
/*
* Default baudrate for the debug UART.
View
39 boards/milkymist-one/rtl/system.v
@@ -20,7 +20,7 @@
module system(
- input clk50,
+ input clk16,
// Boot ROM
output [23:0] flash_adr,
@@ -137,19 +137,11 @@ module system(
// Expansion connector
input [5:0] exp,
-
- // UART1
- //input uart1_rx,
- //output uart1_tx,
-
// L1 GPS Receiver
input gps_rec_clk,
input gps_rec_sign,
input gps_rec_mag,
//output gps_led,
- output gps_debug_purple,
- output gps_debug_blue,
- output gps_debug_green,
// PCB revision
input [3:0] pcb_revision
@@ -168,17 +160,20 @@ wire sys_clk_dcm;
wire sys_clk_n_dcm;
DCM_SP #(
- .CLKDV_DIVIDE(2.0), // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
+ .CLKDV_DIVIDE(1.5), // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
- .CLKFX_DIVIDE(5), // 1 to 32
- .CLKFX_MULTIPLY(8), // 2 to 32
+ .CLKFX_DIVIDE(1), // 1 to 32
+ .CLKFX_MULTIPLY(4), // 2 to 32
.CLKIN_DIVIDE_BY_2("FALSE"),
- .CLKIN_PERIOD(20.0),
+ .CLKIN_PERIOD(61.04),
.CLKOUT_PHASE_SHIFT("NONE"),
.CLK_FEEDBACK("NONE"),
.DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
+ .DFS_FREQUENCY_MODE("LOW"),
+ .DLL_FREQUENCY_MODE("LOW"),
.DUTY_CYCLE_CORRECTION("TRUE"),
+ .FACTORY_JF(16'hF0F0),
.PHASE_SHIFT(0),
.STARTUP_WAIT("TRUE")
) clkgen_sys (
@@ -195,7 +190,7 @@ DCM_SP #(
.CLKFX180(sys_clk_n_dcm),
.LOCKED(),
.CLKFB(),
- .CLKIN(clk50),
+ .CLKIN(clk16),
.RST(1'b0),
.PSEN(1'b0)
);
@@ -381,7 +376,7 @@ wire norflash_ack,
// CSR bridge 0x60000000 (shadow @0xe0000000)
// MSB (Bit 31) is ignored for slave address decoding
-conbus5x7 #(
+conbus5x6 #(
.s0_addr(3'b000), // norflash
.s1_addr(3'b001), // debug
.s2_addr(3'b010), // L1 GPS Correlator
@@ -502,7 +497,7 @@ conbus5x7 #(
.s4_cyc_o(brg_cyc),
.s4_stb_o(brg_stb),
.s4_ack_i(brg_ack),
- // Slave 6
+ // Slave 5
.s5_dat_i(csrbrg_dat_r),
.s5_dat_o(csrbrg_dat_w),
.s5_adr_o(csrbrg_adr),
@@ -1315,6 +1310,7 @@ assign phy_tx_en = 1'b0;
assign phy_tx_er = 1'b0;
assign phy_mii_clk = 1'b0;
assign phy_mii_data = 1'bz;
+assign phy_rst_n = 1'b0;
`endif
always @(posedge clk50) phy_clk <= ~phy_clk;
@@ -1520,7 +1516,7 @@ DCM_SP #(
.CLKFX180(),
.LOCKED(),
.CLKFB(),
- .CLKIN(clk50),
+ .CLKIN(clk16),
.RST(1'b0),
.PSEN(1'b0)
@@ -1611,14 +1607,11 @@ namuru baseband (
.wb_ack_o(namuru_ack),
.wb_we_i(namuru_we),
- .gps_rec_clk(gps_rec_clk),
+//// .gps_rec_clk(gps_rec_clk),
.gps_rec_sign(gps_rec_sign),
.gps_rec_mag(gps_rec_mag),
- //.gps_led(led2),
- .namuru_stb(gps_debug_purple),
- .namuru_ack(gps_debug_blue),
- .namuru_cyc(gps_debug_green)
- );
+ .gps_led(led2)
+);
endmodule
View
34 boards/milkymist-one/synthesis/common.ucf
@@ -1,8 +1,9 @@
# ==== Clock input ====
-NET "clk50" LOC = AB11 | IOSTANDARD = LVCMOS33;
+NET "clk16" LOC = A10 | IOSTANDARD = LVCMOS33;
+NET "clk16" CLOCK_DEDICATED_ROUTE = FALSE;
-NET "clk50" TNM_NET = "GRPclk50";
-TIMESPEC "TSclk50" = PERIOD "GRPclk50" 20 ns HIGH 50%;
+NET "clk16" TNM_NET = "GRPclk16";
+TIMESPEC "TSclk16" = PERIOD "GRPclk16" 61.04 ns HIGH 50%;
# ==== Flash ====
NET "flash_adr(0)" LOC = L22;
@@ -66,7 +67,7 @@ NET "btn3" LOC = AB5 | IOSTANDARD = LVCMOS33;
# ==== LEDs ====
NET "led1" LOC = B16 | IOSTANDARD = LVCMOS33 | SLEW = QUIETIO | DRIVE = 24;
-#NET "led2" LOC = A16 | IOSTANDARD = LVCMOS33 | SLEW = QUIETIO | DRIVE = 24;
+NET "led2" LOC = A16 | IOSTANDARD = LVCMOS33 | SLEW = QUIETIO | DRIVE = 24;
# ==== DDR SDRAM ====
NET "sdram_adr(0)" LOC = B1;
@@ -186,13 +187,13 @@ NET "vga_sda" LOC = A15 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
NET "vga_sdc" LOC = D15 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
# ==== Memory card ====
-NET "mc_d(0)" LOC = A18;
-NET "mc_d(1)" LOC = E16;
-NET "mc_d(2)" LOC = C17;
-NET "mc_d(3)" LOC = A17;
-NET "mc_cmd" LOC = B18 | IOSTANDARD = LVCMOS33 | PULLUP;
-NET "mc_clk" LOC = A10 | IOSTANDARD = LVCMOS33;
-NET "mc_d(*)" IOSTANDARD = LVCMOS33 | PULLUP;
+#NET "mc_d(0)" LOC = A18;
+#NET "mc_d(1)" LOC = E16;
+#NET "mc_d(2)" LOC = C17;
+#NET "mc_d(3)" LOC = A17;
+#NET "mc_cmd" LOC = B18 | IOSTANDARD = LVCMOS33 | PULLUP;
+#NET "mc_clk" LOC = A10 | IOSTANDARD = LVCMOS33;
+#NET "mc_d(*)" IOSTANDARD = LVCMOS33 | PULLUP;
# ==== AC97 ====
NET "ac97_clk" LOC = C11 | IOSTANDARD = LVCMOS33;
@@ -312,18 +313,15 @@ NET "exp(*)" PULLDOWN;
NET "gps_rec_sign" LOC = A20 | IOSTANDARD = LVCMOS33; #sign - sync
NET "gps_rec_mag" LOC = A21 | IOSTANDARD = LVCMOS33; #mag - data
NET "gps_rec_clk" LOC = B21 | IOSTANDARD = LVCMOS33;
-NET "gps_debug_purple" LOC = B22 | IOSTANDARD = LVCMOS33;
-NET "gps_debug_blue" LOC = G16 | IOSTANDARD = LVCMOS33;
-NET "gps_debug_green" LOC = G17 | IOSTANDARD = LVCMOS33;
+#NET "gps_debug_purple" LOC = B22 | IOSTANDARD = LVCMOS33;
+#NET "gps_debug_blue" LOC = G16 | IOSTANDARD = LVCMOS33;
+#NET "gps_debug_green" LOC = G17 | IOSTANDARD = LVCMOS33;
# Timing
NET "gps_rec_clk" TNM_NET = "GRPgps_rec_clk";
TIMESPEC "TSgps_rec_clk" = PERIOD "GRPgps_rec_clk" 60 ns HIGH 50%;
NET "gps_rec_clk" CLOCK_DEDICATED_ROUTE = FALSE;
-# ==== UART1 ====
-# NET "uart1_rx" LOC = G17 | IOSTANDARD = LVCMOS33 | PULLUP; #IO_L13P_1
-# NET "uart1_tx" LOC = G16 | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
# ==== PCB revision ====
@@ -361,6 +359,6 @@ NET "usb_clk" TNM_NET = "GRPusb";
TIMESPEC "TSusb_async1" = FROM "GRPsys" TO "GRPusb" TIG;
TIMESPEC "TSusb_async2" = FROM "GRPusb" TO "GRPsys" TIG;
-NET "clk50_IBUFG" TNM_NET = "GRPinput";
+NET "clk16_IBUFG" TNM_NET = "GRPinput";
TIMESPEC "TSusb_async3" = FROM "GRPinput" TO "GRPusb" TIG;
TIMESPEC "TSusb_async4" = FROM "GRPusb" TO "GRPinput" TIG;
View
29 cores/namuru/rtl/namuru.v
@@ -30,22 +30,26 @@ module namuru (
input wb_we_i,
/* From GPS Receiver */
- input gps_rec_clk,
+ //input gps_rec_clk,
input gps_rec_sign,
input gps_rec_mag,
/* correlator specific */
output accum_interrupt,
+ /* visual indicator */
+ output gps_led,
+
/* Debug */
- output namuru_stb,
- output namuru_cyc,
- output namuru_ack
+ output debug_s,
+ output debug_p,
+ output debug_c
+
);
gps_channel_correlator gps_correlator (
- .correlator_clk(gps_rec_clk),
+ .correlator_clk(sys_clk),
.correlator_rst(sys_rst),
.sign(gps_rec_sign),
.mag(gps_rec_mag),
@@ -56,17 +60,8 @@ gps_channel_correlator gps_correlator (
.wb_sel_i(),
.wb_stb_i(wb_stb_i),
.wb_cyc_i(wb_cyc_i),
- .wb_ack_o(wb_ack_o_sync),
- .wb_we_i(wb_we_i)
+ .wb_ack_o(wb_ack_o),
+ .wb_we_i(wb_we_i),
+ .gps_led(gps_led)
);
-
-/*CDC Sync from Slave to Master */
-/* ack */
-namuru_psync wb_ack_out(
- .clk1(gps_rec_clk),
- .i(wb_ack_o_sync),
- .clk2(sys_clk),
- .o(wb_ack_o)
-);
-
endmodule
View
12 cores/namuru/rtl/namuru_baseband.v
@@ -34,10 +34,7 @@ module gps_channel_correlator(
input wb_we_i,
output reg wb_ack_o,
/* debug */
- output reg gps_led,
- output debug_s,
- output debug_p,
- output debug_c
+ output reg gps_led
);
wire accum_enable_s;
@@ -49,10 +46,6 @@ wire [23:0] accum_count;
reg sw_rst; // reset to tracking module
wire rstn; // software generated reset
-//assign debug_s = tic_enable;
-assign debug_p = status[0];
-assign debug_s = status_read;
-assign debug_c = carrier_phase;
// channel 0 registers
reg [9:0] ch0_prn_key;
@@ -123,8 +116,7 @@ tracking_channel tc0 (
.code_val(ch0_code_val),
.epoch_load(ch0_epoch_load),
.epoch(ch0_epoch),
- .epoch_check(ch0_epoch_check),
- .carrier_phase(carrier_phase)
+ .epoch_check(ch0_epoch_check)
);
// process to create a two clk wide dump_mask pulse
View
45 cores/namuru/rtl/namuru_ssync.v
@@ -1,45 +0,0 @@
-/*
- * Milkymist SoC GPS-SDR
- * Copyleft 2011 Cristian Paul Peñaranda Rojas
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 3 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-module namuru_ssync(
- input i,
- input clks,
- output o
-);
-
-reg level1;
-reg level2;
-reg level3;
-reg level4;
-always @(posedge clks) begin
- level1 <= i;
- level2 <= level1;
- level3 <= level2;
- level4 <= level3;
-end
-
-//assign o = level3 & level4;
-assign o = level4;
-
-initial begin
- level1 <= 1'b0;
- level2 <= 1'b0;
- level3 <= 1'b0;
- level4 <= 1'b0;
-end
-
-endmodule
Please sign in to comment.
Something went wrong with that request. Please try again.