Working on Avnet board

kristianpaul · Aug 23, 2009 · 64f3306 · 64f3306
1 parent fc9abdf
commit 64f3306
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Showing 7 changed files with 39 additions and 34 deletions.
diff --git a/milkymist-core/boards/avnet-sp3aevl/rtl/system.v b/milkymist-core/boards/avnet-sp3aevl/rtl/system.v
@@ -46,12 +46,11 @@ module system(
 wire sys_clk;
 
 `ifndef SIMULATION
-wire dcm_o;
 DCM_SP #(
-	.CLKDV_DIVIDE(1.5),		// 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
+	.CLKDV_DIVIDE(1.5), // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
 
-	.CLKFX_DIVIDE(1),		// 1 to 32
-	.CLKFX_MULTIPLY(4),		// 2 to 32
+	.CLKFX_DIVIDE(1), // 1 to 32
+	.CLKFX_MULTIPLY(4), // 2 to 32
 
 	.CLKIN_DIVIDE_BY_2("FALSE"),
 	.CLKIN_PERIOD(62.5),
@@ -74,17 +73,13 @@ DCM_SP #(
 	.CLK2X180(),
 
 	.CLKDV(),
-	.CLKFX(dcm_o),
+	.CLKFX(sys_clk),
 	.CLKFX180(),
 	.LOCKED(),
 	.CLKFB(),
 	.CLKIN(clkin),
 	.RST(1'b0)
 );
-BUFG clkbuf(
-	.I(dcm_o),
-	.O(sys_clk)
-);
 `else
 assign sys_clk = clkin;
 `endif
@@ -96,19 +91,19 @@ reg rst1;
 always @(posedge sys_clk) rst0 <= resetin;
 always @(posedge sys_clk) rst1 <= rst0;
 
-/* Debounce it (counter holds reset for 10.49ms),
+/* Debounce it
  * and generate power-on reset.
  */
 reg [19:0] rst_debounce;
 reg sys_rst;
 initial rst_debounce <= 20'hFFFFF;
 initial sys_rst <= 1'b1;
 always @(posedge sys_clk) begin
-	if(~rst1) /* reset is active low */
+	if(rst1)
 		rst_debounce <= 20'hFFFFF;
-	else if(rst_debounce != 16'd0)
-		rst_debounce <= rst_debounce - 16'd1;
-	sys_rst <= rst_debounce != 16'd0;
+	else if(rst_debounce != 20'd0)
+		rst_debounce <= rst_debounce - 20'd1;
+	sys_rst <= rst_debounce != 20'd0;
 end
 
 /*
@@ -118,26 +113,22 @@ end
  * as soon as the system reset is released.
  * From datasheet, minimum reset pulse width is 100ns
  * and reset-to-read time is 150ns.
- * On the ML401, the reset is combined with the AC97
- * reset, which must be held for 1us.
- * Here we use a 7-bit counter that holds reset
- * for 1.28us and makes everybody happy.
  */
 
 reg [7:0] flash_rstcounter;
 initial flash_rstcounter <= 8'd0;
 always @(posedge sys_clk) begin
-	if(~rst1 & ~sys_rst) /* ~sys_rst is for debouncing */
+	if(~sys_rst)
 		flash_rstcounter <= 8'd0;
 	else if(~flash_rstcounter[7])
 		flash_rstcounter <= flash_rstcounter + 8'd1;
 end
 
-assign flash_reset_n = flash_rstcounter[7];
+assign flash_reset_n = ~flash_rstcounter[7];
 
 `else
 wire sys_rst;
-assign sys_rst = ~resetin;
+assign sys_rst = resetin;
 `endif
 
 //------------------------------------------------------------------
@@ -400,6 +391,17 @@ lm32_top cpu(
 	.D_RTY_I(1'b0)
 );
 
+`ifdef HEAVY_DEBUG
+always @(posedge sys_clk) begin
+	if(cpudbus_cyc & cpudbus_stb) begin
+		$display("DBUS: adr:%x we:%b", cpudbus_adr, cpudbus_we);
+	end
+	if(cpuibus_cyc & cpuibus_stb & cpuibus_ack) begin
+		$display("IBUS: adr:%x dat:%x", cpuibus_adr, cpuibus_dat_r);
+	end
+end
+`endif
+
 //---------------------------------------------------------------------------
 // Boot ROM
 //---------------------------------------------------------------------------
@@ -419,7 +421,7 @@ norflash8 #(
 	.flash_d(flash_d)
 );
 
-assign flash_byte_n = 1'b1;
+assign flash_byte_n = 1'b0;
 assign flash_oe_n = 1'b0;
 assign flash_we_n = 1'b1;
 assign flash_ce_n = 1'b0;
@@ -489,7 +491,7 @@ always @(posedge sys_clk) begin
 	if(~uart_txd)
 		txcounter <= {19{1'b1}};
 	else if(txcounter != 19'd0)
-		txcounter <= txcounter - 20'd1;
+		txcounter <= txcounter - 19'd1;
 	txled <= txcounter != 19'd0;
 end
 

diff --git a/milkymist-core/boards/avnet-sp3aevl/test/Makefile b/milkymist-core/boards/avnet-sp3aevl/test/Makefile
@@ -23,6 +23,6 @@ bios.rom: ../../../software/bios/bios.bin
 	../../../tools/bin2hex ../../../software/bios/bios.bin bios.rom 32768
 
 clean:
-	rm -f verilog.log system
+	rm -f verilog.log bios.rom system
 
 .PHONY: clean cversim isim
diff --git a/milkymist-core/boards/avnet-sp3aevl/test/system_tb.v b/milkymist-core/boards/avnet-sp3aevl/test/system_tb.v
@@ -27,18 +27,18 @@ initial sys_clk = 1'b0;
 always #5 sys_clk = ~sys_clk;
 
 initial begin
-	resetin = 1'b0;
-	#200 resetin = 1'b1;
+	resetin = 1'b1;
+	#200 resetin = 1'b0;
 end
 
 wire [21:0] flash_adr;
 reg [31:0] flash_d;
+reg [7:0] flash_d8;
 reg [31:0] flash[0:32767];
 initial $readmemh("bios.rom", flash);
-always @(flash_adr) #110 flash_d = flash[flash_adr/4];
-
-reg [7:0] flash_d8;
-always @(flash_d) begin
+always @(flash_adr) begin
+	#110;
+	flash_d = flash[flash_adr[21:2]];
 	case(flash_adr[1:0])
 		2'b00: flash_d8 = flash_d[31:24];
 		2'b01: flash_d8 = flash_d[23:16];

diff --git a/milkymist-core/cores/aceusb/test/Makefile b/milkymist-core/cores/aceusb/test/Makefile
@@ -2,7 +2,7 @@ SOURCES=tb_aceusb.v $(wildcard ../rtl/*.v)
 
 all: tb_aceusb
 
-sim: tb_aceusb
+isim: tb_aceusb
 	./tb_aceusb
 
 cversim: $(SOURCES)

diff --git a/milkymist-core/cores/norflash8/rtl/norflash8.v b/milkymist-core/cores/norflash8/rtl/norflash8.v
@@ -18,7 +18,7 @@
 
 module norflash8 #(
 	parameter adr_width = 22,
-	parameter timing = 4'd13
+	parameter timing = 4'd12
 ) (
 	input sys_clk,
 	input sys_rst,
@@ -36,7 +36,7 @@ module norflash8 #(
 reg [adr_width-1-2:0] flash_adr_msb;
 reg [1:0] flash_adr_lsb;
 
-assign flash_adr = {flash_adr_msb, flash_adr_lsb};
+assign flash_adr = {flash_adr_msb, flash_adr_lsb[1], ~flash_adr_lsb[0]};
 
 reg load;
 reg reset_flash_adr_lsb;

diff --git a/milkymist-core/cores/norflash8/test/Makefile b/milkymist-core/cores/norflash8/test/Makefile
@@ -2,7 +2,7 @@ SOURCES=tb_norflash8.v $(wildcard ../rtl/*.v)
 
 all: tb_norflash8
 
-sim: tb_norflash8
+isim: tb_norflash8
 	./tb_norflash8
 
 cversim: $(SOURCES)

diff --git a/milkymist-core/cores/uart/rtl/uart_transceiver.v b/milkymist-core/cores/uart/rtl/uart_transceiver.v
@@ -137,6 +137,9 @@ always @(posedge sys_clk) begin
 			tx_count16  <= 4'd1;
 			tx_busy     <= 1'd1;
 			uart_txd    <= 1'd0;
+`ifdef SIMULATION
+			$display("UART: %c", tx_data);
+`endif
 		end else if(enable16 && tx_busy) begin
 			tx_count16  <= tx_count16 + 4'd1;