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generic wishbone CC bridge template,migration from avalon WIP

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1 parent ed81fa4 commit 9a949a3d1d02997ce260f925ecc00f5c014243bd @kristianpaul committed Jul 17, 2011
Showing with 228 additions and 204 deletions.
  1. +109 −140 cores/namuru/rtl/namuru.v
  2. +119 −0 cores/namuru/rtl/namuru_baseband.v
  3. +0 −64 cores/namuru/rtl/namuru_rx.v
View
249 cores/namuru/rtl/namuru.v
@@ -16,18 +16,10 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-module namuru #(
- parameter csr_addr = 5'h0
-) (
+module namuru (
input sys_clk,
input sys_rst,
- /* CSR */
- input [14:0] csr_a,
- input csr_we,
- input [31:0] csr_di,
- output [31:0] csr_do,
-
/* WISHBONE to access RAM */
input [31:0] wb_adr_i,
output [31:0] wb_dat_o,
@@ -41,147 +33,124 @@ module namuru #(
/* From GPS Receiver */
input gps_rec_clk,
input gps_rec_sign,
- input gps_rec_mag,
+ input gps_rec_mag
- output accum_int
+ //output accum_int
/* Debug */
//output gps_led
//output namuru_nco
);
-/* Interconnect wires */
-/* control and status */
-wire rstn;
-wire [23:0] tic_count;
-wire [23:0] accum_count;
-wire [23:0] prog_tic;
-wire [23:0] prog_accum_int;
-
-/* time base */
-wire pre_tic_enable;
-wire tic_enable;
-wire accum_enable_s;
-wire accum_sample_enable;
-
-/* channel 0 */
-wire [9:0] ch0_prn_key;
-wire [28:0] ch0_carr_nco;
-wire [27:0] ch0_code_nco;
-wire [10:0] ch0_code_slew;
-wire [10:0] ch0_epoch_load;
-wire ch0_prn_key_enable;
-wire ch0_slew_enable;
-wire ch0_epoch_enable;
-wire ch0_dump;
-wire [15:0] ch0_i_early, ch0_q_early, ch0_i_prompt, ch0_q_prompt, ch0_i_late, ch0_q_late;
-wire [31:0] ch0_carrier_val;
-wire [20:0] ch0_code_val;
-wire [10:0] ch0_epoch, ch0_epoch_check;
-
-
-/* Registers and Bus Interface */
-namuru_ctlif #(
- .csr_addr(csr_addr)
-) ctlif (
- .sys_clk(sys_clk),
- .sys_rst(sys_rst),
-
- .csr_a(csr_a),
- .csr_we(csr_we),
- .csr_di(csr_di),
- .csr_do(csr_do),
-
- /* int */
- .accum_int(accum_int),
-
- /* status */
- /* wires from time base registers */
-
- .rstn(rstn),
- .tic_divide(prog_tic),
- .accum_divide(prog_accum_int),
- .pre_tic_enable(pre_tic_enable),
- .tic_enable(tic_enable),
- .accum_enable(accum_enable_s),
- .accum_sample_enable(accum_sample_enable),
- .tic_count(tic_count),
- .accum_count(accum_count),
-
- /* fow now ctlif but channels should be mapped to wishbone TODO*/
-
- /* regs and wires from channel 0 */
- .ch0_prn_key(ch0_prn_key),
- .ch0_carr_nco(ch0_carr_nco),
- .ch0_code_nco(ch0_code_nco),
- .ch0_code_slew(ch0_code_slew),
- .ch0_epoch_load(ch0_epoch_load),
- .ch0_prn_key_enable(ch0_prn_key_enable),
- .ch0_slew_enable(ch0_slew_enable),
- .ch0_epoch_enable(ch0_epoch_enable),
- .ch0_dump(ch0_dump),
- .ch0_i_early(ch0_i_early),
- .ch0_q_early(ch0_q_earlY),
- .ch0_i_prompt(ch0_i_prompt),
- .ch0_q_prompt(ch0_q_prompt),
- .ch0_i_late(ch0_i_lat),
- .ch0_q_late(ch0_q_late),
- .ch0_carrier_val(ch0_carrier_val),
- .ch0_code_val(ch0_code_val),
- .ch0_epoch(ch0_epoch),
- .ch0_epoch_check(ch0_epoch_chec)
+/*CDC Sync from Master to Slave */
+/* reset */
+namuru_psync system_rst(
+ .clk1(sys_clk),
+ .i(sys_rst),
+ .clk2(gps_rec_clk),
+ .o(sys_rst_sync)
);
-/* Baseband */
-// this will be usefull to
-//gps_baseband baseband(
-// .gps_rec_clk(gps_rec_clk),
-// .gps_rec_sign(gps_rec_sign),
-// .gps_rec_mag(gps_rec_mag),
-//);
-
-//time base
-time_base tb (
- .clk(gps_rec_clk),
- .rstn(rstn),
- .tic_divide(prog_tic),
- .accum_divide(prog_accum_int),
-// .sample_clk(s_clk), // not used here
- .pre_tic_enable(pre_tic_enable),
- .tic_enable(tic_enable),
- .accum_enable(accum_enable_s),
- .accum_sample_enable(accum_sample_enable),
- .tic_count(tic_count),
- .accum_count(accum_count)
+/* stb */
+reg stb_i0;
+reg stb_i1;
+reg stb_i2;
+reg stb_i3;
+
+always @(posedge gps_rec_clk) begin
+ stb_i0 <= wb_stb_i;
+ stb_i1 <= stb_i0;
+// stb_i2 <= stb_i1;
+// stb_i3 <= stb_i2;
+end
+
+assign wb_stb_i_sync = stb_i1;
+/*
+namuru_psync system_stb(
+ .clk1(sys_clk),
+ .i(wb_stb_i),
+ .clk2(gps_rec_clk),
+ .o(wb_stb_i_sync)
+);
+*/
+/* cyc */
+reg cyc_i0;
+reg cyc_i1;
+reg cyc_i2;
+reg cyc_i3;
+
+always @(posedge gps_rec_clk) begin
+ cyc_i0 <= wb_cyc_i;
+ cyc_i1 <= cyc_i0;
+// cyc_i2 <= cyc_i1;
+ cyc_i3 <= cyc_i2;
+end
+
+assign wb_cyc_i_sync = cyc_i3;
+/*
+namuru_psync system_cyc(
+ .clk1(sys_clk),
+ .i(wb_cyc_i),
+ .clk2(gps_rec_clk),
+ .o(wb_cyc_i_sync)
+);
+*/
+/* we */
+reg we_i0;
+reg we_i1;
+reg we_i2;
+reg we_i3;
+
+always @(posedge gps_rec_clk) begin
+ we_i0 <= wb_we_i;
+ we_i1 <= we_i0;
+ we_i2 <= we_i1;
+ we_i3 <= we_i2;
+end
+
+assign wb_we_i_sync = we_i3;
+/*
+namuru_psync system_we(
+ .clk1(sys_clk),
+ .i(wb_we_i),
+ .clk2(gps_rec_clk),
+ .o(wb_we_i_sync)
+);
+*/
+
+wb_generic wb_generic (
+ .sys_clk(sys_clk),
+ .sys_rst(sys_rst_sync),
+ .wb_adr_i(wb_adr_i),
+ .wb_dat_o(wb_dat_o),
+ .wb_dat_i(wb_dat_i),
+ .wb_sel_i(),
+ .wb_stb_i(wb_stb_i_sync),
+ .wb_cyc_i(wb_cyc_i_sync),
+ .wb_ack_o(wb_ack_o_sync),
+ .wb_we_i(wb_we_i_sync)
);
-/* tracking channel 0 */
-tracking_channel tc0 (
- .clk(gps_rec_clk),
- .rstn(rstn),
- .accum_sample_enable(accum_sample_enable),
- .if_sign(sign),
- .if_mag(mag),
- .pre_tic_enable(pre_tic_enable),
- .tic_enable(tic_enable),
- .carr_nco_fc(ch0_carr_nco),
- .code_nco_fc(ch0_code_nco),
- .prn_key(ch0_prn_key),
- .prn_key_enable(ch0_prn_key_enable),
- .code_slew(ch0_code_slew),
- .slew_enable(ch0_slew_enable),
- .epoch_enable(ch0_epoch_enable),
- .dump(ch0_dump),
- .i_early(ch0_i_early),
- .q_early(ch0_q_early),
- .i_prompt(ch0_i_prompt),
- .q_prompt(ch0_q_prompt),
- .i_late(ch0_i_late),
- .q_late(ch0_q_late),
- .carrier_val(ch0_carrier_val),
- .code_val(ch0_code_val),
- .epoch_load(ch0_epoch_load),
- .epoch(ch0_epoch),
- .epoch_check(ch0_epoch_check)
+namuru_psync system_ack(
+ .clk1(gps_rec_clk),
+ .i(wb_ack_o_sync),
+ .clk2(sys_clk),
+ .o(wb_ack_o)
);
+/*
+/*CDC Sync from Slave to Master */
+/* ack */
+/*
+reg ack_i0;
+reg ack_i1;
+reg ack_i2;
+
+always @(posedge sys_clk) begin
+ ack_i0 <= wb_ack_o_sync;
+ ack_i1 <= ack_i0;
+ ack_i2 <= ack_i1;
+end
+assign wb_ack_o = ack_i2;
+*/
+
endmodule
View
119 cores/namuru/rtl/namuru_baseband.v
@@ -0,0 +1,119 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ * Copyleft 2011, Cristian Paul
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+module wb_generic(
+ input sys_clk,
+ input sys_rst,
+
+ /* WB */
+ input [31:0] wb_adr_i,
+ input [31:0] wb_dat_i,
+ output [31:0] wb_dat_o,
+ input [3:0] wb_sel_i,
+ input wb_cyc_i,
+ input wb_stb_i,
+ input wb_we_i,
+ output reg wb_ack_o
+);
+// at least you want to align this in software
+wire [31:0] wb_dat_i_le = {wb_dat_i[7:0], wb_dat_i[15:8], wb_dat_i[23:16], wb_dat_i[31:24]};
+
+reg next_csr_we;
+reg [31:0] dato0;
+reg [31:0] dato1;
+reg [31:0] dato2;
+reg [31:0] dato3;
+
+reg [31:0] wb_dat_o_le;
+always @(posedge sys_clk) begin
+ if(sys_rst) begin
+ wb_dat_o_le <= 32'd0;
+ dato0 <= 32'h11111111;
+ dato1 <= 32'h22222222;
+ dato2 <= 32'h33333333;
+ dato3 <= 32'h44444444;
+ end else begin
+ wb_dat_o_le <= 32'd0;
+ if(next_csr_we) begin
+ /* write */
+ case(wb_adr_i[9:2])
+ /* channel 0 */
+ 3'd0: dato0 <= wb_dat_i_le;
+ 3'd1: dato1 <= wb_dat_i_le;
+ 3'd2: dato2 <= wb_dat_i_le;
+ 3'd3: dato3 <= wb_dat_i_le;
+ /* status */
+
+ /* control */
+ endcase
+ end
+ /* read */
+ case(wb_adr_i[9:2])
+ 3'd0: wb_dat_o_le <= dato0;
+ 3'd1: wb_dat_o_le <= dato1;
+ 3'd2: wb_dat_o_le <= dato2;
+ 3'd3: wb_dat_o_le <= dato3;
+ // default wb_dat_o_le <= 32'hfecafeca;
+ endcase
+ end
+ end
+// at least you want to align this in software
+assign wb_dat_o = {wb_dat_o_le[7:0], wb_dat_o_le[15:8], wb_dat_o_le[23:16], wb_dat_o_le[31:24]};
+
+reg [1:0] state;
+reg [1:0] next_state;
+
+parameter IDLE = 2'd0;
+parameter DELAYACK1 = 2'd1;
+parameter DELAYACK2 = 2'd2;
+parameter ACK = 2'd3;
+
+always @(posedge sys_clk) begin
+ if(sys_rst)
+ state <= IDLE;
+ else
+ state <= next_state;
+end
+
+always @(*) begin
+ next_state = state;
+
+ wb_ack_o = 1'b0;
+ next_csr_we = 1'b0;
+
+ case(state)
+ IDLE: begin
+ if(wb_cyc_i & wb_stb_i) begin
+ /* We have a request for us */
+ next_csr_we = wb_we_i;
+ if(wb_we_i)
+ next_state = ACK;
+ else
+ next_state = DELAYACK1;
+ end
+ end
+ DELAYACK1: next_state = DELAYACK2;
+ DELAYACK2: next_state = ACK;
+ ACK: begin
+ wb_ack_o = 1'b1;
+ next_state = IDLE;
+ end
+ endcase
+end
+
+endmodule
View
64 cores/namuru/rtl/namuru_rx.v
@@ -1,64 +0,0 @@
-/*
- * Milkymist SoC
- * Copyright (C) 2007, 2008, 2009, 2010, 2011 Sebastien Bourdeauducq
- * Copyleft 2011 Cristian Paul Pen~aranda Rojas
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, version 3 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-module gpsreceiver2_rx(
-
- /* from gps front end */
- input gps_rec_clk,
- input gps_rec_sync,
- input gps_rec_data,
-
- output rxb0_clk,
- output [7:0] rxb0_dat,
-
- output gps_led
-
-);
-/* Serial to Parallel */
-reg [7:0] iq_rx_data;
-always @(posedge gps_rec_clk) begin
- iq_rx_data <= {gps_rec_data,iq_rx_data[7:1]};
-end
-
-assign rxb0_dat = iq_rx_data;
-
-/* clock pulse for byte sync */
-reg sync_counter = 1'b0;
-always @(posedge gps_rec_sync) begin
- sync_counter <= sync_counter + 1;
-end
-
-reg sync_clk;
-always @(gps_rec_clk) begin
- if(~sync_counter & gps_rec_sync)
- sync_clk = 1'b1;
- else
- sync_clk = 1'b0;
-end
-
-assign rxb0_clk = sync_clk;
-
-
-/* Silly Debug */
-reg [22:0] counter = 23'b0;
-always @(posedge rxb0_clk) begin
- counter <= counter + 1;
-end
-assign gps_led = counter[21];
-
-endmodule

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