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  • 2 commits
  • 5 files changed
  • 0 commit comments
  • 1 contributor
Commits on Aug 07, 2011
@kristianpaul Separate Accumlator status from init 4ead312
Commits on Aug 15, 2011
@kristianpaul Enable control for channels is now a separate register, same case of …
…clear flag for both status and new_data registers
5ac6a7d
View
24 cores/namuru/rtl/namuru_baseband.v
@@ -33,6 +33,8 @@ module gps_channel_correlator(
input wb_stb_i,
input wb_we_i,
output reg wb_ack_o,
+ /* debug */
+ output reg gps_led,
output debug_s,
output debug_p,
output debug_c
@@ -47,8 +49,9 @@ wire [23:0] accum_count;
reg sw_rst; // reset to tracking module
wire rstn; // software generated reset
-assign debug_s = tic_enable;
-assign debug_p = pre_tic_enable;
+//assign debug_s = tic_enable;
+assign debug_p = status[0];
+assign debug_s = status_read;
assign debug_c = carrier_phase;
// channel 0 registers
@@ -182,30 +185,37 @@ always @(posedge correlator_clk) begin
sw_rst <= 1'b0;
status_read <= 1'b0;
new_data_read <= 1'b0;
+
+ gps_led <= 1'b0;
end else begin
wb_dat_o <= 32'd0;
+
+ status_read <= 1'b0;
+ new_data_read <= 1'b0;
if(next_csr_we) begin
/* write */
case(wb_adr_i[9:2])
/* channel 0 */
8'h00: begin
- ch0_prn_key_enable <= 1'b1;
ch0_prn_key <= wb_dat_i[9:0];
end
8'h01: ch0_carr_nco <= wb_dat_i[28:0];
8'h02: ch0_code_nco <= wb_dat_i[27:0];
8'h03: begin
- ch0_slew_enable <= 1'b1;
ch0_code_slew <= wb_dat_i[10:0];
end
+
8'h0E : begin
- ch0_epoch_enable <= 1'b1;
ch0_epoch_load <= wb_dat_i[10:0];
end
+ //enable flags for channel tracking logic
+ 8'h0F: {ch0_epoch_enable,ch0_slew_enable,ch0_prn_key_enable,ch0_prn_key_enable} <= wb_dat_i[3:0];
/* status */
- /* nothing to write */
+ 8'hE4: begin // clear status flag
+ {new_data_read,status_read} <= wb_dat_i[1:0];
+ end
/* control */
8'hF0: sw_rst <= wb_dat_i[0:0]; // software reset
@@ -232,12 +242,10 @@ always @(posedge correlator_clk) begin
/* status */
8'hE0: begin // get status and pulse status_flag to clear status
wb_dat_o <= {30'h0, status}; // only 2 status bits, therefore need to pad 30ms bits
- status_read <= 1'b1; // pulse status flag to clear status register
end
8'hE1: begin // get new_data
wb_dat_o <= {30'h0,new_data}; //one new_data bit per channel, need to pad other bits
// pulse the new data flag to clear new_data register
- new_data_read <= 1'b1;
// make sure the flag is not cleared if a dump is aligned to new_data_read
dump_mask[0] <= ch0_dump;
/* more channels to come */
View
3  software/bios/isr.c
@@ -38,4 +38,7 @@ void isr()
if(irqs & IRQ_USB)
usb_isr();
+
+ if(irqs & IRQ_CORRELATOR)
+ correlator_isr();
}
View
22 software/bios/main.c
@@ -155,20 +155,32 @@ static void namuruinit()
printf("Initializing Correlator: \n");
/* prn */
MM_WRITE(CH0_PRN_KEY,0x096);
+ printf("CH0 PRN Key \n");
/* carrier nco */
MM_WRITE(CH0_CARRIER_NCO,0x9f0000);
+ printf("Carrier NCO\n");
/* code nco */
MM_WRITE(CH0_CODE_NCO,0x3ff00);
+ printf("CH0 Code NCO\n");
/* code slew */
MM_WRITE(CH0_CODE_SLEW,0x400); // this will be based upon a variable
+ printf("CH0 Code SLEW\n");
+ /* epoch load */
+ MM_WRITE(CH0_EPOCH_LOAD,0xff);
+ printf("CH0 Epoch Load\n");
/* prog tic*/
MM_WRITE(PROG_TIC,0x18ffff);
+ printf("Prog TIC\n");
/* prog accum int*/
MM_WRITE(PROG_ACCUM_INT,0x1fff);
- /* epoch load */
- MM_WRITE(CH0_EPOCH_LOAD,0xff);
+ printf("Accum TIC\n");
+ printf("Done\n");
+}
+static void namuruaccum()
+{
printf("Accumulators: \n");
printf("I_E\tQ_E\tI_P\tQ_P\tI_L\tQ_L\n");
+ /* missing polling accum int pin */
while(1)
{
printf("%02x\t%02x\t%02x\t%02x\t%02x\t%02x\n",(MM_READ(CH0_I_EARLY)),(MM_READ(CH0_Q_EARLY)),(MM_READ(CH0_I_PROMPT)),(MM_READ(CH0_Q_PROMPT)),(MM_READ(CH0_I_LATE)),(MM_READ(CH0_Q_LATE)));
@@ -178,7 +190,7 @@ static void namuruinit()
if(c == 'q')
break;
}
- }
+ accum}
printf("\n");
}
@@ -187,7 +199,7 @@ static void namurustatus()
char *c;
printf("\n");
printf("Status: \n");
- printf("TI_COUNT\tACCUM_COUNT\tCARRIER_MEASURE\tCODE_MEASURE\tSTATUS\n");
+ printf("TIC_COUNT\tACCUM_COUNT\tCARRIER_MEASURE\tCODE_MEASURE\tSTATUS\n");
while(1)
{
printf("%02d\t\t%02d\t\t%02d\t\t%02d\t\t%02d\n",(MM_READ(TIC_COUNT)),(MM_READ(ACCUM_COUNT)),(MM_READ(CH0_CARRIER_MEASUREMENT)),(MM_READ(CH0_CODE_MEASUREMENT)),(MM_READ(STATUS)));
@@ -529,6 +541,7 @@ static void help()
puts("reconf - reload FPGA configuration");
puts("namuruinit - init basic essential registers");
puts("namurustatus - dump status to screen");
+ puts("namuruaccum - dump accumlators to screen");
puts("memtest1 - memory speed test, use a stopwatch!");
}
@@ -580,6 +593,7 @@ static void do_command(char *c)
else if(strcmp(token, "namuruinit") == 0) namuruinit();
else if(strcmp(token, "namurustatus") == 0) namurustatus();
+ else if(strcmp(token, "namuruaccum") == 0) namuruaccum();
else if(strcmp(token, "memtest1") == 0) memtest1();
else if(strcmp(token, "rcsr") == 0) rcsr(get_token(&c));
View
25 software/include/hal/correlator.h
@@ -0,0 +1,25 @@
+/*
+ * Milkymist SoC (Software)
+ * Copyleft 2011 Cristian Paul Peñarada
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __HAL_CORRELATOR_H
+#define __HAL_CORRELATOR_H
+
+void correlator_init();
+
+void correlator_isr();
+
+#endif /* __HAL_correlator_H */
View
1  software/include/hw/interrupts.h
@@ -36,5 +36,6 @@
#define IRQ_MIDITX (0x00008000) /* 15 */
#define IRQ_IR (0x00010000) /* 16 */
#define IRQ_USB (0x00020000) /* 17 */
+#define IRQ_CORRELATOR (0x00040000) /* 18 */
#endif /* __HW_INTERRUPTS_H */

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