diff --git a/Makefile b/Makefile
index 357c875..ee0749e 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,6 @@
 TARGET =
 TARGETEXTENSION = 
 
-CC = gcc
 CCOUT = -o 
 COPTS = -c -O2 
 
diff --git a/Makefile.Haiku b/Makefile.Haiku
new file mode 100644
index 0000000..c15ccef
--- /dev/null
+++ b/Makefile.Haiku
@@ -0,0 +1,16 @@
+# Unix
+
+TARGET =
+TARGETEXTENSION = 
+
+CC = gcc
+CCOUT = -o 
+COPTS = -c -O2 
+
+LD = $(CC)
+LDOUT = $(CCOUT)
+LDFLAGS =
+
+RM = rm -f
+
+include make.rules
diff --git a/Makefile.MiNT b/Makefile.MiNT
new file mode 100644
index 0000000..4ec3aa8
--- /dev/null
+++ b/Makefile.MiNT
@@ -0,0 +1,16 @@
+# Atari TOS/MiNT
+
+TARGET = _MiNT
+TARGETEXTENSION =
+
+CC = vc +mint
+CCOUT = -o 
+COPTS = -c -c99 -cpu=68020 -O1
+
+LD = $(CC)
+LDOUT = $(CCOUT)
+LDFLAGS = -lm
+
+RM = rm -f
+
+include make.rules
diff --git a/Makefile.TOS b/Makefile.TOS
new file mode 100644
index 0000000..73a102a
--- /dev/null
+++ b/Makefile.TOS
@@ -0,0 +1,16 @@
+# Atari TOS
+
+TARGET = _TOS
+TARGETEXTENSION = .ttp
+
+CC = vc +tos
+CCOUT = -o 
+COPTS = -c -c99 -O1 -DATARI
+
+LD = $(CC)
+LDOUT = $(CCOUT)
+LDFLAGS = -lm
+
+RM = rm -f
+
+include make.rules
diff --git a/Makefile.Win32FromLinux b/Makefile.Win32FromLinux
new file mode 100644
index 0000000..444b6ce
--- /dev/null
+++ b/Makefile.Win32FromLinux
@@ -0,0 +1,20 @@
+# Windows compiled on a Linux machine with mingw
+
+TARGET = _win32
+TARGETEXTENSION = .exe
+
+
+
+CC = /usr/bin/i586-mingw32msvc-gcc
+CCOUT = -o 
+COPTS = -c -O2
+
+LD = $(CC)
+LDOUT = $(CCOUT)
+LDFLAGS = -lm
+
+RM = rm -f
+
+
+
+include make.rules
diff --git a/atom.c b/atom.c
index 8e28624..d159417 100644
--- a/atom.c
+++ b/atom.c
@@ -1,10 +1,9 @@
 /* atom.c - atomic objects from source */
-/* (c) in 2010-2011 by Volker Barthelmann and Frank Wille */
+/* (c) in 2010-2014 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
 
-/* test implementation, not good */
 /* searches mnemonic list and tries to parse (via the cpu module)
    the operands according to the mnemonic requirements; returns an
    instruction or 0 */
@@ -12,85 +11,117 @@ instruction *new_inst(char *inst,int len,int op_cnt,char **op,int *op_len)
 {
 #if MAX_OPERANDS!=0
   operand ops[MAX_OPERANDS];
-  int omitted[MAX_OPERANDS]={0};
+  int j,k,mnemo_opcnt,omitted,skipped;
 #endif
-  int i,j,inst_found=0,rc;
+  int i,inst_found=0;
   hashdata data;
-  instruction *new=mymalloc(sizeof(*new));
+  instruction *new;
 
-#ifdef HAVE_INSTRUCTION_EXTENSION
+  new = mymalloc(sizeof(*new));
+#if HAVE_INSTRUCTION_EXTENSION
   init_instruction_ext(&new->ext);
 #endif
-#ifdef NEED_CLEARED_OPERANDS
+#if MAX_OPERANDS!=0 && NEED_CLEARED_OPERANDS!=0
   /* reset operands to allow the cpu-backend to parse them only once */
   memset(ops,0,sizeof(ops));
 #endif
 
   if (find_namelen_nc(mnemohash,inst,len,&data)) {
-    /* instruction name fits - are operands ok? */
     i = data.idx;
-    inst_found = 1;
 
-    /* search all mnemonics with the same name */
+    /* try all mnemonics with the same name until operands match */
     do {
-      for (j=0; j<op_cnt; j++) {
-#if !ALLOW_EMPTY_OPS
-        if (mnemonics[i].operand_type[j] == 0) {
-#if IGNORE_FIRST_EXTRA_OP
-          if (!j)
-            for (; j<op_cnt; omitted[j++]=1);
-#endif
+      inst_found = 1;
+      if (!MNEMONIC_VALID(i)) {
+        i++;
+        continue;  /* try next */
+      }
+
+#if MAX_OPERANDS!=0
+
+#if ALLOW_EMPTY_OPS
+      mnemo_opcnt = op_cnt<MAX_OPERANDS ? op_cnt : MAX_OPERANDS;
+#else
+      for (j=0; j<MAX_OPERANDS; j++)
+        if (mnemonics[i].operand_type[j] == 0)
           break;
-        }
+      mnemo_opcnt = j;	/* number of expected operands for this mnemonic */
 #endif
-        rc = parse_operand(op[j],op_len[j],&ops[j],
-                           mnemonics[i].operand_type[j]);
-        if (rc == PO_CORRUPT) {
-          myfree(new);
-          return 0;
+      inst_found = 2;
+      save_symbols();  /* make sure we can restore symbols to this point */
+
+      for (j=k=omitted=skipped=0; j<mnemo_opcnt; j++) {
+
+        if (op_cnt+omitted < mnemo_opcnt &&
+            OPERAND_OPTIONAL(&ops[j],mnemonics[i].operand_type[j])) {
+          omitted++;
         }
-        if(rc == PO_NOMATCH) {
-          if (rc != PO_CORRUPT &&
-              OPERAND_OPTIONAL(mnemonics[i].operand_type[j]))
-            omitted[j] = 1;
-          else
+        else {
+          int rc;
+
+          if (k >= op_cnt)  /* missing mandatory operands */
             break;
+
+          rc = parse_operand(op[k],op_len[k],&ops[j],
+                                 mnemonics[i].operand_type[j]);
+
+          if (rc == PO_CORRUPT) {
+            myfree(new);
+            restore_symbols();
+            return 0;
+          }
+          if (rc == PO_NOMATCH)
+              break;
+
+          /* MATCH, move to next parsed operand */
+          k++;
+          if (rc == PO_SKIP) {	/* but skip next operand type from table */
+            j++;
+            skipped++;
+          }
         }
       }
-#if CPU_CHECKS_OPCNT
-      if (j<op_cnt) {
-#else
-      if (j<op_cnt ||
-          (op_cnt<MAX_OPERANDS && mnemonics[i].operand_type[op_cnt]!=0)) {
+
+#if IGNORE_FIRST_EXTRA_OP
+      if (mnemo_opcnt > 0)
 #endif
+      if (j<mnemo_opcnt || k<op_cnt) {
+        /* No match. Try next mnemonic. */
         i++;
+        restore_symbols();
         continue;
       }
-      new->code = i;
-      for (j=0; j<op_cnt; j++) {
-        if (omitted[j]) {
-          new->op[j] = 0;
-        }
-        else {
-          new->op[j] = mymalloc(sizeof(operand));
-          *new->op[j] = ops[j];
-        }
+
+      /* Matched! Copy operands. */
+      mnemo_opcnt -= skipped;
+      for (j=0; j<mnemo_opcnt; j++) {
+        new->op[j] = mymalloc(sizeof(operand));
+        *new->op[j] = ops[j];
       }
       for(; j<MAX_OPERANDS; j++)
         new->op[j] = 0;
+
+#endif /* MAX_OPERANDS!=0 */
+
+      new->code = i;
       return new;
-      i++;
     }
-    while(i<mnemonic_cnt && !strnicmp(mnemonics[i].name,inst,len)
-          && mnemonics[i].name[len]==0);
+    while (i<mnemonic_cnt && !strnicmp(mnemonics[i].name,inst,len)
+           && mnemonics[i].name[len]==0);
   }
 
-  if (inst_found)
-    general_error(0);
-  else
-    general_error(1,cnvstr(inst,len));
+  switch (inst_found) {
+    case 1:
+      general_error(8);  /* instruction not supported by cpu */
+      break;
+    case 2:
+      general_error(0);  /* illegal operand types */
+      break;
+    default:
+      general_error(1,cnvstr(inst,len));  /* completely unknown mnemonic */
+      break;
+  }
   myfree(new);
-
   return 0;
 }
 
@@ -106,7 +137,7 @@ dblock *new_dblock(void)
 }
 
 
-sblock *new_sblock(expr *space,int size,expr *fill)
+sblock *new_sblock(expr *space,size_t size,expr *fill)
 {
   sblock *sb = mymalloc(sizeof(sblock));
 
@@ -114,15 +145,16 @@ sblock *new_sblock(expr *space,int size,expr *fill)
   sb->space_exp = space;
   sb->size = size;
   if (!(sb->fill_exp = fill))
-    memset(sb->fill,0,SB_MAXSIZE);
+    memset(sb->fill,0,MAXPADBYTES);
   sb->relocs = 0;
+  sb->maxalignbytes = 0;
   return sb;
 }
 
 
-static taddr space_size(sblock *sb,section *sec,taddr pc)
+static size_t space_size(sblock *sb,section *sec,taddr pc)
 {
-  taddr space=0;
+  utaddr space=0;
 
   if (eval_expr(sb->space_exp,&space,sec,pc) || !final_pass)
     sb->space = space;
@@ -133,34 +165,34 @@ static taddr space_size(sblock *sb,section *sec,taddr pc)
     if (sb->size <= sizeof(taddr)) {
       /* space is filled with an expression which may also need relocations */
       symbol *base=NULL;
-      taddr fill,i;
+      taddr fill;
+      utaddr i;
 
       if (!eval_expr(sb->fill_exp,&fill,sec,pc)) {
-        base = find_base(sb->fill_exp,sec,pc);
-        if (!base)
+        if (find_base(sb->fill_exp,&base,sec,pc)==BASE_ILLEGAL)
           general_error(38);  /* illegal relocation */
       }
       copy_cpu_taddr(sb->fill,fill,sb->size);
       if (base && !sb->relocs) {
         /* generate relocations */
         for (i=0; i<space; i++)
-          add_reloc(&sb->relocs,base,fill,REL_ABS,
-                    sb->size<<3,(i*sb->size)<<3);
+          add_nreloc(&sb->relocs,base,fill,REL_ABS,
+                     sb->size<<3,(sb->size*i)<<3);
       }
     }
     else
       general_error(30);  /* expression must be constant */
   }
 
-  return space * (taddr)sb->size;
+  return sb->size * space;
 }
 
 
-static taddr rorg_size(expr *rorg,section *sec,taddr pc)
+static size_t roffs_size(expr *offsexp,section *sec,taddr pc)
 {
   taddr offs;
 
-  eval_expr(rorg,&offs,sec,pc);
+  eval_expr(offsexp,&offs,sec,pc);
   offs = sec->org + offs - pc;
   return offs>0 ? offs : 0;
 }
@@ -170,8 +202,6 @@ static taddr rorg_size(expr *rorg,section *sec,taddr pc)
    section is used */
 void add_atom(section *sec,atom *a)
 {
-  taddr size;
-
   if (!sec) {
     sec = default_section();
     if (!sec) {
@@ -180,8 +210,9 @@ void add_atom(section *sec,atom *a)
     }
   }
 
+  a->changes = 0;
   a->src = cur_src;
-  a->line = cur_src->line;
+  a->line = cur_src!=NULL ? cur_src->line : 0;
 
   if (sec->last) {
     atom *pa = sec->last;
@@ -197,16 +228,13 @@ void add_atom(section *sec,atom *a)
   a->next = 0;
   sec->last = a;
 
-  sec->pc = (sec->pc + a->align - 1) / a->align * a->align;
-  size = atom_size(a,sec,sec->pc);
-#ifdef CHECK_ATOMSIZE
-  a->lastsize = size;
-#endif
-  sec->pc += size;
+  sec->pc = pcalign(a,sec->pc);
+  a->lastsize = atom_size(a,sec,sec->pc);
+  sec->pc += a->lastsize;
   if (a->align > sec->align)
     sec->align = a->align;
 
-  if (produce_listing) {
+  if (listena) {
     a->list = last_listing;
     if (last_listing) {
       if (!last_listing->atom)
@@ -218,7 +246,7 @@ void add_atom(section *sec,atom *a)
 }
 
 
-taddr atom_size(atom *p,section *sec,taddr pc)
+size_t atom_size(atom *p,section *sec,taddr pc)
 {
   switch(p->type) {
     case LABEL:
@@ -226,17 +254,21 @@ taddr atom_size(atom *p,section *sec,taddr pc)
     case OPTS:
     case PRINTTEXT:
     case PRINTEXPR:
+    case RORG:
+    case RORGEND:
+    case ASSERT:
       return 0;
     case DATA:
       return p->content.db->size;
     case INSTRUCTION:
-      return instruction_size(p->content.inst,sec,pc);
+      return p->content.inst->code>=0?
+             instruction_size(p->content.inst,sec,pc):0;
     case SPACE:
       return space_size(p->content.sb,sec,pc);
     case DATADEF:
       return (p->content.defb->bitsize+7)/8;
-    case RORG:
-      return rorg_size(p->content.roffs,sec,pc);
+    case ROFFS:
+      return roffs_size(p->content.roffs,sec,pc);
     default:
       ierror(0);
       break;
@@ -249,7 +281,7 @@ static void print_instruction(FILE *f,instruction *p)
 {
   int i;
 
-  printf("inst %d(%s) ",p->code,mnemonics[p->code].name);
+  printf("inst %d(%s) ",p->code,p->code>=0?mnemonics[p->code].name:"deleted");
 #if MAX_OPERANDS!=0
   for (i=0; i<MAX_OPERANDS; i++)
     printf("%p ",(void *)p->op[i]);
@@ -292,7 +324,7 @@ void print_atom(FILE *f,atom *p)
     case LINE:
       fprintf(f,"line: %d of %s",p->content.srcline,getdebugname());
       break;
-#ifdef HAVE_CPU_OPTS
+#if HAVE_CPU_OPTS
     case OPTS:
       print_cpu_opts(f,p->content.opts);
       break;
@@ -302,75 +334,158 @@ void print_atom(FILE *f,atom *p)
       break;
     case PRINTEXPR:
       fprintf(f,"expr: ");
-      print_expr(f,p->content.pexpr);
+      print_expr(f,p->content.pexpr->print_exp);
       break;
-    case RORG:
-      fprintf(f,"rorg: offset ");
+    case ROFFS:
+      fprintf(f,"roffs: offset ");
       print_expr(f,p->content.roffs);
       break;
+    case RORG:
+      fprintf(f,"rorg: relocate to 0x%llx",ULLTADDR(*p->content.rorg));
+      break;
+    case RORGEND:
+      fprintf(f,"rorg end");
+      break;
+    case ASSERT:
+      fprintf(f,"assert: %s (message: %s)\n",p->content.assert->expstr,
+              p->content.assert->msgstr?p->content.assert->msgstr:emptystr);
+      break;
     default:
       ierror(0);
   }
 }
 
 
-atom *new_inst_atom(instruction *p)
+/* prints and formats an expression from a PRINTEXPR atom */
+void atom_printexpr(printexpr *pexp,section *sec,taddr pc)
 {
-  atom *new = mymalloc(sizeof(*new));
+  taddr t;
+  long long v;
+  int i;
+
+  eval_expr(pexp->print_exp,&t,sec,pc);
+  if (pexp->type==PEXP_SDEC && (t&(1LL<<(pexp->size-1)))!=0) {
+    /* signed decimal */
+    v = -1;
+    v &= ~(long long)MAKEMASK(pexp->size);
+  }
+  else
+    v = 0;
+  v |= t & MAKEMASK(pexp->size);
+
+  switch (pexp->type) {
+    case PEXP_HEX:
+      printf("%llX",(unsigned long long)v);
+      break;
+    case PEXP_SDEC:
+      printf("%lld",v);
+      break;
+    case PEXP_UDEC:
+      printf("%llu",(unsigned long long)v);
+      break;
+    case PEXP_BIN:
+      for (i=pexp->size-1; i>=0; i--)
+        putchar((v & (1LL<<i)) ? '1' : '0');
+      break;
+    case PEXP_ASC:
+      for (i=((pexp->size+7)>>3)-1; i>=0; i--) {
+        unsigned char c = (v>>(i*8))&0xff;
+        putchar(isprint(c) ? c : '.');
+      }
+      break;
+    default:
+      ierror(0);
+      break;
+  }
+}
+
+
+atom *clone_atom(atom *a)
+{
+  atom *new = mymalloc(sizeof(atom));
+  void *p;
+
+  memcpy(new,a,sizeof(atom));
+
+  switch (a->type) {
+    /* INSTRUCTION and DATADEF have to be cloned as well, because they will
+       be deallocated and transformed into DATA during assemble() */
+    case INSTRUCTION:
+      p = mymalloc(sizeof(instruction));
+      memcpy(p,a->content.inst,sizeof(instruction));
+      new->content.inst = p;
+      break;
+    case DATADEF:
+      p = mymalloc(sizeof(defblock));
+      memcpy(p,a->content.defb,sizeof(defblock));
+      new->content.defb = p;
+      break;
+    default:
+      break;
+  }
 
   new->next = 0;
-  new->type = INSTRUCTION;
-  new->align = INST_ALIGN;
-  new->content.inst = p;
+  new->src = NULL;
+  new->line = 0;
+  new->list = NULL;
   return new;
 }
 
 
-atom *new_data_atom(dblock *p,int align)
+static atom *new_atom(int type,taddr align)
 {
   atom *new = mymalloc(sizeof(*new));
 
-  new->next = 0;
-  new->type = DATA;
+  new->next = NULL;
+  new->type = type;
   new->align = align;
-  new->content.db=p;
+  return new;
+}
+
+
+atom *new_inst_atom(instruction *p)
+{
+  atom *new = new_atom(INSTRUCTION,INST_ALIGN);
+
+  new->content.inst = p;
+  return new;
+}
+
+
+atom *new_data_atom(dblock *p,taddr align)
+{
+  atom *new = new_atom(DATA,align);
+
+  new->content.db = p;
   return new;
 }
 
 
 atom *new_label_atom(symbol *p)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(LABEL,1);
 
-  new->next = 0;
-  new->type = LABEL;
-  new->align = 1;
   new->content.label = p;
   return new;
 }
 
 
-atom *new_space_atom(expr *space,int size,expr *fill)
+atom *new_space_atom(expr *space,size_t size,expr *fill)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(SPACE,1);
   int i;
 
   if (size<1)
     ierror(0);  /* usually an error in syntax-module */
-  new->next = 0;
-  new->type = SPACE;
-  new->align = 1;
   new->content.sb = new_sblock(space,size,fill);
   return new;
 }  
 
 
-atom *new_datadef_atom(taddr bitsize,operand *op)
+atom *new_datadef_atom(size_t bitsize,operand *op)
 {
-  atom *new = mymalloc(sizeof(*new));
-  new->next = 0;
-  new->type = DATADEF;
-  new->align = DATA_ALIGN(bitsize);
+  atom *new = new_atom(DATADEF,DATA_ALIGN(bitsize));
+
   new->content.defb = mymalloc(sizeof(*new->content.defb));
   new->content.defb->bitsize = bitsize;
   new->content.defb->op = op;
@@ -380,11 +495,8 @@ atom *new_datadef_atom(taddr bitsize,operand *op)
 
 atom *new_srcline_atom(int line)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(LINE,1);
 
-  new->next = 0;
-  new->type = LINE;
-  new->align = 1;
   new->content.srcline = line;
   return new;
 }
@@ -392,11 +504,8 @@ atom *new_srcline_atom(int line)
 
 atom *new_opts_atom(void *o)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(OPTS,1);
 
-  new->next = 0;
-  new->type = OPTS;
-  new->align = 1;
   new->content.opts = o;
   return new;
 }
@@ -404,35 +513,61 @@ atom *new_opts_atom(void *o)
 
 atom *new_text_atom(char *txt)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(PRINTTEXT,1);
 
-  new->next = 0;
-  new->type = PRINTTEXT;
-  new->align = 1;
-  new->content.ptext = txt ? txt : "";
+  new->content.ptext = txt ? txt : "\n";
   return new;
 }
 
 
-atom *new_expr_atom(expr *x)
+atom *new_expr_atom(expr *exp,int type,int size)
 {
-  atom *new = mymalloc(sizeof(*new));
-
-  new->next = 0;
-  new->type = PRINTEXPR;
-  new->align = 1;
-  new->content.pexpr = x;
+  atom *new = new_atom(PRINTEXPR,1);
+
+  new->content.pexpr = mymalloc(sizeof(*new->content.pexpr));
+  if (exp==NULL || type<PEXP_HEX || type>PEXP_ASC || size<1
+      || size>sizeof(long long)*8)
+    ierror(0);
+  new->content.pexpr->print_exp = exp;
+  new->content.pexpr->type = type;
+  new->content.pexpr->size = size;
   return new;
 }
 
 
-atom *new_rorg_atom(expr *offs)
+atom *new_roffs_atom(expr *offs)
 {
-  atom *new = mymalloc(sizeof(*new));
+  atom *new = new_atom(ROFFS,1);
 
-  new->next = 0;
-  new->type = RORG;
-  new->align = 1;
   new->content.roffs = offs;
   return new;
 }
+
+
+atom *new_rorg_atom(taddr raddr)
+{
+  atom *new = new_atom(RORG,1);
+  taddr *newrorg = mymalloc(sizeof(taddr));
+
+  *newrorg = raddr;
+  new->content.rorg = newrorg;
+  return new;
+}
+
+
+atom *new_rorgend_atom(void)
+{
+  return new_atom(RORGEND,1);
+}
+
+
+atom *new_assert_atom(expr *aexp,char *exp,char *msg)
+{
+  atom *new = new_atom(ASSERT,1);
+
+  new->content.assert = mymalloc(sizeof(*new->content.assert));
+  new->content.assert->assert_exp = aexp;
+  new->content.assert->expstr = exp;
+  new->content.assert->msgstr = msg;
+  return new;
+}
diff --git a/atom.h b/atom.h
index 9ac32d6..f558c30 100644
--- a/atom.h
+++ b/atom.h
@@ -1,5 +1,5 @@
 /* atom.h - atomic objects from source */
-/* (c) in 2010 by Volker Barthelmann and Frank Wille */
+/* (c) in 2010-2014 by Volker Barthelmann and Frank Wille */
 
 #ifndef ATOM_H
 #define ATOM_H
@@ -14,7 +14,10 @@
 #define OPTS 7
 #define PRINTTEXT 8
 #define PRINTEXPR 9
-#define RORG 10
+#define ROFFS 10
+#define RORG 11
+#define RORGEND 12
+#define ASSERT 13
 
 /* a machine instruction */
 typedef struct instruction {
@@ -25,43 +28,59 @@ typedef struct instruction {
 #if MAX_OPERANDS!=0
   operand *op[MAX_OPERANDS];
 #endif
-#ifdef HAVE_INSTRUCTION_EXTENSION
+#if HAVE_INSTRUCTION_EXTENSION
   instruction_ext ext;
 #endif
 } instruction;  
 
 typedef struct defblock {
-  taddr bitsize;
+  size_t bitsize;
   operand *op;
 } defblock;
 
 struct dblock {
-  taddr size;
+  size_t size;
   char *data;
   rlist *relocs;
 };
 
-#define SB_MAXSIZE 8
 struct sblock {
-  taddr space;
+  size_t space;
   expr *space_exp;  /* copied to space, when evaluated as constant */
-  int size;
-  unsigned char fill[SB_MAXSIZE];
+  size_t size;
+  uint8_t fill[MAXPADBYTES];
   expr *fill_exp;   /* copied to fill, when evaluated - may be NULL */
   rlist *relocs;
+  taddr maxalignbytes;
 };
 
+typedef struct printexpr {
+  expr *print_exp;
+  short type;  /* hex, signed, unsigned */
+  short size;  /* precision in bits */
+} printexpr;
+#define PEXP_HEX 0
+#define PEXP_SDEC 1
+#define PEXP_UDEC 2
+#define PEXP_BIN 3
+#define PEXP_ASC 4
+
+typedef struct assertion {
+  expr *assert_exp;
+  char *expstr;
+  char *msgstr;
+} assertion;
+
 /* an atomic element of data */
 typedef struct atom {
   struct atom *next;
   int type;
-  int align;
+  taddr align;
+  size_t lastsize;
+  unsigned changes;
   source *src;
   int line;
   listing *list;
-#ifdef CHECK_ATOMSIZE
-  taddr lastsize;
-#endif
   union {
     instruction *inst;
     dblock *db;
@@ -71,29 +90,37 @@ typedef struct atom {
     void *opts;
     int srcline;
     char *ptext;
-    expr *pexpr;
+    printexpr *pexpr;
     expr *roffs;
+    taddr *rorg;
+    assertion *assert;
   } content;
 } atom;
 
+#define MAXSIZECHANGES 5  /* warning, when atom changed size so many times */
 
 instruction *new_inst(char *inst,int len,int op_cnt,char **op,int *op_len);
 dblock *new_dblock();
-sblock *new_sblock(expr *,int,expr *);
+sblock *new_sblock(expr *,size_t,expr *);
 
 void add_atom(section *,atom *);
-taddr atom_size(atom *,section *,taddr);
+size_t atom_size(atom *,section *,taddr);
 void print_atom(FILE *,atom *);
+void atom_printexpr(printexpr *,section *,taddr);
+atom *clone_atom(atom *);
 
 atom *new_inst_atom(instruction *);
-atom *new_data_atom(dblock *,int);
+atom *new_data_atom(dblock *,taddr);
 atom *new_label_atom(symbol *);
-atom *new_space_atom(expr *,int,expr *);
-atom *new_datadef_atom(taddr,operand *);
+atom *new_space_atom(expr *,size_t,expr *);
+atom *new_datadef_atom(size_t,operand *);
 atom *new_srcline_atom(int);
 atom *new_opts_atom(void *);
 atom *new_text_atom(char *);
-atom *new_expr_atom(expr *);
-atom *new_rorg_atom(expr *);
+atom *new_expr_atom(expr *,int,int);
+atom *new_roffs_atom(expr *);
+atom *new_rorg_atom(taddr);
+atom *new_rorgend_atom(void);
+atom *new_assert_atom(expr *,char *,char *);
 
 #endif
diff --git a/cond.c b/cond.c
new file mode 100644
index 0000000..8d1a12c
--- /dev/null
+++ b/cond.c
@@ -0,0 +1,85 @@
+/* cond.c - conditional assembly support routines */
+/* (c) in 2015 by Frank Wille */
+
+#include "vasm.h"
+
+int clev;  /* conditional level */
+
+static char cond[MAXCONDLEV+1];
+static char *condsrc[MAXCONDLEV+1];
+static int condline[MAXCONDLEV+1];
+static ifnesting;
+
+
+/* initialize conditional assembly */
+void cond_init(void)
+{
+  cond[0] = 1;
+  clev = ifnesting = 0;
+}
+
+
+/* return true, when current level allows assembling */
+int cond_state(void)
+{
+  return cond[clev];
+}
+
+
+/* ensures that all conditional block are closed at the end of the source */
+void cond_check(void)
+{
+  if (clev > 0)
+    general_error(66,condsrc[clev],condline[clev]);  /* "endc/endif missing */
+}
+
+
+/* establish a new level of condititional assembly */
+void cond_if(char flag)
+{
+  if (++clev >= MAXCONDLEV)
+    general_error(65,clev);  /* nesting depth exceeded */
+
+  cond[clev] = flag;
+  condsrc[clev] = cur_src->name;
+  condline[clev] = cur_src->line;
+}
+
+
+/* handle skipped if statement */
+void cond_skipif(void)
+{
+  ifnesting++;
+}
+
+
+/* handle else statement after skipped if-branch */
+void cond_else(void)
+{
+  if (ifnesting == 0)
+    cond[clev] = 1;
+}
+
+
+/* handle else statement after assembled if-branch */
+void cond_skipelse(void)
+{
+  if (clev > 0)
+    cond[clev] = 0;
+  else
+    general_error(63);  /* else without if */
+}
+
+
+/* handle end-if statement */
+void cond_endif(void)
+{
+  if (ifnesting == 0) {
+    if (clev > 0)
+      clev--;
+    else
+      general_error(64);  /* unexpected endif without if */
+  }
+  else  /* the whole conditional block was ignored */
+    ifnesting--;
+}
diff --git a/cond.h b/cond.h
new file mode 100644
index 0000000..90a155c
--- /dev/null
+++ b/cond.h
@@ -0,0 +1,25 @@
+/* cond.h - conditional assembly support routines */
+/* (c) in 2015 by Frank Wille */
+
+#ifndef COND_H
+#define COND_H
+
+/* defines */
+#ifndef MAXCONDLEV
+#define MAXCONDLEV 63
+#endif
+
+/* global variables */
+extern int clev;
+
+/* functions */
+void cond_init(void);
+int cond_state(void);
+void cond_check(void);
+void cond_if(char);
+void cond_skipif(void);
+void cond_else(void);
+void cond_skipelse(void);
+void cond_endif(void);
+
+#endif /* COND_H */
diff --git a/cpus/6502/cpu.c b/cpus/6502/cpu.c
index 1c63b2b..a08bee8 100644
--- a/cpus/6502/cpu.c
+++ b/cpus/6502/cpu.c
@@ -1,6 +1,6 @@
 /*
 ** cpu.c 650x/651x cpu-description file
-** (c) in 2002,2006,2008-2010 by Frank Wille
+** (c) in 2002,2006,2008-2012,2014-2015 by Frank Wille
 */
 
 #include "vasm.h"
@@ -11,12 +11,12 @@ mnemonic mnemonics[] = {
 
 int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
 
-char *cpu_copyright="vasm 6502 cpu backend 0.5a (c) 2002,2006,2008-2010 Frank Wille";
+char *cpu_copyright="vasm 6502 cpu backend 0.7a (c) 2002,2006,2008-2012,2014-2015 Frank Wille";
 char *cpuname = "6502";
 int bitsperbyte = 8;
 int bytespertaddr = 2;
 
-static unsigned short cpu_type = M6502;
+static uint16_t cpu_type = M6502;
 static int branchopt = 0;
 static int modifier;  /* set by find_base() */
 
@@ -37,14 +37,21 @@ int ext_unary_eval(int type,taddr val,taddr *result,int cnst)
 }
 
 
-symbol *ext_find_base(expr *p,section *sec,taddr pc)
+int ext_find_base(symbol **base,expr *p,section *sec,taddr pc)
 {
+  /* addr/256 equals >addr, addr%256 and addr&255 equal <addr */
+  if (p->type==DIV || p->type==MOD) {
+    if (p->right->type==NUM && p->right->c.val==256)
+      p->type = p->type == DIV ? HIBYTE : LOBYTE;
+  }
+  else if (p->type==BAND && p->right->type==NUM && p->right->c.val==255)
+    p->type = LOBYTE;
+
   if (p->type==LOBYTE || p->type==HIBYTE) {
     modifier = p->type;
-    return find_base(p->left,sec,pc);
+    return find_base(p->left,base,sec,pc);
   }
-  modifier = 0;
-  return 0;
+  return BASE_ILLEGAL;
 }
 
 
@@ -54,7 +61,7 @@ int parse_operand(char *p,int len,operand *op,int required)
   int indir = 0;
 
   p = skip(p);
-  if (len>0 && *p=='(' && required!=DATAOP) {
+  if (len>0 && required!=DATAOP && check_indir(p,start+len)) {
     indir = 1;
     p = skip(p+1);
   }
@@ -66,8 +73,10 @@ int parse_operand(char *p,int len,operand *op,int required)
       p = skip(p);
       break;
     case INDIR:
+    case INDIRX:
     case INDX:
     case INDY:
+    case DPINDIR:
       if (!indir)
         return PO_NOMATCH;
       break;
@@ -84,6 +93,7 @@ int parse_operand(char *p,int len,operand *op,int required)
 
   switch (required) {
     case INDX:
+    case INDIRX:
       if (*p++ == ',') {
         p = skip(p);
         if (toupper((unsigned char)*p++) != 'X')
@@ -108,7 +118,8 @@ int parse_operand(char *p,int len,operand *op,int required)
       break;
   }
 
-  if (required==INDIR || required==INDX || required==INDY) {
+  if (required==INDIR || required==INDX || required==INDY
+      || required==DPINDIR || required==INDIRX) {
     p = skip(p);
     if (*p++ != ')') {
       cpu_error(2);  /* missing closing parenthesis */
@@ -167,8 +178,8 @@ static void optimize_instruction(instruction *ip,section *sec,
       else {
         symbol *base;
         
-        if (base = find_base(op->value,sec,pc)) {
-          if (op->type==REL && base->type==LABSYM && base->sec==sec) {
+        if (find_base(op->value,&base,sec,pc) == BASE_OK) {
+          if (op->type==REL && LOCREF(base) && base->sec==sec) {
             taddr bd = val - (pc + 2);
     
             if ((bd<-0x80 || bd>0x7f) && branchopt) {
@@ -183,7 +194,7 @@ static void optimize_instruction(instruction *ip,section *sec,
 }
 
 
-static taddr get_inst_size(instruction *ip)
+static size_t get_inst_size(instruction *ip)
 {
   if (ip->op[0] != NULL) {
     switch (ip->op[0]->type) {
@@ -193,6 +204,7 @@ static taddr get_inst_size(instruction *ip)
       case REL:
       case INDX:
       case INDY:
+      case DPINDIR:
       case IMMED:
       case ZPAGE:
       case ZPAGEX:
@@ -202,6 +214,7 @@ static taddr get_inst_size(instruction *ip)
       case ABSX:
       case ABSY:
       case INDIR:
+      case INDIRX:
         return 3;
       case RELJMP:
         return 5;
@@ -214,7 +227,7 @@ static taddr get_inst_size(instruction *ip)
 }
 
 
-taddr instruction_size(instruction *ip,section *sec,taddr pc)
+size_t instruction_size(instruction *ip,section *sec,taddr pc)
 {
   instruction *ipcopy;
 
@@ -251,6 +264,7 @@ static void rangecheck(taddr val,int type)
   switch (type) {
     case INDX:
     case INDY:
+    case DPINDIR:
     case ZPAGE:
     case ZPAGEX:
     case ZPAGEY:
@@ -285,8 +299,8 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
     if (op->value != NULL) {
       if (!eval_expr(op->value,&val,sec,pc)) {
         modifier = 0;
-        if (base = find_base(op->value,sec,pc)) {
-          if (optype==REL && base->type==LABSYM && base->sec==sec) {
+        if (find_base(op->value,&base,sec,pc) == BASE_OK) {
+          if (optype==REL && !is_pc_reloc(base,sec)) {
             /* relative branch requires no relocation */
             val = val - (pc + 2);
           }
@@ -299,10 +313,12 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
               case ABSX:
               case ABSY:
               case INDIR:
+              case INDIRX:
                 size = 16;
                 break;
               case INDX:
               case INDY:
+              case DPINDIR:
               case ZPAGE:
               case ZPAGEX:
               case ZPAGEY:
@@ -321,29 +337,29 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
                 ierror(0);
                 break;
             }
-            rl = add_reloc(&db->relocs,base,val,type,size,offs);
+            rl = add_nreloc(&db->relocs,base,val,type,size,offs);
             switch (modifier) {
               case LOBYTE:
-                ((nreloc *)rl->reloc)->mask = 0xff;
+                if (rl)
+                  ((nreloc *)rl->reloc)->mask = 0xff;
                 val = val & 0xff;
                 break;
               case HIBYTE:
-                ((nreloc *)rl->reloc)->mask = 0xff00;
+                if (rl)
+                  ((nreloc *)rl->reloc)->mask = 0xff00;
                 val = (val >> 8) & 0xff;
                 break;
             }
           }
         }
         else
-          cpu_error(7);  /* illegal relocation */
+          general_error(38);  /* illegal relocation */
       }
       rangecheck(val,op->type);
     }
   }
 
   /* write code */
-  if (!(mnemonics[ip->code].ext.available & cpu_type))
-    cpu_error(0);  /* instruction not supported */
   if (optype==ZPAGE || optype==ZPAGEX || optype==ZPAGEY)
     *d++ = mnemonics[ip->code].ext.zp_opcode;
   else if (optype==RELJMP)
@@ -358,6 +374,8 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
         cpu_error(5);   /* operand doesn't fit into 8-bits */
     case ABS:
     case INDIR:
+    case INDIRX:
+    case DPINDIR:
       *d++ = val & 0xff;
       *d = (val>>8) & 0xff;
       break;
@@ -382,7 +400,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 }
 
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 {
   dblock *db = new_dblock();
   taddr val;
@@ -394,24 +412,29 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
   db->data = mymalloc(db->size);
   if (!eval_expr(op->value,&val,sec,pc)) {
     symbol *base;
+    int btype;
     rlist *rl;
     
     modifier = 0;
-    if (base = find_base(op->value,sec,pc)) {
-      rl = add_reloc(&db->relocs,base,val,REL_ABS,bitsize,0);
+    btype = find_base(op->value,&base,sec,pc);
+    if (btype==BASE_OK || (btype==BASE_PCREL && modifier==0)) {
+      rl = add_nreloc(&db->relocs,base,val,
+                      btype==BASE_PCREL?REL_PC:REL_ABS,bitsize,0);
       switch (modifier) {
         case LOBYTE:
-          ((nreloc *)rl->reloc)->mask = 0xff;
+          if (rl)
+            ((nreloc *)rl->reloc)->mask = 0xff;
           val = val & 0xff;
           break;
         case HIBYTE:
-          ((nreloc *)rl->reloc)->mask = 0xff00;
+          if (rl)
+            ((nreloc *)rl->reloc)->mask = 0xff00;
           val = (val >> 8) & 0xff;
           break;
       }
     }
-    else
-      cpu_error(7);  /* illegal relocation */
+    else if (btype != BASE_NONE)
+      general_error(38);  /* illegal relocation */
   }
   if (bitsize < 16) {
     if (val<-0x80 || val>0xff)
@@ -441,6 +464,12 @@ operand *new_operand()
 }
 
 
+int cpu_available(int idx)
+{
+  return (mnemonics[idx].ext.available & cpu_type) != 0;
+}
+
+
 int init_cpu()
 {
   return 1;
@@ -455,6 +484,8 @@ int cpu_args(char *p)
     cpu_type |= ILL;
   else if (!strcmp(p,"-dtv"))
     cpu_type |= DTV;
+  else if (!strcmp(p,"-c02"))
+    cpu_type = M6502 | M65C02;
   else
     return 0;
 
diff --git a/cpus/6502/cpu.h b/cpus/6502/cpu.h
index 8a8ca33..c459ef4 100644
--- a/cpus/6502/cpu.h
+++ b/cpus/6502/cpu.h
@@ -1,6 +1,6 @@
 /*
 ** cpu.h 650x/651x cpu-description header-file
-** (c) in 2002,2008,2009 by Frank Wille
+** (c) in 2002,2008,2009,2014 by Frank Wille
 */
 
 #define BIGENDIAN 0
@@ -10,16 +10,12 @@
 /* maximum number of operands for one mnemonic */
 #define MAX_OPERANDS 2
 
-/* allowed to call parse_operand() with an arbitrary number of operands */
-#define CPU_CHECKS_OPCNT 0
-
 /* maximum number of mnemonic-qualifiers per mnemonic */
 #define MAX_QUALIFIERS 0
 
-/* maximum number of additional command-line-flags for this cpu */
-
 /* data type to represent a target-address */
-typedef short taddr;
+typedef int16_t taddr;
+typedef uint16_t utaddr;
 
 /* minimum instruction alignment */
 #define INST_ALIGN 1
@@ -30,15 +26,18 @@ typedef short taddr;
 /* operand class for n-bit data definitions */
 #define DATA_OPERAND(n) DATAOP
 
+/* returns true when instruction is valid for selected cpu */
+#define MNEMONIC_VALID(i) cpu_available(i)
+
 /* we define two additional unary operations, '<' and '>' */
 int ext_unary_eval(int,taddr,taddr *,int);
-symbol *ext_find_base(expr *,section *,taddr);
+int ext_find_base(symbol **,expr *,section *,taddr);
 #define LOBYTE (LAST_EXP_TYPE+1)
 #define HIBYTE (LAST_EXP_TYPE+2)
 #define EXT_UNARY_NAME(s) (*s=='<'||*s=='>')
 #define EXT_UNARY_TYPE(s) (*s=='<'?LOBYTE:HIBYTE)
 #define EXT_UNARY_EVAL(t,v,r,c) ext_unary_eval(t,v,r,c)
-#define EXT_FIND_BASE(e,s,p) ext_find_base(e,s,p)
+#define EXT_FIND_BASE(b,e,s,p) ext_find_base(b,e,s,p)
 
 /* type to store each operand */
 typedef struct {
@@ -51,13 +50,14 @@ typedef struct {
 typedef struct {
   unsigned char opcode;
   unsigned char zp_opcode;  /* !=0 means optimization to zero page allowed */
-  unsigned short available;
+  uint16_t available;
 } mnemonic_extension;
 
 /* available */
 #define M6502    1       /* standard 6502 instruction set */
 #define ILL      2       /* illegal 6502 instructions */
 #define DTV      4       /* C64 DTV instruction set extension */
+#define M65C02   8       /* 65C02 instruction set */
 
 
 /* adressing modes */
@@ -68,13 +68,19 @@ typedef struct {
 #define INDIR    4       /* ($1234) - JMP only */
 #define INDX     5       /* ($12,X) */
 #define INDY     6       /* ($12),Y */
-#define ZPAGE    7       /* add ZPAGE-ABS to optimize ABS/ABSX/ABSY */
-#define ZPAGEX   8
-#define ZPAGEY   9
-#define RELJMP   10      /* B!cc/JMP construction */
-#define REL      11      /* $1234 - relative branch */
-#define IMMED    12      /* #$12 */
-#define DATAOP	 13	 /* data operand */
-#define ACCU     14      /* A */
-#define DUMX     15      /* dummy X as 'second' operand */
-#define DUMY     16      /* dummy Y as 'second' operand */
+#define DPINDIR  7       /* ($12) */
+#define INDIRX   8       /* ($1234,X) */
+#define ZPAGE    9       /* add ZPAGE-ABS to optimize ABS/ABSX/ABSY */
+#define ZPAGEX   10
+#define ZPAGEY   11
+#define RELJMP   12      /* B!cc/JMP construction */
+#define REL      13      /* $1234 - relative branch */
+#define IMMED    14      /* #$12 */
+#define DATAOP   15      /* data operand */
+#define ACCU     16      /* A */
+#define DUMX     17      /* dummy X as 'second' operand */
+#define DUMY     18      /* dummy Y as 'second' operand */
+
+
+/* exported by cpu.c */
+int cpu_available(int);
diff --git a/cpus/6502/cpu_errors.h b/cpus/6502/cpu_errors.h
index 5a1967b..99abb52 100644
--- a/cpus/6502/cpu_errors.h
+++ b/cpus/6502/cpu_errors.h
@@ -5,4 +5,3 @@
   "relocation does not allow hi/lo modifier",ERROR,
   "operand doesn't fit into 8-bits",ERROR,                           /* 05 */
   "branch destination out of range",ERROR,
-  "illegal relocation",ERROR,
diff --git a/cpus/6502/opcodes.h b/cpus/6502/opcodes.h
index ffe68fb..6a3f482 100644
--- a/cpus/6502/opcodes.h
+++ b/cpus/6502/opcodes.h
@@ -1,6 +1,7 @@
   "adc",  {IMMED  ,    }, {0x69,0x00,M6502},
   "adc",  {ABS    ,    }, {0x6d,0x65,M6502},
   "adc",  {INDX   ,    }, {0x61,0x00,M6502},
+  "adc",  {DPINDIR,    }, {0x72,0x00,M65C02},
   "adc",  {INDIR  ,DUMY}, {0x71,0x00,M6502},
   "adc",  {ABS    ,DUMX}, {0x7d,0x75,M6502},
   "adc",  {ABS    ,DUMY}, {0x79,0x00,M6502},
@@ -12,6 +13,7 @@
   "and",  {IMMED  ,    }, {0x29,0x00,M6502},
   "and",  {ABS    ,    }, {0x2d,0x25,M6502},
   "and",  {INDX   ,    }, {0x21,0x00,M6502},
+  "and",  {DPINDIR,    }, {0x32,0x00,M65C02},
   "and",  {INDIR  ,DUMY}, {0x31,0x00,M6502},
   "and",  {ABS    ,DUMX}, {0x3d,0x35,M6502},
   "and",  {ABS    ,DUMY}, {0x39,0x00,M6502},
@@ -19,7 +21,7 @@
   "asl",  {ACCU   ,    }, {0x0a,0x00,M6502},
   "asl",  {ABS    ,    }, {0x0e,0x06,M6502},
   "asl",  {IMPLIED,    }, {0x0a,0x00,M6502},
-  "asl",  {ABS    ,    }, {0x1e,0x16,M6502},
+  "asl",  {ABS    ,DUMX}, {0x1e,0x16,M6502},
   "aso",  {ABS    ,    }, {0x0f,0x07,ILL},
   "aso",  {INDX   ,    }, {0x03,0x00,ILL},
   "aso",  {INDIR  ,DUMY}, {0x13,0x00,ILL},
@@ -34,11 +36,14 @@
   "bcc",  {REL    ,    }, {0x90,0x00,M6502},
   "bcs",  {REL    ,    }, {0xb0,0x00,M6502},
   "beq",  {REL    ,    }, {0xf0,0x00,M6502},
+  "bit",  {IMMED  ,    }, {0x89,0x00,M65C02},
   "bit",  {ABS    ,    }, {0x2c,0x24,M6502},
+  "bit",  {ABS    ,DUMX}, {0x3c,0x34,M65C02},
   "bmi",  {REL    ,    }, {0x30,0x00,M6502},
   "bne",  {REL    ,    }, {0xd0,0x00,M6502},
   "bpl",  {REL    ,    }, {0x10,0x00,M6502},
   "bra",  {REL    ,    }, {0x12,0x00,DTV},
+  "bra",  {REL    ,    }, {0x80,0x00,M65C02},
   "brk",  {IMPLIED,    }, {0x00,0x00,M6502},
   "bvc",  {REL    ,    }, {0x50,0x00,M6502},
   "bvs",  {REL    ,    }, {0x70,0x00,M6502},
@@ -49,6 +54,7 @@
   "cmp",  {IMMED  ,    }, {0xc9,0x00,M6502},
   "cmp",  {ABS    ,    }, {0xcd,0xc5,M6502},
   "cmp",  {INDX   ,    }, {0xc1,0x00,M6502},
+  "cmp",  {DPINDIR,    }, {0xd2,0x00,M65C02},
   "cmp",  {INDIR  ,DUMY}, {0xd1,0x00,M6502},
   "cmp",  {ABS    ,DUMX}, {0xdd,0xd5,M6502},
   "cmp",  {ABS    ,DUMY}, {0xd9,0x00,M6502},
@@ -66,6 +72,9 @@
   "dcp",  {INDIR  ,DUMY}, {0xd3,0x00,ILL},
   "dcp",  {ABS    ,DUMX}, {0xdf,0xd7,ILL},
   "dcp",  {ABS    ,DUMY}, {0xdb,0x00,ILL},
+  "dea",  {IMPLIED,    }, {0x3a,0x00,M65C02},    
+  "dec",  {ACCU   ,    }, {0x3a,0x00,M65C02},
+  "dec",  {IMPLIED,    }, {0x3a,0x00,M65C02},
   "dec",  {ABS    ,    }, {0xce,0xc6,M6502},
   "dec",  {ABS    ,DUMX}, {0xde,0xd6,M6502},
   "dex",  {IMPLIED,    }, {0xca,0x00,M6502},
@@ -73,9 +82,13 @@
   "eor",  {IMMED  ,    }, {0x49,0x00,M6502},
   "eor",  {ABS    ,    }, {0x4d,0x45,M6502},
   "eor",  {INDX   ,    }, {0x41,0x00,M6502},
+  "eor",  {DPINDIR,    }, {0x52,0x00,M65C02},
   "eor",  {INDIR  ,DUMY}, {0x51,0x00,M6502},
   "eor",  {ABS    ,DUMX}, {0x5d,0x55,M6502},
   "eor",  {ABS    ,DUMY}, {0x59,0x00,M6502},
+  "ina",  {IMPLIED,    }, {0x1a,0x00,M65C02},
+  "inc",  {ACCU   ,    }, {0x1a,0x00,M65C02},
+  "inc",  {IMPLIED,    }, {0x1a,0x00,M65C02},
   "inc",  {ABS    ,    }, {0xee,0xe6,M6502},
   "inc",  {ABS    ,DUMX}, {0xfe,0xf6,M6502},
   "ins",  {ABS    ,    }, {0xef,0xe7,ILL},
@@ -91,6 +104,7 @@
   "isc",  {ABS    ,DUMX}, {0xff,0xf7,ILL},
   "isc",  {ABS    ,DUMY}, {0xfb,0x00,ILL},
   "jmp",  {ABS    ,    }, {0x4c,0x00,M6502},
+  "jmp",  {INDIRX ,    }, {0x7c,0x00,M65C02},
   "jmp",  {INDIR  ,    }, {0x6c,0x00,M6502},
   "jsr",  {ABS    ,    }, {0x20,0x00,M6502},
   "las",  {ABS    ,DUMY}, {0xbb,0x00,ILL},
@@ -101,6 +115,7 @@
   "lax",  {INDIR  ,DUMY}, {0xb3,0x00,ILL},
   "lda",  {IMMED  ,    }, {0xa9,0x00,M6502},
   "lda",  {ABS    ,    }, {0xad,0xa5,M6502},
+  "lda",  {DPINDIR,    }, {0xb2,0x00,M65C02},
   "lda",  {INDX   ,    }, {0xa1,0x00,M6502},
   "lda",  {INDIR  ,DUMY}, {0xb1,0x00,M6502},
   "lda",  {ABS    ,DUMX}, {0xbd,0xb5,M6502},
@@ -125,13 +140,18 @@
   "ora",  {IMMED  ,    }, {0x09,0x00,M6502},
   "ora",  {ABS    ,    }, {0x0d,0x05,M6502},
   "ora",  {INDX   ,    }, {0x01,0x00,M6502},
+  "ora",  {DPINDIR,    }, {0x12,0x00,M65C02},
   "ora",  {INDIR  ,DUMY}, {0x11,0x00,M6502},
   "ora",  {ABS    ,DUMX}, {0x1d,0x15,M6502},
   "ora",  {ABS    ,DUMY}, {0x19,0x00,M6502},
   "pha",  {IMPLIED,    }, {0x48,0x00,M6502},
   "php",  {IMPLIED,    }, {0x08,0x00,M6502},
+  "phx",  {IMPLIED,    }, {0xda,0x00,M65C02},
+  "phy",  {IMPLIED,    }, {0x5a,0x00,M65C02},
   "pla",  {IMPLIED,    }, {0x68,0x00,M6502},
   "plp",  {IMPLIED,    }, {0x28,0x00,M6502},
+  "plx",  {IMPLIED,    }, {0xfa,0x00,M65C02},
+  "ply",  {IMPLIED,    }, {0x7a,0x00,M65C02},
   "rla",  {ABS    ,    }, {0x2f,0x27,ILL},
   "rla",  {INDX   ,    }, {0x23,0x00,ILL},
   "rla",  {INDIR  ,DUMY}, {0x33,0x00,ILL},
@@ -140,11 +160,11 @@
   "rol",  {ACCU   ,    }, {0x2a,0x00,M6502},
   "rol",  {ABS    ,    }, {0x2e,0x26,M6502},
   "rol",  {IMPLIED,    }, {0x2a,0x00,M6502},
-  "rol",  {ABS    ,    }, {0x3e,0x36,M6502},
+  "rol",  {ABS    ,DUMX}, {0x3e,0x36,M6502},
   "ror",  {ACCU   ,    }, {0x6a,0x00,M6502},
   "ror",  {ABS    ,    }, {0x6e,0x66,M6502},
   "ror",  {IMPLIED,    }, {0x6a,0x00,M6502},
-  "ror",  {ABS    ,    }, {0x7e,0x76,M6502},
+  "ror",  {ABS    ,DUMX}, {0x7e,0x76,M6502},
   "rra",  {ABS    ,    }, {0x6f,0x67,ILL},
   "rra",  {INDX   ,    }, {0x63,0x00,ILL},
   "rra",  {INDIR  ,DUMY}, {0x73,0x00,ILL},
@@ -161,6 +181,7 @@
   "sbc",  {IMMED  ,    }, {0xe9,0x00,M6502},
   "sbc",  {ABS    ,    }, {0xed,0xe5,M6502},
   "sbc",  {INDX   ,    }, {0xe1,0x00,M6502},
+  "sbc",  {DPINDIR,    }, {0xf2,0x00,M65C02},
   "sbc",  {INDIR  ,DUMY}, {0xf1,0x00,M6502},
   "sbc",  {ABS    ,DUMX}, {0xfd,0xf5,M6502},
   "sbc",  {ABS    ,DUMY}, {0xf9,0x00,M6502},
@@ -183,6 +204,7 @@
   "sre",  {ABS    ,DUMY}, {0x5b,0x00,ILL},
   "sta",  {ABS    ,    }, {0x8d,0x85,M6502},
   "sta",  {INDX   ,    }, {0x81,0x00,M6502},
+  "sta",  {DPINDIR,    }, {0x92,0x00,M65C02},
   "sta",  {INDIR  ,DUMY}, {0x91,0x00,M6502},
   "sta",  {ABS    ,DUMX}, {0x9d,0x95,M6502},
   "sta",  {ABS    ,DUMY}, {0x99,0x00,M6502},
@@ -190,9 +212,13 @@
   "stx",  {ABS    ,DUMY}, {0x00,0x96,M6502},
   "sty",  {ABS    ,    }, {0x8c,0x84,M6502},
   "sty",  {ABS    ,DUMX}, {0x00,0x94,M6502},
+  "stz",  {ABS    ,    }, {0x9c,0x64,M65C02},
+  "stz",  {ABS    ,DUMX}, {0x9e,0x74,M65C02},
   "tas",  {ABS    ,DUMY}, {0x9b,0x00,ILL},
   "tax",  {IMPLIED,    }, {0xaa,0x00,M6502},
   "tay",  {IMPLIED,    }, {0xa8,0x00,M6502},
+  "trb",  {ABS    ,    }, {0x1c,0x14,M65C02},
+  "tsb",  {ABS    ,    }, {0x0c,0x04,M65C02},
   "tsx",  {IMPLIED,    }, {0xba,0x00,M6502},
   "txa",  {IMPLIED,    }, {0x8a,0x00,M6502},
   "txs",  {IMPLIED,    }, {0x9a,0x00,M6502},
diff --git a/cpus/6800/cpu.c b/cpus/6800/cpu.c
new file mode 100644
index 0000000..f688008
--- /dev/null
+++ b/cpus/6800/cpu.c
@@ -0,0 +1,373 @@
+/*
+ * cpu.c 6800, 68hc11 cpu description file
+ * (c) in 2013-2015 by Esben Norby and Frank Wille
+ */
+
+#include "vasm.h"
+
+mnemonic mnemonics[] = {
+#include "opcodes.h"
+};
+
+int mnemonic_cnt = sizeof(mnemonics) / sizeof(mnemonics[0]);
+
+int		bitsperbyte = 8;
+int		bytespertaddr = 2;
+char *		cpu_copyright = "vasm 6800/68hc11 cpu backend 0.2a (c) 2013-2015 Esben Norby";
+char *		cpuname = "6800";
+
+static uint8_t	cpu_type = M6800;
+static int 	modifier;	/* set by find_base() */
+
+
+int
+init_cpu()
+{
+	return 1;
+}
+
+
+int
+cpu_args(char *p)
+{
+	if (!strncmp(p, "-m68", 4)) {
+		p += 4;
+		if (!strcmp(p, "00"))
+			cpu_type = M6800;
+		else if (!stricmp(p, "hc11"))
+			cpu_type = M68HC11;
+		else
+			return 0;
+	}
+	return 1;
+}
+
+
+char *
+parse_cpu_special(char *start)
+{
+	return start;
+}
+
+
+operand *
+new_operand()
+{
+	operand *new = mymalloc(sizeof(*new));
+	new->type = -1;
+	return new;
+}
+
+
+int
+parse_operand(char *p, int len, operand *op, int required)
+{
+	char *start = p;
+
+	op->value = NULL;
+
+	switch (required) {
+	    case IMM:
+	    case IMM16:
+		if (*p++ != '#')
+			return PO_NOMATCH;
+		p = skip(p);
+                /* fall through */
+	    case REL:
+	    case DATAOP:
+	    	op->value = parse_expr(&p);
+	    	break;
+
+	    case ADDR:
+		if (*p == '<') {
+			required = DIR;
+			p++;
+		}
+		else if (*p == '>') {
+			required = EXT;
+			p++;
+		}
+	    	op->value = parse_expr(&p);
+	    	break;
+
+	    case DIR:
+		if (*p == '>')
+			return PO_NOMATCH;
+		else if (*p == '<')
+			p++;
+	    	op->value = parse_expr(&p);
+		break;
+
+	    case EXT:
+		if (*p == '<')
+			return PO_NOMATCH;
+		else if (*p == '>')
+			p++;
+	    	op->value = parse_expr(&p);
+		break;
+
+	    case REGX:
+		if (toupper((unsigned char)*p++) != 'X')
+			return PO_NOMATCH;
+		break;
+	    case REGY:
+		if (toupper((unsigned char)*p++) != 'Y')
+			return PO_NOMATCH;
+		break;
+
+	    default:
+		return PO_NOMATCH;
+	}
+
+	op->type = required;
+	return PO_MATCH;
+}
+
+
+static size_t
+eval_oper(operand *op, section *sec, taddr pc, taddr offs, dblock *db)
+{
+	size_t size = 0;
+        symbol *base = NULL;
+        int btype;
+	taddr val;
+
+	if (op->value != NULL && !eval_expr(op->value, &val, sec, pc)) {
+		modifier = 0;
+		btype = find_base(op->value, &base, sec, pc);
+	}
+
+	switch (op->type) {
+	    case ADDR:
+		if (base != NULL || val < 0 || val > 0xff) {
+			op->type = EXT;
+			size = 2;
+		}
+		else {
+			op->type = DIR;
+			size = 1;
+		}
+		break;
+	    case DIR:
+		size = 1;
+		if (db != NULL && (val < 0 || val > 0xff))
+			cpu_error(1);  /* operand doesn't fit into 8-bits */
+                break;
+	    case IMM:
+		size = 1;
+		if (db != NULL && !modifier && (val < -0x80 || val > 0xff))
+			cpu_error(1);  /* operand doesn't fit into 8-bits */
+		break;
+	    case EXT:
+	    case IMM16:
+		size = 2;
+		break;
+	    case REL:
+		size = 1;
+		break;
+	}
+
+	if (size > 0 && db != NULL) {
+		/* create relocation entry and code for this operand */
+		if (base != NULL && btype == BASE_OK && op->type == REL) {
+			/* relative branches */
+			if (!is_pc_reloc(base, sec)) {
+				val = val - (pc + offs + 1);
+				if (val < -0x80 || val > 0x7f)
+					cpu_error(2); /* branch out of range */
+			}
+			else
+				add_nreloc(&db->relocs, base, val, REL_PC,
+				           8, offs << 3);
+		}
+		else if (base != NULL && btype != BASE_ILLEGAL) {
+			rlist *rl;
+
+			rl = add_nreloc(&db->relocs, base, val,
+			                btype==BASE_PCREL? REL_PC : REL_ABS,
+					size << 3, offs << 3);
+			switch (modifier) {
+			    case LOBYTE:
+				if (rl) ((nreloc *)rl->reloc)->mask = 0xff;
+				val &= 0xff;
+				break;
+			    case HIBYTE:
+				if (rl) ((nreloc *)rl->reloc)->mask = 0xff00;
+				val = (val >> 8) & 0xff;
+				break;
+			}
+		}
+		else if (base != NULL)
+			general_error(38);  /* illegal relocation */
+
+		if (size == 1) {
+			op->code[0] = val & 0xff;
+		}
+		else if (size == 2) {
+			op->code[0] = (val >> 8) & 0xff;
+			op->code[1] = val & 0xff;
+		}
+		else
+			ierror(0);
+	}
+	return (size);
+}
+
+
+size_t
+instruction_size(instruction *ip, section *sec, taddr pc)
+{
+	operand op;
+	int i;
+	size_t size;
+
+	size = (mnemonics[ip->code].ext.prebyte != 0) ? 2 : 1;
+
+	for (i = 0; i < MAX_OPERANDS && ip->op[i] != NULL; i++) {
+		op = *(ip->op[i]);
+		size += eval_oper(&op, sec, pc, size, NULL);
+	}
+
+	return (size);
+}
+
+
+dblock *
+eval_instruction(instruction *ip, section *sec, taddr pc)
+{
+	dblock *db = new_dblock();
+	uint8_t opcode;
+	uint8_t *d;
+	int i;
+	size_t size;
+
+	/* evaluate operands and determine instruction size */
+	opcode = mnemonics[ip->code].ext.opcode;
+	size = (mnemonics[ip->code].ext.prebyte != 0) ? 2 : 1;
+	for (i = 0; i < MAX_OPERANDS && ip->op[i] != NULL; i++) {
+		size += eval_oper(ip->op[i], sec, pc, size, db);
+		if (ip->op[i]->type == DIR)
+			opcode = mnemonics[ip->code].ext.dir_opcode;
+	}
+
+	/* allocate and fill data block */
+	db->size = size;
+	d = db->data = mymalloc(size);
+
+	if (mnemonics[ip->code].ext.prebyte != 0)
+		*d++ = mnemonics[ip->code].ext.prebyte;
+	*d++ = opcode;
+
+	/* write operands */
+	for (i = 0; i < MAX_OPERANDS && ip->op[i] != NULL; i++) {
+		switch (ip->op[i]->type) {
+		    case IMM:
+		    case DIR:
+		    case REL:
+			*d++ = ip->op[i]->code[0];
+			break;
+		    case IMM16:
+		    case EXT:
+			*d++ = ip->op[i]->code[0];
+			*d++ = ip->op[i]->code[1];
+			break;
+		}
+	}
+
+	return (db);
+}
+
+dblock *
+eval_data(operand *op, size_t bitsize, section *sec, taddr pc)
+{
+	dblock *db = new_dblock();
+	uint8_t *d;
+	taddr val;
+
+	if (bitsize != 8 && bitsize != 16)
+		cpu_error(0,bitsize);  /* data size not supported */
+
+	db->size = bitsize >> 3;
+	d = db->data = mymalloc(db->size);
+
+	if (!eval_expr(op->value, &val, sec, pc)) {
+		symbol *base;
+		int btype;
+		rlist *rl;
+
+		modifier = 0;
+		btype = find_base(op->value, &base, sec, pc);
+		if (btype==BASE_OK || (btype==BASE_PCREL && modifier==0)) {
+			rl = add_nreloc(&db->relocs, base, val,
+			                btype==BASE_PCREL ? REL_PC : REL_ABS,
+			                bitsize, 0);
+			switch (modifier) {
+			    case LOBYTE:
+				if (rl) ((nreloc *)rl->reloc)->mask = 0xff;
+				val &= 0xff;
+				break;
+			    case HIBYTE:
+				if (rl) ((nreloc *)rl->reloc)->mask = 0xff00;
+				val = (val >> 8) & 0xff;
+				break;
+			}
+		}
+		else if (btype != BASE_NONE)
+			general_error(38);  /* illegal relocation */
+	}
+
+	if (bitsize == 8) {
+		if (val < -0x80 || val > 0xff)
+			cpu_error(1);  /* operand doesn't fit into 8-bits */
+	}
+	else  /* 16 bits */
+		*d++ = (val >> 8) & 0xff;
+	*d = val & 0xff;
+
+	return (db);
+}
+
+
+int
+ext_unary_eval(int type, taddr val, taddr *result, int cnst)
+{
+	switch (type) {
+	    case LOBYTE:
+		*result = cnst ? (val & 0xff) : val;
+		return 1;
+	    case HIBYTE:
+		*result = cnst ? ((val >> 8) & 0xff) : val;
+		return 1;
+	    default:
+		break;
+	}
+
+	return 0;  /* unknown type */
+}
+
+
+int
+ext_find_base(symbol **base, expr *p, section *sec, taddr pc)
+{
+	/* addr/256 equals >addr, addr%256 and addr&255 equal <addr */
+	if (p->type==DIV || p->type==MOD) {
+		if (p->right->type==NUM && p->right->c.val==256)
+			p->type = p->type == DIV ? HIBYTE : LOBYTE;
+	}
+  	else if (p->type==BAND && p->right->type==NUM && p->right->c.val==255)
+		p->type = LOBYTE;
+
+	if (p->type==LOBYTE || p->type==HIBYTE) {
+		modifier = p->type;
+		return find_base(p->left,base,sec,pc);
+	}
+
+	return BASE_ILLEGAL;
+}
+
+
+int
+cpu_available(int idx)
+{
+	return (mnemonics[idx].ext.available & cpu_type) != 0;
+}
diff --git a/cpus/6800/cpu.h b/cpus/6800/cpu.h
new file mode 100644
index 0000000..7407fee
--- /dev/null
+++ b/cpus/6800/cpu.h
@@ -0,0 +1,79 @@
+/*
+ * cpu.c 6800, 68hc11 cpu description file
+ * (c) in 2013-2014 by Esben Norby and Frank Wille
+*/
+
+#define BIGENDIAN 1
+#define LITTLEENDIAN 0
+#define VASM_CPU_6800 1
+
+/* maximum number of operands for one mnemonic */
+#define MAX_OPERANDS 4
+
+/* maximum number of mnemonic-qualifiers per mnemonic */
+#define MAX_QUALIFIERS 0
+
+/* data type to represent a target-address */
+typedef int16_t taddr;
+typedef uint16_t utaddr;
+
+/* minimum instruction alignment */
+#define INST_ALIGN 1
+
+/* default alignment for n-bit data */
+#define DATA_ALIGN(n) 1
+
+/* operand class for n-bit data definitions */
+#define DATA_OPERAND(n) DATAOP
+
+/* returns true when instruction is valid for selected cpu */
+#define MNEMONIC_VALID(i) cpu_available(i)
+
+/* allow commas and blanks at the same time to separate instruction operands */
+#define OPERSEP_COMMA 1
+#define OPERSEP_BLANK 1
+
+/* we define two additional unary operations, '<' and '>' */
+int	ext_unary_eval(int,taddr,taddr *,int);
+int	ext_find_base(symbol **,expr *,section *,taddr);
+#define LOBYTE (LAST_EXP_TYPE+1)
+#define HIBYTE (LAST_EXP_TYPE+2)
+#define EXT_UNARY_NAME(s) (*s=='<'||*s=='>')
+#define EXT_UNARY_TYPE(s) (*s=='<'?LOBYTE:HIBYTE)
+#define EXT_UNARY_EVAL(t,v,r,c) ext_unary_eval(t,v,r,c)
+#define EXT_FIND_BASE(b,e,s,p) ext_find_base(b,e,s,p)
+
+/* type to store each operand */
+typedef struct {
+    uint16_t type;
+    uint8_t code[2];
+    expr *value;
+} operand;
+
+
+/* additional mnemonic data */
+typedef struct {
+    unsigned char prebyte;
+    unsigned char opcode;
+    unsigned char dir_opcode;  /* !=0 means optimization to DIR allowed */
+    uint8_t available;
+} mnemonic_extension;
+
+/* available */
+#define M6800   1
+#define M68HC11 2       /* standard 68HC11 instruction set */
+
+/* adressing modes */
+#define INH     0
+#define IMM	1	/* #$12 */		/* IMM ii */
+#define IMM16	2	/* #$1234 */		/* IMM jj kk */
+#define ADDR	3
+#define EXT	4				/* EXT hh */
+#define DIR	5				/* DIR dd */
+#define REL	6				/* REL rr */
+#define REGX	7
+#define REGY	8
+#define DATAOP	9	/* data operand */
+
+/* exported by cpu.c */
+int cpu_available(int);
diff --git a/cpus/6800/cpu_errors.h b/cpus/6800/cpu_errors.h
new file mode 100644
index 0000000..f752cc0
--- /dev/null
+++ b/cpus/6800/cpu_errors.h
@@ -0,0 +1,3 @@
+  "data size %d not supported",ERROR,
+  "operand doesn't fit into 8-bits",ERROR,
+  "branch destination out of range",ERROR,
diff --git a/cpus/6800/opcodes.h b/cpus/6800/opcodes.h
new file mode 100644
index 0000000..a3d0283
--- /dev/null
+++ b/cpus/6800/opcodes.h
@@ -0,0 +1,339 @@
+    "aba",  {INH		},	{0x00, 0x1B, 0x00, M6800|M68HC11},
+    "abx",  {INH		},	{0x00, 0x3A, 0x00, M68HC11},
+    "aby",  {INH		},	{0x18, 0x3A, 0x00, M68HC11},
+    "adca", {IMM		},	{0x00, 0x89, 0x00, M6800|M68HC11},
+    "adca", {ADDR		},	{0x00, 0xB9, 0x99, M6800|M68HC11},
+    "adca", {DIR, REGX		},	{0x00, 0x00, 0xA9, M6800|M68HC11},
+    "adca", {DIR, REGY		},	{0x18, 0x00, 0xA9, M68HC11},
+    "adcb", {IMM		},	{0x00, 0xC9, 0x00, M6800|M68HC11},
+    "adcb", {ADDR		},	{0x00, 0xF9, 0xD9, M6800|M68HC11},
+    "adcb", {DIR, REGX		},	{0x00, 0x00, 0xE9, M6800|M68HC11},
+    "adcb", {DIR, REGY		},	{0x18, 0x00, 0xE9, M68HC11},
+    "adda", {IMM		},	{0x00, 0x8B, 0x00, M6800|M68HC11},
+    "adda", {ADDR		},	{0x00, 0xBB, 0x9B, M6800|M68HC11},
+    "adda", {DIR, REGX		},	{0x00, 0x00, 0xAB, M6800|M68HC11},
+    "adda", {DIR, REGY		},	{0x18, 0x00, 0xAB, M68HC11},
+    "addb", {IMM		},	{0x00, 0xCB, 0x00, M6800|M68HC11},
+    "addb", {ADDR		},	{0x00, 0xFB, 0xDB, M6800|M68HC11},
+    "addb", {DIR, REGX		},	{0x00, 0x00, 0xEB, M6800|M68HC11},
+    "addb", {DIR, REGY		},	{0x18, 0x00, 0xEB, M68HC11},
+    "addd", {IMM16		},	{0x00, 0xC3, 0x00, M68HC11},
+    "addd", {ADDR		},	{0x00, 0xF3, 0xD3, M68HC11},
+    "addd", {DIR, REGX		},	{0x00, 0x00, 0xE3, M68HC11},
+    "addd", {DIR, REGY		},	{0x18, 0x00, 0xE3, M68HC11},
+    "anda", {IMM		},	{0x00, 0x84, 0x00, M6800|M68HC11},
+    "anda", {ADDR		},	{0x00, 0xB4, 0x94, M6800|M68HC11},
+    "anda", {DIR, REGX		},	{0x00, 0x00, 0xA4, M6800|M68HC11},
+    "anda", {DIR, REGY		},	{0x18, 0x00, 0xA4, M68HC11},
+    "andb", {IMM		},	{0x00, 0xC4, 0x00, M6800|M68HC11},
+    "andb", {ADDR		},	{0x00, 0xF4, 0xD4, M6800|M68HC11},
+    "andb", {DIR, REGX		},	{0x00, 0x00, 0xE4, M6800|M68HC11},
+    "andb", {DIR, REGY		},	{0x18, 0x00, 0xE4, M68HC11},
+    "asl",  {EXT		},	{0x00, 0x78, 0x00, M6800|M68HC11},
+    "asl",  {DIR, REGX		},	{0x00, 0x00, 0x68, M6800|M68HC11},
+    "asl",  {DIR, REGY		},	{0x18, 0x00, 0x68, M68HC11},
+    "asla", {INH		},	{0x00, 0x48, 0x00, M6800|M68HC11},
+    "aslb", {INH		},	{0x00, 0x58, 0x00, M6800|M68HC11},
+    "asld", {INH		},	{0x00, 0x05, 0x00, M6800|M68HC11},
+    "asr",  {EXT		},	{0x00, 0x77, 0x00, M6800|M68HC11},
+    "asr",  {DIR, REGX		},	{0x00, 0x00, 0x67, M6800|M68HC11},
+    "asr",  {DIR, REGY		},	{0x18, 0x00, 0x67, M68HC11},
+    "asra", {INH,		},	{0x00, 0x47, 0x00, M6800|M68HC11},
+    "asrb", {INH,		},	{0x00, 0x57, 0x00, M6800|M68HC11},
+
+    "bclr", {DIR, IMM		},	{0x00, 0x00, 0x15, M68HC11},
+    "bclr", {DIR, REGX, IMM	},	{0x00, 0x00, 0x1D, M68HC11},
+    "bclr", {DIR, REGY, IMM	},	{0x18, 0x00, 0x1D, M68HC11},
+
+    "bcc",  {REL,		},	{0x00, 0x24, 0x00, M6800|M68HC11},
+    "bcs",  {REL,		},	{0x00, 0x25, 0x00, M6800|M68HC11},
+    "beq",  {REL,		},	{0x00, 0x27, 0x00, M6800|M68HC11},
+    "bge",  {REL,		},	{0x00, 0x2C, 0x00, M6800|M68HC11},
+    "bgt",  {REL,		},	{0x00, 0x2E, 0x00, M6800|M68HC11},
+    "bhi",  {REL,		},	{0x00, 0x22, 0x00, M6800|M68HC11},
+    "bhs",  {REL,		},	{0x00, 0x24, 0x00, M6800|M68HC11},
+    "bita", {IMM		},	{0x00, 0x85, 0x00, M6800|M68HC11},
+    "bita", {ADDR,		},	{0x00, 0xB5, 0x95, M6800|M68HC11},
+    "bita", {DIR, REGX		},	{0x00, 0x00, 0xA5, M6800|M68HC11},
+    "bita", {DIR, REGY		},	{0x18, 0x00, 0xA5, M68HC11},
+    "bitb", {IMM		},	{0x00, 0xC5, 0x00, M6800|M68HC11},
+    "bitb", {ADDR,		},	{0x00, 0xF5, 0xD5, M6800|M68HC11},
+    "bitb", {DIR, REGX		},	{0x00, 0x00, 0xE5, M6800|M68HC11},
+    "bitb", {DIR, REGY		},	{0x18, 0x00, 0xE5, M68HC11},
+
+    "ble",  {REL,		},	{0x00, 0x2F, 0x00, M6800|M68HC11},
+    "blo",  {REL,		},	{0x00, 0x25, 0x00, M6800|M68HC11},
+    "bls",  {REL,		},	{0x00, 0x23, 0x00, M6800|M68HC11},
+    "blt",  {REL,		},	{0x00, 0x2D, 0x00, M6800|M68HC11},
+    "bmi",  {REL,		},	{0x00, 0x2B, 0x00, M6800|M68HC11},
+    "bne",  {REL,		},	{0x00, 0x26, 0x00, M6800|M68HC11},
+    "bpl",  {REL,		},	{0x00, 0x2A, 0x00, M6800|M68HC11},
+    "bra",  {REL,		},	{0x00, 0x20, 0x00, M6800|M68HC11},
+    "jr",   {REL,		},	{0x00, 0x20, 0x00, M6800|M68HC11},	/* bra */
+
+    "brclr",{DIR, IMM, REL	},	{0x00, 0x00, 0x13, M68HC11},
+    "brclr",{DIR, REGX, IMM, REL},	{0x00, 0x00, 0x1F, M68HC11},
+    "brclr",{DIR, REGY, IMM, REL},	{0x18, 0x00, 0x1F, M68HC11},
+
+    "brn",  {REL,		},	{0x00, 0x21, 0x00, M68HC11},
+
+    "brset",{DIR, IMM, REL	},	{0x00, 0x00, 0x12, M68HC11},
+    "brset",{DIR, REGX, IMM, REL},	{0x00, 0x00, 0x1E, M68HC11},
+    "brset",{DIR, REGY, IMM, REL},	{0x18, 0x00, 0x1E, M68HC11},
+
+    "bset", {DIR, IMM		},	{0x00, 0x00, 0x14, M68HC11},
+    "bset", {DIR, REGX, IMM	},	{0x00, 0x00 ,0x1C, M68HC11},
+    "bset", {DIR, REGY, IMM	},	{0x18, 0x00 ,0x1C, M68HC11},
+
+    "bsr",  {REL,		},	{0x00, 0x8D, 0x00, M6800|M68HC11},
+    "callr",{REL,		},	{0x00, 0x8D, 0x00, M6800|M68HC11},	/* bsr */
+    "bvc",  {REL,		},	{0x00, 0x28, 0x00, M6800|M68HC11},
+    "bvs",  {REL,		},	{0x00, 0x29, 0x00, M6800|M68HC11},
+    "cba",  {INH,		},	{0x00, 0x11, 0x00, M6800|M68HC11},
+    "clc",  {INH,		},	{0x00, 0x0C, 0x00, M6800|M68HC11},
+    "cli",  {INH,		},	{0x00, 0x0E, 0x00, M6800|M68HC11},
+    "ei",   {INH,		},	{0x00, 0x0E, 0x00, M6800|M68HC11},	/* cli */
+    "clr",  {EXT,		},	{0x00, 0x7F, 0x00, M6800|M68HC11},
+    "clr",  {DIR, REGX		},	{0x00, 0x00, 0x6F, M6800|M68HC11},
+    "clr",  {DIR, REGY		},	{0x18, 0x00, 0x6F, M68HC11},
+    "clra", {INH,		},	{0x00, 0x4F, 0x00, M6800|M68HC11},
+    "clrb", {INH,		},	{0x00, 0x5F, 0x00, M6800|M68HC11},
+    "clv",  {INH,		},	{0x00, 0x0A, 0x00, M6800|M68HC11},
+    "cmpa", {IMM		},	{0x00, 0x81, 0x00, M6800|M68HC11},
+    "cmpa", {ADDR,		},	{0x00, 0xB1, 0x91, M6800|M68HC11},
+    "cmpa", {DIR, REGX		},	{0x00, 0x00, 0xA1, M6800|M68HC11},
+    "cmpa", {DIR, REGY		},	{0x18, 0x00, 0xA1, M68HC11},
+    "cmpb", {IMM		},	{0x00, 0xC1, 0x00, M6800|M68HC11},
+    "cmpb", {ADDR,		},	{0x00, 0xF1, 0xD1, M6800|M68HC11},
+    "cmpb", {DIR, REGX		},	{0x00, 0x00, 0xE1, M6800|M68HC11},
+    "cmpb", {DIR, REGY		},	{0x18, 0x00, 0xE1, M68HC11},
+    "com",  {EXT,		},	{0x00, 0x73, 0x00, M6800|M68HC11},
+    "com",  {DIR, REGX		},	{0x00, 0x00, 0x63, M6800|M68HC11},
+    "com",  {DIR, REGY		},	{0x18, 0x00, 0x63, M68HC11},
+    "coma", {INH,		},	{0x00, 0x43, 0x00, M6800|M68HC11},
+    "comb", {INH,		},	{0x00, 0x53, 0x00, M6800|M68HC11},
+    "cpd",  {IMM16		},	{0x1A, 0x83, 0x00, M68HC11},
+    "cpd",  {ADDR,		},	{0x1A, 0xB3, 0x93, M68HC11},
+    "cpd",  {DIR, REGX		},	{0x1A, 0x00, 0xA3, M68HC11},
+    "cpd",  {DIR, REGY		},	{0xCD, 0x00, 0xA3, M68HC11},
+    "cmpd", {IMM16		},	{0x1A, 0x83, 0x00, M68HC11},	/* cpd */
+    "cmpd", {ADDR,		},	{0x1A, 0xB3, 0x93, M68HC11},	/* cpd */
+    "cmpd", {DIR, REGX		},	{0x1A, 0x00, 0xA3, M68HC11},	/* cpd */
+    "cmpd", {DIR, REGY		},	{0xCD, 0x00, 0xA3, M68HC11},	/* cpd */
+    "cpx",  {IMM16		},	{0x00, 0x8C, 0x00, M6800|M68HC11},
+    "cpx",  {ADDR,		},	{0x00, 0xBC, 0x9C, M6800|M68HC11},
+    "cpx",  {DIR, REGX		},	{0x00, 0x00, 0xAC, M6800|M68HC11},
+    "cpx",  {DIR, REGY		},	{0xCD, 0x00, 0xAC, M68HC11},
+    "cmpx", {IMM16		},	{0x00, 0x8C, 0x00, M6800|M68HC11},	/* cpx */
+    "cmpx", {ADDR,		},	{0x00, 0xBC, 0x9C, M6800|M68HC11},	/* cpx */
+    "cmpx", {DIR, REGX		},	{0x00, 0x00, 0xAC, M6800|M68HC11},	/* cpx */
+    "cmpx", {DIR, REGY		},	{0xCD, 0x00, 0xAC, M68HC11},	/* cpx */
+    "cpy",  {IMM16		},	{0x18, 0x8C, 0x00, M68HC11},
+    "cpy",  {ADDR,		},	{0x18, 0xBC, 0x9C, M68HC11},
+    "cpy",  {DIR, REGX		},	{0x1A, 0x00, 0xAC, M68HC11},
+    "cpy",  {DIR, REGY		},	{0x18, 0x00, 0xAC, M68HC11},
+    "cmpy", {IMM16		},	{0x18, 0x8C, 0x00, M68HC11},	/* cpy */
+    "cmpy", {ADDR,		},	{0x18, 0xBC, 0x9C, M68HC11},    /* cpy */
+    "cmpy", {DIR, REGX		},	{0x1A, 0x00, 0xAC, M68HC11},    /* cpy */
+    "cmpy", {DIR, REGY		},	{0x18, 0x00, 0xAC, M68HC11},    /* cpy */
+    "daa",  {INH,		},	{0x00, 0x19, 0x00, M6800|M68HC11},
+    "dec",  {EXT,		},	{0x00, 0x7A, 0x00, M6800|M68HC11},
+    "dec",  {DIR, REGX		},	{0x00, 0x00, 0x6A, M6800|M68HC11},
+    "dec",  {DIR, REGY		},	{0x18, 0x00, 0x6A, M68HC11},
+    "deca", {INH,		},	{0x00, 0x4A, 0x00, M6800|M68HC11},
+    "decb", {INH,		},	{0x00, 0x5A, 0x00, M6800|M68HC11},
+    "des",  {INH,		},	{0x00, 0x34, 0x00, M6800|M68HC11},
+    "decs", {INH,		},	{0x00, 0x34, 0x00, M6800|M68HC11},    /* des */
+    "dex",  {INH,		},	{0x00, 0x09, 0x00, M6800|M68HC11},
+    "decx", {INH,		},	{0x00, 0x09, 0x00, M6800|M68HC11},    /* dex */
+    "dey",  {INH,		},	{0x18, 0x09, 0x00, M68HC11},
+    "decy", {INH,		},	{0x18, 0x09, 0x00, M68HC11},	/* dey */
+    "eora", {IMM,		},	{0x00, 0x88, 0x00, M6800|M68HC11},
+    "eora", {ADDR,		},	{0x00, 0xB8, 0x98, M6800|M68HC11},
+    "eora", {DIR, REGX		},	{0x00, 0x00, 0xA8, M6800|M68HC11},
+    "eora", {DIR, REGY		},	{0x18, 0x00, 0xA8, M68HC11},
+    "xora", {IMM,		},	{0x00, 0x88, 0x00, M6800|M68HC11},	/* eora */
+    "xora", {ADDR,		},	{0x00, 0xB8, 0x98, M6800|M68HC11},    /* eora */
+    "xora", {DIR, REGX		},	{0x00, 0x00, 0xA8, M6800|M68HC11},    /* eora */
+    "xora", {DIR, REGY		},	{0x18, 0x00, 0xA8, M68HC11},    /* eora */
+    "eorb", {IMM,		},	{0x00, 0xC8, 0x00, M6800|M68HC11},
+    "eorb", {ADDR,		},	{0x00, 0xF8, 0xD8, M6800|M68HC11},
+    "eorb", {DIR, REGX		},	{0x00, 0x00, 0xE8, M6800|M68HC11},
+    "eorb", {DIR, REGY		},	{0x18, 0x00, 0xE8, M68HC11},
+    "xorb", {IMM,		},	{0x00, 0xC8, 0x00, M6800|M68HC11},	/* eorb */
+    "xorb", {ADDR,		},	{0x00, 0xF8, 0xD8, M6800|M68HC11},	/* eorb */
+    "xorb", {DIR, REGX		},	{0x00, 0x00, 0xE8, M6800|M68HC11},	/* eorb */
+    "xorb", {DIR, REGY		},	{0x18, 0x00, 0xE8, M68HC11},	/* eorb */
+    "fdiv", {INH,		},	{0x00, 0x03, 0x00, M68HC11},
+    "idiv", {INH,		},	{0x00, 0x02, 0x00, M68HC11},
+    "inc",  {EXT,		},	{0x00, 0x7C, 0x00, M6800|M68HC11},
+    "inc",  {DIR, REGX		},	{0x00, 0x00, 0x6C, M6800|M68HC11},
+    "inc",  {DIR, REGY		},	{0x18, 0x00, 0x6C, M68HC11},
+    "inca", {INH,		},	{0x00, 0x4C, 0x00, M6800|M68HC11},
+    "incb", {INH,		},	{0x00, 0x5C, 0x00, M6800|M68HC11},
+    "ins",  {INH,		},	{0x00, 0x31, 0x00, M6800|M68HC11},
+    "incs", {INH,		},	{0x00, 0x31, 0x00, M6800|M68HC11},	/* ins */
+    "inx",  {INH,		},	{0x00, 0x08, 0x00, M6800|M68HC11},
+    "incx", {INH,		},	{0x00, 0x08, 0x00, M6800|M68HC11},    /* inx */
+    "iny",  {INH,		},	{0x18, 0x08, 0x00, M68HC11},
+    "incy", {INH,		},	{0x18, 0x08, 0x00, M68HC11},	/* iny */
+    "jmp",  {EXT,		},	{0x00, 0x7E, 0x00, M6800|M68HC11},
+    "jmp",  {DIR, REGX		},	{0x00, 0x00, 0x6E, M6800|M68HC11},
+    "jmp",  {DIR, REGY		},	{0x18, 0x00, 0x6E, M68HC11},
+    "jsr",  {ADDR,		},	{0x00, 0xBD, 0x9D, M6800|M68HC11},
+    "jsr",  {DIR, REGX		},	{0x00, 0x00, 0xAD, M6800|M68HC11},
+    "jsr",  {DIR, REGY		},	{0x18, 0x00, 0xAD, M68HC11},
+    "call", {ADDR,		},	{0x00, 0xBD, 0x9D, M6800|M68HC11},	/* jsr */
+    "call", {DIR, REGX		},	{0x00, 0x00, 0xAD, M6800|M68HC11},	/* jsr */
+    "call", {DIR, REGY		},	{0x18, 0x00, 0xAD, M68HC11},	/* jsr */
+    "lda",  {IMM,		},	{0x00, 0x86, 0x00, M6800|M68HC11},
+    "lda",  {ADDR,		},	{0x00, 0xB6, 0x96, M6800|M68HC11},
+    "lda",  {DIR, REGX		},	{0x00, 0x00, 0xA6, M6800|M68HC11},
+    "lda",  {DIR, REGY		},	{0x18, 0x00, 0xA6, M68HC11},
+    "ldaa", {IMM,		},	{0x00, 0x86, 0x00, M6800|M68HC11},
+    "ldaa", {ADDR,		},	{0x00, 0xB6, 0x96, M6800|M68HC11},
+    "ldaa", {DIR, REGX		},	{0x00, 0x00, 0xA6, M6800|M68HC11},
+    "ldaa", {DIR, REGY		},	{0x18, 0x00, 0xA6, M68HC11},
+    "ldb",  {IMM,		},	{0x00, 0xC6, 0x00, M6800|M68HC11},
+    "ldb",  {ADDR,		},	{0x00, 0xF6, 0xD6, M6800|M68HC11},
+    "ldb",  {DIR, REGX		},	{0x00, 0x00, 0xE6, M6800|M68HC11},
+    "ldb",  {DIR, REGY		},	{0x18, 0x00, 0xE6, M68HC11},
+    "ldab", {IMM,		},	{0x00, 0xC6, 0x00, M6800|M68HC11},
+    "ldab", {ADDR,		},	{0x00, 0xF6, 0xD6, M6800|M68HC11},
+    "ldab", {DIR, REGX		},	{0x00, 0x00, 0xE6, M6800|M68HC11},
+    "ldab", {DIR, REGY		},	{0x18, 0x00, 0xE6, M68HC11},
+    "ldd",  {IMM16,		},	{0x00, 0xCC, 0x00, M68HC11},
+    "ldd",  {ADDR,		},	{0x00, 0xFC, 0xDC, M68HC11},
+    "ldd",  {DIR, REGX		},	{0x00, 0x00, 0xEC, M68HC11},
+    "ldd",  {DIR, REGY		},	{0x18, 0x00, 0xEC, M68HC11},
+    "lds",  {IMM16,		},	{0x00, 0x8E, 0x00, M6800|M68HC11},
+    "lds",  {ADDR,		},	{0x00, 0xBE, 0x9E, M6800|M68HC11},
+    "lds",  {DIR, REGX		},	{0x00, 0x00, 0xAE, M6800|M68HC11},
+    "lds",  {DIR, REGY		},	{0x18, 0x00, 0xAE, M68HC11},
+    "ldx",  {IMM16,		},	{0x00, 0xCE, 0x00, M6800|M68HC11},
+    "ldx",  {ADDR,		},	{0x00, 0xFE, 0xDE, M6800|M68HC11},
+    "ldx",  {DIR, REGX		},	{0x00, 0x00, 0xEE, M6800|M68HC11},
+    "ldx",  {DIR, REGY		},	{0xCD, 0x00, 0xEE, M68HC11},
+    "ldy",  {IMM16,		},	{0x18, 0xCE, 0x00, M68HC11},
+    "ldy",  {ADDR,		},	{0x18, 0xFE, 0xDE, M68HC11},
+    "ldy",  {DIR, REGX		},	{0x1A, 0x00, 0xEE, M68HC11},
+    "ldy",  {DIR, REGY		},	{0x18, 0x00, 0xEE, M68HC11},
+    "lsl",  {EXT,		},	{0x00, 0x78, 0x00, M6800|M68HC11},
+    "lsl",  {DIR, REGX		},	{0x00, 0x00, 0x68, M6800|M68HC11},
+    "lsl",  {DIR, REGY		},	{0x18, 0x00, 0x68, M68HC11},
+    "lsla", {INH,		},	{0x00, 0x48, 0x00, M6800|M68HC11},
+    "lslb", {INH,		},	{0x00, 0x58, 0x00, M6800|M68HC11},
+    "lsld", {INH,		},	{0x00, 0x05, 0x00, M68HC11},
+    "lsr",  {EXT,		},	{0x00, 0x74, 0x00, M6800|M68HC11},
+    "lsr",  {DIR, REGX		},	{0x00, 0x00, 0x64, M6800|M68HC11},
+    "lsr",  {DIR, REGY		},	{0x18, 0x00, 0x64, M68HC11},
+    "lsra", {INH,		},	{0x00, 0x44, 0x00, M6800|M68HC11},
+    "lsrb", {INH,		},	{0x00, 0x54, 0x00, M6800|M68HC11},
+    "lsrd", {INH,		},	{0x00, 0x04, 0x00, M68HC11},
+    "mul",  {INH,		},	{0x00, 0x3D, 0x00, M68HC11},
+    "neg",  {EXT,		},	{0x00, 0x70, 0x00, M6800|M68HC11},
+    "neg",  {DIR, REGX		},	{0x00, 0x00, 0x60, M6800|M68HC11},
+    "neg",  {DIR, REGY		},	{0x18, 0x00, 0x60, M68HC11},
+    "nega", {INH,		},	{0x00, 0x40, 0x00, M6800|M68HC11},
+    "negb", {INH,		},	{0x00, 0x50, 0x00, M6800|M68HC11},
+    "nop",  {INH,		},	{0x00, 0x01, 0x00, M6800|M68HC11},
+    "oraa", {IMM,		},	{0x00, 0x8A, 0x00, M6800|M68HC11},
+    "oraa", {ADDR,		},	{0x00, 0xBA, 0x9A, M6800|M68HC11},
+    "oraa", {DIR, REGX		},	{0x00, 0x00, 0xAA, M6800|M68HC11},
+    "oraa", {DIR, REGY		},	{0x18, 0x00, 0xAA, M68HC11},
+    "orab", {IMM,		},	{0x00, 0xCA, 0x00, M6800|M68HC11},
+    "orab", {ADDR,		},	{0x00, 0xFA, 0xDA, M6800|M68HC11},
+    "orab", {DIR, REGX		},	{0x00, 0x00, 0xEA, M6800|M68HC11},
+    "orab", {DIR, REGY		},	{0x18, 0x00, 0xEA, M68HC11},
+    "psha", {INH,		},	{0x00, 0x36, 0x00, M6800|M68HC11},
+    "pusha",{INH,		},	{0x00, 0x36, 0x00, M6800|M68HC11},	/* psha */
+    "pshb", {INH,		},	{0x00, 0x37, 0x00, M6800|M68HC11},
+    "pushb",{INH,		},	{0x00, 0x37, 0x00, M6800|M68HC11},    /* pshb */
+    "pshx", {INH,		},	{0x00, 0x3C, 0x00, M68HC11},
+    "pushx",{INH,		},	{0x00, 0x3C, 0x00, M68HC11},	/* pshx */
+    "pshy", {INH,		},	{0x18, 0x3C, 0x00, M68HC11},
+    "pushy", {INH,		},	{0x18, 0x3C, 0x00, M68HC11},	/* pshy */
+    "pula", {INH,		},	{0x00, 0x32, 0x00, M6800|M68HC11},
+    "popa", {INH,		},	{0x00, 0x32, 0x00, M6800|M68HC11},	/* pula */
+    "pulb", {INH,		},	{0x00, 0x33, 0x00, M6800|M68HC11},
+    "popb", {INH,		},	{0x00, 0x33, 0x00, M6800|M68HC11},    /* pulb */
+    "pulx", {INH,		},	{0x00, 0x38, 0x00, M68HC11},
+    "popx", {INH,		},	{0x00, 0x38, 0x00, M68HC11},	/* pulx */
+    "puly", {INH,		},	{0x18, 0x38, 0x00, M68HC11},
+    "popy", {INH,		},	{0x18, 0x38, 0x00, M68HC11},    /* puly */
+    "rol",  {EXT,		},	{0x00, 0x79, 0x00, M6800|M68HC11},
+    "rol",  {DIR, REGX		},	{0x00, 0x00, 0x69, M6800|M68HC11},
+    "rol",  {DIR, REGY		},	{0x18, 0x00, 0x69, M68HC11},
+    "rola", {INH,		},	{0x00, 0x49, 0x00, M6800|M68HC11},
+    "rolb", {INH,		},	{0x00, 0x59, 0x00, M6800|M68HC11},
+    "ror",  {EXT,		},	{0x00, 0x76, 0x00, M6800|M68HC11},
+    "ror",  {DIR, REGX		},	{0x00, 0x00, 0x66, M6800|M68HC11},
+    "ror",  {DIR, REGY		},	{0x18, 0x00, 0x66, M68HC11},
+    "rora", {INH,		},	{0x00, 0x46, 0x00, M6800|M68HC11},
+    "rorb", {INH,		},	{0x00, 0x56, 0x00, M6800|M68HC11},
+    "rti",  {INH,		},	{0x00, 0x3B, 0x00, M6800|M68HC11},
+    "reti", {INH,		},	{0x00, 0x3B, 0x00, M6800|M68HC11},	/* rti */
+    "rts",  {INH,		},	{0x00, 0x39, 0x00, M6800|M68HC11},
+    "ret",  {INH,		},	{0x00, 0x39, 0x00, M6800|M68HC11},	/* rts */
+    "sba",  {INH,		},	{0x00, 0x10, 0x00, M6800|M68HC11},
+    "sbca", {IMM,		},	{0x00, 0x82, 0x00, M6800|M68HC11},
+    "sbca", {ADDR,		},	{0x00, 0xB2, 0x92, M6800|M68HC11},
+    "sbca", {DIR, REGX		},	{0x00, 0x00, 0xA2, M6800|M68HC11},
+    "sbca", {DIR, REGY		},	{0x18, 0x00, 0xA2, M68HC11},
+    "sbcb", {IMM,		},	{0x00, 0xC2, 0x00, M6800|M68HC11},
+    "sbcb", {ADDR,		},	{0x00, 0xF2, 0xD2, M6800|M68HC11},
+    "sbcb", {DIR, REGX		},	{0x00, 0x00, 0xE2, M6800|M68HC11},
+    "sbcb", {DIR, REGY		},	{0x18, 0x00, 0xE2, M68HC11},
+    "sec",  {INH,		},	{0x00, 0x0D, 0x00, M6800|M68HC11},
+    "sei",  {INH,		},	{0x00, 0x0F, 0x00, M6800|M68HC11},
+    "di",   {INH,		},	{0x00, 0x0F, 0x00, M6800|M68HC11},	/* sei */
+    "sev",  {INH,		},	{0x00, 0x0B, 0x00, M6800|M68HC11},
+    "staa", {ADDR,		},	{0x00, 0xB7, 0x97, M6800|M68HC11},
+    "staa", {DIR, REGX		},	{0x00, 0x00, 0xA7, M6800|M68HC11},
+    "staa", {DIR, REGY		},	{0x18, 0x00, 0xA7, M68HC11},
+    "stab", {ADDR,		},	{0x00, 0xF7, 0xD7, M6800|M68HC11},
+    "stab", {DIR, REGX		},	{0x00, 0x00, 0xE7, M6800|M68HC11},
+    "stab", {DIR, REGY		},	{0x18, 0x00, 0xE7, M68HC11},
+    "std",  {ADDR,		},	{0x00, 0xFD, 0xDD, M68HC11},
+    "std",  {DIR, REGX		},	{0x00, 0x00, 0xED, M68HC11},
+    "std",  {DIR, REGY		},	{0x18, 0x00, 0xED, M68HC11},
+    "stop", {INH,		},	{0x00, 0xCF, 0x00, M68HC11},
+    "sts",  {ADDR,		},	{0x00, 0xBF, 0x9F, M6800|M68HC11},
+    "sts",  {DIR, REGX		},	{0x00, 0x00, 0xAF, M6800|M68HC11},
+    "sts",  {DIR, REGY		},	{0x18, 0x00, 0xAF, M68HC11},
+    "stx",  {ADDR,		},	{0x00, 0xFF, 0xDF, M6800|M68HC11},
+    "stx",  {DIR, REGX		},	{0x00, 0x00, 0xEF, M6800|M68HC11},
+    "stx",  {DIR, REGY		},	{0xCD, 0x00, 0xEF, M68HC11},
+    "sty",  {ADDR,		},	{0x18, 0xFF, 0xDF, M68HC11},
+    "sty",  {DIR, REGX		},	{0x1A, 0x00, 0xEF, M68HC11},
+    "sty",  {DIR, REGY		},	{0x18, 0x00, 0xEF, M68HC11},
+    "suba", {IMM,		},	{0x00, 0x80, 0x00, M6800|M68HC11},
+    "suba", {ADDR,		},	{0x00, 0xB0, 0x90, M6800|M68HC11},
+    "suba", {DIR, REGX		},	{0x00, 0x00, 0xA0, M6800|M68HC11},
+    "suba", {DIR, REGY		},	{0x18, 0x00, 0xA0, M68HC11},
+    "subb", {IMM,		},	{0x00, 0xC0, 0x00, M6800|M68HC11},
+    "subb", {ADDR,		},	{0x00, 0xF0, 0xD0, M6800|M68HC11},
+    "subb", {DIR, REGX		},	{0x00, 0x00, 0xE0, M6800|M68HC11},
+    "subb", {DIR, REGY		},	{0x18, 0x00, 0xE0, M68HC11},
+    "subd", {IMM16,		},	{0x00, 0x83, 0x00, M68HC11},
+    "subd", {ADDR,		},	{0x00, 0xB3, 0x93, M68HC11},
+    "subd", {DIR, REGX		},	{0x00, 0x00, 0xA3, M68HC11},
+    "subd", {DIR, REGY		},	{0x18, 0x00, 0xA3, M68HC11},
+    "swi",  {INH,		},	{0x00, 0x3F, 0x00, M6800|M68HC11},
+    "tab",  {INH,		},	{0x00, 0x16, 0x00, M6800|M68HC11},
+    "tap",  {INH,		},	{0x00, 0x06, 0x00, M6800|M68HC11},
+    "tba",  {INH,		},	{0x00, 0x17, 0x00, M6800|M68HC11},
+    "test", {INH,		},	{0x00, 0x00, 0x00, M68HC11},
+    "tpa",  {INH,		},	{0x00, 0x07, 0x00, M6800|M68HC11},
+    "tst",  {EXT,		},	{0x00, 0x7D, 0x00, M6800|M68HC11},
+    "tst",  {DIR, REGX		},	{0x00, 0x00, 0x6D, M6800|M68HC11},
+    "tst",  {DIR, REGY		},	{0x18, 0x00, 0x6D, M68HC11},
+    "tsta", {INH,		},	{0x00, 0x4D, 0x00, M6800|M68HC11},
+    "tstb", {INH,		},	{0x00, 0x5D, 0x00, M6800|M68HC11},
+    "tsx",  {INH,		},	{0x00, 0x30, 0x00, M6800|M68HC11},
+    "tsy",  {INH,		},	{0x18, 0x30, 0x00, M68HC11},
+    "txs",  {INH,		},	{0x00, 0x35, 0x00, M6800|M68HC11},
+    "tys",  {INH,		},	{0x18, 0x35, 0x00, M68HC11},
+    "wai",  {INH,		},	{0x00, 0x3E, 0x00, M6800|M68HC11},
+    "xgdx", {INH,		},	{0x00, 0x8F, 0x00, M68HC11},
+    "xgdy", {INH,		},	{0x18, 0x8F, 0x00, M68HC11},
diff --git a/cpus/arm/cpu.c b/cpus/arm/cpu.c
index cfc0472..514b165 100644
--- a/cpus/arm/cpu.c
+++ b/cpus/arm/cpu.c
@@ -1,6 +1,6 @@
 /*
 ** cpu.c ARM cpu-description file
-** (c) in 2004,2006,2010 by Frank Wille
+** (c) in 2004,2006,2010,2011,2014-2015 by Frank Wille
 */
 
 #include "vasm.h"
@@ -10,12 +10,12 @@ mnemonic mnemonics[] = {
 };
 int mnemonic_cnt = sizeof(mnemonics)/sizeof(mnemonics[0]);
 
-char *cpu_copyright = "vasm ARM cpu backend 0.2d (c) 2004,2006,2010 Frank Wille";
+char *cpu_copyright = "vasm ARM cpu backend 0.4a (c) 2004,2006,2010,2011,2014-2015 Frank Wille";
 char *cpuname = "ARM";
 int bitsperbyte = 8;
 int bytespertaddr = 4;
 
-unsigned long cpu_type = AAANY;
+uint32_t cpu_type = AAANY;
 int arm_be_mode = 0;  /* Little-endian is default */
 int thumb_mode = 0;   /* 1: Thumb instruction set (16 bit) is active */
 
@@ -29,11 +29,13 @@ static const char *condition_codes = "eqnecsccmiplvsvchilsgeltgtlealnvhsloul";
 static const char *addrmode_strings[] = {
   "da","ia","db","ib",
   "fa","fd","ea","ed",
-  "bt","tb","sb","sh","t","b","h","s","l",NULL,"<none>"
+  "bt","tb","sb","sh","t","b","h","s","l",
+  "p",NULL,"<none>"
 };
 enum {
   AM_DA=0,AM_IA,AM_DB,AM_IB,AM_FA,AM_FD,AM_EA,AM_ED,
-  AM_BT,AM_TB,AM_SB,AM_SH,AM_T,AM_B,AM_H,AM_S,AM_L,AM_NULL,AM_NONE
+  AM_BT,AM_TB,AM_SB,AM_SH,AM_T,AM_B,AM_H,AM_S,AM_L,
+  AM_P,AM_NULL,AM_NONE
 };
 
 #define NUM_SHIFTTYPES 6
@@ -43,7 +45,6 @@ static const char *shift_strings[NUM_SHIFTTYPES] = {
 
 static int OC_SWP,OC_NOP;
 static int elfoutput = 0;       /* output will be an ELF object file */
-static hashtable *regsymhash;   /* hash-table for ARM register symbols */
 
 static section *last_section = 0;
 static int last_data_type = -1; /* for mapping symbol generation */
@@ -62,21 +63,9 @@ operand *new_operand(void)
 }
 
 
-static int addregsym(char *sym,int val)
-/* add a new register symbol, return 0 if already exists */
+int cpu_available(int idx)
 {
-  hashdata data;
-  regsym *new;
-
-  if (find_name_nc(regsymhash,sym,&data))
-    return 0;
-
-  data.ptr = new = mymalloc(sizeof(regsym));
-  new->name = mymalloc(strlen(sym)+1);
-  strcpy(new->name,sym);
-  new->value = val;
-  add_hashentry(regsymhash,new->name,data);
-  return 1;
+  return (mnemonics[idx].ext.available & cpu_type) != 0;
 }
 
 
@@ -119,12 +108,14 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
 
   else {  /* ARM mode - we might have up to 2 different qualifiers */
     int len = s - inst;
+    char c = tolower((unsigned char)*inst);
 
     if (len > 2) {
-      if (*inst=='b' && strncmp(inst,"bic",3) && (len==3 || len==4)) {
+      if (c=='b' && strnicmp(inst,"bic",3) && (len==3 || len==4)) {
         *inst_len = len - 2;
       }
-      else if ((*inst=='u' || *inst=='s') && *(inst+1)=='m' && len>=5) {
+      else if ((c=='u' || c=='s') &&
+               tolower((unsigned char)*(inst+1))=='m' && len>=5) {
         *inst_len = 5;
       }
       else
@@ -138,7 +129,7 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
           const char *cc = condition_codes;
 
           while (*cc) {
-            if (*p==*cc && *(p+1)==*(cc+1))
+            if (!strnicmp(p,cc,2))
               break;
             cc += 2;
           }
@@ -153,12 +144,12 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
           const char **am = addrmode_strings;
 
           do {
-            if (len==strlen(*am) && !strncmp(*am,p,len))
+            if (len==strlen(*am) && !strnicmp(*am,p,len))
               break;
             am++;
           }
           while (*am);
-          if (*am!=NULL || (len==1 && *p=='s')) {
+          if (*am!=NULL || (len==1 && tolower((unsigned char)*p)=='s')) {
             ext[cnt] = p;
             ext_len[cnt++] = len;
           }
@@ -187,19 +178,17 @@ int set_default_qualifiers(char **q,int *q_len)
 static int parse_reg(char **pp)
 /* parse register, return -1 on error */
 {
-  hashdata data;
   char *p = *pp;
   char *name = p;
+  regsym *sym;
 
   if (ISIDSTART(*p)) {
     p++;
     while (ISIDCHAR(*p))
       p++;
-    if (find_namelen_nc(regsymhash,name,p-name,&data)) {
-      regsym *sym = data.ptr;
-
+    if (sym = find_regsym_nc(name,p-name)) {
       *pp = p;
-      return sym->value;
+      return sym->reg_num;
     }
   }
   return -1;  /* no valid register found */
@@ -209,7 +198,6 @@ static int parse_reg(char **pp)
 static int parse_reglist(char **pp)
 /* parse register-list, return -1 on error */
 {
-  hashdata data;
   int r=0,list=0,lastreg=-1;
   char *p = *pp;
   char *name;
@@ -223,13 +211,12 @@ static int parse_reglist(char **pp)
         name = p++;
         while (ISIDCHAR(*p))
           p++;
-        if (find_namelen_nc(regsymhash,name,p-name,&data)) {
-          sym = data.ptr;
-          r = sym->value;
+        if (sym = find_regsym_nc(name,p-name)) {
+          r = sym->reg_num;
           if (lastreg >= 0) {  /* range-mode? */
             if (lastreg < r) {
               r = lastreg;
-              lastreg = sym->value;
+              lastreg = sym->reg_num;
             }
             for (; r<=lastreg; list |= 1<<r++);
           }
@@ -271,7 +258,11 @@ int parse_operand(char *p,int len,operand *op,int optype)
   op->value = NULL;
   p = skip(p);
 
-  if (thumb_mode) {
+  if (optype == DATA64_OP) {
+    op->value = parse_expr_huge(&p);
+  }
+
+  else if (thumb_mode) {
     if (ARMOPER(optype)) {   /* standard ARM instruction */
       return PO_NOMATCH;
     }
@@ -540,18 +531,6 @@ int parse_operand(char *p,int len,operand *op,int optype)
 }
 
 
-static void addmaskedreloc(rlist **relocs,symbol *sym,taddr addend,
-                          int type,int offs,int size,taddr mask)
-{
-  rlist *rl;
-  nreloc *r;
-
-  rl = add_reloc(relocs,sym,addend,type,size,offs);
-  r = rl->reloc;
-  r->mask = mask;
-}
-
-
 static void create_mapping_symbol(int type,section *sec,taddr pc)
 /* create mapping symbol ($a, $t, $d) as required by ARM ELF ABI */
 {
@@ -577,19 +556,17 @@ static void create_mapping_symbol(int type,section *sec,taddr pc)
 }
 
 
-taddr eval_thumb_operands(instruction *ip,section *sec,taddr pc,
-                          unsigned short *insn,dblock *db)
+size_t eval_thumb_operands(instruction *ip,section *sec,taddr pc,
+                          uint16_t *insn,dblock *db)
 /* evaluate expressions and try to optimize THUMB instruction,
    return size of instruction */
 {
   operand op;
   mnemonic *mnemo = &mnemonics[ip->code];
   int opcnt = 0;
-  taddr isize = 2;
+  size_t isize = 2;
 
   if (insn) {
-    if (!(mnemo->ext.available & cpu_type))
-      cpu_error(0);  /* instruction not supported on selected architecture */
     if (pc & 1)
       cpu_error(27);  /* instruction at unaligned address */
 
@@ -601,23 +578,24 @@ taddr eval_thumb_operands(instruction *ip,section *sec,taddr pc,
       return 2;
     }
     else
-      *insn = (unsigned short)mnemo->ext.opcode;
+      *insn = (uint16_t)mnemo->ext.opcode;
   }
 
-  for (opcnt=0; ip->op[opcnt]!=NULL && opcnt<MAX_OPERANDS; opcnt++) {
+  for (opcnt=0; opcnt<MAX_OPERANDS && ip->op[opcnt]!=NULL; opcnt++) {
     taddr val;
     symbol *base = NULL;
+    int btype;
 
     op = *(ip->op[opcnt]);
     if (!eval_expr(op.value,&val,sec,pc))
-      base = find_base(op.value,sec,pc);
+      btype = find_base(op.value,&base,sec,pc);
 
     /* do optimizations first */
 
     if (op.type==TPCLW || THBRANCH(op.type)) {
       /* PC-relative offsets (take prefetch into account: PC+4) */
-      if (base) {
-        if (base->type==LABSYM && base->sec==sec) {
+      if (base!=NULL && btype==BASE_OK) {
+        if (!is_pc_reloc(base,sec)) {
           /* no relocation required, can be resolved immediately */
           if (op.type == TPCLW) {
             /* bit 1 of PC is forced to 0 */
@@ -654,15 +632,15 @@ taddr eval_thumb_operands(instruction *ip,section *sec,taddr pc,
           if (op.type == TBRHL) {
             val -= THB_PREFETCH;
             if (db) {
-              addmaskedreloc(&db->relocs,base,val,REL_PC,16+5,11,0xffe);
-              addmaskedreloc(&db->relocs,base,val,REL_PC,5,11,0x7ff000);
+              add_nreloc_masked(&db->relocs,base,val,REL_PC,11,16+5,0xffe);
+              add_nreloc_masked(&db->relocs,base,val,REL_PC,11,5,0x7ff000);
             }
           }
           else if (op.type == TPCLW) {
             /* val -= THB_PREFETCH;  @@@ only positive offsets allowed! */
             op.type = TUIMA;
             if (db)
-              addmaskedreloc(&db->relocs,base,val,REL_PC,8,8,0x3fc);
+              add_nreloc_masked(&db->relocs,base,val,REL_PC,8,8,0x3fc);
             base = NULL;  /* no more checks */
           }
           else if (insn)
@@ -784,12 +762,16 @@ taddr eval_thumb_operands(instruction *ip,section *sec,taddr pc,
         }
 
         if (base!=NULL && db!=NULL) {
-          if (op.type==TUIM5 || op.type==TUI5I)
-            addmaskedreloc(&db->relocs,base,val,REL_ABS,5,5,0x1f);
-          else if (op.type == TSWI8)
-            addmaskedreloc(&db->relocs,base,val,REL_ABS,8,8,0xff);
+          if (btype == BASE_OK) {
+            if (op.type==TUIM5 || op.type==TUI5I)
+              add_nreloc_masked(&db->relocs,base,val,REL_ABS,5,5,0x1f);
+            else if (op.type == TSWI8)
+              add_nreloc_masked(&db->relocs,base,val,REL_ABS,8,8,0xff);
+            else
+              cpu_error(6);  /* constant integer expression required */
+          }
           else
-            cpu_error(6);  /* constant integer expression required */
+            general_error(38);  /* illegal relocation */
         }
       }
 
@@ -830,11 +812,11 @@ taddr eval_thumb_operands(instruction *ip,section *sec,taddr pc,
 
 #define ROTFAIL (0xffffff)
 
-static unsigned long rotated_immediate(unsigned long val)
+static uint32_t rotated_immediate(uint32_t val)
 /* check if a 32-bit value can be represented as 8-bit-rotated,
    return ROTFAIL when impossible */
 {
-  unsigned long i,a;
+  uint32_t i,a;
 
   for (i=0; i<32; i+=2) {
     if ((a = val<<i | val>>(32-i)) <= 0xff)
@@ -844,14 +826,14 @@ static unsigned long rotated_immediate(unsigned long val)
 }
 
 
-static int negated_rot_immediate(unsigned long val,mnemonic *mnemo,
-                                 unsigned long *insn)
+static int negated_rot_immediate(uint32_t val,mnemonic *mnemo,
+                                 uint32_t *insn)
 /* check if negating the ALU-operation makes a valid 8-bit-rotated value,
    insert it into the current instruction, when successful */
 {
-  unsigned long neg = rotated_immediate(-val);
-  unsigned long inv = rotated_immediate(~val);
-  unsigned long op = (mnemo->ext.opcode & 0x01e00000) >> 21;
+  uint32_t neg = rotated_immediate(-val);
+  uint32_t inv = rotated_immediate(~val);
+  uint32_t op = (mnemo->ext.opcode & 0x01e00000) >> 21;
 
   switch (op) {
     /* AND <-> BIC */
@@ -884,11 +866,11 @@ static int negated_rot_immediate(unsigned long val,mnemonic *mnemo,
 }
 
 
-static unsigned long double_rot_immediate(unsigned long val,unsigned long *hi)
+static uint32_t double_rot_immediate(uint32_t val,uint32_t *hi)
 /* check if a 32-bit value can be represented by combining two
    8-bit rotated values, return ROTFAIL otherwise */
 {
-  unsigned long i,a;
+  uint32_t i,a;
 
   for (i=0; i<32; i+=2) {
     if (((a = val<<i | val>>(32-i)) & 0xff) != 0) {
@@ -915,7 +897,7 @@ static unsigned long double_rot_immediate(unsigned long val,unsigned long *hi)
 }
 
 
-static unsigned long calc_2nd_rot_opcode(unsigned long op)
+static uint32_t calc_2nd_rot_opcode(uint32_t op)
 /* calculates ALU operation for second instruction */
 {
   if (op == 13)
@@ -928,16 +910,16 @@ static unsigned long calc_2nd_rot_opcode(unsigned long op)
 }
 
 
-static int negated_double_rot_immediate(unsigned long val,unsigned long *insn)
+static int negated_double_rot_immediate(uint32_t val,uint32_t *insn)
 /* check if negating the ALU-operation and/or a second ADD/SUB operation
    makes a valid 8-bit-rotated value, insert it into the current
    instruction, when successful */
 {
-  unsigned long op = (*insn & 0x01e00000) >> 21;
+  uint32_t op = (*insn & 0x01e00000) >> 21;
 
   if ((op==2 || op==4 || op==13 || op==15) && insn!=NULL) {
     /* combined instructions only possible for ADD/SUB/MOV/MVN */
-    unsigned long lo,hi;
+    uint32_t lo,hi;
 
     *(insn+1) = *insn & ~0x01ef0000;
     *(insn+1) |= (*insn&0xf000) << 4;  /* Rn = Rd of first instruction */
@@ -955,17 +937,17 @@ static int negated_double_rot_immediate(unsigned long val,unsigned long *insn)
 }
 
 
-static unsigned long get_condcode(instruction *ip)
+static uint32_t get_condcode(instruction *ip)
 /* returns condition (bit 31-28) from instruction's qualifiers */
 {
   const char *cc = condition_codes;
   char *q;
 
   if (q = ip->qualifiers[0]) {
-    unsigned long code = 0;
+    uint32_t code = 0;
 
     while (*cc) {
-      if (*q==*cc && *(q+1)==*(cc+1) && *(q+2)=='\0')
+      if (!strnicmp(q,cc,2) && *(q+2)=='\0')
         break;
       cc += 2;
       code++;
@@ -997,7 +979,7 @@ static int get_addrmode(instruction *ip)
     int mode = AM_DA;
 
     do {
-      if (!strcmp(*am,q))
+      if (!stricmp(*am,q))
         break;
       am++;
       mode++;
@@ -1012,8 +994,8 @@ static int get_addrmode(instruction *ip)
 }
 
 
-taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
-                        unsigned long *insn,dblock *db)
+size_t eval_arm_operands(instruction *ip,section *sec,taddr pc,
+                         uint32_t *insn,dblock *db)
 /* evaluate expressions and try to optimize ARM instruction,
    return size of instruction */
 {
@@ -1022,20 +1004,23 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
   int am = get_addrmode(ip);
   int aa4ldst = 0;
   int opcnt = 0;
-  taddr isize = 4;
+  size_t isize = 4;
   taddr chkreg = -1;
 
   if (insn) {
-    if (!(mnemo->ext.available & cpu_type))
-      cpu_error(0);  /* instruction not supported on selected architecture */
     if (pc & 3)
       cpu_error(27);  /* instruction at unaligned address */
 
     *insn = mnemo->ext.opcode | get_condcode(ip);
 
-    if (mnemo->ext.flags & SETCC) {
-      if (am == AM_S)
-        *insn |= 0x00100000;  /* set-condition-codes flag */
+    if ((mnemo->ext.flags & SETCC)!=0 && am==AM_S)
+      *insn |= 0x00100000;  /* set-condition-codes flag */
+
+    if ((mnemo->ext.flags & SETPSR)!=0 && am==AM_P) {
+      /* Rd = R15 for changing the PSR. Recommended for ARM2/250/3 only. */
+      *insn |= 0x0000f000;
+      if (cpu_type & ~AA2)
+        cpu_error(28);  /* deprecated on 32-bit architectures */
     }
 
     if (!strcmp(mnemo->name,"ldr") || !strcmp(mnemo->name,"str")) {
@@ -1050,7 +1035,9 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
       else if (am==AM_SB || am==AM_H || am==AM_SH) {  /* arch.4 ldr/str */
         if (cpu_type & AA4UP) {
           /* take P-, I- and L-bit from previous standard instruction */
-          *insn = (*insn&0xf1100000) | ((*insn&0x02000000)>>3) | 0x90;
+          *insn = (*insn&0xf1100000)
+                  | (((*insn&0x02000000)^0x02000000)>>3) /* I-bit is flipped */
+                  | 0x90;
           if (am != AM_H) {
             if (*insn & 0x00100000)  /* load */
               *insn |= 0x40;  /* signed transfer */
@@ -1079,21 +1066,22 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
       aa4ldst = 1;
   }
 
-  for (opcnt=0; ip->op[opcnt]!=NULL && opcnt<MAX_OPERANDS; opcnt++) {
+  for (opcnt=0; opcnt<MAX_OPERANDS && ip->op[opcnt]!=NULL; opcnt++) {
     taddr val;
     symbol *base = NULL;
+    int btype;
 
     op = *(ip->op[opcnt]);
     if (!eval_expr(op.value,&val,sec,pc))
-      base = find_base(op.value,sec,pc);
+      btype = find_base(op.value,&base,sec,pc);
 
     /* do optimizations first */
 
     if (op.type==PCL12 || op.type==PCLRT ||
         op.type==PCLCP || op.type==BRA24) {
       /* PC-relative offsets (take prefetch into account: PC+8) */
-      if (base) {
-        if (base->type==LABSYM && base->sec==sec) {
+      if (base!=NULL && btype==BASE_OK) {
+        if (!is_pc_reloc(base,sec)) {
           /* no relocation required, can be resolved immediately */
           val -= pc + 8;
 
@@ -1110,6 +1098,10 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
               if ((!aa4ldst && val<0x1000 && val>-0x1000) ||
                   (aa4ldst && val<0x100 && val>-0x100)) {
                 op.type = IMUD2;  /* handle as normal #+/-Imm12 */
+                if (val < 0)
+                  val = -val;
+                else
+                  op.flags |= OFL_UP;
                 base = NULL;  /* no more checks */
               }
               else {
@@ -1141,10 +1133,11 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
                     *(insn+1) |= (*insn & 0xf000) << 4;
                     insn++;
                   }
-                  if (aa4ldst)
-                    val = (val<0) ? -((-val)&0xff) : (val&0xff);
+                  if (val < 0)
+                    val = -val;
                   else
-                    val = (val<0) ? -((-val)&0xfff) : (val&0xfff);
+                    op.flags |= OFL_UP;
+                  val = aa4ldst ? (val & 0xff) : (val & 0xfff);
                   isize += 4;
                   op.type = IMUD2;
                   base = NULL;  /* no more checks */
@@ -1160,6 +1153,10 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
             case PCLCP:
               if (val<0x400 && val>-0x400) {
                 op.type = IMCP2;  /* handle as normal #+/-Imm10>>2 */
+                if (val < 0)
+                  val = -val;
+                else
+                  op.flags |= OFL_UP;
                 base = NULL;  /* no more checks */
               }
               else {
@@ -1184,7 +1181,7 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
               }
               else if (opt_adr || am==AM_L) {
                 /* ADRL or optimize ADR automatically to ADRL */
-                unsigned long hi,lo;
+                uint32_t hi,lo;
 
                 isize += 4;
                 if ((lo = double_rot_immediate(val,&hi)) != ROTFAIL) {
@@ -1198,10 +1195,10 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
                   }
                 }
                 else if (insn)
-                  cpu_error(5,(unsigned long)val); /* Cannot make rot.immed.*/
+                  cpu_error(5,(uint32_t)val); /* Cannot make rot.immed.*/
               }
               else if (insn)
-                cpu_error(5,(unsigned long)val);  /* Cannot make rot.immed.*/
+                cpu_error(5,(uint32_t)val);  /* Cannot make rot.immed.*/
               break;
 
             default:
@@ -1214,13 +1211,13 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
             case BRA24:
               val -= ARM_PREFETCH;
               if (db)
-                addmaskedreloc(&db->relocs,base,val,REL_PC,8,24,0x3fffffc);
+                add_nreloc_masked(&db->relocs,base,val,REL_PC,24,8,0x3fffffc);
               break;
             case PCL12:
               op.type = IMUD2;
               if (db) {
                 if (val<0x1000 && val>-0x1000) {
-                  addmaskedreloc(&db->relocs,base,val,REL_PC,20,12,0x1fff);
+                  add_nreloc_masked(&db->relocs,base,val,REL_PC,12,20,0x1fff);
                   base = NULL;  /* don't add another REL_ABS below */
                 }
                 else
@@ -1238,13 +1235,13 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
                 if (insn!=NULL && db!=NULL) {
                   *(insn+1) = *insn & ~0xf0000;
                   *(insn+1) |= (*insn&0xf000) << 4;
-                  addmaskedreloc(&db->relocs,base,val,REL_PC,24,8,0xff00);
-                  addmaskedreloc(&db->relocs,base,val,REL_PC,32+24,8,0xff);
+                  add_nreloc_masked(&db->relocs,base,val,REL_PC,8,24,0xff00);
+                  add_nreloc_masked(&db->relocs,base,val,REL_PC,8,32+24,0xff);
                 }
               }
               else if (val == 0) {  /* ADR */
                 if (db)
-                  addmaskedreloc(&db->relocs,base,val,REL_PC,24,8,0xff);
+                  add_nreloc_masked(&db->relocs,base,val,REL_PC,8,24,0xff);
               }
               else if (db)
                 cpu_error(22); /* operation not allowed on external symbols */
@@ -1261,10 +1258,11 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
     }
 
     else if (op.type == IMROT) {
+      op.type = NOOP;  /* is handled here */
+
       if (base == NULL) {
-        unsigned long rotval;
+        uint32_t rotval;
 
-        op.type = NOOP;  /* is handled here */
         if ((rotval = rotated_immediate(val)) != ROTFAIL) {
           if (insn)
             *insn |= rotval;
@@ -1274,7 +1272,7 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
           isize += 4;
           if (insn) {
             if (!negated_double_rot_immediate(val,insn))
-              cpu_error(7,(unsigned long)val); /* const not suitable */
+              cpu_error(7,(uint32_t)val); /* const not suitable */
           }
         }
       }
@@ -1363,17 +1361,21 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
           *insn |= 0x00800000;  /* set UP-flag */
 
         if (base) {
-          if (base->type == IMPORT) {
-            if (!aa4ldst) {
-              /* @@@ does this make any sense? */
-              *insn |= 0x00800000;  /* only UP */
-              addmaskedreloc(&db->relocs,base,val,REL_ABS,20,12,0xfff);
+          if (btype == BASE_OK) {
+            if (EXTREF(base)) {
+              if (!aa4ldst) {
+                /* @@@ does this make any sense? */
+                *insn |= 0x00800000;  /* only UP */
+                add_nreloc_masked(&db->relocs,base,val,REL_ABS,12,20,0xfff);
+              }
+              else
+                cpu_error(22); /* operation not allowed on external symbols */
             }
             else
-              cpu_error(22); /* operation not allowed on external symbols */
+              cpu_error(6);  /* constant integer expression required */
           }
           else
-            cpu_error(6);  /* constant integer expression required */
+            general_error(38);  /* illegal relocation */
         }
       }
 
@@ -1402,7 +1404,7 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
         if (val>=0 && val<0x1000000) {
           *insn |= val;
           if (base!=NULL && db!=NULL)
-            addmaskedreloc(&db->relocs,base,val,REL_ABS,8,24,0xffffff);
+            add_nreloc_masked(&db->relocs,base,val,REL_ABS,24,8,0xffffff);
         }
         else
           cpu_error(16);  /* 24-bit unsigned immediate expected */
@@ -1498,7 +1500,7 @@ taddr eval_arm_operands(instruction *ip,section *sec,taddr pc,
 }
 
 
-taddr instruction_size(instruction *ip,section *sec,taddr pc)
+size_t instruction_size(instruction *ip,section *sec,taddr pc)
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
 {
@@ -1524,7 +1526,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
   inst_type = (mnemonics[ip->code].ext.flags & THUMB) ? TYPE_THUMB : TYPE_ARM;
 
   if (inst_type == TYPE_THUMB) {
-    unsigned short insn[2];
+    uint16_t insn[2];
 
     if (db->size = eval_thumb_operands(ip,sec,pc,insn,db)) {
       unsigned char *d = db->data = mymalloc(db->size);
@@ -1536,7 +1538,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
   }
 
   else {  /* ARM mode */
-    unsigned long insn[2];
+    uint32_t insn[2];
 
     if (db->size = eval_arm_operands(ip,sec,pc,insn,db)) {
       unsigned char *d = db->data = mymalloc(db->size);
@@ -1554,7 +1556,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 }
 
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
 {
   dblock *db = new_dblock();
@@ -1565,35 +1567,46 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
     last_data_type = -1;
   }
 
-  if ((bitsize & 7) || bitsize > 32)
+  if ((bitsize & 7) || bitsize > 64)
     cpu_error(17,bitsize);  /* data size not supported */
 
-  if (op->type != DATA_OP)
+  if (op->type!=DATA_OP && op->type!=DATA64_OP)
     ierror(0);
 
   db->size = bitsize >> 3;
   db->data = mymalloc(db->size);
 
-  if (!eval_expr(op->value,&val,sec,pc)) {
-    symbol *base = find_base(op->value,sec,pc);
+  if (op->type == DATA64_OP) {
+    thuge hval;
 
-    if (base)
-      add_reloc(&db->relocs,base,val,REL_ABS,bitsize,0);
-    else
-      cpu_error(28);  /* illegal relocation */
+    if (!eval_expr_huge(op->value,&hval))
+      general_error(59);  /* cannot evaluate huge integer */
+    huge_to_mem(arm_be_mode,db->data,db->size,hval);
   }
-
-  switch (db->size) {
-    case 1:
-      db->data[0] = val & 0xff;
-      break;
-    case 2:
-    case 4:
-      setval(arm_be_mode,db->data,db->size,val);
-      break;
-    default:
-      ierror(0);
-      break;
+  else {
+    if (!eval_expr(op->value,&val,sec,pc)) {
+      symbol *base;
+      int btype;
+
+      btype = find_base(op->value,&base,sec,pc);
+      if (base)
+        add_nreloc(&db->relocs,base,val,
+                   btype==BASE_PCREL?REL_PC:REL_ABS,bitsize,0);
+      else if (btype != BASE_NONE)
+        general_error(38);  /* illegal relocation */
+    }
+    switch (db->size) {
+      case 1:
+        db->data[0] = val & 0xff;
+        break;
+      case 2:
+      case 4:
+        setval(arm_be_mode,db->data,db->size,val);
+        break;
+      default:
+        ierror(0);
+        break;
+    }
   }
 
   if (last_data_type != TYPE_DATA)
@@ -1619,33 +1632,32 @@ int init_cpu()
     elfoutput = 1;
 
   /* define register symbols */
-  regsymhash = new_hashtable(REGSYMHTSIZE);
   for (i=0; i<16; i++) {
     sprintf(r,"r%d",i);
-    addregsym(r,i);
+    new_regsym(0,1,r,0,0,i);
     sprintf(r,"c%d",i);
-    addregsym(r,i);
+    new_regsym(0,1,r,0,0,i);
     sprintf(r,"p%d",i);
-    addregsym(r,i);
+    new_regsym(0,1,r,0,0,i);
   }
   /* ATPCS synonyms */
   for (i=0; i<8; i++) {
     if (i < 4) {
       sprintf(r,"a%d",i+1);
-      addregsym(r,i);
+      new_regsym(0,1,r,0,0,i);
     }
     sprintf(r,"v%d",i+1);
-    addregsym(r,i+4);
+    new_regsym(0,1,r,0,0,i+4);
   }
   /* well known aliases */
-  addregsym("wr",7);
-  addregsym("sb",9);
-  addregsym("sl",10);
-  addregsym("fp",11);
-  addregsym("ip",12);
-  addregsym("sp",13);
-  addregsym("lr",14);
-  addregsym("pc",15);
+  new_regsym(0,1,"wr",0,0,7);
+  new_regsym(0,1,"sb",0,0,9);
+  new_regsym(0,1,"sl",0,0,10);
+  new_regsym(0,1,"fp",0,0,11);
+  new_regsym(0,1,"ip",0,0,12);
+  new_regsym(0,1,"sp",0,0,13);
+  new_regsym(0,1,"lr",0,0,14);
+  new_regsym(0,1,"pc",0,0,15);
 
   return 1;
 }
diff --git a/cpus/arm/cpu.h b/cpus/arm/cpu.h
index fde1fd0..d9eab20 100644
--- a/cpus/arm/cpu.h
+++ b/cpus/arm/cpu.h
@@ -1,5 +1,5 @@
 /* cpu.h ARM cpu-description header-file */
-/* (c) in 2004 by Frank Wille */
+/* (c) in 2004,2014 by Frank Wille */
 
 #define LITTLEENDIAN (!arm_be_mode)
 #define BIGENDIAN (arm_be_mode)
@@ -16,7 +16,8 @@
 #define END_PARENTH(x) ((x)==')' || (x)=='}')
 
 /* data type to represent a target-address */
-typedef long taddr;
+typedef int32_t taddr;
+typedef uint32_t utaddr;
 
 /* minimum instruction alignment */
 #define INST_ALIGN (thumb_mode ? 2 : 4)
@@ -25,13 +26,16 @@ typedef long taddr;
 #define DATA_ALIGN(n) ((n)<=8 ? 1 : ((n)<=16 ? 2 : 4))
 
 /* operand class for n-bit data definitions */
-#define DATA_OPERAND(n) DATA_OP
+#define DATA_OPERAND(n) (n==64 ? DATA64_OP : DATA_OP)
+
+/* returns true when instruction is valid for selected cpu */
+#define MNEMONIC_VALID(i) cpu_available(i)
 
 
 /* type to store each operand */
 typedef struct {
-  unsigned short type;        /* type of operand from mnemonic.operand_type */
-  unsigned short flags;       /* see below */
+  uint16_t type;              /* type of operand from mnemonic.operand_type */
+  uint16_t flags;             /* see below */
   expr *value;                /* single register, immed. val. or branch loc.*/
 } operand;
 
@@ -49,6 +53,7 @@ enum {
   /* ARM operands */
   NOOP=0,
   DATA_OP,    /* data operand */
+  DATA64_OP,  /* 64-bit data operand (greater than taddr) */
   BRA24,      /* 24-bit branch offset to label */
   PCL12,      /* 12-bit PC-relative offset with up/down-flag to label */
   PCLCP,      /* 8-bit * 4 PC-relative offset with up/down-flag to label */
@@ -134,9 +139,9 @@ enum {
 
 /* additional mnemonic data */
 typedef struct {
-  unsigned long opcode;
-  unsigned long available;
-  unsigned long flags;
+  uint32_t opcode;
+  uint32_t available;
+  uint32_t flags;
 } mnemonic_extension;
 
 /* flags: */
@@ -148,15 +153,13 @@ typedef struct {
 #define NOPCR03   (0x00000020)  /* R15 is not allowed for Rm (3..0) */
 #define NOPCWB    (0x00000040)  /* R15 is not allowed in Write-Back mode */
 #define SETCC     (0x00000100)  /* instruction supports S-bit */
+#define SETPSR    (0x00000200)  /* instruction supports P-bit */
 #define THUMB     (0x10000000)  /* THUMB instruction */
 
 
 /* register symbols */
+#define HAVE_REGSYMS
 #define REGSYMHTSIZE 256
-typedef struct regsym {
-  char *name;
-  int value;  /* usually 0-15 for r0-r15 */
-} regsym;
 
 
 /* cpu types for availability check */
@@ -204,3 +207,5 @@ typedef struct regsym {
 /* exported by cpu.c */
 extern int arm_be_mode;
 extern int thumb_mode;
+
+int cpu_available(int);
diff --git a/cpus/arm/cpu_errors.h b/cpus/arm/cpu_errors.h
index e99f1c4..9679029 100644
--- a/cpus/arm/cpu_errors.h
+++ b/cpus/arm/cpu_errors.h
@@ -26,4 +26,4 @@
   "%d-bit unsigned immediate offset out of range (%ld)",ERROR,          /*25*/
   "offset has to be a multiple of %d",ERROR,
   "instruction at unaligned address",ERROR,
-  "illegal relocation",ERROR,
+  "TSTP/TEQP/CMNP/CMPP deprecated on 32-bit architectures",WARNING,
diff --git a/cpus/arm/opcodes.h b/cpus/arm/opcodes.h
index aa26ad0..e7798e5 100644
--- a/cpus/arm/opcodes.h
+++ b/cpus/arm/opcodes.h
@@ -52,13 +52,13 @@
     "bx",   {THR05},                              {0x4740,AA4TUP,THUMB},
   "cdp",    {REG11,CPOP4,REG15,REG19,REG03},      {0x0e000000,AA2UP,0},
   "cdp",    {REG11,CPOP4,REG15,REG19,REG03,CPTYP},{0x0e000000,AA2UP,0},
-  "cmn",    {REG19,IMROT},                        {0x03700000,AAANY,0},
-  "cmn",    {REG19,REG03},                        {0x01700000,AAANY,0},
-  "cmn",    {REG19,REG03,SHIFT},                  {0x01700000,AAANY,0},
+  "cmn",    {REG19,IMROT},                        {0x03700000,AAANY,SETPSR},
+  "cmn",    {REG19,REG03},                        {0x01700000,AAANY,SETPSR},
+  "cmn",    {REG19,REG03,SHIFT},                  {0x01700000,AAANY,SETPSR},
     "cmn",  {TRG02,TRG05},                        {0x42c0,AA4TUP,THUMB},
-  "cmp",    {REG19,IMROT},                        {0x03500000,AAANY,0},
-  "cmp",    {REG19,REG03},                        {0x01500000,AAANY,0},
-  "cmp",    {REG19,REG03,SHIFT},                  {0x01500000,AAANY,0},
+  "cmp",    {REG19,IMROT},                        {0x03500000,AAANY,SETPSR},
+  "cmp",    {REG19,REG03},                        {0x01500000,AAANY,SETPSR},
+  "cmp",    {REG19,REG03,SHIFT},                  {0x01500000,AAANY,SETPSR},
     "cmp",  {TRG10,TUIM8},                        {0x2800,AA4TUP,THUMB},
     "cmp",  {TRG02,TRG05},                        {0x4280,AA4TUP,THUMB},
     "cmp",  {TRG02,THR05},                        {0x4540,AA4TUP,THUMB},
@@ -170,12 +170,12 @@
   "swi",    {SWI24},                              {0x0f000000,AAANY,0},
     "swi",  {TSWI8},                              {0xdf00,AA4TUP,THUMB},
   "swp",    {REG15,REG03,R19PO},                  {0x01000090,AA3UP,NOPC},
-  "teq",    {REG19,IMROT},                        {0x03300000,AAANY,0},
-  "teq",    {REG19,REG03},                        {0x01300000,AAANY,0},
-  "teq",    {REG19,REG03,SHIFT},                  {0x01300000,AAANY,0},
-  "tst",    {REG19,IMROT},                        {0x03100000,AAANY,0},
-  "tst",    {REG19,REG03},                        {0x01100000,AAANY,0},
-  "tst",    {REG19,REG03,SHIFT},                  {0x01100000,AAANY,0},
+  "teq",    {REG19,IMROT},                        {0x03300000,AAANY,SETPSR},
+  "teq",    {REG19,REG03},                        {0x01300000,AAANY,SETPSR},
+  "teq",    {REG19,REG03,SHIFT},                  {0x01300000,AAANY,SETPSR},
+  "tst",    {REG19,IMROT},                        {0x03100000,AAANY,SETPSR},
+  "tst",    {REG19,REG03},                        {0x01100000,AAANY,SETPSR},
+  "tst",    {REG19,REG03,SHIFT},                  {0x01100000,AAANY,SETPSR},
     "tst",  {TRG02,TRG05},                        {0x4200,AA4TUP,THUMB},
   "umlal",  {REG15,REG19,REG03,REG11},            {0x00a00090,AA3MUP,SETCC|NOPC|DIFR19|DIFR15|DIFR03},
   "umull",  {REG15,REG19,REG03,REG11},            {0x00800090,AA3MUP,SETCC|NOPC|DIFR19|DIFR15|DIFR03},
diff --git a/cpus/c16x/cpu.c b/cpus/c16x/cpu.c
index 64ad7e6..da65530 100644
--- a/cpus/c16x/cpu.c
+++ b/cpus/c16x/cpu.c
@@ -295,15 +295,16 @@ int parse_operand(char *p,int len,operand *op,int requires)
 static taddr reloffset(expr *tree,section *sec,taddr pc)
 {
   symbol *sym;
+  int btype;
   taddr val;
   simplify_expr(tree);
   if(tree->type==NUM){
     /* should we do it like this?? */
     val=tree->c.val;
   }else{
-    sym=find_base(tree,sec,pc);
-    if(!sym||sym->type!=LABSYM||sym->sec!=sec)
-      return 0xffff;
+    btype=find_base(tree,&sym,sec,pc);
+    if(btype!=BASE_OK||!LOCREF(sym)||sym->sec!=sec)
+      val=0xffff;
     else{
       eval_expr(tree,&val,sec,pc);
       val=val-pc;
@@ -328,30 +329,21 @@ static taddr absoffset2(expr *tree,int mod,section *sec,taddr pc,rlist **relocs,
     mask=0x3fff;
   }
   if(!eval_expr(tree,&val,sec,pc)){
-    nreloc *reloc=new_nreloc();
-    rlist *rl=mymalloc(sizeof(*rl));
-    rl->type=REL_ABS;
-    reloc->offset=roffset;
-    reloc->size=size;
-    reloc->sym=find_base(tree,sec,pc);
-    reloc->mask=mask;
-    if(!reloc->sym){
-      cpu_error(2);
-    }else{
-      rl->reloc=reloc;
-      rl->next=*relocs;
-      *relocs=rl;
+    taddr addend=val;
+    symbol *base;
+    if(find_base(tree,&base,sec,pc)!=BASE_OK){
+      general_error(38);
+      return val;
     }
-    reloc->addend=val;
     if(mod==MOD_DPP1) val|=0x4000;
     if(mod==MOD_DPP2) val|=0x8000;
     if(mod==MOD_DPP3) val|=0xc000;
     if(mod==MOD_DPPX){
       static int dpplen;
       static char *dppname;
-      char *id=reloc->sym->name;
+      char *id=base->name;
       symbol *dppsym;
-      reloc->size-=2;
+      size-=2;
       if(strlen(id)+9>dpplen){
         myfree(dppname);
         dppname=mymalloc(dpplen=strlen(id)+9);
@@ -364,19 +356,10 @@ static taddr absoffset2(expr *tree,int mod,section *sec,taddr pc,rlist **relocs,
           ierror(0);
         val<<=14;
       }else{
-        reloc=new_nreloc();
-        reloc->offset=roffset+14;
-        reloc->size=2;
-        reloc->sym=dppsym;
-        reloc->mask=0x3;
-        reloc->addend=0;
-        rl->next=mymalloc(sizeof(*rl));
-        rl=rl->next;
-        rl->type=REL_ABS;
-        rl->reloc=reloc;
-        rl->next=0;
+        add_nreloc_masked(relocs,dppsym,0,REL_ABS,2,roffset+14,0x3);
       }
     }
+    add_nreloc_masked(relocs,base,addend,REL_ABS,size,roffset,mask);
     return val;
   }
   val&=mask;
@@ -643,7 +626,7 @@ dblock *eval_instruction(instruction *p,section *sec,taddr pc)
 }
 
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 {
   dblock *new=new_dblock();
   taddr val;
@@ -670,7 +653,7 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
 
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
-taddr instruction_size(instruction *p,section *sec,taddr pc)
+size_t instruction_size(instruction *p,section *sec,taddr pc)
 {
   int c=translate(p,sec,pc),add=0;
   if(c&JMPCONV){ add=4;c&=~JMPCONV;}
diff --git a/cpus/c16x/cpu.h b/cpus/c16x/cpu.h
index fed9ff0..9b282dd 100644
--- a/cpus/c16x/cpu.h
+++ b/cpus/c16x/cpu.h
@@ -11,7 +11,8 @@
 /* maximum number of additional command-line-flags for this cpu */
 
 /* data type to represent a target-address */
-typedef long taddr;
+typedef int32_t taddr;
+typedef uint32_t utaddr;
 
 #define LITTLEENDIAN 1
 #define BIGENDIAN 0
@@ -85,5 +86,3 @@ typedef struct {
   unsigned int encoding;
   unsigned int available;
 } mnemonic_extension;
-
-
diff --git a/cpus/c16x/cpu_errors.h b/cpus/c16x/cpu_errors.h
index 4ac3c6d..cffdaad 100644
--- a/cpus/c16x/cpu_errors.h
+++ b/cpus/c16x/cpu_errors.h
@@ -1,6 +1,6 @@
-"illegal operand",ERROR,
+  "illegal operand",ERROR,
   "word register expected",ERROR,
-  "illegal relocation",ERROR,
+  "",ERROR,
   "value does not find in %d bits",WARNING,
   "data size not supported",ERROR,
   "illegal use of SOF",WARNING,
diff --git a/cpus/jagrisc/cpu.c b/cpus/jagrisc/cpu.c
new file mode 100644
index 0000000..63c4eae
--- /dev/null
+++ b/cpus/jagrisc/cpu.c
@@ -0,0 +1,603 @@
+/*
+ * cpu.c Jaguar RISC cpu description file
+ * (c) in 2014-2015 by Frank Wille
+ */
+
+#include "vasm.h"
+
+mnemonic mnemonics[] = {
+#include "opcodes.h"
+};
+int mnemonic_cnt = sizeof(mnemonics) / sizeof(mnemonics[0]);
+
+char *cpu_copyright = "vasm Jaguar RISC cpu backend 0.4 (c) 2014-2015 Frank Wille";
+char *cpuname = "jagrisc";
+int bitsperbyte = 8;
+int bytespertaddr = 4;
+
+int jag_big_endian = 1;  /* defaults to big-endian (Atari Jaguar 68000) */
+
+static uint8_t cpu_type = GPU|DSP;
+static int OC_MOVEI,OC_UNPACK;
+
+/* condition codes */
+static regsym cc_regsyms[] = {
+  {"T",  RTYPE_CC, 0, 0x00},
+  {"NE", RTYPE_CC, 0, 0x01},
+  {"EQ", RTYPE_CC, 0, 0x02},
+  {"CC", RTYPE_CC, 0, 0x04},
+  {"HI", RTYPE_CC, 0, 0x05},
+  {"CS", RTYPE_CC, 0, 0x08},
+  {"PL", RTYPE_CC, 0, 0x14},
+  {"MI", RTYPE_CC, 0, 0x18},
+  {"t",  RTYPE_CC, 0, 0x00},
+  {"ne", RTYPE_CC, 0, 0x01},
+  {"eq", RTYPE_CC, 0, 0x02},
+  {"cc", RTYPE_CC, 0, 0x04},
+  {"hi", RTYPE_CC, 0, 0x05},
+  {"cs", RTYPE_CC, 0, 0x08},
+  {"pl", RTYPE_CC, 0, 0x14},
+  {"mi", RTYPE_CC, 0, 0x18},
+  {NULL, 0, 0, 0}
+};
+
+
+int init_cpu(void)
+{
+  int i;
+  regsym *r;
+
+  for (i=0; i<mnemonic_cnt; i++) {
+    if (!strcmp(mnemonics[i].name,"movei"))
+      OC_MOVEI = i;
+    else if (!strcmp(mnemonics[i].name,"unpack"))
+      OC_UNPACK = i;
+  }
+
+  /* define all condition code register symbols */
+  for (r=cc_regsyms; r->reg_name!=NULL; r++)
+    add_regsym(r);
+
+  return 1;
+}
+
+
+int cpu_args(char *p)
+{
+  if (!strncmp(p,"-m",2)) {
+    p += 2;
+    if (!stricmp(p,"gpu") || !stricmp(p,"tom"))
+      cpu_type = GPU;
+    else if (!stricmp(p,"dsp") || !stricmp(p,"jerry"))
+      cpu_type = DSP;
+    else if (!strcmp(p,"any"))
+      cpu_type = GPU|DSP;
+    else
+      return 0;
+  }
+  else if (!strcmp(p,"-big"))
+    jag_big_endian = 1;
+  else if (!strcmp(p,"-little"))
+    jag_big_endian = 0;
+  else
+    return 0;
+
+  return 1;
+}
+
+
+static int parse_reg(char **p)
+{
+  int reg = -1;
+  char *rp = skip(*p);
+  char *s;
+
+  if (s = skip_identifier(rp)) {
+    regsym *sym = find_regsym(rp,s-rp);
+
+    if (sym!=NULL && sym->reg_type==RTYPE_R) {
+      reg = sym->reg_num;
+    }
+    else if (toupper((unsigned char)*rp++) == 'R') {
+      if (sscanf(rp,"%d",&reg)!=1 || reg<0 || reg>31)
+        reg = -1;
+    }
+
+    if (reg >= 0)
+      *p = s;
+  }
+
+  return reg;
+}
+
+
+static expr *parse_cc(char **p)
+{
+  char *end;
+
+  *p = skip(*p);
+
+  if (end = skip_identifier(*p)) {
+    regsym *sym = find_regsym(*p,end-*p);
+
+    if (sym!=NULL && sym->reg_type==RTYPE_CC) {
+      *p = end;
+      return number_expr((taddr)sym->reg_num);
+    }
+  }
+
+  /* otherwise the condition code is any expression */
+  return parse_expr(p);
+}
+
+
+static void jagswap32(char *d,int32_t w)
+/* write a 32-bit word with swapped halfs (Jaguar MOVEI) */
+{
+  if (jag_big_endian) {
+    *d++ = (w >> 8) & 0xff;
+    *d++ = w & 0xff;
+    *d++ = (w >> 24) & 0xff;
+    *d = (w >> 16) & 0xff;
+  }
+  else {
+    /* @@@ Need to verify this! */
+    *d++ = w & 0xff;
+    *d++ = (w >> 8) & 0xff;
+    *d++ = (w >> 16) & 0xff;
+    *d = (w >> 24) & 0xff;
+  }
+}
+
+
+char *parse_cpu_special(char *start)
+/* parse cpu-specific directives; return pointer to end of cpu-specific text */
+{
+  char *name=start;
+  char *s;
+
+  if (s = skip_identifier(name)) {
+    /* Atari MadMac compatibility directives */
+    if (*name == '.')  /* ignore leading dot */
+      name++;
+
+    if (s-name==3 && !strnicmp(name,"dsp",3)) {
+      cpu_type = DSP;
+      eol(s);
+      return skip_line(s);
+    }
+
+    else if (s-name==3 && !strnicmp(name,"gpu",3)) {
+      cpu_type = GPU;
+      eol(s);
+      return skip_line(s);
+    }
+
+    else if (s-name==8 && !strnicmp(name,"regundef",8) ||
+             s-name==9 && !strnicmp(name,"equrundef",9)) {
+      /* undefine a register symbol */
+      s = skip(s);
+      if (name = parse_identifier(&s)) {
+        undef_regsym(name,0,RTYPE_R);
+        myfree(name);
+        eol(s);
+        return skip_line(s);
+      }
+    }
+
+    else if (s-name==7 && !strnicmp(name,"ccundef",7)) {
+      /* undefine a condition code symbol */
+      s = skip(s);
+      if (name = parse_identifier(&s)) {
+        undef_regsym(name,0,RTYPE_CC);
+        myfree(name);
+        eol(s);
+        return skip_line(s);
+      }
+    }
+  }
+
+  return start;
+}
+
+
+int parse_cpu_label(char *labname,char **start)
+/* parse cpu-specific directives following a label field,
+   return zero when no valid directive was recognized */ 
+{
+  char *dir=*start;
+  char *s,*name;
+  hashdata data;
+
+  if (*dir == '.')  /* ignore leading dot */
+    dir++;
+
+  if (s = skip_identifier(dir)) {
+
+    if (s-dir==6 && !strnicmp(dir,"regequ",6) ||
+        s-dir==4 && !strnicmp(dir,"equr",4)) {
+      /* label REGEQU Rn || label EQUR Rn */
+      int r;
+
+      if ((r = parse_reg(&s)) >= 0)
+        new_regsym(0,0,labname,RTYPE_R,0,r);
+      else
+        cpu_error(3);  /* register expected */
+      eol(s);
+      *start = skip_line(s);
+      return 1;
+    }
+
+    else if (s-dir==5 && !strnicmp(dir,"ccdef",5)) {
+      /* label CCDEF expr */
+      expr *ccexp;
+      taddr val;
+
+      if ((ccexp = parse_cc(&s)) != NULL) {
+        if (eval_expr(ccexp,&val,NULL,0))
+          new_regsym(0,0,labname,RTYPE_CC,0,(int)val);
+        else
+          general_error(30);  /* expression must be a constant */
+      }
+      else
+        general_error(9);  /* @@@ */
+      eol(s);
+      *start = skip_line(s);
+      return 1;
+    }
+  }
+
+  return 0;
+}
+
+
+operand *new_operand(void)
+{
+  operand *new = mymalloc(sizeof(*new));
+
+  new->type = NO_OP;
+  return new;
+}
+
+
+int jag_data_operand(int bits)
+/* return data operand type for these number of bits */
+{
+  if (bits & OPSZ_SWAP)
+    return DATAI_OP;
+  return bits==64 ? DATA64_OP : DATA_OP;
+}
+
+
+int parse_operand(char *p, int len, operand *op, int required)
+{
+  int reg;
+
+  switch (required) {
+    case IMM0:
+    case IMM1:
+    case SIMM:
+    case IMMLW:
+      if (*p == '#')
+        p = skip(p+1);  /* skip optional '#' */
+    case REL:
+    case DATA_OP:
+    case DATAI_OP:
+      op->val = parse_expr(&p);
+      break;
+
+    case DATA64_OP:
+      op->val = parse_expr_huge(&p);
+      break;
+
+    case REG:  /* Rn */
+      op->reg = parse_reg(&p);
+      if (op->reg < 0)
+        return PO_NOMATCH;
+      break;
+
+    case IREG:  /* (Rn) */
+      if (*p++ != '(')
+        return PO_NOMATCH;
+      op->reg = parse_reg(&p);
+      if (op->reg < 0)
+        return PO_NOMATCH;
+      if (*p != ')')
+        return PO_NOMATCH;
+      break;
+
+    case IR14D:  /* (R14+d) */
+    case IR15D:  /* (R15+d) */
+      if (*p++ != '(')
+        return PO_NOMATCH;
+      reg = parse_reg(&p);
+      if ((required==IR14D && reg!=14) || (required==IR15D && reg!=15))
+        return PO_NOMATCH;
+      if (*p++ != '+')
+        return PO_NOMATCH;
+      p = skip(p);
+      op->val = parse_expr(&p);
+      p = skip(p);
+      if (*p != ')')
+        return PO_NOMATCH;
+      break;
+
+    case IR14R:  /* (R14+Rn) */
+    case IR15R:  /* (R15+Rn) */
+      if (*p++ != '(')
+        return PO_NOMATCH;
+      reg = parse_reg(&p);
+      if ((required==IR14R && reg!=14) || (required==IR15R && reg!=15))
+        return PO_NOMATCH;
+      if (*p++ != '+')
+        return PO_NOMATCH;
+      op->reg = parse_reg(&p);
+      if (op->reg < 0)
+        return PO_NOMATCH;
+      if (*p != ')')
+        return PO_NOMATCH;
+      break;
+
+    case CC:  /* condition code: t, eq, ne, mi, pl, cc, cs, ... */
+      op->val = parse_cc(&p);
+      break;
+
+    case PC:  /* PC register */
+      if (toupper((unsigned char)*p) != 'P' ||
+          toupper((unsigned char)*(p+1)) != 'C' ||
+          ISIDCHAR(*(p+2)))
+        return PO_NOMATCH;
+      break;
+
+    default:
+      return PO_NOMATCH;
+  }
+
+  op->type = required;
+  return PO_MATCH;
+}
+
+
+static int32_t eval_oper(instruction *ip,operand *op,section *sec,
+                         taddr pc,dblock *db)
+{
+  symbol *base = NULL;
+  int optype = op->type;
+  int btype;
+  taddr val,loval,hival,mask;
+
+  switch (optype) {
+    case REG:
+    case IREG:
+    case IR14R:
+    case IR15R:
+      return op->reg;
+
+    case IMM0:
+    case IMM1:
+    case SIMM:
+    case IMMLW:
+    case IR14D:
+    case IR15D:
+    case REL:
+    case CC:
+      mask = 0x1f;
+      if (!eval_expr(op->val,&val,sec,pc))
+        btype = find_base(op->val,&base,sec,pc);
+
+      if (optype==IMM0 || optype==CC || optype==IMM1 || optype==SIMM) {
+        if (base != NULL) {
+          loval = -32;
+          hival = 32;
+          if (btype != BASE_ILLEGAL) {
+            if (db) {
+              add_nreloc_masked(&db->relocs,base,val,
+                                btype==BASE_PCREL?REL_PC:REL_ABS,
+                                5,6,0x1f);
+              base = NULL;
+            }
+          }
+        }
+        else if (optype==IMM1) {
+          loval = 1;
+          hival = 32;
+        }
+        else if (optype==SIMM) {
+          loval = -16;
+          hival = 15;
+        }
+        else {
+          loval = 0;
+          hival = 31;
+        }
+      }
+      else if (optype==IR14D || optype==IR15D) {
+        if (base==NULL && val==0) {
+          /* Optimize (Rn+0) to (Rn). Assume that the "load/store (Rn+d)"
+             instructions follow directly after "load/store (Rn)". */
+          ip->code -= optype==IR14D ? 1 : 2;
+          op->type = IREG;
+          op->reg = optype==IR14D ? 14 : 15;
+          return op->reg;
+        }
+        loval = 1;
+        hival = 32;
+      }
+      else if (optype==IMMLW) {
+        mask = ~0;
+        if (base != NULL) {
+          if (btype != BASE_ILLEGAL) {
+            if (db) {
+              /* two relocations for LSW first, then MSW */
+              add_nreloc_masked(&db->relocs,base,val,
+                                btype==BASE_PCREL?REL_PC:REL_ABS,
+                                16,16,0xffff);
+              add_nreloc_masked(&db->relocs,base,val,
+                                btype==BASE_PCREL?REL_PC:REL_ABS,
+                                16,32,0xffff0000);
+              base = NULL;
+            }
+          }
+        }
+      }
+      else if (optype==REL) {
+        loval = -16;
+        hival = 15;
+        if (base!=NULL && btype==BASE_OK) {
+          if (is_pc_reloc(base,sec)) {
+            /* external label or from a different section (distance / 2) */
+            add_nreloc_masked(&db->relocs,base,val-2,REL_PC,5,6,0x3e);
+          }
+          else if (LOCREF(base)) {
+            /* known label from the same section doesn't need a reloc */
+            val = (val - (pc + 2)) / 2;
+          }
+          base = NULL;
+        }
+      }
+      else ierror(0);
+
+      if (base != NULL)
+        general_error(38);  /* bad or unhandled reloc: illegal relocation */
+
+      /* range check for this addressing mode */
+      if (mask!=~0 && (val<loval || val>hival))
+        cpu_error(1,(long)loval,(long)hival);
+      return val & mask;
+  }
+
+  return 0;  /* default */
+}
+
+
+size_t instruction_size(instruction *ip, section *sec, taddr pc)
+{
+  return ip->code==OC_MOVEI ? 6 : 2;
+}
+
+
+dblock *eval_instruction(instruction *ip, section *sec, taddr pc)
+{
+  dblock *db = new_dblock();
+  int32_t src=0,dst=0,extra;
+  int size = 2;
+  uint16_t inst;
+
+  /* get source and destination argument, when present */
+  if (ip->op[0])
+    dst = eval_oper(ip,ip->op[0],sec,pc,db);
+  if (ip->op[1]) {
+    if (ip->code == OC_MOVEI) {
+      extra = dst;
+      size = 6;
+    }
+    else
+      src = dst;
+    dst = eval_oper(ip,ip->op[1],sec,pc,db);
+  }
+  else if (ip->code == OC_UNPACK)
+    src = 1;  /* pack(src=0)/unpack(src=1) use the same opcode */
+
+  /* store and jump instructions need the second operand in the source field */
+  if (mnemonics[ip->code].ext.flags & OPSWAP) {
+    extra = src;
+    src = dst;
+    dst = extra;
+  }
+
+  /* allocate dblock data for instruction */
+  db->size = size;
+  db->data = mymalloc(size);
+
+  /* construct the instruction word out of opcode and source/dest. value */
+  inst = (mnemonics[ip->code].ext.opcode & 63) << 10;
+  inst |= ((src&31) << 5) | (dst & 31);
+
+  /* write instruction */
+  if (jag_big_endian) {
+    db->data[0] = (inst >> 8) & 0xff;
+    db->data[1] = inst & 0xff;
+  }
+  else {
+    db->data[0] = inst & 0xff;
+    db->data[1] = (inst >> 8) & 0xff;
+  }
+
+  /* extra words for MOVEI are always written in the order lo-word, hi-word */
+  if (size == 6)
+    jagswap32(&db->data[2],extra);
+
+  return db;
+}
+
+
+dblock *eval_data(operand *op, size_t bitsize, section *sec, taddr pc)
+{
+  dblock *db = new_dblock();
+  taddr val;
+
+  if (bitsize!=8 && bitsize!=16 && bitsize!=32 && bitsize!=64)
+    cpu_error(0,bitsize);  /* data size not supported */
+
+  if (op->type!=DATA_OP && op->type!=DATA64_OP && op->type!=DATAI_OP)
+    ierror(0);
+
+  db->size = bitsize >> 3;
+  db->data = mymalloc(db->size);
+
+  if (op->type == DATA64_OP) {
+    thuge hval;
+
+    if (!eval_expr_huge(op->val,&hval))
+      general_error(59);  /* cannot evaluate huge integer */
+    huge_to_mem(jag_big_endian,db->data,db->size,hval);
+  }
+  else {
+    if (!eval_expr(op->val,&val,sec,pc)) {
+      symbol *base;
+      int btype;
+
+      btype = find_base(op->val,&base,sec,pc);
+      if (base!=NULL && btype!=BASE_ILLEGAL) {
+        if (op->type == DATAI_OP) {
+          /* swapped: two relocations for LSW first, then MSW */
+          add_nreloc_masked(&db->relocs,base,val,
+                            btype==BASE_PCREL?REL_PC:REL_ABS,
+                            16,0,0xffff);
+          add_nreloc_masked(&db->relocs,base,val,
+                            btype==BASE_PCREL?REL_PC:REL_ABS,
+                            16,0,0xffff0000);
+        }
+        else /* normal 8, 16, 32 bit relocation */
+          add_nreloc(&db->relocs,base,val,
+                     btype==BASE_PCREL?REL_PC:REL_ABS,bitsize,0);
+      }
+      else if (btype != BASE_NONE)
+        general_error(38);  /* illegal relocation */
+    }
+
+    switch (db->size) {
+      case 1:
+        db->data[0] = val & 0xff;
+        break;
+      case 2:
+      case 4:
+        if (op->type == DATAI_OP)
+          jagswap32(db->data,(int32_t)val);
+        else
+          setval(jag_big_endian,db->data,db->size,val);
+        break;
+      default:
+        ierror(0);
+        break;
+    }
+  }
+
+  return db;
+}
+
+
+int cpu_available(int idx)
+{
+  return (mnemonics[idx].ext.flags & cpu_type) != 0;
+}
diff --git a/cpus/jagrisc/cpu.h b/cpus/jagrisc/cpu.h
new file mode 100644
index 0000000..4a22273
--- /dev/null
+++ b/cpus/jagrisc/cpu.h
@@ -0,0 +1,85 @@
+/*
+** cpu.h Jaguar RISC cpu-description header-file
+** (c) in 2014-2015 by Frank Wille
+*/
+
+extern int jag_big_endian;
+#define BIGENDIAN (jag_big_endian)
+#define LITTLEENDIAN (!jag_big_endian)
+#define VASM_CPU_JAGRISC 1
+
+/* maximum number of operands for one mnemonic */
+#define MAX_OPERANDS 2
+
+/* maximum number of mnemonic-qualifiers per mnemonic */
+#define MAX_QUALIFIERS 0
+
+/* data type to represent a target-address */
+typedef int32_t taddr;
+typedef uint32_t utaddr;
+
+/* minimum instruction alignment */
+#define INST_ALIGN 2
+
+/* default alignment for n-bit data */
+#define DATA_ALIGN(n) ((n<=8)?1:2)
+
+/* operand class for n-bit data definitions */
+int jag_data_operand(int);
+#define DATA_OPERAND(n) jag_data_operand(n)
+
+/* returns true when instruction is valid for selected cpu */
+#define MNEMONIC_VALID(i) cpu_available(i)
+
+/* type to store each operand */
+typedef struct {
+  uint8_t type;
+  int8_t reg;
+  expr *val;
+} operand;
+
+/* operand types */
+enum {
+  NO_OP=0,
+  DATA_OP,
+  DATA64_OP,
+  DATAI_OP,             /* 32-bit with swapped halfwords */
+  REG,                  /* register Rn */
+  IMM0,                 /* 5-bit immediate expression (0-31) */
+  IMM1,                 /* 5-bit immediate expression (1-32) */
+  SIMM,                 /* 5-bit signed immediate expression (-16 - 15) */
+  IMMLW,                /* 32-bit immediate expression in extra longword */
+  IREG,                 /* register indirect (Rn) */
+  IR14D,                /* register R14 plus displacement indirect (R14+n) */
+  IR15D,                /* register R15 plus displacement indirect (R15+n) */
+  IR14R,                /* register R14 plus register Rn indirect (R14+Rn) */
+  IR15R,                /* register R15 plus register Rn indirect (R15+Rn) */
+  CC,                   /* condition code, t, cc, cs, eq, ne, mi, pl, hi */
+  REL,                  /* relative branch, PC + 2 + (-16..15) words */
+  PC                    /* PC register */
+};
+
+/* additional mnemonic data */
+typedef struct {
+  uint8_t opcode;
+  uint8_t flags;
+} mnemonic_extension;
+
+/* Values defined for the 'flags' field of mnemonic_extension.  */
+#define GPU 1
+#define DSP 2
+#define ANY GPU|DSP
+
+#define OPSWAP 128      /* swapped operands in instruction word encoding */
+
+/* Register symbols */
+#define HAVE_REGSYMS
+#define REGSYMHTSIZE 64
+#define RTYPE_R      0  /* R0-R31 */
+#define RTYPE_CC     1  /* condition codes (0-31) */
+
+/* Prototypes */
+int cpu_available(int);
+
+int parse_cpu_label(char *,char **);
+#define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s)
diff --git a/cpus/jagrisc/cpu_errors.h b/cpus/jagrisc/cpu_errors.h
new file mode 100644
index 0000000..68db758
--- /dev/null
+++ b/cpus/jagrisc/cpu_errors.h
@@ -0,0 +1,3 @@
+  "data size %d not supported",ERROR,
+  "value from %ld to %ld required",ERROR,
+  "register expected",ERROR,
diff --git a/cpus/jagrisc/opcodes.h b/cpus/jagrisc/opcodes.h
new file mode 100644
index 0000000..281202a
--- /dev/null
+++ b/cpus/jagrisc/opcodes.h
@@ -0,0 +1,72 @@
+  "abs",      { REG          }, { 22, ANY },
+  "add",      { REG,   REG   }, {  0, ANY },
+  "addc",     { REG,   REG   }, {  1, ANY },
+  "addq",     { IMM1,  REG   }, {  2, ANY },
+  "addqmod",  { IMM1,  REG   }, { 63, DSP },
+  "addqt",    { IMM1,  REG   }, {  3, ANY },
+  "and",      { REG,   REG   }, {  9, ANY },
+  "bclr",     { IMM0,  REG   }, { 15, ANY },
+  "bset",     { IMM0,  REG   }, { 14, ANY },
+  "btst",     { IMM0,  REG   }, { 13, ANY },
+  "cmp",      { REG,   REG   }, { 30, ANY },
+  "cmpq",     { SIMM,  REG   }, { 31, ANY },
+  "div",      { REG,   REG   }, { 21, ANY },
+  "imacn",    { REG,   REG   }, { 20, ANY },
+  "imult",    { REG,   REG   }, { 17, ANY },
+  "imultn",   { REG,   REG   }, { 18, ANY },
+  "jr",       { REL          }, { 53, ANY|OPSWAP },
+  "jr",       { CC,    REL   }, { 53, ANY|OPSWAP },
+  "jump",     { IREG         }, { 52, ANY|OPSWAP },
+  "jump",     { CC,    IREG  }, { 52, ANY|OPSWAP },
+  "load",     { IREG,  REG   }, { 41, ANY },
+  "load",     { IR14R, REG   }, { 58, ANY },
+  "load",     { IR15R, REG   }, { 59, ANY },
+  "load",     { IR14D, REG   }, { 43, ANY },
+  "load",     { IR15D, REG   }, { 44, ANY },
+  "loadb",    { IREG,  REG   }, { 39, ANY },
+  "loadp",    { IREG,  REG   }, { 42, GPU },
+  "loadw",    { IREG,  REG   }, { 40, ANY },
+  "mirror",   { REG,   IREG  }, { 48, DSP|OPSWAP },
+  "mmult",    { REG,   REG   }, { 54, ANY },
+  "move",     { REG,   REG   }, { 34, ANY },
+  "move",     { PC,    REG   }, { 51, ANY },
+  "movefa",   { REG,   REG   }, { 37, ANY },
+  "movei",    { IMMLW, REG   }, { 38, ANY },
+  "moveq",    { IMM0,  REG   }, { 35, ANY },
+  "moveta",   { REG,   REG   }, { 36, ANY },
+  "mtoi",     { REG,   REG   }, { 55, ANY },
+  "mult",     { REG,   REG   }, { 16, ANY },
+  "neg",      { REG          }, {  8, ANY },
+  "nop",      { NO_OP        }, { 57, ANY },
+  "normi",    { REG,   REG   }, { 56, ANY },
+  "not",      { REG          }, { 12, ANY },
+  "or",       { REG,   REG   }, { 10, ANY },
+  "pack",     { REG          }, { 63, GPU },
+  "resmac",   { REG          }, { 19, ANY },
+  "ror",      { REG,   REG   }, { 28, ANY },
+  "rorq",     { IMM1,  REG   }, { 29, ANY },
+  "sat8",     { REG          }, { 32, GPU },
+  "sat16",    { REG          }, { 33, GPU },
+  "sat16s",   { REG          }, { 33, DSP },
+  "sat24",    { REG          }, { 62, GPU },
+  "sat32s",   { REG          }, { 42, DSP },
+  "sh",       { REG,   REG   }, { 23, ANY },
+  "sha",      { REG,   REG   }, { 26, ANY },
+  "sharq",    { IMM1,  REG   }, { 27, ANY },
+  "shlq",     { IMM1,  REG   }, { 24, ANY },
+  "shrq",     { IMM1,  REG   }, { 25, ANY },
+  "store",    { REG,   IREG  }, { 47, ANY|OPSWAP },
+  "store",    { REG,   IR14R }, { 60, ANY|OPSWAP },
+  "store",    { REG,   IR15R }, { 61, ANY|OPSWAP },
+  "store",    { REG,   IR14D }, { 49, ANY|OPSWAP },
+  "store",    { REG,   IR15D }, { 50, ANY|OPSWAP },
+  "storeb",   { REG,   IREG  }, { 45, ANY|OPSWAP },
+  "storep",   { REG,   IREG  }, { 48, GPU|OPSWAP },
+  "storew",   { REG,   IREG  }, { 46, ANY|OPSWAP },
+  "sub",      { REG,   REG   }, {  4, ANY },
+  "subc",     { REG,   REG   }, {  5, ANY },
+  "subq",     { IMM1,  REG   }, {  6, ANY },
+  "subqmod",  { IMM1,  REG   }, { 32, DSP },
+  "subqt",    { IMM1,  REG   }, {  7, ANY },
+  "unpack",   { REG          }, { 63, GPU },
+  "xor",      { REG,   REG   }, { 11, ANY },
diff --git a/cpus/m68k/cpu.c b/cpus/m68k/cpu.c
index d19d4a2..16602a0 100644
--- a/cpus/m68k/cpu.c
+++ b/cpus/m68k/cpu.c
@@ -1,6 +1,6 @@
 /*
 ** cpu.c Motorola M68k, CPU32 and ColdFire cpu-description file
-** (c) in 2002-2011 by Frank Wille
+** (c) in 2002-2015 by Frank Wille
 */
 
 #include <math.h>
@@ -24,12 +24,14 @@ struct cpu_models models[] = {
 int model_cnt = sizeof(models)/sizeof(models[0]);
 
 
-char *cpu_copyright="vasm M68k/CPU32/ColdFire cpu backend 1.2a (c) 2002-2011 Frank Wille";
+char *cpu_copyright="vasm M68k/CPU32/ColdFire cpu backend 2.0f (c) 2002-2015 Frank Wille";
 char *cpuname = "M68k";
 int bitsperbyte = 8;
 int bytespertaddr = 4;
 
-static unsigned long cpu_type = m68000;
+int m68k_mid = 1;                     /* default a.out MID: 68000/68010 */
+
+static uint32_t cpu_type = m68000;
 static expr *baseexp[7];              /* basereg: expression loaded to reg. */
 static signed char sdreg = -1;        /* current small-data base register */
 static signed char last_sdreg = -1;
@@ -42,7 +44,8 @@ static unsigned char opt_clr = 0;     /* MOVE #0,<ea> -> CLR <ea> */
 static unsigned char opt_st = 0;      /* MOVE.B #-1,<ea> -> ST <ea> */
 static unsigned char opt_lsl = 0;     /* LSL #1,Dn -> ADD Dn,Dn */
 static unsigned char opt_mul = 0;     /* MULU/MULS #n,Dn -> LSL/ASL #n,Dn */
-static unsigned char opt_fconst = 0;  /* Fxxx.D #m,FPn -> Fxxx.S #m,FPn */
+static unsigned char opt_div = 0;     /* DIVU/DIVS.L #n,Dn -> LSR/ASR #n,Dn */
+static unsigned char opt_fconst = 1;  /* Fxxx.D #m,FPn -> Fxxx.S #m,FPn */
 static unsigned char opt_brajmp = 0;  /* branch to different sect. into jump */
 static unsigned char opt_pc = 1;      /* <label> -> (<label>,PC) */
 static unsigned char opt_bra = 1;     /* B<cc>.L -> B<cc>.W -> B<cc>.B */
@@ -58,39 +61,49 @@ static unsigned char opt_lea = 1;     /* ADD/SUB #x,An -> LEA (x,An),An */
 static unsigned char opt_lquick = 1;  /* LEA (x,An),An -> ADDQ/SUBQ #x,An */
 static unsigned char opt_immaddr = 1; /* <op>.L #x,An -> <op>.W #x,An */
 static unsigned char opt_speed = 0;   /* optimize for speed, not for size */
+static unsigned char opt_sc = 0;      /* external JMP/JSR are 16-bit PC-rel. */
 static unsigned char no_opt = 0;      /* don't optimize at all! */
 static unsigned char warn_opts = 0;   /* warn on optimizations/translations */
 static unsigned char convert_brackets = 0;  /* convert [ into ( for <020 */
+static unsigned char typechk = 1;     /* check value types and ranges */
+static unsigned char ign_unambig_ext = 0;  /* don't check unambig. size ext. */
+static unsigned char regsymredef = 0; /* allow redefinition of reg. symbols */
 static unsigned char phxass_compat = 0;
 static unsigned char devpac_compat = 0;
-static unsigned char typechk = 1;     /* check value types and ranges */
-static hashtable *regsymhash;
 static char current_ext;              /* extension of current parsed inst. */
 
-static char *b_str = "b";
-static char *w_str = "w";
-static char *l_str = "l";
-static char *s_str = "s";
-static char *d_str = "d";
-static char *x_str = "x";
-static char *p_str = "p";
+static char b_str[] = "b";
+static char w_str[] = "w";
+static char l_str[] = "l";
+static char s_str[] = "s";
+static char d_str[] = "d";
+static char x_str[] = "x";
+static char p_str[] = "p";
+
+static char optc_name[] = "__OPTC";
+static char cpu_name[] = "__CPU";
+static char mmu_name[] = "__MMU";
+static char fpu_name[] = "__FPU";
+static char g2_name[] = "__G2";
+static char lk_name[] = "__LK";
 
 static int OC_JMP,OC_JSR,OC_MOVEQ,OC_MOV3Q,OC_LEA,OC_PEA,OC_SUBA,OC_CLR;
 static int OC_ST,OC_ADDQ,OC_SUBQ,OC_ADDA,OC_ADD,OC_BRA,OC_BSR,OC_TST;
 static int OC_NOT,OC_NOP,OC_FNOP,OC_MOVEA,OC_EXT,OC_MVZ,OC_MOVE;
-static int OC_ASLI,OC_LSLI,OC_NEG;
+static int OC_ASRI,OC_LSRI,OC_ASLI,OC_LSLI,OC_NEG;
 static int OC_FMOVEMTOLIST,OC_FMOVEMTOSPEC,OC_FMOVEMFROMSPEC;
 static int OC_FMUL,OC_FSMUL,OC_FDMUL,OC_FSGLMUL;
 
 static struct {
   int *var;
   const char *name;
-  short optype[2];
+  int16_t optype[2];
 } code_tab[] = {
   &OC_ADD,              "add",    DA,0,
   &OC_ADDA,             "adda",   0,0,
   &OC_ADDQ,             "addq",   0,AD,
   &OC_ASLI,             "asl",    QI,0,
+  &OC_ASRI,             "asr",    QI,0,
   &OC_BRA,              "bra",    0,0,
   &OC_BSR,              "bsr",    0,0,
   &OC_CLR,              "clr",    0,0,
@@ -107,6 +120,7 @@ static struct {
   &OC_JSR,              "jsr",    0,0,
   &OC_LEA,              "lea",    0,0,
   &OC_LSLI,             "lsl",    QI,0,
+  &OC_LSRI,             "lsr",    QI,0,
   &OC_MOV3Q,            "mov3q",  0,0,
   &OC_MOVE,             "move",   DA,AD,
   &OC_MOVEA,            "movea",  0,0,
@@ -141,22 +155,11 @@ operand *new_operand(void)
 static void free_op_exp(operand *op)
 {
   if (op) {
-    if (op->flags & FL_Exp) {
-      if (op->exp.value[0])
-        free_expr(op->exp.value[0]);
-      if (op->exp.value[1])
-        free_expr(op->exp.value[1]);
-      op->exp.value[0] = op->exp.value[1] = NULL;
-    }
-    else if (op->flags==FL_Int64 || op->flags==FL_Int96) {
-      myfree(op->exp.cint);
-      op->exp.cint = NULL;
-    }
-    else if (op->flags == FL_Float) {
-      myfree(op->exp.cfloat);
-      op->exp.cfloat = NULL;
-    }
-    op->flags &= ~FL_expMask;
+    if (op->value[0])
+      free_expr(op->value[0]);
+    if (op->value[1])
+      free_expr(op->value[1]);
+    op->value[0] = op->value[1] = NULL;
   }
 }
 
@@ -181,6 +184,7 @@ void init_instruction_ext(instruction_ext *ixp)
 {
   ixp->un.real.flags = 0;
   ixp->un.real.last_size = -1;
+  ixp->un.real.orig_ext = -1;
 }
 
 
@@ -224,16 +228,16 @@ int m68k_data_operand(int bits)
     case 16: return OP_D16;
     case 32: return OP_D32;
     case 64: return OP_D64;
-    case -32: return OP_F32;
-    case -64: return OP_F64;
-    case -96: return OP_F96;
+    case OPSZ_FLOAT|32: return OP_F32;
+    case OPSZ_FLOAT|64: return OP_F64;
+    case OPSZ_FLOAT|96: return OP_F96;
   }
-  cpu_error(38,abs(bits));  /* data obj. with n bits size are not supported */
+  cpu_error(38,OPSZ_BITS(bits)); /* data obj. with n bits size are not supp. */
   return 0;
 }
 
 
-static int phxass_cpu_num(unsigned long type)
+static int phxass_cpu_num(uint32_t type)
 {
   static int cpus[] = {
     68000,68010,68020,68030,68040,68060
@@ -248,6 +252,47 @@ static int phxass_cpu_num(unsigned long type)
 }
 
 
+static void set_optc_symbol(void)
+{
+  /* set PhxAss __OPTC symbol from current optimization flags */
+  taddr optc = 0;
+
+  if (!no_opt) {
+    if (opt_disp && opt_abs && opt_moveq && opt_lea && opt_immaddr)
+      optc |= 0x001;
+    if (opt_pc)
+      optc |= 0x002;
+    if (opt_quick && opt_lquick)
+      optc |= 0x004;
+    if (opt_bra && opt_brajmp)
+      optc |= 0x108;  /* T is always set together with B */
+    if (opt_lsl)
+      optc |= 0x010;
+    if (opt_pea)
+      optc |= 0x020;
+    if (opt_clr && opt_st && opt_fconst)
+      optc |= 0x040;
+    if (opt_gen)
+      optc |= 0x080;
+    if (opt_movem)
+      optc |= 0x200;
+  }
+
+  set_internal_abs(optc_name,optc);
+}
+
+
+static void set_g2_symbol(void)
+{
+  /* Devpac __G2 symbol
+   * Bits 0-7:   version and features (e.g. 43) - we don't use it!
+   * Bits 8-15:  cpu type - 68000
+   * Bits 16-23: host system - we set all bits to indicate an unknown host
+   */
+  set_internal_abs(g2_name,0xff0000|((phxass_cpu_num(cpu_type)-68000)<<8));
+}
+
+
 void cpu_opts(void *opts)
 /* set cpu options for following atoms */
 {
@@ -263,14 +308,17 @@ void cpu_opts(void *opts)
     case OCMD_CPU:
       cpu_type = arg;
       if (phxass_compat) {
-        new_abs("__CPU",number_expr((taddr)phxass_cpu_num(cpu_type)));
-        new_abs("__MMU",number_expr((cpu_type & mmmu) != 0));
+        set_internal_abs(cpu_name,phxass_cpu_num(cpu_type));
+        set_internal_abs(mmu_name,(cpu_type & mmmu)!=0);
       }
+      if (devpac_compat)
+        set_g2_symbol();
+      set_internal_abs(vasmsym_name,cpu_type&CPUMASK);
       break;
     case OCMD_FPU:
       fpu_id = arg;
       if (phxass_compat)
-        new_abs("__FPU",number_expr((cpu_type & mfloat) ? (taddr)fpu_id : 0));
+        set_internal_abs(fpu_name,(cpu_type & mfloat)?fpu_id:0);
       break;
     case OCMD_SDREG:
       sdreg = arg;
@@ -284,6 +332,7 @@ void cpu_opts(void *opts)
     case OCMD_OPTST: opt_st=arg; break;
     case OCMD_OPTLSL: opt_lsl=arg; break;
     case OCMD_OPTMUL: opt_mul=arg; break;
+    case OCMD_OPTDIV: opt_div=arg; break;
     case OCMD_OPTFCONST: opt_fconst=arg; break;
     case OCMD_OPTBRAJMP: opt_brajmp=arg; break;
     case OCMD_OPTPC: opt_pc=arg; break;
@@ -299,6 +348,7 @@ void cpu_opts(void *opts)
     case OCMD_OPTLQUICK: opt_lquick=arg; break;
     case OCMD_OPTIMMADDR: opt_immaddr=arg; break;
     case OCMD_OPTSPEED: opt_speed=arg; break;
+    case OCMD_SMALLCODE: opt_sc=arg; break;
 
     case OCMD_OPTWARN: warn_opts=arg; break;
     case OCMD_CHKPIC: pic_check=arg; break;
@@ -343,6 +393,7 @@ static void cpu_opts_optinit(section *s)
   add_cpu_opt(s,OCMD_OPTST,opt_st);
   add_cpu_opt(s,OCMD_OPTLSL,opt_lsl);
   add_cpu_opt(s,OCMD_OPTMUL,opt_mul);
+  add_cpu_opt(s,OCMD_OPTDIV,opt_div);
   add_cpu_opt(s,OCMD_OPTFCONST,opt_fconst);
   add_cpu_opt(s,OCMD_OPTBRAJMP,opt_brajmp);
   add_cpu_opt(s,OCMD_OPTPC,opt_pc);
@@ -358,6 +409,10 @@ static void cpu_opts_optinit(section *s)
   add_cpu_opt(s,OCMD_OPTLQUICK,opt_lquick);
   add_cpu_opt(s,OCMD_OPTIMMADDR,opt_immaddr);
   add_cpu_opt(s,OCMD_OPTSPEED,opt_speed);
+  add_cpu_opt(s,OCMD_SMALLCODE,opt_sc);
+
+  if (phxass_compat)
+    set_optc_symbol();
 }
 
 
@@ -378,12 +433,12 @@ void cpu_opts_init(section *s)
 void print_cpu_opts(FILE *f,void *opts)
 {
   static const char *ocmds[] = {
-    "opt generic","opt movem","opt pea","opt clr","opt st","opt lsl",
-    "opt mul","opt float const","opt branch to jump","opt pc-relative",
+    "opt generic","opt movem","opt pea","opt clr","opt st","opt lsl","opt mul",
+    "opt div","opt float const","opt branch to jump","opt pc-relative",
     "opt branch","opt displacement","opt absolute","opt moveq","opt quick",
     "opt branch to nop","opt base disp","opt outer disp",
     "opt adda/subq to lea","opt lea to addq/subq","opt immediate areg",
-    "opt for speed","warn about optimizations",
+    "opt for speed","opt small code","warn about optimizations",
     "PIC check","type and range checks","hide all warnings"
   };
   static const char *cpus[32] = {
@@ -421,78 +476,17 @@ void print_cpu_opts(FILE *f,void *opts)
 }
 
 
-/* floating point conversion routines */
-
-static void conv2single(unsigned char *buf,long double f)
-{
-  union {
-    float sp;
-    unsigned long x;
-  } conv;
-
-  conv.sp = (float)f;
-  buf[0] = (conv.x >> 24) & 0xff;
-  buf[1] = (conv.x >> 16) & 0xff;
-  buf[2] = (conv.x >> 8) & 0xff;
-  buf[3] = conv.x & 0xff;
-}
-
-static void conv2double(unsigned char *buf,long double f)
-{
-  union {
-    double dp;
-    unsigned long long x;
-  } conv;
-
-  conv.dp = (double)f;
-  buf[0] = (conv.x >> 56) & 0xff;
-  buf[1] = (conv.x >> 48) & 0xff;
-  buf[2] = (conv.x >> 40) & 0xff;
-  buf[3] = (conv.x >> 32) & 0xff;
-  buf[4] = (conv.x >> 24) & 0xff;
-  buf[5] = (conv.x >> 16) & 0xff;
-  buf[6] = (conv.x >> 8) & 0xff;
-  buf[7] = conv.x & 0xff;
-}
-
-static void conv2extended(unsigned char *buf,long double f)
-/* @@@ Warning: precision is lost! Converting to double precision. */
-{
-  unsigned long long man;
-  unsigned int exp;
-  union {
-    double dp;
-    unsigned long long x;
-  } conv;
-
-  conv.dp = (double)f;
-  man = ((conv.x & 0xfffffffffffffLL) << 11) | 0x8000000000000000LL;
-  exp = ((conv.x >> 52) & 0x7ff) - 0x3ff + 0x3fff;
-  buf[0] = ((conv.x >> 56) & 0x80) | (exp >> 8);
-  buf[1] = exp & 0xff;
-  buf[2] = 0;
-  buf[3] = 0;
-  buf[4] = (man >> 56) & 0xff;
-  buf[5] = (man >> 48) & 0xff;
-  buf[6] = (man >> 40) & 0xff;
-  buf[7] = (man >> 32) & 0xff;
-  buf[8] = (man >> 24) & 0xff;
-  buf[9] = (man >> 16) & 0xff;
-  buf[10] = (man >> 8) & 0xff;
-  buf[11] = man & 0xff;
-}
-
 static void conv2packed(unsigned char *buf,long double f)
 {
   /* @@@@@@@ to be implemented */
 }
 
 
-static taddr reverse(unsigned long v,int size)
+static taddr reverse(uint32_t v,int size)
 /* reverse bit-order in v */
 {
   int i;
-  unsigned long r = 0;
+  uint32_t r = 0;
 
   for (i=0; i<size; i++) {
     r <<= 1;
@@ -592,23 +586,34 @@ static int is_float_ext(void)
 }
 
 
-static unsigned short lc_ext_to_size(char ext)
+static uint16_t lc_ext_to_size(char ext)
 /* convert lower-case extension character to a SIZE_xxx code */
 {
-  unsigned short sz;
+  switch (ext) {
+    case 'b': return SIZE_BYTE;
+    case 'w': return SIZE_WORD;
+    case 'l': return SIZE_LONG;
+    case 's': return SIZE_SINGLE;
+    case 'd': return SIZE_DOUBLE;
+    case 'x': return SIZE_EXTENDED;
+    case 'p': return SIZE_PACKED;
+    case 'q': return SIZE_DOUBLE;
+  }
+  return 0;
+}
+
 
+static int branch_size(char ext)
+/* branch size for each size-extension code */
+{
   switch (ext) {
-    case 'b': sz = SIZE_BYTE; break;
-    case 'w': sz = SIZE_WORD; break;
-    case 'l': sz = SIZE_LONG; break;
-    case 's': sz = SIZE_SINGLE; break;
-    case 'd': sz = SIZE_DOUBLE; break;
-    case 'x': sz = SIZE_EXTENDED; break;
-    case 'p': sz = SIZE_PACKED; break;
-    case 'q': sz = SIZE_DOUBLE; break;
-    default: sz = 0; break;
-  }
-  return sz;
+    case 'b':
+    case 's':
+      return 0;
+    case 'l':
+      return 4;
+  }
+  return 2;
 }
 
 
@@ -626,16 +631,15 @@ static signed char getreg(char **start,int An_only,int indexreg)
 
   if (ISIDSTART(*s) || (elfregs && *s=='%')) {
     char *p = s++;
-    hashdata data;
+    regsym *sym;
 
     while (ISIDCHAR(*s) && *s!='.')
       s++;
-    if (find_namelen(regsymhash,p,s-p,&data)) {
-      /* register symbol found */
-      regsym *sym = data.ptr;
 
-      if (sym->type==RSTYPE_Dn || sym->type==RSTYPE_An)
-        reg = ((sym->type==RSTYPE_An) ? 8 : 0) | (signed char)sym->reg;
+    if (sym = find_regsym(p,s-p)) {
+      /* register symbol found */
+      if (sym->reg_type==RSTYPE_Dn || sym->reg_type==RSTYPE_An)
+        reg = ((sym->reg_type==RSTYPE_An) ? 8 : 0) | (signed char)sym->reg_num;
     }
     else {
       if (elfregs) {
@@ -681,14 +685,14 @@ static signed char getreg(char **start,int An_only,int indexreg)
 }
 
 
-static unsigned short scan_Rnlist(char **start)
+static uint16_t scan_Rnlist(char **start)
 /* returns bit field for a Dn/An register list
    returns 0 otherwise */
 {
   char *p = *start;
 
   if (getreg(&p,0,0) >= 0) {
-    unsigned short list = 0;
+    uint16_t list = 0;
     signed char lastreg=-1,reg,rx;
     int rangemode = 0;
 
@@ -705,17 +709,28 @@ static unsigned short scan_Rnlist(char **start)
 
       if (rangemode) {
         /* lastreg...reg describes a range of registers */
+        list &= ~(1<<lastreg);
         if (lastreg > reg) {
           rx = reg;
           reg = lastreg;
           lastreg = rx;
         }
-        for (rx=lastreg; rx<=reg; rx++)
-          list |= 1<<rx;
+        else if (lastreg == reg)
+          cpu_error(17);  /* Rn-Rn */
+        for (rx=lastreg; rx<=reg; rx++) {
+          if (list & (1<<rx))
+            cpu_error(17);  /* double register in list */
+          else
+            list |= 1<<rx;
+        }
         rangemode = 0;
       }
-      else
-        list |= 1<<reg;
+      else {
+        if (list & (1<<reg))
+          cpu_error(17);  /* double register in list */
+        else
+          list |= 1<<reg;
+      }
 
       lastreg = reg;
       p = skip(p);
@@ -741,16 +756,15 @@ static signed char getfreg(char **start)
 
   if ((cpu_type & (mfloat|mcffpu)) && (ISIDSTART(*s) || (elfregs && *s=='%'))) {
     char *p = s++;
-    hashdata data;
+    regsym *sym;
 
     while (ISIDCHAR(*s) && *s!='.')
       s++;
-    if (find_namelen(regsymhash,p,s-p,&data)) {
-      /* register symbol found */
-      regsym *sym = data.ptr;
 
-      if (sym->type==RSTYPE_FPn)
-        reg = (signed char)sym->reg;
+    if (sym = find_regsym(p,s-p)) {
+      /* register symbol found */
+      if (sym->reg_type==RSTYPE_FPn)
+        reg = (signed char)sym->reg_num;
     }
     else {
       if (elfregs) {
@@ -775,7 +789,7 @@ static signed char getfreg(char **start)
 }
 
 
-static unsigned short scan_FPnlist(char **start)
+static uint16_t scan_FPnlist(char **start)
 /* returns bit field for a FPn or FPIAR/FPSR/FPCR register list
    returns 0 otherwise */
 {
@@ -783,7 +797,7 @@ static unsigned short scan_FPnlist(char **start)
 
   if (getfreg(&p) >= 0) {
     signed char lastreg=-1,reg,rx;
-    unsigned short list = 0;
+    uint16_t list = 0;
     int fpnmode = -1;
     int rangemode = 0;
 
@@ -846,7 +860,7 @@ static unsigned short scan_FPnlist(char **start)
 
 static int get_any_register(char **start,operand *op,int required)
 /* checks for Dn, An, register lists and any other special register;
-   fill op->mode, op->register, op->exp.value[0] accordingly when successful
+   fill op->mode, op->register, op->value[0] accordingly when successful
    and return with != 0 */
 {
   char *s = *start;
@@ -862,7 +876,7 @@ static int get_any_register(char **start,operand *op,int required)
       op->mode = MODE_Extended;
       op->reg = REG_RnList;
       *start = s;
-      op->exp.value[0] = number_expr((taddr)scan_Rnlist(start));
+      op->value[0] = number_expr((taddr)scan_Rnlist(start));
     }
     else {
       unsigned char sf = reg >> 4;
@@ -885,7 +899,7 @@ static int get_any_register(char **start,operand *op,int required)
 
     if (*p=='-' || *p=='/' || (ot->flags & OTF_REGLIST)) {
       /* it's a register list */
-      unsigned short lst;
+      uint16_t lst;
 
       op->mode = MODE_Extended;
       op->reg = REG_FPnList;
@@ -893,7 +907,7 @@ static int get_any_register(char **start,operand *op,int required)
       lst = scan_FPnlist(start);
       if (reg >= 10)
         op->flags |= FL_FPSpec;  /* fpiar/fpcr/fpsr list */
-      op->exp.value[0] = number_expr((taddr)lst);
+      op->value[0] = number_expr((taddr)lst);
     }
     else {
       op->mode = MODE_FPn;
@@ -954,7 +968,7 @@ static int get_any_register(char **start,operand *op,int required)
               break;  /* not available for current CPU */
             op->mode = MODE_SpecReg;
             op->reg = i;
-            op->exp.value[0] = number_expr(SpecRegs[i].code);
+            op->value[0] = number_expr(SpecRegs[i].code);
             *start = s;
             return 1;
           }
@@ -1058,22 +1072,25 @@ static void set_index(operand *op,short i)
 /* fill index register, including size and scale, into format word */
 {
   if (i >= 0) {
-    unsigned s;
+    unsigned s = REGscale(i);
 
     op->flags |= FL_UsesFormat;
+
     if (REGisZero(i)) {
       op->format |= FW_FullFormat | FW_IndexSuppress;
       op->flags |= FL_020up | FL_noCPU32;
     }
-    else if (s = REGscale(i)) {
-      /* Coldfire allows scale factors *2 and *4, otherwise 020up required */
-      if (!(cpu_type & mcf) || s > 2)
+    else if (s) {
+      /* ColdFire allows scale factors *2 and *4 (*8 when FPU is present),
+         otherwise 68020+ is required. */
+      if (!(cpu_type & mcf) || (s > 2 && !(cpu_type & mcffpu)))
         op->flags |= FL_020up;
     }
+
     op->format |= (REGisAn(i) ? FW_IndexAn : 0) |
                   FW_IndexReg(i) |
                   ((REGext(i)==EXT_LONG) ? FW_LongIndex : 0) |
-                  FW_Scale(REGscale(i));
+                  FW_Scale(s);
   }
 }
 
@@ -1106,132 +1123,65 @@ static void check_basereg(operand *op)
    active BASEREG registers and automatically subtract its base-expression
    from the operand's displacement value. */
 {
-  if (op->reg>=0 && op->reg<=6 && baseexp[op->reg] && op->exp.value[0]) {
-    if (find_base(op->exp.value[0],NULL,0)) {
-      expr *new = make_expr(SUB,op->exp.value[0],copy_tree(baseexp[op->reg]));
+  if (op->reg>=0 && op->reg<=6 && baseexp[op->reg] && op->value[0]) {
+    if (find_base(op->value[0],NULL,NULL,0) == BASE_OK) {
+      expr *new = make_expr(SUB,op->value[0],copy_tree(baseexp[op->reg]));
 
       simplify_expr(new);
-      op->exp.value[0] = new;
+      op->value[0] = new;
+      op->flags |= FL_BaseReg;  /* mark potential BASEREG expression */
     }
   }
 }
 
 
-static char *parse_immediate(char *start,operand *op,int is_float,int is_quad)
-/* Parse an immediate operand of unknown size, which can be byte, word,
-   long, quadword, single-, double-, extended-precision float or packed.
-   Floating point expressions (is_float) are restriced to a simple
-   constant, without any arithmetic operations. Decimal constants are
-   parsed as floating point. Hex, octal or binary contants directly into
-   IEEE format.
-   64-bit expressions (is_quad) are parsed under the same restrictions as
-   floating point, but they are not seen as float when decimal. */
+static int fix_basereg(operand *op,int final)
+/* Check whether the left side of the "<exp> - <base>" expression is still
+   undefined. When it became a constant expression in the meantime, then
+   do not treat it any longer as a BASEREG operand. */
 {
-  char *p = start;
-  int base;
-  int neg = 0;
-
-  if (*p == '-') {
-    p++;
-    p = skip(p);
-    neg = 1;
-  }
-  else if (*p == '+') {
-    p++;
-    p = skip(p);
-  }
-  p = const_prefix(p,&base);
-
-  if (base==10 && is_float) {
-    /* read a base-10 floating point constant */
-    long double flt_val;
-    expr *int_exp;
-
-    flt_val = (long double)strtod(start,&p);
-    int_exp = parse_expr(&start);
-    /* check if integer expression parser got more, then use it instead */
-    if (start > p) {
-      op->exp.value[0] = int_exp;
-      return start;
-    }
-    op->exp.cfloat = mymalloc(sizeof(long double));
-    op->flags |= FL_Float;
-    *(op->exp.cfloat) = flt_val;
-    return p;
-  }
-  else if (base && (is_float || is_quad)) {
-    /* try to read a 64 or 96 bit constant */
-    int96 b,c,max,min;
-    expr *int_exp;
-
-    int96_assign32(c,0);
-    int96_assign64(max,0x100000000LL);
-    int96_assign64(min,-0x80000000LL);
-
-    if (base <= 10) {
-      int96_assign32(b,base);
-      while (*p>='0' && *p<'0'+base) {
-        /* Warning! This is REALLY slow! */
-        int96_add32(int96_mulu(c,b),(long)(*p++ - '0'));
-      }
-    }
-    else if (base == 16) {
-      for (;;) {
-        if (*p>='0' && *p<='9')
-          int96_add32(int96_lshleft(c,4),(long)(*p++ - '0'));
-        else if (*p>='a' && *p<='f')
-          int96_add32(int96_lshleft(c,4),(long)(*p++ - 'a' + 10));
-        else if (*p>='A' && *p<='F')
-          int96_add32(int96_lshleft(c,4),(long)(*p++ - 'A' + 10));
-        else
-          break;
-      }
-    }
-    else
-      ierror(0);
-
-    /* check if integer expression parser got more, then use it instead */
-    int_exp = parse_expr(&start);
-    if (start > p) {
-      op->exp.value[0] = int_exp;
-      return start;
-    }
+  taddr val;
+  expr *left;
 
-    if (neg)
-      int96_negate(c);
-    if (int96_compare(c,max)>=0 || int96_compare(c,min)<0) {
-      int96_lshleft(max,32);
-      int96_lshleft(min,32);
-      if (int96_compare(c,max)>=0 || int96_compare(c,min)<0) {
-        /* full 96 bits are needed */
-        op->exp.cint = mymalloc(12);
-        int96_copybe(op->exp.cint,c,12);
-        op->flags |= FL_Int96;
+  if (op->value[0]!=NULL && (left=op->value[0]->left)!=NULL) {
+    if (eval_expr(left,&val,NULL,0)) {
+      /* Kill the subtrahend of the base-relative expression. */
+      if (final) {
+        op->value[0]->left = NULL;
+        free_expr(op->value[0]);
       }
-      else {
-        /* 64 bit integer needed */
-        op->exp.cint = mymalloc(8);
-        int96_copybe(op->exp.cint,c,8);
-        op->flags |= FL_Int64;
-      }
-      return p;
-    }
-    else {
-      op->exp.value[0] = int_exp;
-      return start;
+      op->value[0] = left;
+      op->flags &= ~FL_BaseReg;
+      return 1;  /* fixed */
     }
   }
+  return 0;  /* nothing changed */
+}
+
 
-  op->exp.value[0] = parse_expr(&start);
+static char *parse_immediate(char *start,operand *op,int is_float,int is_quad)
+/* Parse an immediate operand of unknown size, which can be byte, word,
+   long, quadword, single-, double-, extended-precision float or packed.
+   is_float: Decimal constants are parsed as floating point. Hex, octal or
+   binary contants directly into IEEE format.
+   is_quad: 64-bit expressions are converted into thuge type, not taddr,
+   so they don't allow labels and relocations. */
+{
+  if (is_float)
+    op->value[0] = parse_expr_float(&start);
+  else if (is_quad)
+    op->value[0] = parse_expr_huge(&start);
+  else
+    op->value[0] = parse_expr(&start);
   return start;
 }
 
 
-int base_disp_and_ext(operand *op,char **p)
+static int base_disp_and_ext(operand *op,char **p)
 /* Parse expression to value[0] and return the displacement-extension when
    given (or 0 when missing). Returns -1 when no valid expression was found. */
 {
-  if (op->exp.value[0] = parse_expr(p)) {
+  if (op->value[0] = parse_expr(p)) {
     int disp_size;
 
     if (disp_size = read_extension(p,0))
@@ -1244,15 +1194,15 @@ int base_disp_and_ext(operand *op,char **p)
 
 int parse_operand(char *p,int len,operand *op,int required)
 {
-  unsigned short reqmode = optypes[required].modes;
-  unsigned short reqflags = optypes[required].flags;
+  uint16_t reqmode = optypes[required].modes;
+  uint16_t reqflags = optypes[required].flags;
   char *start = p;
   int i;
 
   op->mode = op->reg = -1;
   op->flags = 0;
   op->format = 0;
-  op->exp.value[0] = op->exp.value[1] = NULL;
+  op->value[0] = op->value[1] = NULL;
   p = skip(p);
   if (convert_brackets && !(cpu_type & (m68020up|cpu32|mcf))) {
     char c,*p2=p;
@@ -1317,6 +1267,7 @@ int parse_operand(char *p,int len,operand *op,int required)
     }
     else {
       int disp_size = 0;
+      int od_size;
       char *start_term = NULL;
 
       if (*p=='-' && *(p+1)=='(') {
@@ -1349,13 +1300,24 @@ int parse_operand(char *p,int len,operand *op,int required)
 
         start_term = p;
         p = skip(p+1);
+
+        parse_indir:
         if (*p == '[') {
           /* 020+ memory indirect addressing mode */
           p = skip(p+1);
-          if (op->exp.value[0]) {
-            cpu_error(6);  /* displacement outside parentheses ignored */
-            free_expr(op->exp.value[0]);
-            op->exp.value[0] = NULL;
+          if (op->value[0]) {
+            /* An already parsed displacement expression before '[' */
+            /* becomes an outer displacement for compatibility. */
+            if (!devpac_compat)
+              cpu_error(6);  /* warn about displacement at bad position */
+            op->value[1] = op->value[0];
+            od_size = disp_size ? disp_size : EXT_WORD;
+            op->value[0] = NULL;
+            disp_size = 0;
+            if (op->flags & FL_NoOptBase) {
+              op->flags &= ~FL_NoOptBase;
+              op->flags |= FL_NoOptOuter;
+            }
           }
           mem_indir = 1;
         }
@@ -1363,7 +1325,7 @@ int parse_operand(char *p,int len,operand *op,int required)
           mem_indir = 0;
 
         reg = getbasereg(&p);
-        if (reg<0 && op->exp.value[0]==NULL) {
+        if (reg<0 && op->value[0]==NULL) {
           /* no register identified and still no value read: try it again */
           disp_size = base_disp_and_ext(op,&p);
           p = skip(p);
@@ -1375,6 +1337,8 @@ int parse_operand(char *p,int len,operand *op,int required)
           if (*p == ',') {    /* "(displacement," expects register */
             p = skip(p+1);
             if ((reg = getbasereg(&p)) < 0) {
+              if (*p == '[')
+                goto parse_indir;
               cpu_error(7);  /* base or index register expected */
               return PO_CORRUPT;
             }
@@ -1382,7 +1346,7 @@ int parse_operand(char *p,int len,operand *op,int required)
         }
 
         /* check for illegal displacement extension */
-        if (op->exp.value[0] && disp_size>EXT_LONG) {
+        if (op->value[0] && disp_size>EXT_LONG) {
           cpu_error(5);  /* bad extension */
           disp_size = 0;
         }
@@ -1425,13 +1389,15 @@ int parse_operand(char *p,int len,operand *op,int required)
               }
               else {
                 if (!mem_indir || !clbrk) {
-                  if (op->exp.value[0] == NULL) {
+                  if (op->value[0] == NULL) {
                     /* (An,bd) is treated as (bd,An) for compatibility */
                     if ((disp_size = base_disp_and_ext(op,&p)) < 0) {
                       cpu_error(12);  /* index register expected */
                       return PO_CORRUPT;
                     }
                     else {
+                      if (!devpac_compat)
+                        cpu_error(6);  /* displacement at bad position */
                       p = skip(p);
                       goto parse_index;
                     }
@@ -1466,33 +1432,41 @@ int parse_operand(char *p,int len,operand *op,int required)
             if (*p == ',') {  /* "([bd,Rn],Xn,od" or "([bd,Rn,Xn],od" */
               /* read outer displacement */
               p = skip(p+1);
-              if (op->exp.value[1] = parse_expr(&p)) {
-                int od_size;
-
-                if (od_size = read_extension(&p,0))
-                  op->flags |= FL_NoOptOuter;  /* do not optimize when size given */
-                else
-                  od_size = EXT_WORD;
-                if (od_size == EXT_WORD)
-                  op->format |= FW_IndSize(FW_Word);
-                else if (od_size == EXT_LONG)
-                  op->format |= FW_IndSize(FW_Long);
+              if (op->value[1] == NULL) {
+                if (op->value[1] = parse_expr(&p)) {
+                  if (od_size = read_extension(&p,0))
+                    op->flags |= FL_NoOptOuter;  /* do not optimize with size */
+                  else
+                    od_size = EXT_WORD;
+                  p = skip(p);
+                }
                 else
-                  cpu_error(5);  /* bad extension */
-                p = skip(p);
+                  cpu_error(14);  /* missing outer displacement */
               }
+            }
+            if (op->value[1] != NULL) {
+              /* set outer displacement */
+              if (od_size == EXT_WORD)
+                op->format |= FW_IndSize(FW_Word);
+              else if (od_size == EXT_LONG)
+                op->format |= FW_IndSize(FW_Long);
               else
-                cpu_error(14);  /* missing outer displacement */
+                cpu_error(5);  /* bad extension */
             }
             else
               op->format |= FW_IndSize(FW_Null);  /* no outer disp. given */
           }
         }
-        if (*p==',' && op->exp.value[0]==NULL) {
+
+        if (*p==',' && op->value[0]==NULL) {
           /* (Rn,bd) is treated as (bd,Rn) for compatibility reasons */
           p = skip(p+1);
           disp_size = base_disp_and_ext(op,&p);
-          p = skip(p);
+          if (disp_size >= 0) {
+            p = skip(p);
+            if (!devpac_compat)
+              cpu_error(6);  /* warn about displacement at bad position */
+          }
         }
         if (*p++ != ')')
           cpu_error(15,')');  /* ) expected */
@@ -1507,7 +1481,7 @@ int parse_operand(char *p,int len,operand *op,int required)
             }
             if (cpu_type & mcf) {
               if (REGext(idx)!=0 && REGext(idx)!=EXT_LONG)
-                cpu_error(5);  /* bad extension - only .l for Coldfire */
+                cpu_error(5);  /* bad extension - only .l for ColdFire */
               idx &= ~(EXT_MASK<<REGext_Shift);
               idx |= EXT_LONG<<REGext_Shift;
             }
@@ -1522,12 +1496,12 @@ int parse_operand(char *p,int len,operand *op,int required)
           if (!disp_size)
             disp_size = idx<0 ? EXT_WORD : EXT_BYTE;
 
-          if (!mem_indir && !REGisZero(reg) && op->exp.value[1]==NULL &&
+          if (!mem_indir && !REGisZero(reg) && op->value[1]==NULL &&
               ((idx<0 && disp_size==EXT_WORD) ||
                (idx>=0 && disp_size==EXT_BYTE && !REGisZero(idx)))) {
             /* normal 68000 addressing modes, including 020+ scaling */
             if (idx < 0) {
-              if (op->exp.value[0]) {
+              if (op->value[0]) {
                 if (REGisPC(reg)) {
                   op->mode = MODE_Extended;           /* (d16,PC) */
                   op->reg = REG_PC16Disp;
@@ -1574,9 +1548,9 @@ int parse_operand(char *p,int len,operand *op,int required)
               }
             }
             else {
-              if (!op->exp.value[0]) {
+              if (!op->value[0]) {
                 /* need a displacement for indexed addressing modes */
-                op->exp.value[0] = number_expr(0);
+                op->value[0] = number_expr(0);
               }
               if (REGisPC(reg)) {                     /* (d8,PC,Xn) */
                 op->mode = MODE_Extended;
@@ -1613,7 +1587,7 @@ int parse_operand(char *p,int len,operand *op,int required)
             if (REGisZero(idx))
               op->format |= FW_IndexSuppress;
 
-            if (op->exp.value[0]) {
+            if (op->value[0]) {
               if (disp_size == EXT_LONG)
                 op->format |= FW_BDSize(FW_Long);
               else
@@ -1625,7 +1599,7 @@ int parse_operand(char *p,int len,operand *op,int required)
         }
       }
 
-      if (op->mode<0 && op->exp.value[0]!=NULL) {
+      if (op->mode<0 && op->value[0]!=NULL) {
         /* we have read a value but no register at all,
            then it's an absolute addressing mode */
         op->mode = MODE_Extended;
@@ -1714,12 +1688,12 @@ int parse_operand(char *p,int len,operand *op,int required)
         }
 #if 0 /* @@@ not used */
         if (reqflags & OTF_CHKVAL) {
-          if (op->exp.value[0] == NULL)
+          if (op->value[0] == NULL)
             ierror(0);
-          simplify_expr(op->exp.value[0]);
-          if (op->exp.value[0]->type == NUM) {
-            if (op->exp.value[0]->c.val < (taddr)optypes[required].first ||
-                op->exp.value[0]->c.val > (taddr)optypes[required].last)
+          simplify_expr(op->value[0]);
+          if (op->value[0]->type == NUM) {
+            if (op->value[0]->c.val < (taddr)optypes[required].first ||
+                op->value[0]->c.val > (taddr)optypes[required].last)
               return PO_NOMATCH;
           }
           else
@@ -1732,7 +1706,7 @@ int parse_operand(char *p,int len,operand *op,int required)
           if (op->mode == MODE_AnIndir) {
             /* translate (An) into 0(An) for MOVEP */
             op->mode = MODE_An16Disp;
-            op->exp.value[0] = number_expr(0);
+            op->value[0] = number_expr(0);
             cpu_error(48,(int)op->reg,(int)op->reg);  /* warn about it */
           }
         }
@@ -1755,15 +1729,26 @@ static void eval_oper(operand *op,section *sec,taddr pc,int final)
 
   for (i=0; i<2; i++) {
     op->base[i] = NULL;
-    if ((op->flags&FL_expMask)==FL_Exp && op->exp.value[i]!=NULL) {
-      if (!eval_expr(op->exp.value[i],&op->extval[i],sec,pc)) {
-        op->base[i] = find_base(op->exp.value[i],sec,pc);
-        if (final && op->base[i]==NULL)
-          cpu_error(17);  /* illegal relocation */
+    if (type_of_expr(op->value[i]) == NUM) {
+eval:
+      if (!eval_expr(op->value[i],&op->extval[i],sec,pc)) {
+        op->basetype[i] = find_base(op->value[i],&op->base[i],sec,pc);
+
+        if (op->basetype[i] == BASE_ILLEGAL) {
+          if (op->flags & FL_BaseReg) {
+            if (fix_basereg(op,final))
+              goto eval;  /* evaluate fixed operand again */
+          }
+          if (final)
+            general_error(38);  /* illegal relocation */
+        }
       }
+      op->flags |= FL_ExtVal0 << i;
     }
-    else
+    else {
       op->extval[i] = 0x7fffffff;  /* dummy to prevent immediate opt. */
+      op->flags &= ~(FL_ExtVal0 << i);
+    }
   }
 }
 
@@ -1772,82 +1757,66 @@ static int copy_float_exp(unsigned char *d,operand *op,int size)
 /* write immediate floating point expression of 'size' to
    destination buffer, return 0 when everything was ok, else error-code */
 {
-  taddr ev = op->extval[0];
-  int f = op->flags & FL_expMask;
-  unsigned char fbuf[12];
+  int et;
+  thuge h;
+  tfloat f;
+
+  if (op->flags & FL_ExtVal0)
+    et = NUM;
+  else
+    et = type_of_expr(op->value[0]);
+
+  if (et == NUM) {
+    if (op->base[0])
+      return 20;  /* constant integer expression required */
+  }
+  else if (et == HUG) {
+    if (!eval_expr_huge(op->value[0],&h))
+      return 59;  /* cannot evaluate huge integer */
+  }
+  else if (et == FLT) {
+    if (!eval_expr_float(op->value[0],&f))
+      return 60;  /* cannot evaluate floating point */
+  }
+  else
+    return 37;  /* immediate operand has illegal type */
 
   switch (size) {
 
     case EXT_SINGLE:
-      if (f == FL_Exp) {
-        setval(1,d,4,ev);
-        if (op->base[0])
-          return 20;  /* constant integer expression required */
-      }
-      else if (f == FL_Float) {
-        conv2single(fbuf,*op->exp.cfloat);
-        memcpy(d,fbuf,4);
-      }
+      if (et == NUM)
+        setval(1,d,4,op->extval[0]);
+      else if (et == HUG)
+        huge_to_mem(1,d,4,h);
       else
-        return 37;  /* immediate operand has illegal type */
+        conv2ieee32(1,d,f);
       break;
 
     case EXT_DOUBLE:
-      if (f == FL_Exp) {
-        memset(d,(ev>=0)?0:-1,4);
-        setval(1,d+4,4,ev);
-        if (op->base[0])
-          return 20;  /* constant integer expression required */
-      }
-      else if (f == FL_Int64) {
-        memcpy(d,op->exp.cint,8);
-      }
-      else if (f == FL_Float) {
-        conv2double(fbuf,*op->exp.cfloat);
-        memcpy(d,fbuf,8);
-      }
+      if (et == NUM)
+        setval_signext(1,d,4,4,op->extval[0]);
+      else if (et == HUG)
+        huge_to_mem(1,d,8,h);
       else
-        return 37;  /* immediate operand has illegal type */
+        conv2ieee64(1,d,f);
       break;
 
     case EXT_EXTENDED:
-      if (f == FL_Exp) {
-        memset(d,(ev>=0)?0:-1,8);
-        setval(1,d+8,4,ev);
-        if (op->base[0])
-          return 20;  /* constant integer expression required */
-      }
-      else if (f == FL_Int64) {
-        memset(d,(*op->exp.cint&0x80)?-1:0,4);
-        memcpy(d+4,op->exp.cint,8);
-      }
-      else if (f == FL_Int96) {
-        memcpy(d,op->exp.cint,12);
-      }
-      else {
-        conv2extended(fbuf,*op->exp.cfloat);
-        memcpy(d,fbuf,12);
-      }
+      if (et == NUM)
+        setval_signext(1,d,8,4,op->extval[0]);
+      else if (et == HUG)
+        huge_to_mem(1,d,12,h);
+      else
+        conv2ieee80(1,d,f);
       break;
 
     case EXT_PACKED:
-      if (f == FL_Exp) {
-        memset(d,(ev>=0)?0:-1,8);
-        setval(1,d+8,4,ev);
-        if (op->base[0])
-          return 20;  /* constant integer expression required */
-      }
-      else if (f == FL_Int64) {
-        memset(d,(*op->exp.cint&0x80)?-1:0,4);
-        memcpy(d+4,op->exp.cint,8);
-      }
-      else if (f == FL_Int96) {
-        memcpy(d,op->exp.cint,12);
-      }
-      else {
-        conv2packed(fbuf,*op->exp.cfloat);
-        memcpy(d,fbuf,12);
-      }
+      if (et == NUM)
+        setval_signext(1,d,8,4,op->extval[0]);
+      else if (et == HUG)
+        huge_to_mem(1,d,12,h);
+      else
+        conv2packed(d,f);
       break;
 
     default:
@@ -1883,7 +1852,7 @@ static void optimize_oper(operand *op,struct optype *ot,section *sec,
   size16[1] = op->extval[1]>=-0x8000 && op->extval[1]<=0x7fff;
   pcdisp = op->extval[0] - cpc;
   pcdisp16 = (op->base[0]==NULL) ? 0 : (pcdisp>=-0x8000 && pcdisp<=0x7fff);
-  undef = (op->base[0]==NULL) ? 0 : op->base[0]->type==IMPORT;
+  undef = (op->base[0]==NULL) ? 0 : EXTREF(op->base[0]);
 
   if (bopt) {  /* base displacement optimizations allowed */
 
@@ -1893,11 +1862,11 @@ static void optimize_oper(operand *op,struct optype *ot,section *sec,
         /* (0,An) --> (An) */
         op->mode = MODE_AnIndir;
         if (final) {
-          free_expr(op->exp.value[0]);
+          free_expr(op->value[0]);
           if (warn_opts>1)
             cpu_error(49,"(0,An)->(An)");
         }
-        op->exp.value[0] = NULL;
+        op->value[0] = NULL;
       }
       else if (((op->base[0] && !undef) || (!op->base[0] && !size16[0])) &&
                (cpu_type & (m68020up|cpu32)) && op->reg!=sdreg &&
@@ -1964,7 +1933,7 @@ static void optimize_oper(operand *op,struct optype *ot,section *sec,
           cpu_error(50,"abs.w->abs.l");
       }
       else if (op->base[0]) {
-        if (typechk && op->base[0]->type == LABSYM) {
+        if (typechk && LOCREF(op->base[0])) {
           /* label.w --> label.l */
           op->reg = REG_AbsLong;
           if (final)
@@ -2208,9 +2177,9 @@ static int optypes_subset(mnemonic *mold,mnemonic *mnew)
   for (i=0; i<MAX_OPERANDS; i++) {
     int ot_old = mold->operand_type[i];
     int ot_new = mnew->operand_type[i];
-    unsigned short fl_old = optypes[ot_old].flags;
-    unsigned short fl_new = optypes[ot_new].flags;
-    unsigned short m = optypes[ot_old].modes;
+    uint16_t fl_old = optypes[ot_old].flags;
+    uint16_t fl_new = optypes[ot_new].flags;
+    uint16_t m = optypes[ot_old].modes;
 
     if ((!ot_old && ot_new) || (!ot_new && ot_old)) {
       i = -1;  /* different number of operands */
@@ -2234,10 +2203,10 @@ static int optypes_subset(mnemonic *mold,mnemonic *mnew)
 
 
 static instruction *ip_doubleop(int code,char *q,signed char mode1,
-                                signed char reg1,unsigned short flags1,
-                                unsigned short format1,expr *exp1,
+                                signed char reg1,uint16_t flags1,
+                                uint16_t format1,expr *exp1,
                                 signed char mode2, signed char reg2,
-                                unsigned short flags2, unsigned short format2,
+                                uint16_t flags2, uint16_t format2,
                                 expr *exp2)
 {
   instruction *ip;
@@ -2247,23 +2216,19 @@ static instruction *ip_doubleop(int code,char *q,signed char mode1,
   ip = clr_instruction(&newip[ipslot]);
   ip->code = code;
   ip->qualifiers[0] = q;
-  if (exp1)
-    flags1 |= FL_Exp;
   ip->op[0] = clr_operand(&newop[ipslot][0]);
   ip->op[0]->mode = mode1;
   ip->op[0]->reg = reg1;
   ip->op[0]->flags = flags1;
   ip->op[0]->format = format1;
-  ip->op[0]->exp.value[0] = exp1;
+  ip->op[0]->value[0] = exp1;
   if (mode2 >= 0) {
-    if (exp2)
-      flags2 |= FL_Exp;
     ip->op[1] = clr_operand(&newop[ipslot][1]);
     ip->op[1]->mode = mode2;
     ip->op[1]->reg = reg2;
     ip->op[1]->flags = flags2;
     ip->op[1]->format = format2;
-    ip->op[1]->exp.value[0] = exp2;
+    ip->op[1]->value[0] = exp2;
   }
   ++ipslot;
   return ip;
@@ -2271,8 +2236,8 @@ static instruction *ip_doubleop(int code,char *q,signed char mode1,
 
 
 static instruction *ip_singleop(int code,char *q,signed char mode,
-                                signed char reg,unsigned short flags,
-                                unsigned short format,expr *exp)
+                                signed char reg,uint16_t flags,
+                                uint16_t format,expr *exp)
 {
   return ip_doubleop(code,q,mode,reg,flags,format,exp,-1,0,0,0,NULL);
 }
@@ -2295,7 +2260,7 @@ static int test_incr_ea(operand *op,taddr offset)
       return 0;
   }
   else if (m == MODE_An16Disp) {
-    if (val<-8000 || val>0x7fff)
+    if (val<-0x8000 || val>0x7fff)
       return 0;
   }
   else if (m == MODE_Extended) {
@@ -2317,12 +2282,12 @@ static void incr_ea(operand *op,taddr offset,int final)
     if (m == MODE_AnIndir) {
       /* change to (d16,An) and allocate the d16 expression */
       op->mode = MODE_An16Disp;
-      op->exp.value[0] = number_expr(offset);
+      op->value[0] = number_expr(offset);
     }
     else if (m==MODE_An16Disp || m==MODE_An8Format ||
              (m==MODE_Extended && (r==REG_AbsShort || r==REG_AbsLong))) {
       /* increment the expression by 'offset' */
-      op->exp.value[0] = make_expr(ADD,op->exp.value[0],number_expr(offset));
+      op->value[0] = make_expr(ADD,op->value[0],number_expr(offset));
     }
   }
   else {
@@ -2333,6 +2298,15 @@ static void incr_ea(operand *op,taddr offset,int final)
 }
 
 
+static int aindir_in_list(operand *op,taddr list)
+/* tests if operand is (An)+ or -(An) and An is present in register list */
+{
+  if (op->mode==MODE_AnPostInc || op->mode==MODE_AnPreDec)
+    return (list & (1 << (REGAn + REGget(op->reg)))) != 0;
+  return 0;
+}
+
+
 static unsigned char optimize_instruction(instruction *iplist,section *sec,
                                           taddr pc,int final)
 {
@@ -2342,7 +2316,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
              tolower((unsigned char)ip->qualifiers[0][0]) : '\0';
   unsigned char ipflags = ip->ext.un.real.flags;
   signed char lastsize = ip->ext.un.real.last_size;
-  unsigned short oc;
+  char orig_ext = (char)ip->ext.un.real.orig_ext;
+  uint16_t oc;
   taddr val,cpc;
   int abs,i;
 
@@ -2352,13 +2327,13 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
   while (!strcmp(mnemo->name,mnemonics[ip->code+1].name) &&
          (mnemonics[ip->code+1].ext.available & cpu_type) != 0) {
     mnemonic *nextmn = &mnemonics[ip->code+1];
-    unsigned short nextsize = nextmn->ext.size;
+    uint16_t nextsize = nextmn->ext.size;
 
     /* first check if next instruction supports current size extension */
     if ((mnemo->ext.size&SIZE_MASK) != SIZE_UNSIZED ||
         (nextsize&SIZE_MASK) != SIZE_UNSIZED) {
       if ((nextsize&S_CFCHECK) && (cpu_type&mcf))
-        nextsize &= ~(SIZE_BYTE|SIZE_WORD);  /* Coldfire */
+        nextsize &= ~(SIZE_BYTE|SIZE_WORD);  /* ColdFire */
       if ((nextsize & lc_ext_to_size(ext)) == 0)
         break;  /* size not supported */
     }
@@ -2369,19 +2344,18 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
   mnemo = &mnemonics[ip->code];
 
   cpc = pc + (S_OPCODE_SIZE(mnemo->ext.size) << 1);
-
   if (phxass_compat) {
     /* For PhxAss-compatibility, set value of the "current-pc-symbol"
        to pc + S_OPCODE_SIZE. */
     pc = cpc;
-
-    /* Make sure JMP/JSR (label,PC) is not optimized for PhxAss-compatibility */
-    if ((mnemo->ext.opcode[0]==0x4ec0 || mnemo->ext.opcode[0]==0x4e80) &&
-        ip->op[0] &&
-        ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_PC16Disp)
-      ip->op[0]->flags |= FL_NoOpt;  /* do not optimize */
   }
 
+  /* Make sure JMP/JSR (label,PC) is never optimized (to a short-branch) */
+  if ((mnemo->ext.opcode[0]==0x4ec0 || mnemo->ext.opcode[0]==0x4e80) &&
+      ip->op[0]!=NULL && ip->op[0]->mode==MODE_Extended &&
+      ip->op[0]->reg==REG_PC16Disp)
+    ip->op[0]->flags |= FL_NoOpt;  /* do not optimize */
+
   /* evaluate and optimize operands */
   for (i=0; i<MAX_OPERANDS && ip->op[i]!=NULL; i++)
     optimize_oper(ip->op[i],&optypes[mnemo->operand_type[i]],sec,pc,cpc,final);
@@ -2494,17 +2468,19 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
     else if (val==-1 && muls) {
       if (ext == 'w') {
         /* muls.w #-1,Dn -> ext.l Dn + neg.l Dn */
-        ip->code = OC_EXT;
-        ip->qualifiers[0] = l_str;
-        if (final) {
-          free_operand(ip->op[0]);
-          if (warn_opts)
-            cpu_error(51,"muls.w #-1,Dn -> ext.l Dn + neg.l Dn");
+        if (opt_speed) {
+          ip->code = OC_EXT;
+          ip->qualifiers[0] = l_str;
+          if (final) {
+            free_operand(ip->op[0]);
+            if (warn_opts)
+              cpu_error(51,"muls.w #-1,Dn -> ext.l Dn + neg.l Dn");
+          }
+          ip->op[0] = ip->op[1];
+          ip->op[1] = NULL;
+          ip->ext.un.copy.next = ip_singleop(OC_NEG,l_str,MODE_Dn,
+                                             ip->op[0]->reg,0,0,NULL);
         }
-        ip->op[0] = ip->op[1];
-        ip->op[1] = NULL;
-        ip->ext.un.copy.next = ip_singleop(OC_NEG,l_str,MODE_Dn,
-                                           ip->op[0]->reg,0,0,NULL);
       }
       else {
         /* muls.l #-1,Dn -> neg.l Dn */
@@ -2521,7 +2497,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
 
     else if (val>=2 && val<=0x100 && cntones(val,9)==1) {
       val = bfffo(val,1,9);
-      if (ext=='w' && muls) {
+      if (ext=='w' && muls && opt_speed) {
         /* muls.w #x,Dn -> ext.l Dn + asl.l #x,Dn */
         instruction *ip2 = copy_instruction(ip);
 
@@ -2532,8 +2508,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         ip2->op[0]->extval[0] = val;
         if (final) {
           free_operand(ip->op[0]);
-          free_expr(ip2->op[0]->exp.value[0]);
-          ip2->op[0]->exp.value[0] = number_expr(val);
+          free_expr(ip2->op[0]->value[0]);
+          ip2->op[0]->value[0] = number_expr(val);
           if (warn_opts)
             cpu_error(51,"muls.w #x,Dn -> ext.l Dn + asl.l #x,Dn");
         }
@@ -2544,7 +2520,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         ip->ext.un.copy.next = ip2;  /* append ASL */
         ip = ip2;  /* make stage 2 look at the ASL */
       }
-      else if (ext=='w' && !muls && (cpu_type&(mcfb|mcfc))) {
+      else if (ext=='w' && !muls && (cpu_type&(mcfb|mcfc)) && opt_speed) {
         /* ColdFire ISA_B/ISA_C: mulu.w #x,Dn -> mvz.w Dn,Dn + lsl.l #x,Dn */
         instruction *ip2 = copy_instruction(ip);
 
@@ -2555,8 +2531,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         ip2->qualifiers[0] = l_str;
         ip2->op[0]->extval[0] = val;
         if (final) {
-          free_expr(ip2->op[0]->exp.value[0]);
-          ip2->op[0]->exp.value[0] = number_expr(val);
+          free_expr(ip2->op[0]->value[0]);
+          ip2->op[0]->value[0] = number_expr(val);
           if (warn_opts)
             cpu_error(51,"mulu.w #x,Dn -> mvz.w Dn,Dn + lsl.l #x,Dn");
         }
@@ -2569,8 +2545,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         /* mulu/muls.l #x,Dn -> lsl/asl.l #x,Dn */
         ip->code = muls ? OC_ASLI : OC_LSLI;
         if (final) {
-          free_expr(ip->op[0]->exp.value[0]);
-          ip->op[0]->exp.value[0] = number_expr(val);
+          free_expr(ip->op[0]->value[0]);
+          ip->op[0]->value[0] = number_expr(val);
           if (warn_opts)
             cpu_error(51,"mulu/muls.l #x,Dn -> lsl/asl.l #x,Dn");
         }
@@ -2582,7 +2558,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
 
     else if (val<=-2 && val>=-0x100 && muls && cntones(-val,9)==1) {
       val = bfffo(-val,1,9);
-      if (opt_speed && ext=='w') {
+      if (opt_speed && ext=='w' && opt_speed) {
         /* muls.w #-x,Dn -> ext.l Dn + asl.l #x,Dn + neg.l Dn */
         instruction *ip2 = copy_instruction(ip);
 
@@ -2593,8 +2569,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         ip2->op[0]->extval[0] = val;
         if (final) {
           free_operand(ip->op[0]);
-          free_expr(ip2->op[0]->exp.value[0]);
-          ip2->op[0]->exp.value[0] = number_expr(val);
+          free_expr(ip2->op[0]->value[0]);
+          ip2->op[0]->value[0] = number_expr(val);
           if (warn_opts)
             cpu_error(51,"muls.w #-x,Dn -> ext.l Dn + asl.l #x,Dn + neg.l Dn");
         }
@@ -2607,12 +2583,12 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
                                            ip2->op[1]->reg,0,0,NULL);
         ip = ip2;  /* make stage 2 look at the ASL */
       }
-      else if (ext == 'l') {
+      else if (ext == 'l' && opt_speed) {
         /* muls.l #-x,Dn -> asl.l #x,Dn + neg.l Dn */
         ip->code = OC_ASLI;
         if (final) {
-          free_expr(ip->op[0]->exp.value[0]);
-          ip->op[0]->exp.value[0] = number_expr(val);
+          free_expr(ip->op[0]->value[0]);
+          ip->op[0]->value[0] = number_expr(val);
           if (warn_opts)
             cpu_error(51,"muls.l #-x,Dn -> asl.l #x,Dn + neg.l Dn");
         }
@@ -2746,7 +2722,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       }
       else if (regs == 1) {
         /* a single register - MOVEM <ea>,Rn --> MOVE <ea>,Rn */
-        if (opt_movem || (!(list&0xff) && o==1)) {
+        if ((opt_movem || (!(list&0xff) && o==1)) &&
+            !aindir_in_list(ip->op[o^1],list)) {
           signed char r = bfffo(list,0,16);
 
           ip->code = OC_MOVE;
@@ -2756,7 +2733,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
             cpu_error(51,"movem ea,Rn -> move ea,Rn");
         }
       }
-      else if (regs==2 &&
+      else if (regs==2 && opt_speed &&
                ((cpu_type & m68040) || (!(cpu_type & (m68000|m68010)) &&
                 ip->op[o^1]->mode<=MODE_AnPreDec))) {
         /* MOVEM with two registers is faster with two separate MOVEs,
@@ -2765,7 +2742,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         taddr offs = ext=='l' ? 4 : 2;
 
         if ((opt_movem || (!(list&0xff) && o==1)) &&
-            test_incr_ea(ip->op[o^1],offs)) {
+            test_incr_ea(ip->op[o^1],offs) &&
+            !aindir_in_list(ip->op[o^1],list)) {
           signed char r = bfffo(list,0,16);
           instruction *ip2;
 
@@ -2818,7 +2796,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       ip->op[0] = new_operand();
       ip->op[0]->mode = MODE_Extended;
       ip->op[0]->reg = REG_Immediate;
-      ip->op[0]->exp.value[0] = number_expr(0);
+      ip->op[0]->value[0] = number_expr(0);
       if (warn_opts>1)
         cpu_error(51,"clr.l Dn -> moveq #0,Dn");
     }
@@ -2826,6 +2804,61 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       ip->op[0] = NULL;
   }
 
+  else if (opt_gen && abs && (oc==0xc000 || oc==0x0200) &&
+           ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
+    /* ANDI/AND #x,<ea> */
+
+    if ((cpu_type & (mcfb|mcfc)) && ip->op[1]->mode==MODE_Dn && ext=='l' &&
+        (val==0xff || val==0xffff)) {
+      /* ColdFire ISA_B/ISA_C: andi.l #$ff/$ffff,Dn -> mvz.b/w Dn,Dn */
+      ip->code = OC_MVZ;
+      ip->qualifiers[0] = val==0xff ? b_str : w_str;
+      if (final) {
+        free_operand(ip->op[0]);
+        if (warn_opts>1)
+          cpu_error(51,"andi.l #$ff/$ffff,Dn -> mvz.b/w Dn,Dn");
+      }
+      ip->op[0] = ip->op[1];
+    }
+    else if ((val==0xff && ext=='b') || (val==0xffff && ext=='w') ||
+             (val==0xffffffff && ext=='l')) {
+      /* andi.b/w/l #$ff/$ffff/$ffffffff,<ea> -> tst.b/w/l <ea> */
+      ip->code = OC_TST;
+      if (final) {
+        free_operand(ip->op[0]);
+        if (warn_opts>1)
+          cpu_error(51,"andi.b/w/l #$ff/$ffff/$fffffff -> tst");
+      }
+      ip->op[0] = ip->op[1];
+      ip->op[1] = NULL;
+    }
+    else if (val==0 && ((cpu_type & (m68010up|mcf|cpu32)) || opt_clr)) {
+      /* andi.x #0,<ea> -> clr.x <ea> */
+      ip->code = OC_CLR;
+      if (final) {
+        free_operand(ip->op[0]);
+        if (warn_opts>1)
+          cpu_error(51,"and #0 -> clr");
+      }
+      ip->op[0] = ip->op[1];
+      ip->op[1] = NULL;
+    }
+  }
+
+  else if (opt_gen && abs && val==0 &&
+           (oc==0x8000 || oc==0x0000 || oc==0x0a00) &&
+           ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
+    /* ORI/OR/EORI #0,<ea> --> TST <ea> */
+    ip->code = OC_TST;
+    if (final) {
+      free_operand(ip->op[0]);
+      if (warn_opts>1)
+        cpu_error(51,"ori #0 -> tst");
+    }
+    ip->op[0] = ip->op[1];
+    ip->op[1] = NULL;
+  }
+
   else if (opt_gen && abs && oc==0x0a00) {
     if ((ext=='b' && (val&0xff)==0xff) ||
         (ext=='w' && (val&0xffff)==0xffff) || (ext=='l' && val==-1)) {
@@ -2865,8 +2898,8 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
           ip->op[0]->mode = MODE_An16Disp;
           ip->op[0]->reg = ip->op[1]->reg;
           if (!(oc&0x4000) && final) {
-            free_expr(ip->op[0]->exp.value[0]);
-            ip->op[0]->exp.value[0] = number_expr(val);
+            free_expr(ip->op[0]->value[0]);
+            ip->op[0]->value[0] = number_expr(val);
           }
           else {
             ip->op[0]->flags |= FL_DoNotEval;
@@ -2895,7 +2928,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
           val = -val;
           if (final) {
             free_op_exp(ip->op[0]);
-            ip->op[0]->exp.value[0] = number_expr(val);
+            ip->op[0]->value[0] = number_expr(val);
           }
         }
         else
@@ -2921,7 +2954,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
  
           ip2 = ip_doubleop(OC_ADDA,l_str,
                             MODE_Extended,REG_Immediate,
-                            FL_NoOpt,0,ip->op[0]->exp.value[0],
+                            FL_NoOpt,0,ip->op[0]->value[0],
                             MODE_An,ip->op[1]->reg,
                             FL_NoOpt,0,NULL);
           ip->code = OC_MOVEA;
@@ -2940,20 +2973,16 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       if (final && warn_opts>1)
         cpu_error(51,"lea (An),An deleted");
     }
-  }
-
-  else if (opt_gen && (oc==0x4808 || oc==0x4e50) && ip->op[1]->base[0]==NULL
-           && ip->op[1]->extval[0]==0) {
-    /* LINK An,#0 --> PEA (An) + MOVE.L A7,An */
-    ip->code = OC_PEA;
-    ip->op[0]->mode = MODE_AnIndir;
-    if (final)
-      free_operand(ip->op[1]);
-    ip->op[1] = NULL;
-    ip->ext.un.copy.next = ip_doubleop(OC_MOVEA,l_str,MODE_An,7,0,0,NULL,
-                                       MODE_An,ip->op[0]->reg,0,0,NULL);
-    if (final && warn_opts)
-      cpu_error(51,"link An,#0 -> pea (An) + move.l sp,An");
+    else if (opt_gen && abs && val==0 && ip->op[0]->mode==MODE_Extended &&
+             (ip->op[0]->reg==REG_AbsShort || ip->op[0]->reg==REG_AbsLong)) {
+      /* LEA 0,An -> SUBA.L An,An */
+      ip->code = OC_SUBA;
+      ip->qualifiers[0] = l_str;
+      ip->op[0]->mode = MODE_An;
+      ip->op[0]->reg = ip->op[1]->reg;
+      if (final && warn_opts>1)
+        cpu_error(51,"lea 0,An -> suba.l An,An");
+    }
   }
 
   else if (opt_gen && oc==0x4808 && ip->op[1]->base[0]==NULL) {
@@ -2986,7 +3015,13 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
       /* CMP/CMPI/CMPA #0 --> TST */
       if (oc!=0xb0c0 || (cpu_type & (m68020up|cpu32|mcf))) {
-        ip->code = (oc==0xb0c0) ? OC_TST+1 : OC_TST;
+        if (oc == 0xb0c0) {
+          /* optimize both CMP.W #0,An and CMP.L #0,An to TST.L An */
+          ip->code = OC_TST + 1;
+          ip->qualifiers[0] = l_str;
+        }
+        else
+          ip->code = OC_TST;
         if (final)
           free_operand(ip->op[0]);
         ip->op[0] = ip->op[1];
@@ -3001,7 +3036,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
             ((oc&0xf1ff)==0xe108 && opt_lsl)) && !(cpu_type&(m68060|mcf))) {
     /* LSL is only optimized with opt_lsl */
     if ((oc&0x0e00) == 0x0200)
-      val = 1;
+      val = 1;  /* ASL/LSL Dn (missing immediate operand assumed as 1) */
     if (val == 1) {
       /* ASL/LSL #1,Dn --> ADD Dn,Dn */
       ip->code = OC_ADD;
@@ -3011,23 +3046,22 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       if (final && (warn_opts>1 || (warn_opts && (oc&0x0008))))
         cpu_error(51,"asl/lsl #1 -> add");
     }
-    else if (opt_speed && val==2 && (ext=='b' || ext=='w')) {
+    else if (opt_speed && opt_lsl && val==2 && (ext=='b' || ext=='w')) {
       /* ASL/LSL #2,Dn --> ADD Dn,Dn + ADD Dn,Dn (just .B and .W) */
       ip->code = OC_ADD;
       ip->op[0]->mode = MODE_Dn;
-      if (!(oc&0x0e00))
-        ip->op[0]->reg = ip->op[1]->reg;
+      ip->op[0]->reg = ip->op[1]->reg;
       ip->ext.un.copy.next = copy_instruction(ip);
       if (final && (warn_opts>1 || (warn_opts && (oc&0x0008))))
         cpu_error(51,"asl/lsl #2 -> add add");
     }
   }
 
-  else if (opt_fconst && (mnemo->ext.available & (mfpu|m68040up|mcffpu)) &&
+  else if (opt_fconst && (mnemo->ext.available & (mfpu|m68040up)) &&
            abs && mnemo->operand_type[0]==FA && mnemo->operand_type[1]==F_ &&
            ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
     unsigned char buf[12];
-    unsigned long long man;
+    uint64_t man;
     int exp;
 
     if (ext == 'x') {
@@ -3047,29 +3081,35 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
 
     if (ext == 'x') {
       /* Fxxx.X #m,FPn */
-      exp = ((((int)buf[0]&0x7f)<<8) | (int)buf[1]) - 0x3fff;
-      man = readval(1,buf+4,8) & 0x7fffffffffffffffLL;
-      if (exp>=-0x3ff && exp<=0x400 && (man&0x7ff)==0) {
-        /* double precision would be sufficient, so convert */
-        int96 v;
-
-        if (buf[0] & 0x80)
-          int96_assign64(v,-0x8000000000000000LL);
-        else
-          int96_assign32(v,0);
-        int96_add64(v,(long long)(exp+0x3ff) << 52);  /* exponent */
-        int96_add64(v,(long long)(man >> 11));        /* mantissa */
-        if (final) {
-          free_op_exp(ip->op[0]);
-          ip->op[0]->exp.cint = mymalloc(8);
-          int96_copybe(ip->op[0]->exp.cint,v,8);
-          ip->op[0]->flags |= FL_Int64;
-          if (warn_opts>1)
-            cpu_error(51,"f<op>.x #m,FPn -> f<op>.d #m,FPn");
-        }
+      int i;
+
+      for (i=1,exp=0; i<12; i++)
+        exp |= buf[i];
+      if (!exp && (buf[0]==0x00 || buf[0]==0x80)) {
+        /* Special case: 0.0 or -0.0 -> convert to double.
+           We do not need to handle the "final" case here, because
+           0.0 is always translated to single-precision in the next step. */
         ip->qualifiers[0] = d_str;
         ext = 'd';
-        int96_copybe(buf,v,8);
+      }
+      else {
+        exp = ((((int)buf[0]&0x7f)<<8) | (int)buf[1]) - 0x3fff;
+        man = readval(1,buf+4,8) & 0x7fffffffffffffffLL;
+        if (exp>=-0x3ff && exp<=0x400 && (man&0x7ff)==0) {
+          /* double precision would be sufficient, so convert */
+          int64_t v = (buf[0] & 0x80) ? -0x8000000000000000LL : 0;
+
+          v = v | ((int64_t)(exp+0x3ff) << 52) | (man >> 11);
+          if (final) {
+            free_op_exp(ip->op[0]);
+            ip->op[0]->value[0] = huge_expr(huge_from_int(v));
+            if (warn_opts>1)
+              cpu_error(51,"f<op>.x #m,FPn -> f<op>.d #m,FPn");
+          }
+          ip->qualifiers[0] = d_str;
+          ext = 'd';
+          setval(1,buf,8,v);
+        }
       }
     }
 
@@ -3080,21 +3120,20 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
       if ((exp>=-0x7f && exp<=0x80 && (man&0x1fffffff)==0) ||
           (exp==-0x3ff && man==0)) {  /* also allow all zeros for 0.0 */
         /* single precision would be sufficient, so convert */
-        if (final) {
-          unsigned long v = buf[0]&0x80 ? 0x80000000 : 0;  /* m. sign */
+        uint32_t v = (buf[0]&0x80) ? 0x80000000 : 0;  /* m. sign */
 
-          if (exp != -0x3ff)
-            v |= (unsigned long)(exp+0x7f) << 23;  /* exponent */
-          v |= (unsigned long)(man >> 29);         /* mantissa */
+        if (exp != -0x3ff)
+          v |= (uint32_t)(exp+0x7f) << 23;  /* exponent */
+        v |= (uint32_t)(man >> 29);         /* mantissa */
+        if (final) {
           free_op_exp(ip->op[0]);
-          ip->op[0]->exp.value[0] = number_expr((taddr)v);
-          ip->op[0]->flags |= FL_Exp;
+          ip->op[0]->value[0] = number_expr((taddr)v);
           if (warn_opts>1)
             cpu_error(51,"f<op>.d #m,FPn -> f<op>.s #m,FPn");
-          setval(1,buf,4,(taddr)v);
         }
         ip->qualifiers[0] = s_str;
         ext = 's';
+        setval(1,buf,4,v);
       }
     }
 
@@ -3105,15 +3144,13 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
          which is the case when the mantissa is zero. */
       int optok = 0;
 
-      #if 1
       if (ext == 's') {
         exp = ((((int)buf[0]&0x7f)<<1) | (((int)buf[1]&0x80)>>7)) - 0x7f;
         if ((readval(1,buf,4) & 0x007fffffLL) == 0
             && exp!=-0x7f) {
           setbits(1,buf,16,1,8,0x7f-exp);  /* 8-bit exponent to offset 1 */
           free_op_exp(ip->op[0]);
-          ip->op[0]->exp.value[0] = number_expr(readval(1,buf,4));
-          ip->op[0]->flags |= FL_Exp;
+          ip->op[0]->value[0] = number_expr(readval(1,buf,4));
           optok = 1;
         }
       }
@@ -3122,9 +3159,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         if ((readval(1,buf,8) & 0xfffffffffffffLL) == 0 && exp!=-0x3ff) {
           setbits(1,buf,16,1,11,0x3ff-exp);  /* 11-bit exponent to offset 1 */
           free_op_exp(ip->op[0]);
-          ip->op[0]->exp.cint = mymalloc(8);
-          memcpy(ip->op[0]->exp.cint,buf,8);
-          ip->op[0]->flags |= FL_Int64;
+          ip->op[0]->value[0] = huge_expr(huge_from_mem(1,buf,8));
           optok = 1;
         }
       }
@@ -3133,76 +3168,10 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         if ((readval(1,buf+4,8) & 0x7fffffffffffffffLL) == 0) {
           setbits(1,buf,16,1,15,0x3fff-exp);  /* 15-bit exponent to offset 1 */
           free_op_exp(ip->op[0]);
-          ip->op[0]->exp.cint = mymalloc(12);
-          memcpy(ip->op[0]->exp.cint,buf,12);
-          ip->op[0]->flags |= FL_Int96;
+          ip->op[0]->value[0] = huge_expr(huge_from_mem(1,buf,12));
           optok = 1;
         }
       }
-      #else
-      /* test-code to optimize all constants into 1/m as long as the
-         precision is sufficient - @@@ doesn't work correctly for .d */
-      if (ext == 'x') {
-        exp = ((((int)buf[0]&0x7f)<<8) | (int)buf[1]) - 0x3fff;
-        if ((readval(1,buf+4,8) & 0x7fffffffffffffffLL) == 0) {
-          setbits(1,buf,16,1,15,0x3fff-exp);  /* 15-bit exponent to offset 1 */
-          free_op_exp(ip->op[0]);
-          ip->op[0]->exp.cint = mymalloc(12);
-          memcpy(ip->op[0]->exp.cint,buf,12);
-          ip->op[0]->flags |= FL_Int96;
-          optok = 1;
-        }
-      }
-      else {
-        volatile double m, r;
-        union {
-          float sf;
-          double df;
-          unsigned long ul;
-          unsigned long long ull;
-        } conv;
-
-        if (ext == 's') {
-          conv.ul = readval(1,buf,4);
-          m = (double)conv.sf;
-        }
-        else if (ext == 'd') {
-          conv.ull = readval(1,buf,8);
-          m = conv.df;
-        }
-        if (m == 0.0) {  /* avoid fp division by 0 in vasm */
-          if (warn_opts>1)
-            cpu_error(51,"fp division by 0");
-        }
-        else {
-          r = 1.0 / m;
-          conv.sf = (float)r;
-          if (r == conv.sf) {
-            free_op_exp(ip->op[0]);
-            ip->op[0]->exp.value[0] = number_expr((taddr)conv.ul);
-            ip->op[0]->flags |= FL_Exp;
-            ip->qualifiers[0] = s_str;
-            ext = 's';
-            optok = 1;
-          }
-          else {
-            double error;
-
-            conv.df = r;
-            error = fabs(1.0-(conv.df*m)) * 18014398509481984.0; /* 2^54 */
-            if (error<0.5) {
-              free_op_exp(ip->op[0]);
-              ip->op[0]->exp.cfloat = mymalloc(sizeof(long double));
-              *(ip->op[0]->exp.cfloat) = (long double)r;
-              ip->op[0]->flags |= FL_Float;
-              ip->qualifiers[0] = d_str;
-              ext = 'd';
-              optok = 1;
-            }
-          }
-        }
-      }
-      #endif
       if (optok) {
         if (!strcmp(mnemo->name,"fdiv")) {
           ip->code = OC_FMUL;
@@ -3228,11 +3197,97 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
     }
   }
 
+  else if ((oc&0xfeff) == 0x80c0 && abs &&
+           ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
+    /* DIVU.W/DIVS.W #x,Dn */
+
+    if (val == 0) {
+      /* divu.w/divs.w #0,Dn */
+      if (final)
+        cpu_error(60);  /* division by zero */
+    }
+    else if (opt_div && val == 1 && (cpu_type & (mcfb|mcfc))) {
+      /* ColdFire ISA_B/ISA_C: divu.w/divs.w #1,Dn -> mvz.w Dn,Dn */
+      ip->code = OC_MVZ;
+      if (final) {
+        free_operand(ip->op[0]);
+        if (warn_opts)
+          cpu_error(51,"divu/divs.w #1,Dn -> mvz.w Dn,Dn");
+      }
+      ip->op[0] = ip->op[1];
+    }
+    else if (opt_div && opt_speed && val ==-1 && (oc&0x0100) &&
+             (cpu_type & (mcfb|mcfc))) {
+      /* ColdFire ISA_B/ISA_C: divs.w #-1,Dn -> neg.w Dn + mvz.w Dn,Dn */
+      ip->code = OC_NEG;
+      if (final) {
+        free_operand(ip->op[0]);
+        if (warn_opts)
+          cpu_error(51,"divs.w #-1,Dn -> neg.w Dn + mvz.w Dn,Dn");
+      }
+      ip->op[0] = ip->op[1];
+      ip->op[1] = NULL;
+      ip->ext.un.copy.next = ip_doubleop(OC_MVZ,w_str,
+                                         MODE_Dn,ip->op[0]->reg,0,0,NULL,
+                                         MODE_Dn,ip->op[0]->reg,0,0,NULL);
+    }
+  }
+
+  else if (oc==0x4c40 && abs &&
+           ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_Immediate) {
+    /* DIVU.L/DIVS.L #x,Dn */
+
+    if (val == 0) {
+      /* divu.l/divs.l #0,Dn */
+      if (final)
+        cpu_error(60);  /* division by zero */
+    }
+    else if (opt_div && mnemo->operand_type[1]==D_) {
+      if (val == 1) {
+        /* divu.l/divs.l #1,Dn -> tst.l Dn */
+        ip->code = OC_TST;
+        if (final) {
+          free_operand(ip->op[0]);
+          if (warn_opts)
+            cpu_error(51,"divu/divs.l #1,Dn -> tst.l Dn");
+        }
+        ip->op[0] = ip->op[1];
+        ip->op[1] = NULL;
+      }
+      else if (val==-1 && (mnemo->ext.opcode[1] & 0x0800)) {
+        /* divs.l #-1,Dn -> neg.l Dn */
+        ip->code = OC_NEG;
+        if (final) {
+          free_operand(ip->op[0]);
+          if (warn_opts)
+            cpu_error(51,"divs.l #-1,Dn -> neg.l Dn");
+        }
+        ip->op[0] = ip->op[1];
+        ip->op[1] = NULL;
+      }
+      else if (val>=2 && val<=0x100 && (mnemo->ext.opcode[1] & 0x0800)==0 &&
+               cntones(val,9)==1) {
+        /* divu.l #x,Dn -> lsr.l #x,Dn */
+        ip->code = OC_LSRI;
+        val = bfffo(val,1,9);
+        if (final) {
+          free_expr(ip->op[0]->value[0]);
+          ip->op[0]->value[0] = number_expr(val);
+          if (warn_opts)
+            cpu_error(51,"divu.l #x,Dn -> lsr.l #x,Dn");
+        }
+        else
+          ip->op[0]->flags |= FL_DoNotEval;
+        ip->op[0]->extval[0] = val;
+      }
+    }
+  }
+
   else if ((oc==0x4ec0 || oc==0x4e80) && !abs) {
     if (opt_pc && !(ip->op[0]->flags & FL_NoOpt) &&
         ip->op[0]->mode==MODE_Extended &&
         (ip->op[0]->reg==REG_AbsLong || ip->op[0]->reg==REG_PC16Disp) &&
-        ip->op[0]->base[0]->type==LABSYM && ip->op[0]->base[0]->sec==sec) {
+        LOCREF(ip->op[0]->base[0]) && ip->op[0]->base[0]->sec==sec) {
       /* JMP/JSR label --> BRA/BSR label */
       taddr diff = val - cpc;
 
@@ -3260,41 +3315,51 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
           cpu_error(51,"jmp/jsr -> bra/bsr");
       }
     }
+    else if (opt_sc && !(ip->op[0]->flags & FL_NoOpt) &&
+        ip->op[0]->mode==MODE_Extended && ip->op[0]->reg==REG_AbsLong &&
+        EXTREF(ip->op[0]->base[0])) {
+      /* JMP/JSR extlabel --> JMP/JSR extlabel(PC) */
+      ip->op[0]->reg = REG_PC16Disp;
+      if (final && warn_opts>1)
+        cpu_error(51,"jmp/jsr -> jmp/jsr (PC)");
+    }
   }
 
   else if ((oc & 0xf000)==0x6000 && !abs) {
     /* Bcc label */
     if (opt_bra && ((ipflags&IFL_UNSIZED) || opt_allbra) &&
-        ip->op[0]->base[0]->type==LABSYM && ip->op[0]->base[0]->sec==sec) {
+        LOCREF(ip->op[0]->base[0]) && ip->op[0]->base[0]->sec==sec) {
       taddr diff = val - cpc;
+      int resolvewarn = (sec->flags&RESOLVE_WARN)!=0;
 
       switch (lastsize) {
         case 0:
+#if 0
+          /* keep branch deleted until no more optimizations took place */
+          if (diff!=-2 && done)
+#else
           if (diff != -2)
+#endif
             ip->qualifiers[0] = b_str;
           else
             ip->code = -1;
           break;
         case 2:
-          if (diff==0 && oc!=0x6100) {
+          if (diff==0 && oc!=0x6100 && !resolvewarn)
             ip->code = -1;
-          }
-          else if (diff<-0x80 || diff>0x7f || diff==0) {
+          else if (diff<-0x80 || diff>0x7f || diff==0)
             ip->qualifiers[0] = w_str;
-            if (diff == 0)
-              cpu_error(33);  /* 8-bit branch ... converted into 16-bit */
-          }
           else
             ip->qualifiers[0] = b_str;
           break;
         case 4:
           if (diff==2) {
-            if (oc != 0x6100)
+            if (oc!=0x6100 && !resolvewarn)
               ip->code = -1;
             else
               ip->qualifiers[0] = w_str;
           }
-          else if (diff>=-0x80 && diff<=0x7f) {
+          else if (diff>=-0x80 && diff<=0x80 && !resolvewarn) {
             ip->qualifiers[0] = b_str;
           }
           else if (diff<-0x8000 || diff>0x7fff) {
@@ -3317,14 +3382,14 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
                 /* make a new absolute JMP to the Bcc's destination */
                 ip2 = ip_singleop(OC_JMP,emptystr,
                                   MODE_Extended,REG_AbsLong,
-                                  FL_NoOpt,0,ip->op[0]->exp.value[0]);
+                                  FL_NoOpt,0,ip->op[0]->value[0]);
                 ip->code += (oc&0x0100) ? -2 : 2; /* negate branch condition */
                 ip->qualifiers[0] = b_str;
                 ip->op[0]->flags |= FL_NoOpt;
                 ip->ext.un.copy.next = ip2;  /* append the JMP */
                 if (final) {
                   /* assign "*+8" as the Bcc's expression */
-                  ip->op[0]->exp.value[0] = make_expr(ADD,curpc_expr(),
+                  ip->op[0]->value[0] = make_expr(ADD,curpc_expr(),
                           number_expr(phxass_compat ? 6 : 8));
                   cpu_error(46);  /* branch out of range changed to jmp */
                 }
@@ -3335,7 +3400,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
             ip->qualifiers[0] = w_str;
           break;
         case 6:
-          if (diff>=-0x8000 && diff<=0x7fff)
+          if (diff>=-0x8000 && diff<=0x7fff && !resolvewarn)
             ip->qualifiers[0] = w_str;
           else
             ip->qualifiers[0] = l_str;
@@ -3346,14 +3411,21 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
           break;
       }
       if (final && warn_opts>1) {
+        /* print the finally performed kind optimization */
         if (ip->code == -1)
           cpu_error(51,"branch deleted");
-        else if (ip->qualifiers[0] != w_str)
-          cpu_error(ip->qualifiers[0]==b_str?53:54,*(ip->qualifiers[0]));
+        else {
+          char new_ext = tolower((unsigned char)ip->qualifiers[0][0]);
+          int oldsize = branch_size(orig_ext);
+          int newsize = branch_size(new_ext);
+
+          if (newsize != oldsize)
+            cpu_error(newsize<oldsize?53:54,new_ext);
+        }        
       }
     }
     else if (opt_branop && oc==0x6000 && val-cpc==0 &&
-             (ext=='b' || ext=='s') && ip->op[0]->base[0]->type==LABSYM &&
+             (ext=='b' || ext=='s') && LOCREF(ip->op[0]->base[0]) &&
              ip->op[0]->base[0]->sec==sec) {
       /* short-branch with zero-distance which cannot be optimized
          is turned into a NOP */
@@ -3366,7 +3438,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         cpu_error(57);  /* bra.b *+2 turned into a nop */
     }
     else if (opt_brajmp && ip->op[0]->base[0]->sec!=sec &&
-             ip->op[0]->base[0]->type==LABSYM) {
+             LOCREF(ip->op[0]->base[0])) {
       /* reference to label from different section */
       ip->qualifiers[0] = emptystr;
       if (oc < 0x6200) {
@@ -3382,14 +3454,14 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
         /* make a new absolute JMP to the Bcc's destination */
         ip2 = ip_singleop(OC_JMP,emptystr,
                           MODE_Extended,REG_AbsLong,
-                          FL_NoOpt,0,ip->op[0]->exp.value[0]);
+                          FL_NoOpt,0,ip->op[0]->value[0]);
         ip->code += (oc&0x0100) ? -2 : 2; /* negate branch condition */
         ip->qualifiers[0] = b_str;
         ip->op[0]->flags |= FL_NoOpt;
         ip->ext.un.copy.next = ip2;  /* append the JMP */
         if (final) {
           /* assign "*+8" as the Bcc's expression */
-          ip->op[0]->exp.value[0] = make_expr(ADD,curpc_expr(),
+          ip->op[0]->value[0] = make_expr(ADD,curpc_expr(),
                   number_expr(phxass_compat ? 6 : 8));
           if (warn_opts>1)
             cpu_error(52,"b<cc> label -> b<!cc> *+8, jmp label");
@@ -3401,7 +3473,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
   else if ((oc & 0xff80)==0xf080 && ip->code!=OC_FNOP) {
     /* cpBcc label */
     if (opt_bra && ((ipflags&IFL_UNSIZED) || opt_allbra) &&
-        ip->op[0]->base[0]->type==LABSYM && ip->op[0]->base[0]->sec==sec) {
+        LOCREF(ip->op[0]->base[0]) && ip->op[0]->base[0]->sec==sec) {
       taddr diff = val - cpc;
 
       switch (lastsize) {
@@ -3454,7 +3526,7 @@ static unsigned char optimize_instruction(instruction *iplist,section *sec,
 }
 
 
-static taddr oper_size(instruction *ip,operand *op,struct optype *ot)
+static size_t oper_size(instruction *ip,operand *op,struct optype *ot)
 /* returns number of bytes for a single operand */
 {
   int mode = op->mode;
@@ -3468,18 +3540,10 @@ static taddr oper_size(instruction *ip,operand *op,struct optype *ot)
     return 2;
   }
   else if (mode==MODE_Extended && reg==REG_AbsLong) {
-    if (ot->flags & OTF_BRANCH) {
-      switch (ip->qualifiers[0] ?
-              tolower((unsigned char)ip->qualifiers[0][0]) : '\0') {
-        case 'b':
-        case 's':
-          return 0;
-        case 'l':
-          return 4;
-        default:
-          return 2;
-      }
-    }
+    if (ot->flags & OTF_BRANCH)
+      return (taddr)branch_size(ip->qualifiers[0] ?
+                                tolower((unsigned char)ip->qualifiers[0][0]) :
+                                '\0');
     else
       return 4;
   }
@@ -3503,7 +3567,7 @@ static taddr oper_size(instruction *ip,operand *op,struct optype *ot)
   else if (mode==MODE_An8Format ||
            (mode==MODE_Extended && reg==REG_PC8Format)) {
     if (op->flags & FL_UsesFormat) {
-      int n = 2;
+      size_t n = 2;
 
       if (op->format & FW_FullFormat) {
         if (FW_getBDSize(op->format) == FW_Word)
@@ -3525,9 +3589,9 @@ static taddr oper_size(instruction *ip,operand *op,struct optype *ot)
 }
 
 
-static taddr iplist_size(instruction *ip)
+static size_t iplist_size(instruction *ip)
 {
-  taddr size = 0;
+  size_t size = 0;
   mnemonic *mnemo;
   int i;
 
@@ -3544,7 +3608,7 @@ static taddr iplist_size(instruction *ip)
 }
 
 
-taddr instruction_size(instruction *realip,section *sec,taddr pc)
+size_t instruction_size(instruction *realip,section *sec,taddr pc)
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
 {
@@ -3552,10 +3616,10 @@ taddr instruction_size(instruction *realip,section *sec,taddr pc)
   char ext = realip->qualifiers[0] ?
              tolower((unsigned char)realip->qualifiers[0][0]) : '\0';
   int i;
-  taddr size;
+  size_t size;
   instruction *ip;
   unsigned char extflags;
-  unsigned short extsize;
+  uint16_t extsize;
 
   /* check if current mnemonic is valid for selected cpu-type */
   while (!(mnemo->ext.available & cpu_type)) {
@@ -3571,6 +3635,18 @@ taddr instruction_size(instruction *realip,section *sec,taddr pc)
 
   extsize = mnemo->ext.size;
 
+  if (opt_allbra && ign_unambig_ext) {
+    /* Strip the size extension from branch instructions, no matter if
+       illegal or not. The optimizer will find the best size. */
+    for (i=0; i<MAX_OPERANDS; i++) {
+      if (mnemonics[realip->code].operand_type[i] == BR) {
+        ext = '\0';
+        realip->qualifiers[0] = emptystr;
+        break;
+      }
+    }
+  }
+
   if (ext == '\0') {
     /* remember when developer didn't specify a size extension */
     realip->ext.un.real.flags |= IFL_UNSIZED;
@@ -3604,32 +3680,63 @@ taddr instruction_size(instruction *realip,section *sec,taddr pc)
   /* check if opcode extension is valid */
   if ((mnemo->ext.size & SIZE_MASK) == SIZE_UNSIZED) {
     if (ext != '\0') {
-      if (!devpac_compat)
+      if (!ign_unambig_ext)
         cpu_error(35);  /* extension for unsized instruction ignored */
       ext = '\0';
       realip->qualifiers[0] = emptystr;
     }
   }
   else {
-    unsigned short extsize = mnemo->ext.size;
-    unsigned short sz  = lc_ext_to_size(ext);  /* convert ext. to SIZE-code */
+    int uacode;
+    int err = 0;
+    uint16_t extsize = mnemo->ext.size;
+    uint16_t sz  = lc_ext_to_size(ext);  /* convert ext. to SIZE-code */
+
+    if ((mnemo->ext.size&SIZE_UNAMBIG) && (mnemo->ext.available&cpu_type))
+      uacode = realip->code;  /* last mnemonic with unambiguous size ext. */
+    else
+      uacode = -1;
 
+    /* Find a mnemonic with same name and operands which matches the
+       given size extension. */
     while (!((((extsize&S_CFCHECK) && (cpu_type&mcf)) ?
               (extsize & ~(SIZE_BYTE|SIZE_WORD)) : extsize) & sz)) {
       mnemo++;
-      if (strcmp(mnemonics[realip->code].name,mnemo->name))
-        cpu_error(34);  /* illegal opcode extension */
+      if (err = strcmp(mnemonics[realip->code].name,mnemo->name))
+        break;
       for (i=0; i<MAX_OPERANDS; i++) {
-        if (mnemonics[realip->code].operand_type[i] != mnemo->operand_type[i])
-          cpu_error(34);  /* illegal opcode extension */
+        if (err = (mnemonics[realip->code].operand_type[i]
+                   != mnemo->operand_type[i]))
+          break;
       }
+      if (err)
+        break;
       realip->code++;
       extsize = mnemo->ext.size;
+      if ((mnemo->ext.size&SIZE_UNAMBIG) && (mnemo->ext.available&cpu_type))
+        uacode = realip->code;
+    }
+
+    if (err) {
+      if (ign_unambig_ext && uacode>=0) {
+        /* size extension is wrong, but we can guess the right one */
+        realip->code = uacode;
+        mnemo = &mnemonics[uacode];
+        extsize = mnemo->ext.size;
+        ext = '\0';
+        realip->qualifiers[0] = emptystr;
+      }
+      else
+        cpu_error(34);  /* illegal opcode extension */
     }
     if (!(mnemo->ext.available & cpu_type))
       cpu_error(0);  /* instruction not supported */
   }
 
+  /* remember the instruction's original extension, before optimizations */
+  if (realip->ext.un.real.orig_ext < 0)
+    realip->ext.un.real.orig_ext = (signed char)ext;
+
   /* check if we are uncertain about the side of a register list operand */
   if (realip->op[0]!=NULL && realip->op[1]!=NULL) {
     if ((realip->op[0]->flags & FL_PossRegList) &&
@@ -3684,7 +3791,7 @@ static void write_val(unsigned char *d,int pos,int size,taddr val,int sign)
       }
     }
     else {
-      if (val > (1L << size) - 1)
+      if ((utaddr)val > (1L << size) - 1)
         cpu_error(25,val,0,(1L<<size)-1);  /* operand value out of range */
     }
   }
@@ -3718,27 +3825,26 @@ static unsigned char *write_branch(dblock *db,unsigned char *d,operand *op,
 
   if (op->base[0]) {
 
-    if (op->base[0]->type == IMPORT || op->base[0]->sec!=sec) {
+    if (is_pc_reloc(op->base[0],sec)) {
       /* external branch label, or label from different section */
       taddr addend = op->extval[0];
-      nreloc *r = new_nreloc();
-      rlist *rl = mymalloc(sizeof(rlist));
+      int size,offset;
 
       switch (ext) {
         case 'b':
         case 's':
           addend--;   /* reloc-offset is stored 1 byte before PC-location */
           *(d-1) = addend & 0xff;
-          r->size = 8;
-          r->offset = 8;
+          size = 8;
+          offset = 8;
           break;
         case 'l':
           if (cpu_type & (m68020up|cpu32|mcfb|mcfc|m68881|m68882|m68851)) {
             if (bcc)
               *(d-1) = 0xff;
-            r->offset = (d - (unsigned char *)db->data) << 3;
+            offset = (d - (unsigned char *)db->data) << 3;
             d = setval(1,d,4,addend);
-            r->size = 32;
+            size = 32;
           }
           else
             cpu_error(0);  /* instruction not supported */
@@ -3746,20 +3852,15 @@ static unsigned char *write_branch(dblock *db,unsigned char *d,operand *op,
         case 'w':
           if (bcc)
             *(d-1) = 0;
-          r->offset = (d - (unsigned char *)db->data) << 3;
+          offset = (d - (unsigned char *)db->data) << 3;
           d = setval(1,d,2,addend);
-          r->size = 16;
+          size = 16;
           break;
         default:
           cpu_error(34);  /* illegal opcode extension */
           break;
       }
-      r->sym = op->base[0];
-      r->addend = addend;
-      rl->type = REL_PC;
-      rl->reloc = r;
-      rl->next = db->relocs;
-      db->relocs = rl;
+      add_nreloc(&db->relocs,op->base[0],addend,REL_PC,size,offset);
     }
 
     else {  /* known label from same section, can be resolved immediately */
@@ -3804,6 +3905,16 @@ static unsigned char *write_branch(dblock *db,unsigned char *d,operand *op,
 }
 
 
+static unsigned char *write_extval(int num,size_t size,dblock *db,
+                                   unsigned char *d,operand *op,int rtype)
+{
+  if (rtype==REL_ABS && op->basetype[num]==BASE_PCREL)
+    op->extval[num] += (char *)d - db->data;  /* fix addend for label differences */
+
+  return setval(1,d,size,op->extval[num]);
+}
+
+
 static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
                                    char ext,section *sec,taddr pc)
 /* write effective address extension words, handle relocs */
@@ -3816,6 +3927,8 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
     int rtype = REL_NONE;
     int roffs = (d - (unsigned char *)db->data) << 3;
     int rsize = 0;
+    int ortype = REL_NONE;
+    int orsize = 0;
 
     if (op->flags & FL_020up) {
       if (!(cpu_type & (m68020up|cpu32))) {
@@ -3831,10 +3944,13 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
       /* d16(An) needs one extension word */
       if (op->base[0]) {
         rsize = 16;
-        if (op->base[0]->type==IMPORT && op->reg!=sdreg)
+        if ((EXTREF(op->base[0]) && op->reg!=sdreg) ||
+            op->basetype[0]==BASE_PCREL)
           rtype = REL_ABS;
-        else
+        else if (op->basetype[0]==BASE_OK)
           rtype = REL_SD;
+        else
+          general_error(38);  /* illegal relocation */
       }
       if (rtype == REL_SD) {
         if (typechk && (op->extval[0]<0 || op->extval[0]>0xffff))
@@ -3844,7 +3960,7 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
         if (typechk && (op->extval[0]<-0x8000 || op->extval[0]>0x7fff))
           cpu_error(29);  /* displacement out of range */
       }
-      d = setval(1,d,2,op->extval[0]);
+      d = write_extval(0,2,db,d,op,rtype);
     }
 
     else if (op->mode == MODE_An8Format) {
@@ -3858,39 +3974,41 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
           if (typechk && (op->extval[0]<-0x8000 || op->extval[0]>0x7fff))
             cpu_error(29);  /* displacement out of range */
           if (op->base[0]) {
-            if (op->base[0]->type==IMPORT) {
+            rsize = 16;
+            if (EXTREF(op->base[0]) ||
+                (LOCREF(op->base[0]) && op->basetype[0]==BASE_PCREL))
               rtype = REL_ABS;
-              rsize = 16;
-            }
             else
               cpu_error(30);  /* absolute displacement expected */
           }
-          d = setval(1,d,2,op->extval[0]);
+          d = write_extval(0,2,db,d,op,rtype);
         }
         else if (FW_getBDSize(op->format) == FW_Long) {
           if (op->base[0]) {
             rtype = REL_ABS;
             rsize = 32;
           }
-          d = setval(1,d,4,op->extval[0]);
+          d = write_extval(0,4,db,d,op,rtype);
         }
         if (FW_getIndSize(op->format) == FW_Word) {
           if (typechk && (op->extval[1]<-0x8000 || op->extval[1]>0x7fff))
             cpu_error(29);  /* displacement out of range */
           if (op->base[1]) {
-            if (op->base[1]->type==IMPORT)
-              add_reloc(&db->relocs,op->base[1],op->extval[1],REL_ABS,16,
-                        (rtype==REL_NONE) ? roffs : roffs+rsize);
+            orsize = 16;
+            if (EXTREF(op->base[1]) ||
+                (LOCREF(op->base[1]) && op->basetype[1]==BASE_PCREL))
+              ortype = REL_ABS;
             else
               cpu_error(30);  /* absolute displacement expected */
           }
-          d = setval(1,d,2,op->extval[1]);
+          d = write_extval(1,2,db,d,op,ortype);
         }
         else if (FW_getIndSize(op->format) == FW_Long) {
-          if (op->base[1])
-            add_reloc(&db->relocs,op->base[1],op->extval[1],REL_ABS,32,
-                      (rtype==REL_NONE) ? roffs : roffs+rsize);
-          d = setval(1,d,4,op->extval[1]);
+          if (op->base[1]) {
+            ortype = REL_ABS;
+            orsize = 32;
+          }
+          d = write_extval(1,4,db,d,op,ortype);
         }
       }
       else {
@@ -3898,10 +4016,10 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
         if (typechk && (op->extval[0]<-0x80 || op->extval[0]>0x7f))
           cpu_error(29);  /* displacement out of range */
         if (op->base[0]) {
-          if (op->base[0]->type==IMPORT) {
+          rsize = 8;
+          if (EXTREF(op->base[0]) ||
+              (LOCREF(op->base[0]) && op->basetype[0]==BASE_PCREL))
             rtype = REL_ABS;
-            rsize = 8;
-          }
           else
             cpu_error(30);  /* absolute displacement expected */
         }
@@ -3917,7 +4035,7 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
         taddr disp = op->extval[0];
 
         if (op->base[0]) {
-          if (op->base[0]->type==IMPORT || op->base[0]->sec!=sec) {
+          if (is_pc_reloc(op->base[0],sec)) {
             rtype = REL_PC;
             rsize = 16;
           }
@@ -3940,7 +4058,7 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
           roffs += 16;
           if (FW_getBDSize(op->format) == FW_Word) {
             if (op->base[0]) {
-              if (op->base[0]->type==IMPORT || op->base[0]->sec!=sec) {
+              if (is_pc_reloc(op->base[0],sec)) {
                 rtype = REL_PC;
                 rsize = 16;
                 op->extval[0] += 2;  /* pc-relative xref fix */
@@ -3955,7 +4073,7 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
           }
           else if (FW_getBDSize(op->format) == FW_Long) {
             if (op->base[0]) {
-              if (op->base[0]->type==IMPORT || op->base[0]->sec!=sec) {
+              if (is_pc_reloc(op->base[0],sec)) {
                 rtype = REL_PC;
                 rsize = 32;
                 op->extval[0] += 2;  /* pc-relative xref fix */
@@ -3970,25 +4088,27 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
             if (typechk && (op->extval[1]<-0x8000 || op->extval[1]>0x7fff))
               cpu_error(29);  /* displacement out of range */
             if (op->base[1]) {
-              if (op->base[1]->type==IMPORT)
-                add_reloc(&db->relocs,op->base[1],op->extval[1],REL_ABS,16,
-                          (rtype==REL_NONE) ? roffs : roffs+rsize);
+              if (EXTREF(op->base[1])) {
+                ortype = REL_ABS;
+                orsize = 16;
+              }
               else
                 cpu_error(30);  /* absolute displacement expected */
             }
-            d = setval(1,d,2,op->extval[1]);
+            d = write_extval(1,2,db,d,op,ortype);
           }
           else if (FW_getIndSize(op->format) == FW_Long) {
-            if (op->base[1])
-              add_reloc(&db->relocs,op->base[1],op->extval[1],REL_ABS,32,
-                        (rtype==REL_NONE) ? roffs : roffs+rsize);
-            d = setval(1,d,4,op->extval[1]);
+            if (op->base[1]) {
+              ortype = REL_ABS;
+              orsize = 32;
+            }
+            d = write_extval(1,4,db,d,op,ortype);
           }
         }
         else {
           /* (d8,PC,Rn.x*s) needs one format word as extension */
           if (op->base[0]) {
-            if (op->base[0]->type==IMPORT || op->base[0]->sec!=sec) {
+            if (is_pc_reloc(op->base[0],sec)) {
               rtype = REL_PC;
               rsize = 8;
               roffs += 8;
@@ -4014,7 +4134,7 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
           rtype = REL_ABS;
           rsize = 16;
         }
-        d = setval(1,d,2,op->extval[0]);
+        d = write_extval(0,2,db,d,op,rtype);
       }
 
       else if (op->reg == REG_AbsLong) {
@@ -4023,43 +4143,51 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
           rtype = REL_ABS;
           rsize = 32;
         }
-        d = setval(1,d,4,op->extval[0]);
+        d = write_extval(0,4,db,d,op,rtype);
       }
 
       else if (op->reg == REG_Immediate) {
         /* #immediate */
-        taddr ev = op->extval[0];
-        int f = op->flags & FL_expMask;
         int err;
 
+        if (op->base[0] != NULL)
+          rtype = REL_ABS;
+
         switch (ext) {
           case 'b':
-            if (f == FL_Exp) {
-              if (typechk && (ev<-0x80 || ev>0xff))
+            if (op->flags & FL_ExtVal0) {
+              roffs += 8;
+              rsize = 8;
+              *d++ = 0;
+              d = write_extval(0,1,db,d,op,rtype);
+              if (typechk && (op->extval[0]<-0x80 || op->extval[0]>0xff))
                 cpu_error(36);  /* immediate operand out of range */
             }
             else
               cpu_error(37);  /* immediate operand has illegal type */
-            *d++ = 0;
-            *d++ = ev & 0xff;
-            roffs += 8;
-            rsize = 8;
             break;
           case 'w':
-            if (f == FL_Exp) {
-              if (typechk && (ev<-0x8000 || ev>0xffff))
+            if (op->flags & FL_ExtVal0) {
+              rsize = 16;
+              d = write_extval(0,2,db,d,op,rtype);
+              if (typechk && (op->extval[0]<-0x8000 || op->extval[0]>0xffff))
                 cpu_error(36);  /* immediate operand out of range */
             }
             else
               cpu_error(37);  /* immediate operand has illegal type */
-            d = setval(1,d,2,ev);
-            rsize = 16;
             break;
           case 'l':
-            if (f != FL_Exp)
+            if (op->flags & FL_ExtVal0) {
+              rsize = 32;
+              d = write_extval(0,4,db,d,op,rtype);
+            }
+            else if (type_of_expr(op->value[0]) == FLT) {
+              if (err = copy_float_exp(d,op,EXT_SINGLE))
+                cpu_error(err);
+              d += 4;
+            }
+            else
               cpu_error(37);  /* immediate operand has illegal type */
-            d = setval(1,d,4,ev);
-            rsize = 32;
             break;
           case 's':
             if (err = copy_float_exp(d,op,EXT_SINGLE))
@@ -4082,16 +4210,22 @@ static unsigned char *write_ea_ext(dblock *db,unsigned char *d,operand *op,
             d += 12;
             break;
         }
-        if (rsize!=0 && op->base[0]!=NULL)
-          rtype = REL_ABS;
       }
     }
 
-    /* append relocation */
-    if (rtype != REL_NONE)
-      add_reloc(&db->relocs,op->base[0],op->extval[0],rtype,rsize,roffs);
+    /* append relocations */
+    if (rtype != REL_NONE) {
+      if (rtype==REL_ABS && op->basetype[0]==BASE_PCREL)
+        rtype = REL_PC;
+      add_nreloc(&db->relocs,op->base[0],op->extval[0],rtype,rsize,roffs);
+    }
+    if (ortype != REL_NONE) {
+      if (ortype==REL_ABS && op->basetype[1]==BASE_PCREL)
+        ortype = REL_PC;
+      add_nreloc(&db->relocs,op->base[1],op->extval[1],ortype,orsize,
+                 (rtype==REL_NONE) ? roffs : roffs+rsize);
+    }
   }
-
   return d;
 }
 
@@ -4125,11 +4259,15 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
       mnemonic *mnemo = &mnemonics[ip->code];
       char ext = ip->qualifiers[0] ?
                  tolower((unsigned char)ip->qualifiers[0][0]) : '\0';
-      unsigned short sz = ((mnemo->ext.size & SIZE_MASK) == SIZE_UNSIZED) ?
-                          SIZE_UNSIZED : lc_ext_to_size(ext);
+      uint16_t sz = ((mnemo->ext.size & SIZE_MASK) == SIZE_UNSIZED) ?
+                    SIZE_UNSIZED : lc_ext_to_size(ext);
       unsigned char *dbstart = d;
       int i;
 
+      /* warn about a bad alias instruction mnemonic */
+      if (mnemo->ext.available & malias)
+          cpu_error(33);  /* deprecated instruction alias */
+
       /* copy opcode */
       if (mnemo->ext.available & mcffpu)
         *d++ = (mnemo->ext.opcode[0] >> 8) | 2;
@@ -4386,91 +4524,94 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 }
 
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
 {
   dblock *db = new_dblock();
-  int dtype = op->flags & FL_expMask;
-  taddr val = 0;
   symbol *base = NULL;
+  int btype,etype;
+  taddr val = 0;
+  thuge hval;
+  tfloat fval;
 
   db->size = bitsize >> 3;
   db->data = mymalloc(db->size);
-  if (dtype==FL_Exp && op->exp.value[0]!=NULL) {
-    if (!eval_expr(op->exp.value[0],&val,sec,pc)) {
-      base = find_base(op->exp.value[0],sec,pc);
-      if (base == NULL)
-        cpu_error(17);  /* illegal relocation */
+
+  etype = type_of_expr(op->value[0]);
+  if (etype == FLT) {
+    if (!eval_expr_float(op->value[0],&fval))
+      general_error(60);  /* cannot evaluate floating point */
+  }
+  else if (bitsize > 32) {
+    if (!eval_expr_huge(op->value[0],&hval))
+      general_error(59);  /* cannot evaluate huge integer */
+    etype = HUG;
+  }
+  else {
+    if (!eval_expr(op->value[0],&val,sec,pc)) {
+      btype = find_base(op->value[0],&base,sec,pc);
+      if (btype == BASE_ILLEGAL)
+        general_error(38);  /* illegal relocation */
     }
+    etype = NUM;
   }
 
   switch (bitsize) {
     case 8:
-      if (dtype == FL_Exp) {
+      if (etype == NUM) {
         if (typechk && (val<-0x80 || val>0xff))
           cpu_error(39);  /* data out of range */
         db->data[0] = val & 0xff;
       }
-      else
+      else if (etype == FLT)
         cpu_error(40);  /* data has illegal type */
+      else
+        ierror(0);
       break;
 
     case 16:
-      if (dtype == FL_Exp) {
+      if (etype == NUM) {
         if (typechk && (val<-0x8000 || val>0xffff))
           cpu_error(39);  /* data out of range */
         setval(1,db->data,2,val);
       }
-      else
+      else if (etype == FLT)
         cpu_error(40);  /* data has illegal type */
+      else
+        ierror(0);
       break;
 
     case 32:
-      if (dtype == FL_Exp) {
+      if (etype == NUM)
         setval(1,db->data,4,val);
-      }
-      else if (dtype == FL_Float) {
-        conv2single(db->data,*op->exp.cfloat);
-      }
+      else if (etype == FLT)
+        conv2ieee32(1,db->data,fval);
       else
-        cpu_error(40);  /* data has illegal type */
+        ierror(0);
       break;
 
     case 64:
-      if (dtype == FL_Exp) {
-        memset(db->data,(val>=0)?0:-1,4);
-        setval(1,&db->data[4],4,val);
-        if (op->base[0])
-          cpu_error(20);  /* constant integer expression required */
-      }
-      else if (dtype == FL_Int64) {
-        memcpy(db->data,op->exp.cint,8);
-      }
-      else if (dtype == FL_Float) {
-        conv2double(db->data,*op->exp.cfloat);
+      if (etype == HUG) {
+        if (typechk && !huge_chkrange(hval,64))
+          cpu_error(39);  /* data out of range */
+        huge_to_mem(1,db->data,8,hval);
       }
+      else if (etype == FLT)
+        conv2ieee64(1,db->data,fval);
       else
-        cpu_error(40);  /* data has illegal type */
+        ierror(0);
       break;
 
     case 96:
-      if (dtype == FL_Exp) {
-        memset(db->data,(val>=0)?0:-1,8);
-        setval(1,&db->data[8],4,val);
-        if (op->base[0])
-          cpu_error(20);  /* constant integer expression required */
-      }
-      else if (dtype == FL_Int64) {
-        memset(db->data,(*op->exp.cint&0x80)?-1:0,4);
-        memcpy(&db->data[4],op->exp.cint,8);
-      }
-      else if (dtype == FL_Int96) {
-        memcpy(db->data,op->exp.cint,12);
-      }
-      else {
-        conv2extended(db->data,*op->exp.cfloat);
-        /* @@@ no Packed BCD possible? */
+      if (etype == HUG) {
+        if (typechk && !huge_chkrange(hval,96))
+          cpu_error(39);  /* data out of range */
+        huge_to_mem(1,db->data,12,hval);
       }
+      else if (etype == FLT)
+        conv2ieee80(1,db->data,fval);
+      else
+        ierror(0);
       break;
 
     default:
@@ -4480,7 +4621,7 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
 
   if (base) {
     /* relocation required */
-    add_reloc(&db->relocs,base,val,REL_ABS,bitsize,0);
+    add_nreloc(&db->relocs,base,val,btype==BASE_PCREL?REL_PC:REL_ABS,bitsize,0);
   }
 
   return db;
@@ -4491,7 +4632,6 @@ int init_cpu()
 {
   int i,j,code_tab_cnt;
   hashdata data;
-  regsym *new;
 
   /* remember all mnemonic locations which we need */
   code_tab_cnt = sizeof(code_tab) / sizeof(code_tab[0]);
@@ -4505,28 +4645,51 @@ int init_cpu()
   if (j < code_tab_cnt)
     ierror(0);
 
+  /* flag all mnemonics with an unambiguous size extension */
+  for (i=0; i<mnemonic_cnt; i++) {
+    if (countbits((taddr)mnemonics[i].ext.size & SIZE_MASK) == 1)
+      mnemonics[i].ext.size |= SIZE_UNAMBIG;
+  }
+
   /* predefine some register symbols */
-  regsymhash = new_hashtable(REGSYMHTSIZE);
-  data.ptr = new = mymalloc(sizeof(regsym));
-  new->name = elfregs ? "%sp" : "sp";
-  new->type = RSTYPE_An;
-  new->reg = 7;
-  add_hashentry(regsymhash,new->name,data);
-  data.ptr = new = mymalloc(sizeof(regsym));
-  new->name = elfregs ? "%fp" : "fp";
-  new->type = RSTYPE_An;
-  new->reg = 6;
-  add_hashentry(regsymhash,new->name,data);
+  new_regsym(0,0,elfregs?"%sp":"sp",RSTYPE_An,0,7);
+  new_regsym(0,0,elfregs?"%fp":"fp",RSTYPE_An,0,6);
 
   /* reset baseregs */
   for (i=0; i<7; i++)
     baseexp[i] = NULL;  /* disable basereg for A0-A7 */
 
+  /* predefine cpu symbols */
+  if (phxass_compat) {
+    set_optc_symbol();
+    set_internal_abs(cpu_name,phxass_cpu_num(cpu_type));
+    set_internal_abs(mmu_name,(cpu_type & mmmu)!=0);
+    set_internal_abs(fpu_name,(cpu_type & mfloat)?fpu_id:0);
+  }
+  if (devpac_compat) {
+    taddr f = 99;
+
+    /* __G2 contains host, version and cpu information */
+    set_g2_symbol();
+
+    /* __LK is 0 for TOS executables, 1 for GST-, 2 for DRI-linkable,
+       3 for Amiga-linkable, 4 for Amiga executable.
+       Set it to 99 when creating an object file of unknown format. */
+    if (!strcmp(output_format,"tos"))
+      f = 0;
+    else if (!strcmp(output_format,"hunkexe"))
+      f = 4;
+    else if (!strcmp(output_format,"hunk"))
+      f = 3;
+    set_internal_abs(lk_name,f);
+  }
+  set_internal_abs(vasmsym_name,cpu_type&CPUMASK);
+
   return 1;
 }
 
 
-static void set_cpu_type(unsigned long type,int addatom)
+static void set_cpu_type(uint32_t type,int addatom)
 {
   if (type & (m68k|cpu32|mcf_all))
     cpu_type = (cpu_type & ~(m68k|cpu32|mcf_all)) | type;
@@ -4534,15 +4697,19 @@ static void set_cpu_type(unsigned long type,int addatom)
     cpu_type = (cpu_type & ~(m68881|m68882)) | type;
   else if (type == m68851)
     cpu_type |= m68851;
+
   if (addatom)
     add_cpu_opt(0,OCMD_CPU,cpu_type);
+
+  if (cpu_type & (m68020up | mcf))
+    m68k_mid = 2;  /* need 68020+ */
 }
 
 
-static unsigned long get_cpu_type(char **str)
+static uint32_t get_cpu_type(char **str)
 {
   char *s = *str;
-  unsigned long type = 0;
+  uint32_t type = 0;
   int len,i;
 
   while (ISIDCHAR(*s))
@@ -4563,6 +4730,16 @@ static unsigned long get_cpu_type(char **str)
 }
 
 
+static void clear_all_opts(void)
+{
+  opt_movem = opt_pea = opt_clr = opt_st = opt_lsl = opt_mul = opt_div = 0;
+  opt_fconst = opt_brajmp = opt_pc = opt_bra = opt_allbra = 0;
+  opt_disp = opt_abs = opt_moveq = opt_quick = opt_branop = 0;
+  opt_bdisp = opt_odisp = opt_lea = opt_lquick = opt_immaddr = 0;
+  opt_gen = opt_speed = 0;
+}
+
+
 int cpu_args(char *arg)
 {
   char *p = arg;
@@ -4570,24 +4747,26 @@ int cpu_args(char *arg)
 
   if (!strcmp(p,"-phxass")) {
     phxass_compat = 1;
-    opt_allbra = 1;
+    opt_allbra = opt_brajmp = 1;
+    opt_fconst = 0;
+    ign_unambig_ext = 1;
     return 0;  /* leave option visible for syntax modules */
   }
 
   if (!strcmp(p,"-devpac")) {
     /* set all options to Devpac-compatible defaults */
     devpac_compat = 1;
-    opt_gen = opt_pc = opt_disp = opt_bra = opt_abs = opt_moveq = 0;
-    opt_quick = opt_branop = opt_bdisp = opt_odisp = opt_lea = 0;
-    opt_lquick = opt_immaddr = 0;
-    no_opt = 1;
+    tos_hisoft_dri = 0;  /* no extended symbol names until OPT X+ is given */
+    clear_all_opts();
     no_symbols = 1;
     warn_opts = 2;
+    ign_unambig_ext = 1;
+    unsigned_shift = 1;
     return 0;  /* leave option visible for syntax modules */
   }
 
   if (!strncmp(p,"-m",2)) {
-    unsigned long cpu;
+    uint32_t cpu;
     
     p += 2;
     if (!strncmp(p,"cf",2))
@@ -4606,38 +4785,49 @@ int cpu_args(char *arg)
       cpu_error(58);  /* not a valid small data register */
   }
 
+  else if (!strcmp(p,"-no-opt")) {
+    clear_all_opts();
+    no_opt = 1;
+  }
+
+  else if (!strcmp(p,"-sc"))
+    opt_sc = 1;
   else if (!strcmp(p,"-rangewarnings"))
     modify_cpu_err(WARNING,25,29,32,36,0);
   else if (!strcmp(p,"-conv-brackets"))
     convert_brackets = 1;
+  else if (!strcmp(p,"-regsymredef"))
+    regsymredef = 1;
+  else if (!strcmp(p,"-elfregs"))
+    elfregs = 1;
+  else if (!strcmp(p,"-guess-ext"))
+    ign_unambig_ext = 1;
   else if (!strcmp(p,"-showcrit"))
     warn_opts = 1;
   else if (!strcmp(p,"-showopt"))
     warn_opts = 2;
   else if (!strcmp(p,"-opt-movem"))
-    opt_movem = 1;
+    opt_movem = !no_opt;
   else if (!strcmp(p,"-opt-pea"))
-    opt_pea = 1;
+    opt_pea = !no_opt;
   else if (!strcmp(p,"-opt-clr"))
-    opt_clr = 1;
+    opt_clr = !no_opt;
   else if (!strcmp(p,"-opt-st"))
-    opt_st = 1;
+    opt_st = !no_opt;
   else if (!strcmp(p,"-opt-lsl"))
-    opt_lsl = 1;
+    opt_lsl = !no_opt;
   else if (!strcmp(p,"-opt-mul"))
-    opt_mul = 1;
+    opt_mul = !no_opt;
+  else if (!strcmp(p,"-opt-div"))
+    opt_div = !no_opt;
   else if (!strcmp(p,"-opt-fconst"))
-    opt_fconst = 1;
+    opt_fconst = !no_opt;
   else if (!strcmp(p,"-opt-brajmp"))
-    opt_brajmp = 1;
+    opt_brajmp = !no_opt;
   else if (!strcmp(p,"-opt-allbra"))
-    opt_allbra = 1;
+    opt_allbra = !no_opt;
   else if (!strcmp(p,"-opt-speed"))
-    opt_speed = 1;
-  else if (!strcmp(p,"-elfregs"))
-    elfregs = 1;
-  else if (!strcmp(p,"-no-opt"))
-    no_opt = 1;
+    opt_speed = !no_opt;
   else
     return 0;
 
@@ -4645,14 +4835,6 @@ int cpu_args(char *arg)
 }
 
 
-static char *skipline(char *s)
-{
-  while (*s!='\0')
-    s++;
-  return s;
-}
-
-
 char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
                         int *ext_cnt)
 /* parse instruction and save extension locations */
@@ -4698,11 +4880,39 @@ int set_default_qualifiers(char **q,int *q_len)
 
 static char validchar(char *s)
 {
-  char c = *s;
+  return ISEOL(s) ? 0 : *s;
+}
 
-  if (c!='\0' && c!=commentchar)
-    return c;
-  return 0;
+
+static void phxass_optc(uint16_t optc)
+/* set optimizations according to PhxAss OPTC flags */
+{
+  if (optc == 0) {
+    no_opt = 1;  /* no optimizations */
+    return;
+  }
+  if (optc & 0x001) { /* N */
+    opt_gen = opt_disp = opt_abs = opt_moveq = opt_bdisp = opt_odisp = 1;
+    opt_lea = opt_immaddr = 1;
+  }
+  if (optc & 0x002) /* R */
+    opt_pc = 1;
+  if (optc & 0x004) /* Q */
+    opt_quick = opt_lquick = 1;
+  if (optc & 0x008) /* B */
+    opt_bra = opt_brajmp = 1;
+  if (optc & 0x010) /* L */
+    opt_lsl = 1;
+  if (optc & 0x020) /* P */
+    opt_pea = 1;
+  if (optc & 0x040) /* S */
+    opt_clr = opt_st = opt_fconst = opt_disp = opt_bdisp = opt_odisp = 1;
+  if (optc & 0x080) /* M */
+    opt_gen = 1;
+  if (optc & 0x100) /* T */
+    ;  /* ignored */
+  if (optc & 0x200) /* D */
+    opt_movem = 1;
 }
 
 
@@ -4725,7 +4935,7 @@ static void phxass_option(char opt)
       /* fall through */
     case 'N':  /* normal */
       opt_gen = opt_disp = opt_abs = opt_moveq = opt_bdisp = opt_odisp = 1;
-      opt_lea = opt_immaddr = opt_speed = 1;
+      opt_lea = opt_immaddr = 1;
       break;
     case 'R':  /* relative */
       opt_pc = 1;
@@ -4734,7 +4944,7 @@ static void phxass_option(char opt)
       opt_quick = opt_lquick = 1;
       break;
     case 'B':  /* branches */
-      opt_bra = opt_brajmp = 1;
+      opt_bra = opt_brajmp = opt_allbra = 1;
       break;
     case 'L':  /* logical shifts */
       opt_lsl = 1;
@@ -4802,14 +5012,17 @@ static char *devpac_option(char *s)
     return s+4;
   }
   else if (!strnicmp(s,"xdebug",6)) {
-    no_symbols = flag;
+    if (flag)
+      no_symbols = 0;
+    tos_hisoft_dri = flag;  /* extended symbol names for Atari */
+    hunk_onlyglobal = flag; /* only xdef-symbols in objects for Amiga */
     return s+6;
   }
   else if (!flag)
     goto devpac_err;
 
   if (!strnicmp(s,"p=",2)) {
-    unsigned long cpu;
+    uint32_t cpu;
 
     s++;
     do {
@@ -4845,9 +5058,13 @@ static char *devpac_option(char *s)
           nocase = !flag;
           break;
         case 'd':
-          flag = !flag;
-        case 'x':  /* only XDEFs means no debugging symbols */
-          no_symbols = flag;
+          no_symbols = !flag;
+          break;
+        case 'x':
+          if (flag)
+            no_symbols = 0;
+          tos_hisoft_dri = flag;  /* extended symbol names for Atari */
+          hunk_onlyglobal = flag; /* only xdef-symbols in objects for Amiga */
           break;
         case 'l':
           if (!flag)
@@ -4886,6 +5103,9 @@ static char *devpac_option(char *s)
               case 'c': /* vasm-specific */
                 add_cpu_opt(0,OCMD_OPTCLR,flag);
                 break;
+              case 'd': /* vasm-specific */
+                add_cpu_opt(0,OCMD_OPTDIV,flag);
+                break;
               case 'f': /* vasm-specific */
                 add_cpu_opt(0,OCMD_OPTFCONST,flag);
                 break;
@@ -4954,7 +5174,7 @@ char *parse_cpu_special(char *start)
    cpu-specific text */
 {
   char *name=start,*s=start;
-  unsigned long cpu;
+  uint32_t cpu;
 
   if (ISIDSTART(*s)) {
     s++;
@@ -4974,11 +5194,15 @@ char *parse_cpu_special(char *start)
         else
           cpu_error(58);  /* not a valid small data register */
       }
+      else if (*name!='.' && !strnicmp(s,"code",4)) {
+        add_cpu_opt(0,OCMD_SMALLCODE,1);
+        return skip_line(s);
+      }
       else
         sdreg = last_sdreg;
       add_cpu_opt(0,OCMD_SDREG,sdreg);
       /* skip rest of line to be compatible to other assemblers */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==3 && !strnicmp(name,"far",3)) {
@@ -4988,8 +5212,9 @@ char *parse_cpu_special(char *start)
         sdreg = -1;
         add_cpu_opt(0,OCMD_SDREG,sdreg);
       }
+      add_cpu_opt(0,OCMD_SMALLCODE,0);
       eol(s);
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==8 && !strnicmp(name,"initnear",8)) {
@@ -5002,12 +5227,12 @@ char *parse_cpu_special(char *start)
         db->data[0] = 0x41 | (sdreg << 1);  /* LEA _LinkerDB,An */
         db->data[1] = 0xf9;
         memset(&db->data[2],0,4);
-        add_reloc(&db->relocs,new_import("_LinkerDB"),0,REL_ABS,32,16);
+        add_nreloc(&db->relocs,new_import("_LinkerDB"),0,REL_ABS,32,16);
         add_atom(0,new_data_atom(db,2));
       }
       else
         cpu_error(59);  /* small data mode is not enabled */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==7 && !strnicmp(name,"basereg",7)) {
@@ -5022,12 +5247,13 @@ char *parse_cpu_special(char *start)
           s = skip(s+1);
           reg = getreg(&s,0,0);
           if (reg>=(REGAn+0) && reg<=(REGAn+6)) {
-            if (baseexp[REGget(reg)] == NULL) {
+            if (baseexp[REGget(reg)]!=NULL && !phxass_compat) {
+              cpu_error(55,REGget(reg));  /* basereg already in use */
+            }
+            else {
               baseexp[REGget(reg)] = exp;
               eol(s);
             }
-            else
-              cpu_error(55,REGget(reg));  /* basereg already in use */
           }
           else
             cpu_error(4);  /* address register required */
@@ -5035,7 +5261,7 @@ char *parse_cpu_special(char *start)
         else
           cpu_error(15,',');  /* , expected */
       }
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==4 && !strnicmp(name,"endb",4)) {
@@ -5051,9 +5277,22 @@ char *parse_cpu_special(char *start)
         else
           cpu_error(56,REGget(reg));  /* basereg is already free */
       }
+      else if (phxass_compat) {
+        /* ignore register specification as long as it is unambigious */
+        for (reg=0; reg<=6; reg++) {
+          if (baseexp[reg] != NULL) {
+            baseexp[reg] = NULL;
+            break;
+          }
+        }
+        for (; reg<=6; reg++) {
+          if (baseexp[reg] != NULL)  /* more than one register in use? */
+            cpu_error(4);            /* address register required */
+        }
+      }
       else
         cpu_error(4);  /* address register required */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==7 && !strnicmp(name,"machine",7)) {
@@ -5067,7 +5306,7 @@ char *parse_cpu_special(char *start)
       }
       else
         cpu_error(43);  /* unknown cpu type */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if ((s-name)>=5 && (s-name)<=8 && !strnicmp(name,"mcf",3)) {
@@ -5079,7 +5318,7 @@ char *parse_cpu_special(char *start)
       }
       else
         cpu_error(43);  /* unknown cpu type */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==7 && !strnicmp(name,"mc",2)) {
@@ -5091,14 +5330,14 @@ char *parse_cpu_special(char *start)
       }
       else
         cpu_error(43);  /* unknown cpu type */
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==5 && !strnicmp(name,"cpu32",5)) {
       /* CPU32 */
       set_cpu_type(cpu32,1);
       eol(s);
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==3 && !strnicmp(name,"fpu",3)) {
@@ -5117,19 +5356,14 @@ char *parse_cpu_special(char *start)
         cpu_type &= ~(m68881|m68882);
       add_cpu_opt(0,OCMD_CPU,cpu_type);
       eol(s);
-      return skipline(s);
+      return skip_line(s);
     }
 
     else if (s-name==3 && !strnicmp(name,"opt",3)) {
       if (phxass_compat) {
         /* OPT [single-letter-options] - PhxAss options */
         s = skip(s);
-        /* first disable all */
-        opt_movem = opt_pea = opt_clr = opt_st = opt_lsl = opt_mul = 0;
-        opt_fconst = opt_brajmp = opt_pc = opt_bra = 0;
-        opt_disp = opt_abs = opt_moveq = opt_quick = opt_branop = 0;
-        opt_bdisp = opt_odisp = opt_lea = opt_lquick = opt_immaddr = 0;
-        opt_gen = opt_speed = 0;
+        clear_all_opts();  /* first disable all */
         while (validchar(s))
           phxass_option(*s++);
         cpu_opts_optinit(NULL);  /* now create new opt atoms */
@@ -5145,7 +5379,20 @@ char *parse_cpu_special(char *start)
         }
         while (*s2++ == ',');  /* another option? */
       }
-      return skipline(s);
+      return skip_line(s);
+    }
+
+    else if (phxass_compat && s-name==4 && !strnicmp(name,"optc",4)) {
+      /* OPTC <expression> - set PhxAss optimization flags */
+      taddr optc = 0;
+
+      s = skip(s);
+      clear_all_opts();  /* first disable all */
+      if (validchar(s))
+        optc = parse_constexpr(&s);
+      phxass_optc((uint16_t)optc);
+      cpu_opts_optinit(NULL);  /* now create new opt atoms */
+      return skip_line(s);
     }
   }
   return start;
@@ -5167,28 +5414,18 @@ int parse_cpu_label(char *labname,char **start)
     if ((s-dir==4 && !strnicmp(dir,"equr",4)) ||
         (s-dir==5 && !strnicmp(dir,"fequr",5))) {
       /* label EQUR Rn */
-      regsym *new;
       signed char r;
 
       s = skip(s);
-      if ((r = getreg(&s,0,0)) >= 0) {
-        data.ptr = new = mymalloc(sizeof(regsym));
-        new->name = mystrdup(labname);
-        new->type = REGisAn(r) ? RSTYPE_An : RSTYPE_Dn;
-        new->reg = REGget(r);
-        add_hashentry(regsymhash,new->name,data);
-      }
-      else if ((r = getfreg(&s)) >= 0) {
-        data.ptr = new = mymalloc(sizeof(regsym));
-        new->name = mystrdup(labname);
-        new->type = RSTYPE_FPn;
-        new->reg = r;
-        add_hashentry(regsymhash,new->name,data);
-      }
+      if ((r = getreg(&s,0,0)) >= 0)
+        new_regsym(regsymredef,0,labname,
+                   REGisAn(r)?RSTYPE_An:RSTYPE_Dn,0,REGget(r));
+      else if ((r = getfreg(&s)) >= 0)
+        new_regsym(regsymredef,0,labname,RSTYPE_FPn,0,r);
       else
         cpu_error(44);  /* register expected */
       eol(s);
-      *start = skipline(s);
+      *start = skip_line(s);
       return 1;
     }
 
@@ -5196,9 +5433,9 @@ int parse_cpu_label(char *labname,char **start)
              (s-dir==5 && !strnicmp(dir,"equrl",5))) {
       /* label REG reglist */
       s = skip(s);
-      new_abs(labname,number_expr((taddr)scan_Rnlist(&s)));
+      new_equate(labname,number_expr((taddr)scan_Rnlist(&s)));
       eol(s);
-      *start = skipline(s);
+      *start = skip_line(s);
       return 1;
     }
 
@@ -5206,9 +5443,9 @@ int parse_cpu_label(char *labname,char **start)
              (s-dir==6 && !strnicmp(dir,"fequrl",6))) {
       /* label FREG reglist */
       s = skip(s);
-      new_abs(labname,number_expr((taddr)scan_FPnlist(&s)));
+      new_equate(labname,number_expr((taddr)scan_FPnlist(&s)));
       eol(s);
-      *start = skipline(s);
+      *start = skip_line(s);
       return 1;
     }
   }
diff --git a/cpus/m68k/cpu.h b/cpus/m68k/cpu.h
index e94c89c..e4f73f2 100644
--- a/cpus/m68k/cpu.h
+++ b/cpus/m68k/cpu.h
@@ -1,28 +1,24 @@
 /*
 ** cpu.h Motorola M68k, CPU32 and ColdFire cpu-description header-file
-** (c) in 2002,2006-2010 by Frank Wille
+** (c) in 2002,2006-2015 by Frank Wille
 */
 
 #define BIGENDIAN 1
 #define LITTLEENDIAN 0
 #define VASM_CPU_M68K 1
+#define MNEMOHTABSIZE 0x4000
 
 /* maximum number of operands for one mnemonic */
 #define MAX_OPERANDS 6
 
-/* allowed to call parse_operand() with an arbitrary number of operands */
-#define CPU_CHECKS_OPCNT 0
-
 /* maximum number of mnemonic-qualifiers per mnemonic */
 #define MAX_QUALIFIERS 1
 
 /* maximum number of additional command-line-flags for this cpu */
 
 /* data type to represent a target-address */
-typedef long taddr;
-
-/* the compexity of the optimizer affords to check the size of each atom */
-#define CHECK_ATOMSIZE
+typedef int32_t taddr;
+typedef uint32_t utaddr;
 
 /* instruction extension */
 #define HAVE_INSTRUCTION_EXTENSION 1
@@ -31,6 +27,8 @@ typedef struct {
     struct {
       unsigned char flags;
       signed char last_size;
+      signed char orig_ext;
+      char unused;
     } real;
     struct {
       struct instruction *next;
@@ -59,25 +57,27 @@ typedef struct {
 #define OCMD_OPTST       9
 #define OCMD_OPTLSL     10
 #define OCMD_OPTMUL     11
-#define OCMD_OPTFCONST  12
-#define OCMD_OPTBRAJMP  13
-#define OCMD_OPTPC      14
-#define OCMD_OPTBRA     15
-#define OCMD_OPTDISP    16
-#define OCMD_OPTABS     17
-#define OCMD_OPTMOVEQ   18
-#define OCMD_OPTQUICK   19
-#define OCMD_OPTBRANOP  20
-#define OCMD_OPTBDISP   21
-#define OCMD_OPTODISP   22
-#define OCMD_OPTLEA     23
-#define OCMD_OPTLQUICK  24
-#define OCMD_OPTIMMADDR 25
-#define OCMD_OPTSPEED   26
-#define OCMD_OPTWARN    27
-#define OCMD_CHKPIC     28
-#define OCMD_CHKTYPE    29
-#define OCMD_NOWARN     30
+#define OCMD_OPTDIV     12
+#define OCMD_OPTFCONST  13
+#define OCMD_OPTBRAJMP  14
+#define OCMD_OPTPC      15
+#define OCMD_OPTBRA     16
+#define OCMD_OPTDISP    17
+#define OCMD_OPTABS     18
+#define OCMD_OPTMOVEQ   19
+#define OCMD_OPTQUICK   20
+#define OCMD_OPTBRANOP  21
+#define OCMD_OPTBDISP   22
+#define OCMD_OPTODISP   23
+#define OCMD_OPTLEA     24
+#define OCMD_OPTLQUICK  25
+#define OCMD_OPTIMMADDR 26
+#define OCMD_OPTSPEED   27
+#define OCMD_SMALLCODE  28
+#define OCMD_OPTWARN    29
+#define OCMD_CHKPIC     30
+#define OCMD_CHKTYPE    31
+#define OCMD_NOWARN     32
 
 /* minimum instruction alignment */
 #define INST_ALIGN 2
@@ -93,26 +93,20 @@ int m68k_data_operand(int);
 typedef struct {
   signed char mode;
   signed char reg;
-  unsigned short flags;
-  unsigned short format;      /* used for (d8,An/PC,Rn) and ext.addr.modes */
+  uint16_t format;            /* used for (d8,An/PC,Rn) and ext.addr.modes */
   unsigned char bf_offset;    /* bitfield offset, k-factor or MAC Upper Word */
   unsigned char bf_width;     /* bitfield width or MAC-MASK '&' */
-  union {
-    expr *value[2];           /* immediate, abs. or displacem. expression */
-    unsigned char *cint;      /* 64-bit or 96-bit constant in big-endian */
-    long double *cfloat;      /* floating point constant */
-  } exp;
+  int8_t basetype[2];         /* BASE_OK=normal, BASE=PCREL=pc-relative base */
+  uint32_t flags;
+  expr *value[2];             /* immediate, abs. or displacem. expression */
   /* filled during instruction_size(): */
   taddr extval[2];            /* evaluated expression from value[0/1] */
   symbol *base[2];            /* symbol base for value[0/1], NULL otherwise */
 } operand;
 
 /* flags */
-#define FL_Exp              0   /* parsed expression in value[0/1] */
-#define FL_Int64            1   /* 64-bit integer constant in *cint */
-#define FL_Int96            2   /* 96-bit integer constant in *cint */
-#define FL_Float            3   /* floating point constant in *cfloat */
-#define FL_expMask          3
+#define FL_ExtVal0          1   /* extval[0] is set */
+#define FL_ExtVal1          2   /* extval[1] is set */
 #define FL_UsesFormat       4   /* operand uses format word */
 #define FL_020up            8   /* 020+ addressing mode */
 #define FL_noCPU32       0x10   /* addressing mode not available for CPU32 */
@@ -132,6 +126,7 @@ typedef struct {
 #define FL_FPSpec      0x8000   /* special FPU reg. FPIAR/FPCR/FPSR only */
 #define FL_CheckMask   0xf800   /* bits to check when comparing with
                                    flags from struct optype */
+#define FL_BaseReg    0x10000   /* BASEREG expression in exp.value[0] */
 
 /* addressing modes */
 #define MODE_Dn           0
@@ -199,7 +194,7 @@ typedef struct {
 struct specreg {
   char *name;
   int code;                  /* -1 means no code, syntax-check only */
-  unsigned long available;
+  uint32_t available;
 };
 
 
@@ -241,8 +236,8 @@ struct addrmode {
 
 /* operand types */
 struct optype {
-  unsigned short modes;   /* addressing modes allowed (0-15, see above) */
-  unsigned short flags;
+  uint16_t modes;         /* addressing modes allowed (0-15, see above) */
+  uint16_t flags;
   signed char first;
   signed char last;
 };
@@ -262,10 +257,10 @@ struct optype {
 
 /* additional mnemonic data */
 typedef struct {
-  unsigned short place[MAX_OPERANDS];
-  unsigned short opcode[2];
-  unsigned short size;
-  unsigned long available;
+  uint16_t place[MAX_OPERANDS];
+  uint16_t opcode[2];
+  uint16_t size;
+  uint32_t available;
 } mnemonic_extension;
 
 /* size qualifiers, lowest two bits specify opcode size in words! */
@@ -278,6 +273,7 @@ typedef struct {
 #define SIZE_EXTENDED 0x2000
 #define SIZE_PACKED 0x4000
 #define SIZE_MASK 0x7f00
+#define SIZE_UNAMBIG 0x8000 /* only a single size allowed for this mnemonic */
 #define S_CFCHECK 0x80      /* SIZE_LONG only, when mcf (Coldfire) set */
 #define S_NONE 4
 #define S_STD S_NONE+4      /* 1st word, bits 6-7 */
@@ -349,10 +345,11 @@ struct oper_insert {
 /* CPU models and their type-flags */
 struct cpu_models {
   char name[8];
-  unsigned long type;
+  uint32_t type;
 };
 
 /* cpu types for availability check - warning: order is important */
+#define CPUMASK  0x000fffff
 #define	m68000   0x00000001
 #define	m68010   0x00000002
 #define	m68020   0x00000004
@@ -373,6 +370,7 @@ struct cpu_models {
 #define mcfusp   0x00010000
 #define mcffpu   0x00020000
 #define mcfmmu   0x00040000
+#define malias   0x40000000 /* a bad alias which we should warn about */
 #define mfpu     0x80000000 /* just to check if CP-ID needs to be inserted */
 
 /* handy aliases */
@@ -389,30 +387,18 @@ struct cpu_models {
 
 
 /* register symbols */
+#define HAVE_REGSYMS
 #define REGSYMHTSIZE 256
-typedef struct regsym {
-  char *name;
-  unsigned short type;
-  unsigned short reg;
-} regsym;
 
 #define RSTYPE_Dn   0
 #define RSTYPE_An   1
 #define RSTYPE_FPn  2
 
 
-/* register list symbols */
-#define REGLSTHTSIZE 256
-typedef struct reglist {
-  char *name;
-  unsigned short list;    /* Bit 0=d0/fp0, 1=d1/fp1, 8=a0, etc... */
-  unsigned short flags;
-} reglist;
-
-#define RLFL_FPLIST     1  /* register list contains FP-registers */
-#define RLFL_FPSPEC     2  /* register list contains FPIAR/FPCR/FPSR */
-
+/* MID for a.out format */
+extern int m68k_mid;
+#define MID m68k_mid
 
 /* exported functions */
-
 int parse_cpu_label(char *,char **);
+#define PARSE_CPU_LABEL(l,s) parse_cpu_label(l,s)
diff --git a/cpus/m68k/cpu_errors.h b/cpus/m68k/cpu_errors.h
index b791532..40d9975 100644
--- a/cpus/m68k/cpu_errors.h
+++ b/cpus/m68k/cpu_errors.h
@@ -4,7 +4,7 @@
   "missing ) in register indirect addressing mode",ERROR,
   "address register required",ERROR,
   "bad size extension",ERROR,                                        /* 05 */
-  "displacement outside parentheses ignored",WARNING,
+  "displacement at bad position",WARNING,
   "base or index register expected",ERROR,
   "missing ] in memory indirect addressing mode",ERROR,
   "no extension allowed here",WARNING,
@@ -15,7 +15,7 @@
   "missing outer displacement",ERROR,
   "%c expected",ERROR,                                               /* 15 */
   "can't use PC register as index",ERROR,
-  "illegal relocation",ERROR,
+  "double registers in list",WARNING,
   "data register required",ERROR,
   "illegal bitfield width/offset",ERROR,
   "constant integer expression required",ERROR,                      /* 20 */
@@ -32,7 +32,7 @@
   "absolute displacement expected",ERROR,                            /* 30 */
   "unknown option %c%c ignored",WARNING,
   "absolute short address out of range",ERROR,
-  "8-bit branch with zero displacement was converted to 16-bit",WARNING,
+  "deprecated instruction alias",WARNING,
   "illegal opcode extension",FATAL|ERROR,
   "extension for unsized instruction ignored",WARNING,               /* 35 */
   "immediate operand out of range",ERROR,
@@ -59,3 +59,4 @@
   "short-branch to following instruction turned into a nop",WARNING,
   "not a valid small data register",ERROR,
   "small data mode is not enabled",ERROR,
+  "division by zero",WARNING,                                        /* 60 */
diff --git a/cpus/m68k/opcodes.h b/cpus/m68k/opcodes.h
index 3f619b4..52e8562 100644
--- a/cpus/m68k/opcodes.h
+++ b/cpus/m68k/opcodes.h
@@ -100,7 +100,7 @@
   "btst",     {D_,MA},      {{RHI,SEA},        {0x0100,0},1|B|S_NONE,m68000up|mcf},
   "btst",     {QI,D_},      {{EL8,RLO},        {0x0800,0},2|L|S_NONE,m68000up|mcf},
   "btst",     {QI,CFAM},    {{EL8,SEA},        {0x0800,0},2|B|S_NONE,m68000up|mcf},
-  "btst",     {QI,MA},      {{EL8,SEA},        {0x0800,0},2|B|S_NONE,m68000up},
+  "btst",     {QI,MI},      {{EL8,SEA},        {0x0800,0},2|B|S_NONE,m68000up},
   "bfchg",    {BD},         {{BEA},            {0xeac0,0},2|UNS|S_NONE,m68020up},
   "bfclr",    {BD},         {{BEA},            {0xecc0,0},2|UNS|S_NONE,m68020up},
   "bfexts",   {BS,D_},      {{BEA,R2H},        {0xebc0,0},2|UNS|S_NONE,m68020up},
@@ -163,17 +163,17 @@
   "dbgt",     {D_,BR},      {{RLO,DBR},        {0x5ec8,0},1|W|S_NONE,m68000up},
   "dble",     {D_,BR},      {{RLO,DBR},        {0x5fc8,0},1|W|S_NONE,m68000up},
   "divs",     {CFAD,D_},    {{SEA,RHI},        {0x81c0,0},1|W|S_NONE,m68000up|mcfhwdiv},
-  "divs",     {CFAD,D_},    {{SEA,DV1},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32|mcfhwdiv},
+  "divs",     {CFAD,D_},    {{SEA,MDL},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32|mcfhwdiv},
   "divs",     {DA,D_},      {{SEA,RHI},        {0x81c0,0},1|W|S_NONE,m68000up|mcfhwdiv},
-  "divs",     {DA,D_},      {{SEA,DV1},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32},
-  "divs",     {DA,DD},      {{SEA,DV2},        {0x4c40,0x0c00},2|L|S_NONE,m68020up|cpu32},
-  "divsl",    {DA,DD},      {{SEA,DV2},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32},
+  "divs",     {DA,D_},      {{SEA,MDL},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32},
+  "divs",     {DA,DD},      {{SEA,DVL},        {0x4c40,0x0c00},2|L|S_NONE,m68020up|cpu32},
+  "divsl",    {DA,DD},      {{SEA,DVL},        {0x4c40,0x0800},2|L|S_NONE,m68020up|cpu32},
   "divu",     {CFAD,D_},    {{SEA,RHI},        {0x80c0,0},1|W|S_NONE,m68000up|mcfhwdiv},
-  "divu",     {CFAD,D_},    {{SEA,DV1},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32|mcfhwdiv},
+  "divu",     {CFAD,D_},    {{SEA,MDL},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32|mcfhwdiv},
   "divu",     {DA,D_},      {{SEA,RHI},        {0x80c0,0},1|W|S_NONE,m68000up|mcfhwdiv},
-  "divu",     {DA,D_},      {{SEA,DV1},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32},
-  "divu",     {DA,DD},      {{SEA,DV2},        {0x4c40,0x0400},2|L|S_NONE,m68020up|cpu32},
-  "divul",    {DA,DD},      {{SEA,DV2},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32},
+  "divu",     {DA,D_},      {{SEA,MDL},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32},
+  "divu",     {DA,DD},      {{SEA,DVL},        {0x4c40,0x0400},2|L|S_NONE,m68020up|cpu32},
+  "divul",    {DA,DD},      {{SEA,DVL},        {0x4c40,0x0000},2|L|S_NONE,m68020up|cpu32},
   "eor",      {D_,AD},      {{RHI,SEA},        {0xb100,0},1|CFBWL|S_STD,m68000up|mcf},
   "eor",      {IM,D_},      {{NEA,RLO},        {0x0a00,0},1|CFBWL|S_STD,m68000up|mcf},
   "eor",      {IM,AD},      {{NEA,SEA},        {0x0a00,0},1|BWL|S_STD,m68000up},
@@ -641,46 +641,42 @@
   "halt",     {0},          {{0},              {0x4ac8,0},1|UNS|S_NONE,m68060|mcf},
   "illegal",  {0},          {{0},              {0x4afc,0},1|UNS|S_NONE,m68000up|mcf},
   "intouch",  {AI},         {{RLO},            {0xf428,0},1|UNS|S_NONE,mcfb|mcfc},
-  "jbhs",     {BR},         {{BRA},            {0x6400,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbhs",     {BR},         {{BRA},            {0x6400,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jblo",     {BR},         {{BRA},            {0x6500,0},1|SBW|S_NONE,m68000up|mcf},
-  "jblo",     {BR},         {{BRA},            {0x6500,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbhi",     {BR},         {{BRA},            {0x6200,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbhi",     {BR},         {{BRA},            {0x6200,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbls",     {BR},         {{BRA},            {0x6300,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbls",     {BR},         {{BRA},            {0x6300,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbcc",     {BR},         {{BRA},            {0x6400,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbcc",     {BR},         {{BRA},            {0x6400,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbcs",     {BR},         {{BRA},            {0x6500,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbcs",     {BR},         {{BRA},            {0x6500,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbne",     {BR},         {{BRA},            {0x6600,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbne",     {BR},         {{BRA},            {0x6600,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbeq",     {BR},         {{BRA},            {0x6700,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbeq",     {BR},         {{BRA},            {0x6700,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbvc",     {BR},         {{BRA},            {0x6800,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbvc",     {BR},         {{BRA},            {0x6800,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbvs",     {BR},         {{BRA},            {0x6900,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbvs",     {BR},         {{BRA},            {0x6900,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbpl",     {BR},         {{BRA},            {0x6a00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbpl",     {BR},         {{BRA},            {0x6a00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbmi",     {BR},         {{BRA},            {0x6b00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbmi",     {BR},         {{BRA},            {0x6b00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbge",     {BR},         {{BRA},            {0x6c00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbge",     {BR},         {{BRA},            {0x6c00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jblt",     {BR},         {{BRA},            {0x6d00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jblt",     {BR},         {{BRA},            {0x6d00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbgt",     {BR},         {{BRA},            {0x6e00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbgt",     {BR},         {{BRA},            {0x6e00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jble",     {BR},         {{BRA},            {0x6f00,0},1|SBW|S_NONE,m68000up|mcf},
-  "jble",     {BR},         {{BRA},            {0x6f00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-  "jbra",     {BR},         {{BRA},            {0x6000,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbra",     {BR},         {{BRA},            {0x6000,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-#if 0 /* currently jbsr is always replaced by jsr */
-  "jbsr",     {BR},         {{BRA},            {0x6100,0},1|SBW|S_NONE,m68000up|mcf},
-  "jbsr",     {BR},         {{BRA},            {0x6100,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
-#endif
-  "jbsr",     {CT},         {{SEA},            {0x4e80,0},1|UNS|S_NONE,m68000up|mcf},
+  "jhs",      {BR},         {{BRA},            {0x6400,0},1|SBW|S_NONE,m68000up|mcf},
+  "jhs",      {BR},         {{BRA},            {0x6400,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jlo",      {BR},         {{BRA},            {0x6500,0},1|SBW|S_NONE,m68000up|mcf},
+  "jlo",      {BR},         {{BRA},            {0x6500,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jhi",      {BR},         {{BRA},            {0x6200,0},1|SBW|S_NONE,m68000up|mcf},
+  "jhi",      {BR},         {{BRA},            {0x6200,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jls",      {BR},         {{BRA},            {0x6300,0},1|SBW|S_NONE,m68000up|mcf},
+  "jls",      {BR},         {{BRA},            {0x6300,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jcc",      {BR},         {{BRA},            {0x6400,0},1|SBW|S_NONE,m68000up|mcf},
+  "jcc",      {BR},         {{BRA},            {0x6400,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jcs",      {BR},         {{BRA},            {0x6500,0},1|SBW|S_NONE,m68000up|mcf},
+  "jcs",      {BR},         {{BRA},            {0x6500,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jne",      {BR},         {{BRA},            {0x6600,0},1|SBW|S_NONE,m68000up|mcf},
+  "jne",      {BR},         {{BRA},            {0x6600,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jeq",      {BR},         {{BRA},            {0x6700,0},1|SBW|S_NONE,m68000up|mcf},
+  "jeq",      {BR},         {{BRA},            {0x6700,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jvc",      {BR},         {{BRA},            {0x6800,0},1|SBW|S_NONE,m68000up|mcf},
+  "jvc",      {BR},         {{BRA},            {0x6800,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jvs",      {BR},         {{BRA},            {0x6900,0},1|SBW|S_NONE,m68000up|mcf},
+  "jvs",      {BR},         {{BRA},            {0x6900,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jpl",      {BR},         {{BRA},            {0x6a00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jpl",      {BR},         {{BRA},            {0x6a00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jmi",      {BR},         {{BRA},            {0x6b00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jmi",      {BR},         {{BRA},            {0x6b00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jge",      {BR},         {{BRA},            {0x6c00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jge",      {BR},         {{BRA},            {0x6c00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jlt",      {BR},         {{BRA},            {0x6d00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jlt",      {BR},         {{BRA},            {0x6d00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jgt",      {BR},         {{BRA},            {0x6e00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jgt",      {BR},         {{BRA},            {0x6e00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jle",      {BR},         {{BRA},            {0x6f00,0},1|SBW|S_NONE,m68000up|mcf},
+  "jle",      {BR},         {{BRA},            {0x6f00,0},1|SBWL|S_NONE,m68020up|cpu32|mcfb|mcfc},
+  "jbra",     {CT},         {{SEA},            {0x4ec0,0},1|UNS|S_NONE,m68000up|mcf},
+  "jra",      {CT},         {{SEA},            {0x4ec0,0},1|UNS|S_NONE,m68000up|mcf},
   "jmp",      {CT},         {{SEA},            {0x4ec0,0},1|UNS|S_NONE,m68000up|mcf},
+  "jbsr",     {CT},         {{SEA},            {0x4e80,0},1|UNS|S_NONE,m68000up|mcf},
   "jsr",      {CT},         {{SEA},            {0x4e80,0},1|UNS|S_NONE,m68000up|mcf},
   "lea",      {CT,A_},      {{SEA,RHI},        {0x41c0,0},1|L|S_NONE,m68000up|mcf},
   "linea",    {VA},         {{LIN},            {0xa000,0},1|UNS|S_NONE,m68000up|mcf},
@@ -745,6 +741,8 @@
   "move",     {R_,_MASK},   {{SEA,NOP},        {0xad00,0},1|L|S_NONE,mcfmac|mcfemac},
   "move",     {IM,_MASK},   {{SEA,NOP},        {0xad00,0},1|L|S_NONE,mcfmac|mcfemac},
   "movea",    {AY,A_},      {{SEA,RHI},        {0x0040,0},1|WL|S_MOVE,m68000up|mcf},
+  "movea",    {A_,AL},      {{RLO,MEA},        {0x0008,0},1|WL|S_MOVE,malias|m68000up|mcf},
+  "movea",    {DA,AD},      {{SEA,MEA},        {0x0000,0},1|BWL|S_MOVE,malias|m68000up|mcf},
   "movec",    {_CTRL,R_},   {{CTR,C2H},        {0x4e7a,0},2|L|S_NONE,m68010up},
   "movec",    {R_,_CTRL},   {{C2H,CTR},        {0x4e7b,0},2|L|S_NONE,m68010up|mcf},
   "movem",    {RL,CFMM},    {{D16,SEA},        {0x4880,0},2|CFWL|S_WL6,m68000up|mcf},
@@ -754,7 +752,7 @@
   "movem",    {MR,RL},      {{SEA,D16},        {0x4c80,0},2|WL|S_WL6,m68000up},
   "movem",    {QI,CFMM},    {{D16,SEA},        {0x4880,0},2|CFWL|S_WL6,m68000up|mcf},
   "movem",    {CFMM,QI},    {{SEA,D16},        {0x4c80,0},2|CFWL|S_WL6,m68000up|mcf},
-  "movem",    {QI,PA},      {{D2R,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
+  "movem",    {QI,PA},      {{D16,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
   "movem",    {QI,AC},      {{D16,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
   "movem",    {MR,QI},      {{SEA,D16},        {0x4c80,0},2|WL|S_WL6,m68000up},
   "movep",    {DP,D_},      {{REA,RHI},        {0x0108,0},1|WL|S_WL6,m68000up},
@@ -774,7 +772,7 @@
   "movm",     {MR,RL},      {{SEA,D16},        {0x4c80,0},2|WL|S_WL6,m68000up},
   "movm",     {QI,CFMM},    {{D16,SEA},        {0x4880,0},2|CFWL|S_WL6,m68000up|mcf},
   "movm",     {CFMM,QI},    {{SEA,D16},        {0x4c80,0},2|CFWL|S_WL6,m68000up|mcf},
-  "movm",     {QI,PA},      {{D2R,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
+  "movm",     {QI,PA},      {{D16,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
   "movm",     {QI,AC},      {{D16,SEA},        {0x4880,0},2|WL|S_WL6,m68000up},
   "movm",     {MR,QI},      {{SEA,D16},        {0x4c80,0},2|WL|S_WL6,m68000up},
   "msaac",    {RM,RM,SH,_ACCX,_ACCX},{{RMM,RMW,MSF,ACX,ACW},{0xa000,0x0101},2|WL|S_MAC,mcfemac},
@@ -790,15 +788,15 @@
   "mssac",    {RM,RM,SH,_ACCX,_ACCX},{{RMM,RMW,MSF,ACX,ACW},{0xa000,0x0103},2|WL|S_MAC,mcfemac},
   "mssac",    {RM,RM,_ACCX,_ACCX},{{RMM,RMW,ACX,ACW},{0xa000,0x0103},2|WL|S_MAC,mcfemac},
   "muls",     {CFAD,D_},    {{SEA,RHI},        {0xc1c0,0},1|W|S_NONE,m68000up|mcf},
-  "muls",     {CFAD,D_},    {{SEA,R2H},        {0x4c00,0x0800},2|L|S_NONE,m68020up|cpu32|mcf},
+  "muls",     {CFAD,D_},    {{SEA,MDL},        {0x4c00,0x0800},2|L|S_NONE,m68020up|cpu32|mcf},
   "muls",     {DA,D_},      {{SEA,RHI},        {0xc1c0,0},1|W|S_NONE,m68000up|mcf},
-  "muls",     {DA,D_},      {{SEA,R2H},        {0x4c00,0x0800},2|L|S_NONE,m68020up|cpu32},
-  "muls",     {DA,DD},      {{SEA,DV2},        {0x4c00,0x0c00},2|L|S_NONE,m68020up|cpu32},
+  "muls",     {DA,D_},      {{SEA,MDL},        {0x4c00,0x0800},2|L|S_NONE,m68020up|cpu32},
+  "muls",     {DA,DD},      {{SEA,DVL},        {0x4c00,0x0c00},2|L|S_NONE,m68020up|cpu32},
   "mulu",     {CFAD,D_},    {{SEA,RHI},        {0xc0c0,0},1|W|S_NONE,m68000up|mcf},
-  "mulu",     {CFAD,D_},    {{SEA,R2H},        {0x4c00,0x0000},2|L|S_NONE,m68020up|cpu32|mcf},
+  "mulu",     {CFAD,D_},    {{SEA,MDL},        {0x4c00,0x0000},2|L|S_NONE,m68020up|cpu32|mcf},
   "mulu",     {DA,D_},      {{SEA,RHI},        {0xc0c0,0},1|W|S_NONE,m68000up|mcf},
-  "mulu",     {DA,D_},      {{SEA,R2H},        {0x4c00,0x0000},2|L|S_NONE,m68020up|cpu32},
-  "mulu",     {DA,DD},      {{SEA,DV2},        {0x4c00,0x0400},2|L|S_NONE,m68020up|cpu32},
+  "mulu",     {DA,D_},      {{SEA,MDL},        {0x4c00,0x0000},2|L|S_NONE,m68020up|cpu32},
+  "mulu",     {DA,DD},      {{SEA,DVL},        {0x4c00,0x0400},2|L|S_NONE,m68020up|cpu32},
   "mvs",      {AY,D_},      {{SEA,RHI},        {0x7100,0},1|BW|S_STD,mcfb|mcfc},
   "mvz",      {AY,D_},      {{SEA,RHI},        {0x7180,0},1|BW|S_STD,mcfb|mcfc},
   "nbcd",     {AD},         {{SEA},            {0x4800,0},1|B|S_NONE,m68000up},
@@ -983,8 +981,8 @@
   "pulse",    {0},          {{0},              {0x4acc,0},1|UNS|S_NONE,m68060|mcf},
   "pvalid",   {_VAL,AC},    {{NOP,SEA},        {0xf000,0x2800},2|L|S_NONE,m68851},
   "pvalid",   {A_,AC},      {{R2L,SEA},        {0xf000,0x2c00},2|L|S_NONE,m68851},
-  "rems",     {CFAD,DD},    {{SEA,DV2},        {0x4c40,0x0800},2|L|S_NONE,mcfhwdiv},
-  "remu",     {CFAD,DD},    {{SEA,DV2},        {0x4c40,0x0000},2|L|S_NONE,mcfhwdiv},
+  "rems",     {CFAD,DD},    {{SEA,DVL},        {0x4c40,0x0800},2|L|S_NONE,mcfhwdiv},
+  "remu",     {CFAD,DD},    {{SEA,DVL},        {0x4c40,0x0000},2|L|S_NONE,mcfhwdiv},
   "reset",    {0},          {{0},              {0x4e70,0},1|UNS|S_NONE,m68000up},
   "rol",      {AM},         {{SEA},            {0xe7c0,0},1|W|S_NONE,m68000up},
   "rol",      {D_,D_},      {{RHI,RLO},        {0xe138,0},1|BWL|S_STD,m68000up},
@@ -1118,3 +1116,4 @@
   "unpk",     {PA,PA,QI},   {{RLO,RHI,D16},    {0x8188,0},2|UNS|S_NONE,m68020up},
   "wddata",   {AM},         {{SEA},            {0xfb00,0},1|BWL|S_STD,mcf},
   "wdebug",   {CFMM},       {{SEA},            {0xfbc0,0x0003},2|L|S_NONE,mcf},
+  "",         {0},          {{0},              {0,0},1|SIZE_MASK,~0}
diff --git a/cpus/m68k/operands.h b/cpus/m68k/operands.h
index d5f3392..c44168c 100644
--- a/cpus/m68k/operands.h
+++ b/cpus/m68k/operands.h
@@ -56,7 +56,7 @@ enum {
 enum {
   OP_D8=1,OP_D16,OP_D32,OP_D64,OP_F32,OP_F64,OP_F96,
   D_,A_,AI,R_,RM,DD,CS,PA,AP,DP,F_,FF,FR,FPIAR,IM,QI,BR,AB,VA,RL,FL,FS,
-  AY,AM,MA,FA,CF,MAQ,CFAM,CM,AL,DA,DN,CFDA,CT,AC,AD,CFAD,BD,BS,AK,MS,MR,
+  AY,AM,MA,MI,FA,CF,MAQ,CFAM,CM,AL,DA,DN,CFDA,CT,AC,AD,CFAD,BD,BS,AK,MS,MR,
   CFMM,CFMN,_CCR,_SR,_USP,_CACHES,_ACC,_MACSR,_MASK,_CTRL,_ACCX,_AEXT,
   _VAL,_FC,_RP_030,_RP_851,_TC,_AC,_M1_B,_BAC,_BAD,_PSR,_PCSR,_TT,SH
 };
@@ -161,6 +161,9 @@ struct optype optypes[] = {
 /* MA        memory addressing modes 2-6,7.0-4 */
   _(0,0,1,1,1,1,1,1,1,1,1,1,0,0,0,0),0,0,0,
 
+/* MI        memory addressing modes 2-6,7.0-3 without immediate */
+  _(0,0,1,1,1,1,1,1,1,1,1,0,0,0,0,0),0,0,0,
+
 /* FA        memory addressing modes 2-6,7.0-4 with float immediate */
   _(0,0,1,1,1,1,1,1,1,1,1,1,0,0,0,0),OTF_FLTIMM,0,0,
 
@@ -306,7 +309,7 @@ static void insert_macreg(unsigned char *d,struct oper_insert *i,operand *o)
     *(d+3) |= i->size;  /* size holds the U/L mask for this register */
 }
 
-static void insert_div(unsigned char *d,struct oper_insert *i,operand *o)
+static void insert_muldivl(unsigned char *d,struct oper_insert *i,operand *o)
 {
   *(d+2) |= (o->reg & 7) << 4;
   *(d+3) |= o->reg & 7;
@@ -355,7 +358,7 @@ static void insert_accx_rev(unsigned char *d,struct oper_insert *i,operand *o)
 /* place to put an operand */
 enum {
   NOP=0,NEA,SEA,MEA,BEA,KEA,REA,EAM,BRA,DBR,RHI,RLO,RL4,R2H,R2M,R2L,R2P,
-  FPN,FPM,FMD,C2H,CS1,CS2,CS3,DV1,DV2,TBL,FPS,FPC,RMM,RMW,RMY,RMX,ACX,ACR,
+  FPN,FPM,FMD,C2H,CS1,CS2,CS3,MDL,DVL,TBL,FPS,FPC,RMM,RMW,RMY,RMX,ACX,ACR,
   DL8,DL4,D3Q,DL3,CAC,CTR,D16,D2R,EL8,E8R,EL3,EL4,EM3,EM4,EH3,BAX,
   FCR,F13,M3Q,MSF,ACW,AHI,ALO,LIN
 };
@@ -433,10 +436,10 @@ struct oper_insert insert_info[] = {
 /* CS3 register 4 bits for CAS2 (CAS2) bits 15-12 */
   M_func,4,16,0,insert_cas2,
 
-/* DV1 insert 3 bit reg. Dq into 2nd word bits 14-12/2-0 */
-  M_func,0,0,0,insert_div,
+/* MDL insert 3 bit reg. Dq/Dl into 2nd word bits 14-12/2-0 */
+  M_func,0,0,0,insert_muldivl,
 
-/* DV2 bit Dq to 2nd word bits 14-12, Dr to bits 2-0 */
+/* DVL bit Dq to 2nd word bits 14-12, Dr to bits 2-0 */
   M_func,0,0,0,insert_divl,
 
 /* TBL 3 bit Dym to 1st w. bits 2-0, Dyn to 2nd w. 2-0 */
diff --git a/cpus/ppc/cpu.c b/cpus/ppc/cpu.c
index 7d0f532..fde1078 100644
--- a/cpus/ppc/cpu.c
+++ b/cpus/ppc/cpu.c
@@ -1,6 +1,6 @@
 /*
 ** cpu.c PowerPC cpu-description file
-** (c) in 2002-2006,2008,2011 by Frank Wille
+** (c) in 2002-2015 by Frank Wille
 */
 
 #include "vasm.h"
@@ -12,13 +12,13 @@ mnemonic mnemonics[] = {
 
 int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
 
-char *cpu_copyright="vasm PowerPC cpu backend 1.5 (c) 2002-2006,2008,2011 Frank Wille";
+char *cpu_copyright="vasm PowerPC cpu backend 1.7 (c) 2002-2015 Frank Wille";
 char *cpuname = "PowerPC";
 int bitsperbyte = 8;
 int bytespertaddr = 4;
 int ppc_endianess = 1;
 
-static unsigned long cpu_type = PPC_OPCODE_ANY;
+static uint32_t cpu_type = CPU_TYPE_COMMON | CPU_TYPE_32 | CPU_TYPE_ANY;
 static int regnames = 1;
 static taddr sdreg = 13;  /* this is default for V.4, PowerOpen = 2 */
 static taddr sd2reg = 2;
@@ -37,13 +37,55 @@ int ppc_data_align(int n)
 
 int ppc_data_operand(int n)
 {
-  if (n<=8) return OP_D8;
-  if (n<=16) return OP_D16;
-  if (n<=32) return OP_D32;
+  if (n&OPSZ_FLOAT) return OPSZ_BITS(n)>32?OP_F64:OP_F32;
+  if (OPSZ_BITS(n)<=8) return OP_D8;
+  if (OPSZ_BITS(n)<=16) return OP_D16;
+  if (OPSZ_BITS(n)<=32) return OP_D32;
   return OP_D64;
 }
 
 
+int ppc_operand_optional(operand *op,int type)
+{
+  if (powerpc_operands[type].flags & OPER_OPTIONAL) {
+    op->attr = REL_NONE;
+    op->mode = OPM_NONE;
+    op->basereg = NULL;
+    op->value = number_expr(0);  /* default value 0 */
+
+    if (powerpc_operands[type].flags & OPER_NEXT)
+      op->type = NEXT;
+    else
+      op->type = type;
+    return 1;
+  }
+  else if (powerpc_operands[type].flags & OPER_FAKE) {
+    op->type = type;
+    op->value = NULL;
+    return 1;
+  }
+
+  return 0;
+}
+
+
+int ppc_available(int idx)
+/* Check if mnemonic is available for selected cpu_type. */
+{
+  uint32_t avail = mnemonics[idx].ext.available;
+  uint32_t datawidth = CPU_TYPE_32 | CPU_TYPE_64;
+
+  if (avail & cpu_type & ~datawidth) {
+    if (avail & datawidth)
+      return (avail & datawidth) == (cpu_type & datawidth)
+             || (cpu_type & CPU_TYPE_64_BRIDGE) != 0;
+    else
+      return 1;
+  }
+  return 0;
+}
+
+
 static char *parse_reloc_attr(char *p,operand *op)
 {
   p = skip(p);
@@ -133,44 +175,51 @@ static char *parse_reloc_attr(char *p,operand *op)
 
 
 int parse_operand(char *p,int len,operand *op,int optype)
-/* Parses operands, reads expressions and assigns relocation types */
+/* Parses operands, reads expressions and assigns relocation types. */
 {
   char *start = p;
+  int rc = PO_MATCH;
 
   op->attr = REL_NONE;
   op->mode = OPM_NONE;
+  op->basereg = NULL;
+
   p = skip(p);
-  op->value = parse_expr(&p);
-  if (optype < OP_D8) {
+  op->value = OP_FLOAT(optype) ? parse_expr_float(&p) : parse_expr(&p);
+
+  if (!OP_DATA(optype)) {
     p = parse_reloc_attr(p,op);
     p = skip(p);
-  }
 
-  if (optype < OP_D8 && p-start < len) {
-    if (*p == '(') {
+    if (p-start < len && *p=='(') {
       /* parse d(Rn) load/store addressing mode */
-      if (powerpc_operands[optype].flags & PPC_OPERAND_PARENS) {
+      if (powerpc_operands[optype].flags & OPER_PARENS) {
         p++;
         op->basereg = parse_expr(&p);
         p = skip(p);
-        if (*p == ')')
+        if (*p == ')') {
           p = skip(p+1);
-        else
+          rc = PO_SKIP;
+        }
+        else {
           cpu_error(5);  /* missing closing parenthesis */
+          rc = PO_CORRUPT;
+          goto leave;
+        }
       }
-      else
+      else {
         cpu_error(4);  /* illegal operand type */
+        rc = PO_CORRUPT;
+        goto leave;
+      }
     }
-    else
-      op->basereg = NULL;
   }
-  else
-    op->basereg = NULL;
 
   if (p-start < len)
     cpu_error(3);  /* trailing garbage in operand */
+leave:
   op->type = optype;
-  return 1;
+  return rc;
 }
 
 
@@ -218,7 +267,7 @@ static int get_reloc_type(operand *op)
 {
   int rtype = REL_NONE;
 
-  if (op->type >= OP_D8) {  /* data relocs */
+  if (OP_DATA(op->type)) {  /* data relocs */
     return REL_ABS;
   }
 
@@ -228,7 +277,7 @@ static int get_reloc_type(operand *op)
     if (ppcop->shift == 0) {
       if (ppcop->bits == 16 || ppcop->bits == 26) {
 
-        if (ppcop->flags & PPC_OPERAND_RELATIVE) {  /* a relative branch */
+        if (ppcop->flags & OPER_RELATIVE) {  /* a relative branch */
           switch (op->attr) {
             case REL_NONE:
               rtype = REL_PC;
@@ -245,7 +294,7 @@ static int get_reloc_type(operand *op)
           }
         }
 
-        else if (ppcop->flags & PPC_OPERAND_ABSOLUTE) { /* absolute branch */
+        else if (ppcop->flags & OPER_ABSOLUTE) { /* absolute branch */
           switch (op->attr) {
             case REL_NONE:
               rtype = REL_ABS;
@@ -290,73 +339,6 @@ static int get_reloc_type(operand *op)
 }
 
 
-static nreloc *get_reloc_size(nreloc *r,operand *op)
-/* determine reloc size, offset and mask
-   creates and returns a second nreloc structure, when required */
-{
-  nreloc *r2 = NULL;
-
-  if (op->type >= OP_D8) {  /* data */
-    switch (op->type) {
-      case OP_D8:
-        r->size = 8;
-        break;
-      case OP_D16:
-        r->size = 16;
-        break;
-      case OP_D32:
-        r->size = 32;
-        break;
-      case OP_D64:
-        r->size = 64;
-        break;
-      default:
-        ierror(0);
-        break;
-    }
-  }
-  else {  /* instructions */
-    const struct powerpc_operand *ppcop = &powerpc_operands[op->type];
-
-    if (ppcop->flags & (PPC_OPERAND_RELATIVE|PPC_OPERAND_ABSOLUTE)) {
-      /* branch instruction */
-      if (ppcop->bits == 26) {
-        r->size = 24;
-        r->offset = 6;
-        r->mask = 0x3fffffc;
-      }
-      else {
-        r->size = 14;
-        r->offset = 16;
-        r->mask = 0xfffc;
-      }
-    }
-    else {
-      /* load/store or immediate */
-      r->size = 16;
-      r->offset = 16;
-      switch (op->mode) {
-        case OPM_LO:
-          r->mask = 0xffff;
-          break;
-        case OPM_HI:
-          r->mask = 0xffff0000;
-          break;
-        case OPM_HA:
-          r->mask = 0xffff0000;
-          r2 = new_nreloc();
-          r2->size = 16;
-          r2->offset = 16;
-          r2->mask = 0x8000;
-          r2->addend = r->addend;
-          break;
-      }
-    }
-  }
-  return r2;
-}
-
-
 static int valid_hiloreloc(int type)
 /* checks if this relocation type allows a @l/@h/@ha modifier */
 {
@@ -381,42 +363,103 @@ static taddr make_reloc(int reloctype,operand *op,section *sec,
 
   if (!eval_expr(op->value,&val,sec,pc)) {
     /* non-constant expression requires a relocation entry */
-    nreloc *r = new_nreloc();
-    nreloc *r2;
-    rlist *rl = mymalloc(sizeof(rlist));
+    symbol *base;
+    int btype,size,offset;
+    taddr addend,mask;
 
-    rl->type = reloctype;
-    if (op->mode != OPM_NONE) {
-      if (!valid_hiloreloc(reloctype))  /* check if reloc allows @ha/@h/@l */
-        op->mode = OPM_NONE;
-    }
+    btype = find_base(op->value,&base,sec,pc);
+
+    if (btype > BASE_ILLEGAL) {
+      if (btype == BASE_PCREL) {
+        if (reloctype == REL_ABS)
+          reloctype = REL_PC;
+        else
+          goto illreloc;
+      }
+
+      if (op->mode != OPM_NONE) {
+        /* check if reloc allows @ha/@h/@l */
+        if (!valid_hiloreloc(reloctype))
+          op->mode = OPM_NONE;
+      }
 
-    if (r->sym = find_base(op->value,sec,pc)) {
-      if (reloctype==REL_PC) {
+      if (reloctype == REL_PC && !is_pc_reloc(base,sec)) {
         /* a relative branch - reloc is only needed for external reference */
-        if (r->sym->type == LABSYM && r->sym->sec == sec) {
-          myfree(rl);
-          myfree(r);
-          return val-pc;
+        return val-pc;
+      }
+
+      /* determine reloc size, offset and mask */
+      if (OP_DATA(op->type)) {  /* data operand */
+        switch (op->type) {
+          case OP_D8:
+            size = 8;
+            break;
+          case OP_D16:
+            size = 16;
+            break;
+          case OP_D32:
+          case OP_F32:
+            size = 32;
+            break;
+          case OP_D64:
+          case OP_F64:
+            size = 64;
+            break;
+          default:
+            ierror(0);
+            break;
         }
+        addend = val;
+        offset = 0;
+        mask = -1;
       }
-      r->addend = val;
-      if (r2 = get_reloc_size(r,op)) {
-        /* a second relocation for @ha is required */
-        rlist *rl2 = mymalloc(sizeof(rlist));
-
-        r2->sym = r->sym;
-        rl2->type = rl->type;
-        rl2->reloc = r2;
-        rl2->next = *reloclist;
-        *reloclist = rl2;
+      else {  /* instruction operand */
+        const struct powerpc_operand *ppcop = &powerpc_operands[op->type];
+
+        if (ppcop->flags & (OPER_RELATIVE|OPER_ABSOLUTE)) {
+          /* branch instruction */
+          if (ppcop->bits == 26) {
+            size = 24;
+            offset = 6;
+            mask = 0x3fffffc;
+          }
+          else {
+            size = 14;
+            offset = 16;
+            mask = 0xfffc;
+          }
+          addend = (btype == BASE_PCREL) ? val + offset/8 : val;
+        }
+        else {
+          /* load/store or immediate */
+          size = 16;
+          offset = 16;
+          addend = (btype == BASE_PCREL) ? val + offset/8 : val;
+          switch (op->mode) {
+            case OPM_LO:
+              mask = 0xffff;
+              break;
+            case OPM_HI:
+              mask = 0xffff0000;
+              break;
+            case OPM_HA:
+              add_nreloc_masked(reloclist,base,addend,reloctype,
+                                size,offset,0x8000);
+              mask = 0xffff0000;
+              break;
+            default:
+              mask = -1;
+              break;
+          }
+        }
       }
-      rl->reloc = r;
-      rl->next = *reloclist;
-      *reloclist = rl;
+
+      add_nreloc_masked(reloclist,base,addend,reloctype,size,offset,mask);
+    }
+    else if (btype != BASE_NONE) {
+illreloc:
+      general_error(38);  /* illegal relocation */
     }
-    else
-      cpu_error(10);  /* illegal relocation */
   }
 
   return val;
@@ -436,7 +479,7 @@ static int cnt_insn_ops(instruction *p)
 {
   int cnt = 0;
 
-  while (p->op[cnt]!=NULL && cnt<MAX_OPERANDS)
+  while (cnt<MAX_OPERANDS && p->op[cnt]!=NULL)
     cnt++;
   return cnt;
 }
@@ -446,7 +489,7 @@ static int cnt_mnemo_ops(mnemonic *p)
 {
   int cnt = 0;
 
-  while (p->operand_type[cnt]!=UNUSED && cnt<MAX_OPERANDS)
+  while (cnt<MAX_OPERANDS && p->operand_type[cnt]!=UNUSED)
     cnt++;
   return cnt;
 }
@@ -455,9 +498,9 @@ static int cnt_mnemo_ops(mnemonic *p)
 static void range_check(taddr val,const struct powerpc_operand *o,dblock *db)
 /* checks if a value fits the allowed range for this operand field */
 {
-  long v = (long)val;
-  long minv = 0;
-  long maxv = (1L << o->bits) - 1;
+  int32_t v = (int32_t)val;
+  int32_t minv = 0;
+  int32_t maxv = (1L << o->bits) - 1;
   int force_signopt = 0;
 
   if (db) {
@@ -472,14 +515,14 @@ static void range_check(taddr val,const struct powerpc_operand *o,dblock *db)
     }
   }
 
-  if (o->flags & PPC_OPERAND_SIGNED) {
+  if (o->flags & OPER_SIGNED) {
     minv = ~(maxv >> 1);
 
     /* @@@ Only recognize this flag in 32-bit mode! Don't care for now */
-    if (!(o->flags & PPC_OPERAND_SIGNOPT) && !force_signopt)
+    if (!(o->flags & OPER_SIGNOPT) && !force_signopt)
       maxv >>= 1;
   }
-  if (o->flags & PPC_OPERAND_NEGATIVE)
+  if (o->flags & OPER_NEGATIVE)
     v = -v;
 
   if (v<minv || v>maxv)
@@ -487,7 +530,7 @@ static void range_check(taddr val,const struct powerpc_operand *o,dblock *db)
 }
 
 
-static void negate_bo_cond(unsigned long *p)
+static void negate_bo_cond(uint32_t *p)
 /* negates all conditions in a branch instruction's BO field */
 {
   if (!(*p & 0x02000000))
@@ -497,178 +540,154 @@ static void negate_bo_cond(unsigned long *p)
 }
 
 
-static unsigned long insertcode(unsigned long i,taddr val,
-                                const struct powerpc_operand *o)
+static uint32_t insertcode(uint32_t i,taddr val,
+                           const struct powerpc_operand *o)
 {
   if (o->insert) {
     const char *errmsg = NULL;
 
-    i = (o->insert)(i,(long)val,&errmsg);
+    i = (o->insert)(i,(int32_t)val,&errmsg);
     if (errmsg)
       cpu_error(0,errmsg);
   }
   else
-    i |= ((long)val & ((1<<o->bits)-1)) << o->shift;
+    i |= ((int32_t)val & ((1<<o->bits)-1)) << o->shift;
+
   return i;
 }
 
 
-taddr eval_operands(instruction *ip,section *sec,taddr pc,
-                    unsigned long *insn,dblock *db)
+size_t eval_operands(instruction *ip,section *sec,taddr pc,
+                     uint32_t *insn,dblock *db)
 /* evaluate expressions and try to optimize instruction,
    return size of instruction */
 {
   mnemonic *mnemo = &mnemonics[ip->code];
-  taddr isize=4;
+  size_t isize = 4;
   int i,j,omitted;
   operand op;
 
-  if (insn != NULL) {
-    if (!(mnemo->ext.available & cpu_type))
-      cpu_error(1);  /* instruction not supported on selected architecture */
-
+  if (insn != NULL)
     *insn = mnemo->ext.opcode;
-  }
 
-  for (i=0,j=0,omitted=0;
-       i<MAX_OPERANDS && j<MAX_OPERANDS && mnemo->operand_type[j]!=UNUSED; ) {
-
-    if (ip->op[i])
-      op = *(ip->op[i]);
-    i++;
-
-    while (j<MAX_OPERANDS && mnemo->operand_type[j]!=UNUSED) {
-      const struct powerpc_operand *ppcop;
-      int reloctype;
-      taddr val;
-
-      op.type = mnemo->operand_type[j++];
-      ppcop = &powerpc_operands[op.type];
-
-      if (ppcop->flags & PPC_OPERAND_OPTIONAL) {
-        if (cnt_insn_ops(ip)+omitted < cnt_mnemo_ops(mnemo)) {
-          /* an optional operand was omitted */
-          omitted++;
-          if (ppcop->flags & PPC_OPERAND_NEXT) {
-            /* ignore also next mnemo oper and use a special oper instead */
-            if (j < MAX_OPERANDS)
-              j++;
-            else
-              ierror(0);
-            ppcop++;
-          }
-          else {  /* use a value of 0 for omitted operand */
-            if (insn != NULL)
-              *insn = insertcode(*insn,0,ppcop);
-            continue;
-          }
-        }
-      }
+  for (i=0; i<MAX_OPERANDS && ip->op[i]!=NULL; i++) {
+    const struct powerpc_operand *ppcop;
+    int reloctype;
+    taddr val;
 
-      if (ip->op[i-1] == NULL) {
-        if (insn != NULL)
-          cpu_error(15);  /* missing mandatory operand */
-        return isize;
+    op = *(ip->op[i]);
+
+    if (op.type == NEXT) {
+      /* special case: operand omitted and use this operand's type + 1
+         for the next operand */
+      op = *(ip->op[++i]);
+      op.type = mnemo->operand_type[i-1] + 1;
+    }
+
+    ppcop = &powerpc_operands[op.type];
+
+    if (ppcop->flags & OPER_FAKE) {
+      if (insn != NULL) {
+        if (op.value != NULL)
+          cpu_error(16);  /* ignoring fake operand */
+        *insn = insertcode(*insn,0,ppcop);
       }
+      continue;
+    }
 
-      if ((reloctype = get_reloc_type(&op)) != REL_NONE) {
-        if (db != NULL) {
-          val = make_reloc(reloctype,&op,sec,pc,&db->relocs);
-        }
-        else {
-          if (!eval_expr(op.value,&val,sec,pc)) {
-            if (reloctype == REL_PC)
-              val -= pc;
-          }
-        }
+    if ((reloctype = get_reloc_type(&op)) != REL_NONE) {
+      if (db != NULL) {
+        val = make_reloc(reloctype,&op,sec,pc,&db->relocs);
       }
       else {
-        if (!eval_expr(op.value,&val,sec,pc))
-          if (insn != NULL)
-            cpu_error(2);  /* constant integer expression required */
+        if (!eval_expr(op.value,&val,sec,pc)) {
+          if (reloctype == REL_PC)
+            val -= pc;
+        }
       }
+    }
+    else {
+      if (!eval_expr(op.value,&val,sec,pc))
+        if (insn != NULL)
+          cpu_error(2);  /* constant integer expression required */
+    }
 
-      /* execute modifier on val */
-      if (op.mode) {
-        switch (op.mode) {
-          case OPM_LO:
-            val &= 0xffff;
-            break;
-          case OPM_HI:
-            val = (val>>16) & 0xffff;
-            break;
-          case OPM_HA:
-            val = ((val>>16) + ((val & 0x8000) ? 1 : 0) & 0xffff);
-            break;
-        }
-        if ((ppcop->flags & PPC_OPERAND_SIGNED) && (val & 0x8000))
-          val -= 0x10000;
+    /* execute modifier on val */
+    if (op.mode) {
+      switch (op.mode) {
+        case OPM_LO:
+          val &= 0xffff;
+          break;
+        case OPM_HI:
+          val = (val>>16) & 0xffff;
+          break;
+        case OPM_HA:
+          val = ((val>>16) + ((val & 0x8000) ? 1 : 0) & 0xffff);
+          break;
       }
+      if ((ppcop->flags & OPER_SIGNED) && (val & 0x8000))
+        val -= 0x10000;
+    }
+
+    /* do optimizations here: */
 
-      /* do optimizations here: */
-
-      if (opt_branch) {
-        if (reloctype==REL_PC &&
-            (op.type==BD || op.type==BDM || op.type==BDP)) {
-          if (val<-0x8000 || val>0x7fff) {
-            /* "B<cc>" branch destination out of range, convert into
-               a "B<!cc> ; B" combination */
-            if (insn != NULL) {
-              negate_bo_cond(insn);
-              *insn = insertcode(*insn,8,ppcop);  /* B<!cc> $+8 */
-              insn++;
-              *insn = B(18,0,0);  /* set B instruction opcode */
-              val -= 4;
-            }
-            ppcop = &powerpc_operands[LI];  /* set oper. for B instruction */
-            isize = 8;
+    if (opt_branch) {
+      if (reloctype==REL_PC &&
+          (op.type==BD || op.type==BDM || op.type==BDP)) {
+        if (val<-0x8000 || val>0x7fff) {
+          /* "B<cc>" branch destination out of range, convert into
+             a "B<!cc> ; B" combination */
+          if (insn != NULL) {
+            negate_bo_cond(insn);
+            *insn = insertcode(*insn,8,ppcop);  /* B<!cc> $+8 */
+            insn++;
+            *insn = B(18,0,0);  /* set B instruction opcode */
+            val -= 4;
           }
+          ppcop = &powerpc_operands[LI];  /* set oper. for B instruction */
+          isize = 8;
         }
       }
+    }
 
-      if (ppcop->flags & PPC_OPERAND_PARENS) {
-        if (op.basereg) {
-          /* a load/store instruction d(Rn) carries basereg in current op */
-          taddr reg;
-
-          if (db!=NULL && op.mode==OPM_NONE && op.attr==REL_NONE) {
-            if (eval_expr(op.basereg,&reg,sec,pc)) {
-              if (reg == sdreg)  /* is it a small data reference? */
-                fix_reloctype(db,REL_SD);
-              else if (reg == sd2reg)  /* EABI small data 2 */
-                fix_reloctype(db,REL_PPCEABI_SDA2);
-            }
+    if (ppcop->flags & OPER_PARENS) {
+      if (op.basereg) {
+        /* a load/store instruction d(Rn) carries basereg in current op */
+        taddr reg;
+
+        if (db!=NULL && op.mode==OPM_NONE && op.attr==REL_NONE) {
+          if (eval_expr(op.basereg,&reg,sec,pc)) {
+            if (reg == sdreg)  /* is it a small data reference? */
+              fix_reloctype(db,REL_SD);
+            else if (reg == sd2reg)  /* EABI small data 2 */
+              fix_reloctype(db,REL_PPCEABI_SDA2);
           }
-          if (insn != NULL) {
-            range_check(val,ppcop,db);
-            *insn = insertcode(*insn,val,ppcop);
-          }
-          op.attr = REL_NONE;
-          op.mode = OPM_NONE;
-          op.value = op.basereg;
-          continue;
         }
-        else
-          cpu_error(14);  /* missing base register */
-      }
-      else {
+
+        /* write displacement */
         if (insn != NULL) {
           range_check(val,ppcop,db);
           *insn = insertcode(*insn,val,ppcop);
         }
 
-        if (j<MAX_OPERANDS && mnemo->operand_type[j]!=UNUSED &&
-            (powerpc_operands[mnemo->operand_type[j]].flags & PPC_OPERAND_FAKE)) {
-          if (ip->op[i]!=NULL && insn!=NULL)
-            cpu_error(16);  /* ignoring fake operand */
-          /* next operand is a fake, just reuse last operand read */
-          op.attr = REL_NONE;
-          op.mode = OPM_NONE;
-          continue;
-        }
+        /* move to next operand type to handle base register */
+        op.type = mnemo->operand_type[++i];
+        ppcop = &powerpc_operands[op.type];
+        op.attr = REL_NONE;
+        op.mode = OPM_NONE;
+        op.value = op.basereg;
+        if (!eval_expr(op.value,&val,sec,pc))
+          if (insn != NULL)
+            cpu_error(2);  /* constant integer expression required */
       }
+      else if (insn != NULL)
+        cpu_error(14);  /* missing base register */
+    }
 
-      break;  /* next parsed operand */
+    /* write val (register, immediate, etc.) */
+    if (insn != NULL) {
+      range_check(val,ppcop,db);
+      *insn = insertcode(*insn,val,ppcop);
     }
   }
 
@@ -676,23 +695,25 @@ taddr eval_operands(instruction *ip,section *sec,taddr pc,
 }
 
 
-taddr instruction_size(instruction *ip,section *sec,taddr pc)
+size_t instruction_size(instruction *ip,section *sec,taddr pc)
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
 {
+  /* determine optimized size, when needed */
   if (opt_branch)
     return eval_operands(ip,sec,pc,NULL,NULL);
 
+  /* otherwise an instruction is always 4 bytes */
   return 4;
 }
 
 
 dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 /* Convert an instruction into a DATA atom including relocations,
-   if necessary. */
+   when necessary. */
 {
   dblock *db = new_dblock();
-  unsigned long insn[2];
+  uint32_t insn[2];
 
   if (db->size = eval_operands(ip,sec,pc,insn,db)) {
     unsigned char *d = db->data = mymalloc(db->size);
@@ -706,33 +727,53 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 }
 
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
 {
   dblock *db = new_dblock();
   taddr val;
+  tfloat flt;
 
   if ((bitsize & 7) || bitsize > 64)
     cpu_error(9,bitsize);  /* data size not supported */
-  if (op->type < OP_D8)
+  if (!OP_DATA(op->type))
     ierror(0);
 
   db->size = bitsize >> 3;
   db->data = mymalloc(db->size);
-  val = make_reloc(get_reloc_type(op),op,sec,pc,&db->relocs);
-
-  switch (db->size) {
-    case 1:
-      db->data[0] = val & 0xff;
-      break;
-    case 2:
-    case 4:
-    case 8:
-      setval(ppc_endianess,db->data,db->size,val);
-      break;
-    default:
-      ierror(0);
-      break;
+
+  if (type_of_expr(op->value) == FLT) {
+    if (!eval_expr_float(op->value,&flt))
+      general_error(60);  /* cannot evaluate floating point */
+
+    switch (bitsize) {
+      case 32:
+        conv2ieee32(1,db->data,flt);
+        break;
+      case 64:
+        conv2ieee64(1,db->data,flt);
+        break;
+      default:
+        cpu_error(10);  /* data has illegal type */
+        break;
+    }
+  }
+  else {
+    val = make_reloc(get_reloc_type(op),op,sec,pc,&db->relocs);
+
+    switch (db->size) {
+      case 1:
+        db->data[0] = val & 0xff;
+        break;
+      case 2:
+      case 4:
+      case 8:
+        setval(ppc_endianess,db->data,db->size,val);
+        break;
+      default:
+        ierror(0);
+        break;
+    }
   }
 
   return db;
@@ -755,29 +796,29 @@ static void define_regnames(void)
 
   for (i=0; i<32; i++) {
     sprintf(r,"r%d",i);
-    new_abs(r,number_expr(i));
+    set_internal_abs(r,(taddr)i);
     r[0] = 'f';
-    new_abs(r,number_expr(i));
+    set_internal_abs(r,(taddr)i);
     r[0] = 'v';
-    new_abs(r,number_expr(i));
+    set_internal_abs(r,(taddr)i);
   }
   for (i=0; i<8; i++) {
     sprintf(r,"cr%d",i);
-    new_abs(r,number_expr(i));
+    set_internal_abs(r,(taddr)i);
   }
-  new_abs("vrsave",number_expr(256));
-  new_abs("lt",number_expr(0));
-  new_abs("gt",number_expr(1));
-  new_abs("eq",number_expr(2));
-  new_abs("so",number_expr(3));
-  new_abs("un",number_expr(3));
-  new_abs("sp",number_expr(1));
-  new_abs("rtoc",number_expr(2));
-  new_abs("fp",number_expr(31));
-  new_abs("fpscr",number_expr(0));
-  new_abs("xer",number_expr(1));
-  new_abs("lr",number_expr(8));
-  new_abs("ctr",number_expr(9));
+  set_internal_abs("vrsave",256);
+  set_internal_abs("lt",0);
+  set_internal_abs("gt",1);
+  set_internal_abs("eq",2);
+  set_internal_abs("so",3);
+  set_internal_abs("un",3);
+  set_internal_abs("sp",1);
+  set_internal_abs("rtoc",2);
+  set_internal_abs("fp",31);
+  set_internal_abs("fpscr",0);
+  set_internal_abs("xer",1);
+  set_internal_abs("lr",8);
+  set_internal_abs("ctr",9);
 }
 
 
@@ -796,22 +837,24 @@ int cpu_args(char *p)
   if (!strncmp(p,"-m",2)) {
     p += 2;
     if (!strcmp(p,"pwrx") || !strcmp(p,"pwr2"))
-      cpu_type = PPC_OPCODE_POWER2;
+      cpu_type = CPU_TYPE_POWER | CPU_TYPE_POWER2 | CPU_TYPE_32;
     else if (!strcmp(p,"pwr"))
-      cpu_type = PPC_OPCODE_POWER;
+      cpu_type = CPU_TYPE_POWER | CPU_TYPE_32;
     else if (!strcmp(p,"601"))
-      cpu_type = PPC_OPCODE_601;
-    else if (!strcmp(p,"ppc") || !strcmp(p,"ppc32") ||
-             !strcmp(p,"403") || !strcmp(p,"603") || !strcmp(p,"604"))
-      cpu_type = PPC_OPCODE_PPC | PPC_OPCODE_32;
+      cpu_type = CPU_TYPE_601 | CPU_TYPE_PPC | CPU_TYPE_32;
+    else if (!strcmp(p,"ppc") || !strcmp(p,"ppc32") || !strncmp(p,"60",2) ||
+             !strncmp(p,"75",2) || !strncmp(p,"85",2))
+      cpu_type = CPU_TYPE_PPC | CPU_TYPE_32;
     else if (!strcmp(p,"ppc64") || !strcmp(p,"620"))
-      cpu_type = PPC_OPCODE_PPC | PPC_OPCODE_64;
+      cpu_type = CPU_TYPE_PPC | CPU_TYPE_64;
+    else if (!strncmp(p,"40",2))
+      cpu_type = CPU_TYPE_PPC | CPU_TYPE_32;  /* @@@ || CPU_TYPE_40x */
+    else if (!strncmp(p,"74",2) || !strcmp(p,"avec") || !strcmp(p,"altivec"))
+      cpu_type = CPU_TYPE_PPC | CPU_TYPE_32 | CPU_TYPE_ALTIVEC;
     else if (!strcmp(p,"com"))
-      cpu_type = PPC_OPCODE_COMMON;
+      cpu_type = CPU_TYPE_COMMON | CPU_TYPE_32;
     else if (!strcmp(p,"any"))
-      cpu_type = PPC_OPCODE_ANY;
-    else if (!strcmp(p,"avec"))  /* @@@ change this to 7500? 850? G4? */
-      cpu_type = PPC_OPCODE_ALTIVEC;
+      cpu_type |= CPU_TYPE_ANY;
     else
       return 0;
   }
diff --git a/cpus/ppc/cpu.h b/cpus/ppc/cpu.h
index 4a3f5aa..7bfc7ce 100644
--- a/cpus/ppc/cpu.h
+++ b/cpus/ppc/cpu.h
@@ -1,29 +1,23 @@
 /*
 ** cpu.h PowerPC cpu-description header-file
-** (c) in 2002,2006 by Frank Wille
+** (c) in 2002,2006,2011,2015 by Frank Wille
 */
 
 extern int ppc_endianess;
 #define BIGENDIAN (ppc_endianess)
 #define LITTLEENDIAN (!ppc_endianess)
 #define VASM_CPU_PPC 1
-
-int ppc_data_align(int);
-int ppc_data_operand(int);
+#define MNEMOHTABSIZE 0x18000
 
 /* maximum number of operands for one mnemonic */
 #define MAX_OPERANDS 5
 
-/* allowed to call parse_operand() with an arbitrary number of operands */
-#define CPU_CHECKS_OPCNT 1
-
 /* maximum number of mnemonic-qualifiers per mnemonic */
 #define MAX_QUALIFIERS 0
 
-/* maximum number of additional command-line-flags for this cpu */
-
 /* data type to represent a target-address */
-typedef long long taddr;
+typedef int64_t taddr;
+typedef uint64_t utaddr;
 
 /* minimum instruction alignment */
 #define INST_ALIGN 4
@@ -34,11 +28,22 @@ typedef long long taddr;
 /* operand class for n-bit data definitions */
 #define DATA_OPERAND(n) ppc_data_operand(n)
 
+/* returns true when instruction is valid for selected cpu */
+#define MNEMONIC_VALID(i) ppc_available(i)
+
+/* returns true when operand type is optional; may init default operand */
+#define OPERAND_OPTIONAL(p,t) ppc_operand_optional(p,t)
+
 /* special data operand types: */
 #define OP_D8  0x1001
 #define OP_D16 0x1002
 #define OP_D32 0x1003
 #define OP_D64 0x1004
+#define OP_F32 0x1005
+#define OP_F64 0x1006
+
+#define OP_DATA(t) (t >= OP_D8)
+#define OP_FLOAT(t) (t >= OP_F32)
 
 /* PPC specific relocations */
 #define REL_PPCEABI_SDA2 (LAST_STANDARD_RELOC+1)
@@ -52,7 +57,7 @@ typedef long long taddr;
 
 /* type to store each operand */
 typedef struct {
-  short type;
+  int16_t type;
   unsigned char attr;   /* reloc attribute != REL_NONE when present */
   unsigned char mode;   /* @l/h/ha */
   expr *value;
@@ -68,71 +73,95 @@ typedef struct {
 
 /* additional mnemonic data */
 typedef struct {
-  unsigned long available;
-  unsigned long opcode;
+  uint32_t available;
+  uint32_t opcode;
 } mnemonic_extension;
 
-
 /* Values defined for the 'available' field of mnemonic_extension.  */
-#define PPC_OPCODE_PPC          (1)
-#define PPC_OPCODE_POWER        (2)
-#define PPC_OPCODE_POWER2       (4)
-#define PPC_OPCODE_32           (8)
-#define PPC_OPCODE_64           (0x10)
-#define PPC_OPCODE_601          (0x20)
-#define PPC_OPCODE_COMMON       (0x40)
-#define PPC_OPCODE_ANY          (0x80)
-#define PPC_OPCODE_64_BRIDGE    (0x100)
-#define PPC_OPCODE_ALTIVEC      (0x200)
+#define CPU_TYPE_PPC          (1)
+#define CPU_TYPE_POWER        (2)
+#define CPU_TYPE_POWER2       (4)
+#define CPU_TYPE_601          (8)
+#define CPU_TYPE_COMMON       (0x10)
+#define CPU_TYPE_ALTIVEC      (0x20)
+#define CPU_TYPE_ANY          (0x10000000)
+#define CPU_TYPE_64_BRIDGE    (0x20000000)
+#define CPU_TYPE_32           (0x40000000)
+#define CPU_TYPE_64           (0x80000000)
 
 /* Shortcuts for known PPC models */
 #undef  PPC
-#define PPC     PPC_OPCODE_PPC | PPC_OPCODE_ANY
-#define PPCCOM  PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_ANY
-#define PPC32   PPC_OPCODE_PPC | PPC_OPCODE_32 | PPC_OPCODE_ANY
-#define PPC64   PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_ANY
-#define PPCONLY PPC_OPCODE_PPC
+#define PPC     (CPU_TYPE_PPC | CPU_TYPE_ANY)
+#define PPCCOM  (CPU_TYPE_PPC | CPU_TYPE_COMMON | CPU_TYPE_ANY)
+#define PPC32   (CPU_TYPE_PPC | CPU_TYPE_32 | CPU_TYPE_ANY)
+#define PPC64   (CPU_TYPE_PPC | CPU_TYPE_64 | CPU_TYPE_ANY)
+#define PPCONLY CPU_TYPE_PPC
 #define PPC403  PPC
 #define PPC405  PPC403
 #define PPC750  PPC
 #define PPC860  PPC
-#define PPCVEC  PPC_OPCODE_ALTIVEC | PPC_OPCODE_ANY
-#define POWER   PPC_OPCODE_POWER | PPC_OPCODE_ANY
-#define POWER2  PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY
-#define PPCPWR2 PPC_OPCODE_PPC | PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY
-#define POWER32 PPC_OPCODE_POWER | PPC_OPCODE_ANY | PPC_OPCODE_32
-#define COM     PPC_OPCODE_POWER | PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_ANY
-#define COM32   PPC_OPCODE_POWER | PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_ANY | PPC_OPCODE_32
-#define M601    PPC_OPCODE_POWER | PPC_OPCODE_601 | PPC_OPCODE_ANY
-#define PWRCOM  PPC_OPCODE_POWER | PPC_OPCODE_601 | PPC_OPCODE_COMMON | PPC_OPCODE_ANY
-#define MFDEC1  PPC_OPCODE_POWER
-#define MFDEC2  PPC_OPCODE_PPC | PPC_OPCODE_601
-
-
-struct powerpc_operand
-{
-  int bits;
-  int shift;
-  unsigned long (*insert)(unsigned long instruction, long op,
-                          const char **errmsg);
-  unsigned long flags;
-};
-
-/* powerpc_operand flags */
-#define PPC_OPERAND_SIGNED   (1)        /* signed values */
-#define PPC_OPERAND_SIGNOPT  (2)        /* signed values up to 0xffff */
-#define PPC_OPERAND_FAKE     (4)        /* just reuse last read operand */
-#define PPC_OPERAND_PARENS   (8)        /* operand is in parentheses */
-#define PPC_OPERAND_CR       (0x10)     /* CR field */
-#define PPC_OPERAND_GPR      (0x20)     /* GPR field */
-#define PPC_OPERAND_FPR      (0x40)     /* FPR field */
-#define PPC_OPERAND_RELATIVE (0x80)     /* relative branch displacement */
-#define PPC_OPERAND_ABSOLUTE (0x100)    /* absolute branch address */
-#define PPC_OPERAND_OPTIONAL (0x200)    /* optional, zero if omitted */
-#define PPC_OPERAND_NEXT     (0x400)    /* hack for rotate instructions */
-#define PPC_OPERAND_NEGATIVE (0x800)    /* range check on negative value */
-#define PPC_OPERAND_VR       (0x1000)   /* Altivec register field */
-
+#define PPCVEC  (CPU_TYPE_ALTIVEC | CPU_TYPE_ANY)
+#define POWER   (CPU_TYPE_POWER | CPU_TYPE_ANY)
+#define POWER2  (CPU_TYPE_POWER | CPU_TYPE_POWER2 | CPU_TYPE_ANY)
+#define PPCPWR2 (CPU_TYPE_PPC | CPU_TYPE_POWER | CPU_TYPE_POWER2 | CPU_TYPE_ANY)
+#define POWER32 (CPU_TYPE_POWER | CPU_TYPE_ANY | CPU_TYPE_32)
+#define COM     (CPU_TYPE_POWER | CPU_TYPE_PPC | CPU_TYPE_COMMON | CPU_TYPE_ANY)
+#define COM32   (CPU_TYPE_POWER | CPU_TYPE_PPC | CPU_TYPE_COMMON | CPU_TYPE_ANY | CPU_TYPE_32)
+#define M601    (CPU_TYPE_POWER | CPU_TYPE_601 | CPU_TYPE_ANY)
+#define PWRCOM  (CPU_TYPE_POWER | CPU_TYPE_601 | CPU_TYPE_COMMON | CPU_TYPE_ANY)
+#define MFDEC1  CPU_TYPE_POWER
+#define MFDEC2  (CPU_TYPE_PPC | CPU_TYPE_601)
+
+
+/* Macros used to form opcodes */
+#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26)
+#define OPTO(x,to) (OP (x) | ((((uint32_t)(to)) & 0x1f) << 21))
+#define OPL(x,l) (OP (x) | ((((uint32_t)(l)) & 1) << 21))
+#define A(op, xop, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0x1f) << 1) | (((uint32_t)(rc)) & 1))
+#define B(op, aa, lk) (OP (op) | ((((uint32_t)(aa)) & 1) << 1) | ((lk) & 1))
+#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | ((((uint32_t)(bo)) & 0x1f) << 21))
+#define BBOCB(op, bo, cb, aa, lk) \
+  (BBO ((op), (bo), (aa), (lk)) | ((((uint32_t)(cb)) & 0x3) << 16))
+#define DSO(op, xop) (OP (op) | ((xop) & 0x3))
+#define M(op, rc) (OP (op) | ((rc) & 1))
+#define MME(op, me, rc) (M ((op), (rc)) | ((((uint32_t)(me)) & 0x1f) << 1))
+#define MD(op, xop, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0x7) << 2) | ((rc) & 1))
+#define MDS(op, xop, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0xf) << 1) | ((rc) & 1))
+#define SC(op, sa, lk) (OP (op) | ((((uint32_t)(sa)) & 1) << 1) | ((lk) & 1))
+#define VX(op, xop) (OP (op) | (((uint32_t)(xop)) & 0x7ff))
+#define VXA(op, xop) (OP (op) | (((uint32_t)(xop)) & 0x07f))
+#define VXR(op, xop, rc) \
+  (OP (op) | (((rc) & 1) << 10) | (((uint32_t)(xop)) & 0x3ff))
+#define X(op, xop) (OP (op) | ((((uint32_t)(xop)) & 0x3ff) << 1))
+#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))
+#define XCMPL(op, xop, l) (X ((op), (xop)) | ((((uint32_t)(l)) & 1) << 21))
+#define XTO(op, xop, to) (X ((op), (xop)) | ((((uint32_t)(to)) & 0x1f) << 21))
+#define XTLB(op, xop, sh) (X ((op), (xop)) | ((((uint32_t)(sh)) & 0x1f) << 11))
+#define XFL(op, xop, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0x3ff) << 1) | (((uint32_t)(rc)) & 1))
+#define XL(op, xop) (OP (op) | ((((uint32_t)(xop)) & 0x3ff) << 1))
+#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1))
+#define XLO(op, bo, xop, lk) \
+  (XLLK ((op), (xop), (lk)) | ((((uint32_t)(bo)) & 0x1f) << 21))
+#define XLYLK(op, xop, y, lk) \
+  (XLLK ((op), (xop), (lk)) | ((((uint32_t)(y)) & 1) << 21))
+#define XLOCB(op, bo, cb, xop, lk) \
+  (XLO ((op), (bo), (xop), (lk)) | ((((uint32_t)(cb)) & 3) << 16))
+#define XO(op, xop, oe, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0x1ff) << 1) | \
+   ((((uint32_t)(oe)) & 1) << 10) | (((uint32_t)(rc)) & 1))
+#define XS(op, xop, rc) \
+  (OP (op) | ((((uint32_t)(xop)) & 0x1ff) << 2) | (((uint32_t)(rc)) & 1))
+#define XFXM(op, xop, fxm) \
+  (X ((op), (xop)) | ((((uint32_t)(fxm)) & 0xff) << 12))
+#define XSPR(op, xop, spr) \
+  (X ((op), (xop)) | ((((uint32_t)(spr)) & 0x1f) << 16) | \
+   ((((uint32_t)(spr)) & 0x3e0) << 6))
+#define XDS(op, xop, at) \
+  (X ((op), (xop)) | ((((uint32_t)(at)) & 1) << 25))
 
 /* The BO encodings used in extended conditional branch mnemonics.  */
 #define BODNZF  (0x0)
@@ -176,3 +205,10 @@ struct powerpc_operand
 #define TONG    (0x14)
 #define TONE    (0x18)
 #define TOU     (0x1f)
+
+
+/* Prototypes */
+int ppc_data_align(int);
+int ppc_data_operand(int);
+int ppc_available(int);
+int ppc_operand_optional(operand *,int);
diff --git a/cpus/ppc/cpu_errors.h b/cpus/ppc/cpu_errors.h
index f100c46..c96052e 100644
--- a/cpus/ppc/cpu_errors.h
+++ b/cpus/ppc/cpu_errors.h
@@ -8,7 +8,7 @@
   "multiple relocation attributes",ERROR,
   "multiple hi/lo modifiers",ERROR,
   "data size %d not supported",ERROR,
-  "illegal relocation",ERROR,                                        /* 10 */
+  "data has illegal type",ERROR,                                     /* 10 */
   "relocation attribute not supported by operand",ERROR,
   "operand out of range: %ld (allowed: %ld to %ld)",ERROR,
   "not a valid register (0-31)",ERROR,
diff --git a/cpus/ppc/opcodes.h b/cpus/ppc/opcodes.h
index 93a734c..ed5f1f3 100644
--- a/cpus/ppc/opcodes.h
+++ b/cpus/ppc/opcodes.h
@@ -1349,12 +1349,12 @@
   "mfrtcu",       { RT }                ,{COM,    XSPR(31,339,4)},
   "mfrtcl",       { RT }                ,{COM,    XSPR(31,339,5)},
   "mfdec",        { RT }                ,{MFDEC1, XSPR(31,339,6)},
+  "mfdec",        { RT }                ,{MFDEC2, XSPR(31,339,22)},
   "mflr",         { RT }                ,{COM,    XSPR(31,339,8)},
   "mfctr",        { RT }                ,{COM,    XSPR(31,339,9)},
   "mftid",        { RT }                ,{POWER,  XSPR(31,339,17)},
   "mfdsisr",      { RT }                ,{COM,    XSPR(31,339,18)},
   "mfdar",        { RT }                ,{COM,    XSPR(31,339,19)},
-  "mfdec",        { RT }                ,{MFDEC2, XSPR(31,339,22)},
   "mfsdr0",       { RT }                ,{POWER,  XSPR(31,339,24)},
   "mfsdr1",       { RT }                ,{COM,    XSPR(31,339,25)},
   "mfsrr0",       { RT }                ,{COM,    XSPR(31,339,26)},
diff --git a/cpus/ppc/operands.h b/cpus/ppc/operands.h
index 39cc77a..147fd47 100644
--- a/cpus/ppc/operands.h
+++ b/cpus/ppc/operands.h
@@ -1,49 +1,77 @@
-/* The functions used to insert complicated operands.  */
+/* Operand description structure */
+struct powerpc_operand
+{
+  int bits;
+  int shift;
+  uint32_t (*insert)(uint32_t,int32_t,const char **);
+  uint32_t flags;
+};
+
+/* powerpc_operand flags */
+#define OPER_SIGNED   (1)        /* signed values */
+#define OPER_SIGNOPT  (2)        /* signed values up to 0xffff */
+#define OPER_FAKE     (4)        /* just reuse last read operand */
+#define OPER_PARENS   (8)        /* operand is in parentheses */
+#define OPER_CR       (0x10)     /* CR field */
+#define OPER_GPR      (0x20)     /* GPR field */
+#define OPER_FPR      (0x40)     /* FPR field */
+#define OPER_RELATIVE (0x80)     /* relative branch displacement */
+#define OPER_ABSOLUTE (0x100)    /* absolute branch address */
+#define OPER_OPTIONAL (0x200)    /* optional, zero if omitted */
+#define OPER_NEXT     (0x400)    /* hack for rotate instructions */
+#define OPER_NEGATIVE (0x800)    /* range check on negative value */
+#define OPER_VR       (0x1000)   /* Altivec register field */
+
+/* Operand types. */
+enum {
+  UNUSED,BA,BAT,BB,BBA,BD,BDA,BDM,BDMA,BDP,BDPA,BF,OBF,BFA,BI,BO,BOE,
+  BT,CR,D,DS,E,FL1,FL2,FLM,FRA,FRB,FRC,FRS,FXM,L,LEV,LI,LIA,MB,ME,
+  MBE,MBE_,MB6,NB,NSI,RA,RAL,RAM,RAS,RB,RBS,RS,SH,SH6,SI,SISIGNOPT,
+  SPR,SPRBAT,SPRG,SR,SV,TBR,TO,U,UI,VA,VB,VC,VD,SIMM,UIMM,SHB,
+  SLWI,SRWI,EXTLWI,EXTRWI,EXTWIB,INSLWI,INSRWI,ROTRWI,CLRRWI,CLRLSL,
+  STRM,AT
+};
+
+#define FRT FRS
+#define ME6 MB6
+#define RT RS
+#define VS VD
+#define NEXT (-1)  /* use operand_type+1 for next operand */
+
+
+/* The functions used to insert complex operands. */
 
-static unsigned long insert_bat(unsigned long insn,long value,
-                                const char **errmsg)
+static uint32_t insert_bat(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((insn >> 21) & 0x1f) << 16);
 }
 
-static unsigned long insert_bba(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_bba(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((insn >> 16) & 0x1f) << 11);
 }
 
-static unsigned long insert_bd(unsigned long insn,long value,
-                                const char **errmsg)
+static uint32_t insert_bd(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (value & 0xfffc);
 }
 
-static unsigned long insert_bdm(unsigned long insn,long value,
-                                const char **errmsg)
+static uint32_t insert_bdm(uint32_t insn,int32_t value,const char **errmsg)
 {
   if ((value & 0x8000) != 0)
     insn |= 1 << 21;
   return insn | (value & 0xfffc);
 }
 
-static unsigned long insert_bdp(unsigned long insn,long value,
-                                const char **errmsg)
+static uint32_t insert_bdp(uint32_t insn,int32_t value,const char **errmsg)
 {
   if ((value & 0x8000) == 0)
     insn |= 1 << 21;
   return insn | (value & 0xfffc);
 }
 
-static int valid_bo(long value)
+static int valid_bo(int32_t value)
 {
-  /* Certain encodings have bits that are required to be zero.  These
-     are (z must be zero, y may be anything):
-         001zy
-         011zy
-         1z00y
-         1z01y
-         1z1zz
-     */
   switch (value & 0x14) {
     default:
     case 0:
@@ -57,42 +85,37 @@ static int valid_bo(long value)
   }
 }
 
-static unsigned long insert_bo(unsigned long insn,long value,
-                               const char **errmsg)
+static uint32_t insert_bo(uint32_t insn,int32_t value,const char **errmsg)
 {
-  if (! valid_bo (value))
+  if (!valid_bo (value))
     *errmsg = "invalid conditional option";
   return insn | ((value & 0x1f) << 21);
 }
 
-static unsigned long insert_boe(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_boe(uint32_t insn,int32_t value,const char **errmsg)
 {
-  if (! valid_bo (value))
+  if (!valid_bo (value))
     *errmsg = "invalid conditional option";
   else if ((value & 1) != 0)
     *errmsg = "attempt to set y bit when using + or - modifier";
   return insn | ((value & 0x1f) << 21);
 }
 
-static unsigned long insert_ds(unsigned long insn, long value,
-                               const char **errmsg)
+static uint32_t insert_ds(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (value & 0xfffc);
 }
 
-static unsigned long insert_li(unsigned long insn, long value,
-                               const char **errmsg)
+static uint32_t insert_li(uint32_t insn,int32_t value,const char **errmsg)
 {
   if ((value & 3) != 0)
     *errmsg = "ignoring least significant bits in branch offset";
   return insn | (value & 0x3fffffc);
 }
 
-static unsigned long insert_mbe(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_mbe(uint32_t insn,int32_t value,const char **errmsg)
 {
-  unsigned long uval, mask;
+  uint32_t uval, mask;
   int mb, me, mx, count, last;
 
   uval = value;
@@ -110,11 +133,7 @@ static unsigned long insert_mbe(unsigned long insn, long value,
     last = 0;
   count = 0;
 
-  /* mb: location of last 0->1 transition */
-  /* me: location of last 1->0 transition */
-  /* count: # transitions */
-
-  for (mx = 0, mask = (long) 1 << 31; mx < 32; ++mx, mask >>= 1) {
+  for (mx = 0, mask = (int32_t) 1 << 31; mx < 32; ++mx, mask >>= 1) {
     if ((uval & mask) && !last) {
       ++count;
       mb = mx;
@@ -136,14 +155,12 @@ static unsigned long insert_mbe(unsigned long insn, long value,
   return insn | (mb << 6) | ((me - 1) << 1);
 }
 
-static unsigned long insert_mb6(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_mb6(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | ((value & 0x1f) << 6) | (value & 0x20);
 }
 
-static unsigned long insert_nb(unsigned long insn, long value,
-                               const char **errmsg)
+static uint32_t insert_nb(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value < 0 || value > 32)
     *errmsg = "value out of range";
@@ -152,93 +169,80 @@ static unsigned long insert_nb(unsigned long insn, long value,
   return insn | ((value & 0x1f) << 11);
 }
 
-static unsigned long insert_nsi(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_nsi(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | ((- value) & 0xffff);
 }
 
-static unsigned long insert_ral(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_ral(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value == 0
-      || (unsigned long) value == ((insn >> 21) & 0x1f))
+      || (uint32_t) value == ((insn >> 21) & 0x1f))
     *errmsg = "invalid register operand when updating";
   return insn | ((value & 0x1f) << 16);
 }
 
-static unsigned long insert_ram(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_ram(uint32_t insn,int32_t value,const char **errmsg)
 {
-  if ((unsigned long) value >= ((insn >> 21) & 0x1f))
+  if ((uint32_t) value >= ((insn >> 21) & 0x1f))
     *errmsg = "index register in load range";
   return insn | ((value & 0x1f) << 16);
 }
 
-static unsigned long insert_ras(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_ras(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value == 0)
     *errmsg = "invalid register operand when updating";
   return insn | ((value & 0x1f) << 16);
 }
 
-static unsigned long insert_rbs(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_rbs(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((insn >> 21) & 0x1f) << 11);
 }
 
-static unsigned long insert_sh6(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_sh6(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
 }
 
-static unsigned long insert_spr(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_spr(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
 }
 
-static unsigned long insert_tbr(unsigned long insn, long value,
-                                const char **errmsg)
+static uint32_t insert_tbr(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value == 0)
     value = 268;
   return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
 }
 
-static unsigned long insert_slwi(unsigned long insn, long value,
-                                 const char **errmsg)
+static uint32_t insert_slwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | ((value&0x1f)<<11) | ((31-(value&0x1f))<<1);
 }
 
-static unsigned long insert_srwi(unsigned long insn, long value,
-                                 const char **errmsg)
+static uint32_t insert_srwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((32-value)&0x1f)<<11) | ((value&0x1f)<<6) | (31<<1);
 }
 
-static unsigned long insert_extlwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_extlwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value<1 || value>32)
     *errmsg = "value out of range (1-32)";
   return insn | (((value-1)&0x1f)<<1);
 }
 
-static unsigned long insert_extrwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_extrwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   if (value<1 || value>32)
     *errmsg = "value out of range (1-32)";
   return insn | ((value&0x1f)<<11) | (((32-value)&0x1f)<<6) | (31<<1);
 }
 
-static unsigned long insert_extwib(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_extwib(uint32_t insn,int32_t value,const char **errmsg)
 {
   value += (insn>>11) & 0x1f;
   if (value > 32)
@@ -246,42 +250,37 @@ static unsigned long insert_extwib(unsigned long insn, long value,
   return (insn&~0xf800) | ((value&0x1f)<<11);
 }
 
-static unsigned long insert_inslwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_inslwi(uint32_t insn,int32_t value,const char **errmsg)
 {
-  long n = ((insn>>1) & 0x1f) + 1;
+  int32_t n = ((insn>>1) & 0x1f) + 1;
   if (value+n > 32)
     *errmsg = "sum of last two operands out of range (1-32)";
   return (insn&~0xfffe) | (((32-value)&0x1f)<<11) | ((value&0x1f)<<6)
                         | ((((value+n)-1)&0x1f)<<1);
 }
 
-static unsigned long insert_insrwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_insrwi(uint32_t insn,int32_t value,const char **errmsg)
 {
-  long n = ((insn>>1) & 0x1f) + 1;
+  int32_t n = ((insn>>1) & 0x1f) + 1;
   if (value+n > 32)
     *errmsg = "sum of last two operands out of range (1-32)";
   return (insn&~0xfffe) | (((32-(value+n))&0x1f)<<11) | ((value&0x1f)<<6)
                         | ((((value+n)-1)&0x1f)<<1);
 }
 
-static unsigned long insert_rotrwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_rotrwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((32-value)&0x1f)<<11);
 }
 
-static unsigned long insert_clrrwi(unsigned long insn, long value,
-                                   const char **errmsg)
+static uint32_t insert_clrrwi(uint32_t insn,int32_t value,const char **errmsg)
 {
   return insn | (((31-value)&0x1f)<<1);
 }
 
-static unsigned long insert_clrlslwi(unsigned long insn, long value,
-                                     const char **errmsg)
+static uint32_t insert_clrlslwi(uint32_t insn,int32_t value,const char **errmsg)
 {
-  long b = (insn>>6) & 0x1f;
+  int32_t b = (insn>>6) & 0x1f;
   if (value > b)
     *errmsg = "n (4th oper) must be less or equal to b (3rd oper)";
   return (insn&~0x7c0) | ((value&0x1f)<<11) | (((b-value)&0x1f)<<6)
@@ -290,349 +289,246 @@ static unsigned long insert_clrlslwi(unsigned long insn, long value,
 
 
 /* The operands table.
-   The fields are bits, shift, insert, flags. */
-
-enum {
-  UNUSED,BA,BAT,BB,BBA,BD,BDA,BDM,BDMA,BDP,BDPA,BF,OBF,BFA,BI,BO,BOE,
-  BT,CR,D,DS,E,FL1,FL2,FLM,FRA,FRB,FRC,FRS,FXM,L,LEV,LI,LIA,MB,ME,
-  MBE,MBE_,MB6,NB,NSI,RA,RAL,RAM,RAS,RB,RBS,RS,SH,SH6,SI,SISIGNOPT,
-  SPR,SPRBAT,SPRG,SR,SV,TBR,TO,U,UI,VA,VB,VC,VD,SIMM,UIMM,SHB,
-  SLWI,SRWI,EXTLWI,EXTRWI,EXTWIB,INSLWI,INSRWI,ROTRWI,CLRRWI,CLRLSL,
-  STRM,AT
-};
-
-#define FRT FRS
-#define ME6 MB6
-#define RT RS
-#define VS VD
-
+   The fields are: bits, shift, insert, flags. */
 
 const struct powerpc_operand powerpc_operands[] =
 {
-  /* UNUSED: The zero index is used to indicate the end of the list of
-     operands.  */
+  /* UNUSED */
   { 0, 0, 0, 0 },
 
-  /* The BA field in an XL form instruction.  */
-  { 5, 16, 0, PPC_OPERAND_CR },
+  /* BA */
+  { 5, 16, 0, OPER_CR },
 
-  /* BAT: The BA field in an XL form instruction when it must be the same
-     as the BT field in the same instruction.  */
-  { 5, 16, insert_bat, PPC_OPERAND_FAKE },
+  /* BAT */
+  { 5, 16, insert_bat, OPER_FAKE },
 
-  /* The BB field in an XL form instruction.  */
-  { 5, 11, 0, PPC_OPERAND_CR },
+  /* BB */
+  { 5, 11, 0, OPER_CR },
 
-  /* BBA: The BB field in an XL form instruction when it must be the same
-     as the BA field in the same instruction.  */
-  { 5, 11, insert_bba, PPC_OPERAND_FAKE },
+  /* BBA */
+  { 5, 11, insert_bba, OPER_FAKE },
 
-  /* The BD field in a B form instruction.  The lower two bits are
-     forced to zero.  */
-  { 16, 0, insert_bd, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+  /* BD */
+  { 16, 0, insert_bd, OPER_RELATIVE | OPER_SIGNED },
 
-  /* BDA: The BD field in a B form instruction when absolute addressing is
-     used.  */
-  { 16, 0, insert_bd, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
+  /* BDA */
+  { 16, 0, insert_bd, OPER_ABSOLUTE | OPER_SIGNED },
 
-  /* BDM: The BD field in a B form instruction when the - modifier is used.
-     This sets the y bit of the BO field appropriately.  */
-  { 16, 0, insert_bdm,
-      PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+  /* BDM */
+  { 16, 0, insert_bdm, OPER_RELATIVE | OPER_SIGNED },
 
-  /* BDMA: The BD field in a B form instruction when the - modifier is used
-     and absolute address is used.  */
-  { 16, 0, insert_bdm,
-      PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
+  /* BDMA */
+  { 16, 0, insert_bdm, OPER_ABSOLUTE | OPER_SIGNED },
 
-  /* BDP: The BD field in a B form instruction when the + modifier is used.
-     This sets the y bit of the BO field appropriately.  */
-  { 16, 0, insert_bdp,
-      PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+  /* BDP */
+  { 16, 0, insert_bdp, OPER_RELATIVE | OPER_SIGNED },
 
-  /* BDPA: The BD field in a B form instruction when the + modifier is used
-     and absolute addressing is used.  */
-  { 16, 0, insert_bdp,
-      PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
+  /* BDPA */
+  { 16, 0, insert_bdp, OPER_ABSOLUTE | OPER_SIGNED },
 
-  /* The BF field in an X or XL form instruction.  */
-  { 3, 23, 0, PPC_OPERAND_CR },
+  /* BF */
+  { 3, 23, 0, OPER_CR },
 
-  /* OBF: An optional BF field.  This is used for comparison instructions,
-     in which an omitted BF field is taken as zero.  */
-  { 3, 23, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
+  /* OBF */
+  { 3, 23, 0, OPER_CR | OPER_OPTIONAL },
 
-  /* The BFA field in an X or XL form instruction.  */
-  { 3, 18, 0, PPC_OPERAND_CR },
+  /* BFA */
+  { 3, 18, 0, OPER_CR },
 
-  /* The BI field in a B form or XL form instruction.  */
-  { 5, 16, 0, PPC_OPERAND_CR },
+  /* BI */
+  { 5, 16, 0, OPER_CR },
 
-  /* The BO field in a B form instruction.  Certain values are
-     illegal.  */
+  /* BO */
   { 5, 21, insert_bo, 0 },
 
-  /* BOE: The BO field in a B form instruction when the + or - modifier is
-     used.  This is like the BO field, but it must be even.  */
+  /* BOE */
   { 5, 21, insert_boe, 0 },
 
-  /* The BT field in an X or XL form instruction.  */
-  { 5, 21, 0, PPC_OPERAND_CR },
+  /* BT */
+  { 5, 21, 0, OPER_CR },
 
-  /* CR: The condition register number portion of the BI field in a B form
-     or XL form instruction.  This is used for the extended
-     conditional branch mnemonics, which set the lower two bits of the
-     BI field.  This field is optional.  */
-  { 3, 18, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
+  /* CR */
+  { 3, 18, 0, OPER_CR | OPER_OPTIONAL },
 
-  /* The D field in a D form instruction.  This is a displacement off
-     a register, and implies that the next operand is a register in
-     parentheses.  */
-  { 16, 0, 0, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+  /* D */
+  { 16, 0, 0, OPER_PARENS | OPER_SIGNED },
 
-  /* The DS field in a DS form instruction.  This is like D, but the
-     lower two bits are forced to zero.  */
-  { 16, 0, insert_ds, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+  /* DS */
+  { 16, 0, insert_ds, OPER_PARENS | OPER_SIGNED },
 
-  /* The E field in a wrteei instruction.  */
+  /* E */
   { 1, 15, 0, 0 },
 
-  /* The FL1 field in a POWER SC form instruction.  */
+  /* FL1 */
   { 4, 12, 0, 0 },
 
-  /* The FL2 field in a POWER SC form instruction.  */
+  /* FL2 */
   { 3, 2, 0, 0 },
 
-  /* The FLM field in an XFL form instruction.  */
+  /* FLM */
   { 8, 17, 0, 0 },
 
-  /* The FRA field in an X or A form instruction.  */
-  { 5, 16, 0, PPC_OPERAND_FPR },
+  /* FRA */
+  { 5, 16, 0, OPER_FPR },
 
-  /* The FRB field in an X or A form instruction.  */
-  { 5, 11, 0, PPC_OPERAND_FPR },
+  /* FRB */
+  { 5, 11, 0, OPER_FPR },
 
-  /* The FRC field in an A form instruction.  */
-  { 5, 6, 0, PPC_OPERAND_FPR },
+  /* FRC */
+  { 5, 6, 0, OPER_FPR },
 
-  /* The FRS field in an X form instruction or the FRT field in a D, X
-     or A form instruction.  */
-  { 5, 21, 0, PPC_OPERAND_FPR },
+  /* FRS */
+  { 5, 21, 0, OPER_FPR },
 
-  /* The FXM field in an XFX instruction.  */
+  /* FXM */
   { 8, 12, 0, 0 },
 
-  /* The L field in a D or X form instruction.  */
-  { 1, 21, 0, PPC_OPERAND_OPTIONAL },
+  /* L */
+  { 1, 21, 0, OPER_OPTIONAL },
 
-  /* The LEV field in a POWER SC form instruction.  */
+  /* LEV */
   { 7, 5, 0, 0 },
 
-  /* The LI field in an I form instruction.  The lower two bits are
-     forced to zero.  */
-  { 26, 0, insert_li, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
+  /* LI */
+  { 26, 0, insert_li, OPER_RELATIVE | OPER_SIGNED },
 
-  /* The LI field in an I form instruction when used as an absolute
-     address.  */
-  { 26, 0, insert_li, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
+  /* LIA */
+  { 26, 0, insert_li, OPER_ABSOLUTE | OPER_SIGNED },
 
-  /* The MB field in an M form instruction.  */
+  /* MB */
   { 5, 6, 0, 0 },
 
-  /* The ME field in an M form instruction.  */
+  /* ME */
   { 5, 1, 0, 0 },
 
-  /* MBE: The MB and ME fields in an M form instruction expressed a single
-     operand which is a bitmask indicating which bits to select.  This
-     is a two operand form using PPC_OPERAND_NEXT.  See the
-     description in opcode/ppc.h for what this means.  */
-  { 5, 6, 0, PPC_OPERAND_OPTIONAL | PPC_OPERAND_NEXT },
+  /* MBE */
+  { 5, 6, 0, OPER_OPTIONAL | OPER_NEXT },
+  /* MBE_ (NEXT) */
   { 31, 1, insert_mbe, 0 },
 
-  /* MB6: The MB or ME field in an MD or MDS form instruction.  The high
-     bit is wrapped to the low end.  */
+  /* MB6 */
   { 6, 5, insert_mb6, 0 },
 
-  /* The NB field in an X form instruction.  The value 32 is stored as
-     0.  */
+  /* NB */
   { 6, 11, insert_nb, 0 },
 
-  /* The NSI field in a D form instruction.  This is the same as the
-     SI field, only negated.  */
-  { 16, 0, insert_nsi,
-      PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED },
+  /* NSI */
+  { 16, 0, insert_nsi, OPER_NEGATIVE | OPER_SIGNED },
 
-  /* The RA field in an D, DS, X, XO, M, or MDS form instruction.  */
-  { 5, 16, 0, PPC_OPERAND_GPR },
+  /* RA */
+  { 5, 16, 0, OPER_GPR },
 
-  /* RAL: The RA field in a D or X form instruction which is an updating
-     load, which means that the RA field may not be zero and may not
-     equal the RT field.  */
-  { 5, 16, insert_ral, PPC_OPERAND_GPR },
+  /* RAL */
+  { 5, 16, insert_ral, OPER_GPR },
 
-  /* RAM: The RA field in an lmw instruction, which has special value
-     restrictions.  */
-  { 5, 16, insert_ram, PPC_OPERAND_GPR },
+  /* RAM */
+  { 5, 16, insert_ram, OPER_GPR },
 
-  /* RAS: The RA field in a D or X form instruction which is an updating
-     store or an updating floating point load, which means that the RA
-     field may not be zero.  */
-  { 5, 16, insert_ras, PPC_OPERAND_GPR },
+  /* RAS */
+  { 5, 16, insert_ras, OPER_GPR },
 
-  /* The RB field in an X, XO, M, or MDS form instruction.  */
-  { 5, 11, 0, PPC_OPERAND_GPR },
+  /* RB */
+  { 5, 11, 0, OPER_GPR },
 
-  /* RBS: The RB field in an X form instruction when it must be the same as
-     the RS field in the instruction.  This is used for extended
-     mnemonics like mr.  */
-  { 5, 1, insert_rbs, PPC_OPERAND_FAKE },
+  /* RBS */
+  { 5, 1, insert_rbs, OPER_FAKE },
 
-  /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
-     instruction or the RT field in a D, DS, X, XFX or XO form
-     instruction.  */
-  { 5, 21, 0, PPC_OPERAND_GPR },
+  /* RS */
+  { 5, 21, 0, OPER_GPR },
 
-  /* The SH field in an X or M form instruction.  */
+  /* SH */
   { 5, 11, 0, 0 },
 
-  /* SH6: The SH field in an MD form instruction.  This is split.  */
+  /* SH6 */
   { 6, 1, insert_sh6, 0 },
 
-  /* The SI field in a D form instruction.  */
-  { 16, 0, 0, PPC_OPERAND_SIGNED },
+  /* SI */
+  { 16, 0, 0, OPER_SIGNED },
 
-  /* SISIGNOPT: The SI field in a D form instruction when we accept a 
-     wide range of positive values.  */
-  { 16, 0, 0, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },
+  /* SISIGNOPT */
+  { 16, 0, 0, OPER_SIGNED | OPER_SIGNOPT },
 
-  /* The SPR field in an XFX form instruction.  This is flipped--the
-     lower 5 bits are stored in the upper 5 and vice- versa.  */
+  /* SPR */
   { 10, 11, insert_spr, 0 },
 
-  /* SPRBAT: The BAT index number in an XFX form m[ft]ibat[lu] instruction. */
+  /* SPRBAT */
   { 2, 17, 0, 0 },
 
-  /* The SPRG register number in an XFX form m[ft]sprg instruction.  */
+  /* SPRG */
   { 2, 16, 0, 0 },
 
-  /* The SR field in an X form instruction.  */
+  /* SR */
   { 4, 16, 0, 0 },
 
-  /* The SV field in a POWER SC form instruction.  */
+  /* SV */
   { 14, 2, 0, 0 },
 
-  /* The TBR field in an XFX form instruction.  This is like the SPR
-     field, but it is optional.  */
-  { 10, 11, insert_tbr, PPC_OPERAND_OPTIONAL },
+  /* TBR */
+  { 10, 11, insert_tbr, OPER_OPTIONAL },
 
-  /* The TO field in a D or X form instruction.  */
+  /* TO */
   { 5, 21, 0, 0 },
 
-  /* The U field in an X form instruction.  */
+  /* U */
   { 4, 12, 0, 0 },
 
-  /* The UI field in a D form instruction.  */
+  /* UI */
   { 16, 0, 0, 0 },
 
-  /* The VA field in a VA, VX or VXR form instruction. */
-  { 5, 16, 0, PPC_OPERAND_VR },
+  /* VA */
+  { 5, 16, 0, OPER_VR },
 
-  /* The VB field in a VA, VX or VXR form instruction. */
-  { 5, 11, 0, PPC_OPERAND_VR }, 
+  /* VB */
+  { 5, 11, 0, OPER_VR }, 
 
-  /* The VC field in a VA form instruction. */
-  { 5, 6, 0, PPC_OPERAND_VR },
+  /* VC */
+  { 5, 6, 0, OPER_VR },
 
-  /* The VD or VS field in a VA, VX, VXR or X form instruction. */
-  { 5, 21, 0, PPC_OPERAND_VR },
+  /* VD */
+  { 5, 21, 0, OPER_VR },
 
-  /* The SIMM field in a VX form instruction. */
-  { 5, 16, 0, PPC_OPERAND_SIGNED},
+  /* SIMM */
+  { 5, 16, 0, OPER_SIGNED},
 
-  /* The UIMM field in a VX form instruction. */
+  /* UIMM */
   { 5, 16, 0, 0 },
 
-  /* The SHB field in a VA form instruction. */
+  /* SHB */
   { 4, 6, 0, 0 },
 
-  /* SLWI: SH field in slwi. */
+  /* SLWI */
   { 5, 11, insert_slwi, 0 },
 
-  /* SRWI: SH field in srwi. */
+  /* SRWI */
   { 5, 11, insert_srwi, 0 },
 
-  /* EXTLWI: n field in extlwi. 32 bits faked to disable range checks. */
+  /* EXTLWI */
   { 31, 1, insert_extlwi, 0 },
 
-  /* EXTRWI: n field in extrwi. 32 bits faked to disable range checks. */
+  /* EXTRWI */
   { 31, 1, insert_extrwi, 0 },
 
-  /* EXTWIB: b field in extlwi/extrwi. Value is added to SH field. */
+  /* EXTWIB */
   { 5, 11, insert_extwib, 0 },
 
-  /* INSLWI: b field in inslwi. Value is filled into SH, MB and ME
-     using previous n-1 from ME */
+  /* INSLWI */
   { 5, 11, insert_inslwi, 0 },
 
-  /* INSRWI: b field in inslwi. Value is filled into SH, MB and ME
-     using previous n-1 from ME */
+  /* INSRWI */
   { 5, 11, insert_insrwi, 0 },
 
-  /* ROTRWI: SH field in rotrwi */
+  /* ROTRWI */
   { 5, 11, insert_rotrwi, 0 },
 
-  /* CLRRWI: last operand (n) in clrrwi */
+  /* CLRRWI */
   { 5, 1, insert_clrrwi, 0 },
 
-  /* CLRLSL: last operand (n) in clrlslwi */
+  /* CLRLSL */
   { 5, 11, insert_clrlslwi, 0 },
 
-  /* The STRM field in a dss/dst/dstst instruction.  */
+  /* STRM */
   { 2, 21, 0, 0 },
 
-  /* AT: The A/T field in a dss/dst/dstst instruction.  */
-  { 1, 25, 0, PPC_OPERAND_OPTIONAL },
+  /* AT */
+  { 1, 25, 0, OPER_OPTIONAL },
 };
-
-
-/* Macros used to form opcodes.  */
-
-#define OP(x) ((((unsigned long)(x)) & 0x3f) << 26)
-#define OPTO(x,to) (OP (x) | ((((unsigned long)(to)) & 0x1f) << 21))
-#define OPL(x,l) (OP (x) | ((((unsigned long)(l)) & 1) << 21))
-#define A(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1) | (((unsigned long)(rc)) & 1))
-#define B(op, aa, lk) (OP (op) | ((((unsigned long)(aa)) & 1) << 1) | ((lk) & 1))
-#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21))
-#define BBOCB(op, bo, cb, aa, lk) \
-  (BBO ((op), (bo), (aa), (lk)) | ((((unsigned long)(cb)) & 0x3) << 16))
-#define DSO(op, xop) (OP (op) | ((xop) & 0x3))
-#define M(op, rc) (OP (op) | ((rc) & 1))
-#define MME(op, me, rc) (M ((op), (rc)) | ((((unsigned long)(me)) & 0x1f) << 1))
-#define MD(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x7) << 2) | ((rc) & 1))
-#define MDS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0xf) << 1) | ((rc) & 1))
-#define SC(op, sa, lk) (OP (op) | ((((unsigned long)(sa)) & 1) << 1) | ((lk) & 1))
-#define VX(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x7ff))
-#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x07f))
-#define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff))
-#define X(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1))
-#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))
-#define XCMPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21))
-#define XTO(op, xop, to) (X ((op), (xop)) | ((((unsigned long)(to)) & 0x1f) << 21))
-#define XTLB(op, xop, sh) (X ((op), (xop)) | ((((unsigned long)(sh)) & 0x1f) << 11))
-#define XFL(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1))
-#define XL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1))
-#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1))
-#define XLO(op, bo, xop, lk) \
-  (XLLK ((op), (xop), (lk)) | ((((unsigned long)(bo)) & 0x1f) << 21))
-#define XLYLK(op, xop, y, lk) (XLLK ((op), (xop), (lk)) | ((((unsigned long)(y)) & 1) << 21))
-#define XLOCB(op, bo, cb, xop, lk) \
-  (XLO ((op), (bo), (xop), (lk)) | ((((unsigned long)(cb)) & 3) << 16))
-#define XO(op, xop, oe, rc) \
-  (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 1) | ((((unsigned long)(oe)) & 1) << 10) | (((unsigned long)(rc)) & 1))
-#define XS(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x1ff) << 2) | (((unsigned long)(rc)) & 1))
-#define XFXM(op, xop, fxm) \
-  (X ((op), (xop)) | ((((unsigned long)(fxm)) & 0xff) << 12))
-#define XSPR(op, xop, spr) \
-  (X ((op), (xop)) | ((((unsigned long)(spr)) & 0x1f) << 16) | ((((unsigned long)(spr)) & 0x3e0) << 6))
-#define XDS(op, xop, at) \
-  (X ((op), (xop)) | ((((unsigned long)(at)) & 1) << 25))
diff --git a/cpus/test/cpu.c b/cpus/test/cpu.c
index a70b4e2..427674f 100644
--- a/cpus/test/cpu.c
+++ b/cpus/test/cpu.c
@@ -139,7 +139,7 @@ static int opt_inst(instruction *p,section *sec,taddr pc)
   /* jmp->bra */
   if(p->code==6){
     expr *tree=p->op[0]->offset;
-    if(tree->type==SYM&&tree->c.sym->sec==sec&&tree->c.sym->type==LABSYM&&
+    if(tree->type==SYM&&tree->c.sym->sec==sec&&LOCREF(tree->c.sym)&&
        tree->c.sym->pc-pc>=-128&&tree->c.sym->pc-pc<=127)
       return 7;
   }
@@ -167,19 +167,11 @@ static char *fill_operand(operand *p,section *sec,taddr pc,char *d,rlist **reloc
     return d;
   /* FIXME: Test for valid operand, create reloc */
   if(!eval_expr(p->offset,&val,sec,pc)){
-    nreloc *reloc=new_nreloc();
-    rlist *rl=mymalloc(sizeof(*rl));
-    rl->type=REL_ABS;
-    reloc->offset=roffset*8;
-    reloc->size=16;
-    reloc->sym=find_base(p->offset,sec,pc);
-    if(!reloc->sym){
-      cpu_error(2);
-    }else{
-      rl->reloc=reloc;
-      rl->next=*relocs;
-      *relocs=rl;
-    }
+    symbol *base;
+    if (find_base(p->offset,&base,sec,pc)!=BASE_OK)
+      general_error(38);
+    else
+      add_nreloc(relocs,base,0,REL_ABS,16,roffset*8);
   }
   *d++=val>>24;
   *d++=val>>16;
@@ -193,7 +185,7 @@ static char *fill_operand(operand *p,section *sec,taddr pc,char *d,rlist **reloc
 dblock *eval_instruction(instruction *p,section *sec,taddr pc)
 {
   /* Auch simpel. Fehlerchecks fehlen. */
-  taddr size=instruction_size(p,sec,pc);
+  size_t size=instruction_size(p,sec,pc);
   dblock *db=new_dblock();
   int c=opt_inst(p,sec,pc);
   char *d;
@@ -220,7 +212,7 @@ dblock *eval_instruction(instruction *p,section *sec,taddr pc)
   }
   if(c==7){
     expr *tree=p->op[0]->offset;
-    if(!(tree->type==SYM&&tree->c.sym->sec==sec&&tree->c.sym->type==LABSYM&&
+    if(!(tree->type==SYM&&tree->c.sym->sec==sec&&LOCREF(tree->c.sym)&&
 	 tree->c.sym->pc-pc>=-128&&tree->c.sym->pc-pc<=127))
       cpu_error(0);
     else
@@ -236,7 +228,7 @@ dblock *eval_instruction(instruction *p,section *sec,taddr pc)
 }
 
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 {
   dblock *new=new_dblock();
   taddr val;
@@ -245,9 +237,9 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
   if(op->type!=OP_ABS)
     ierror(0);
   if(bitsize!=8&&bitsize!=16&&bitsize!=32)
-    cpu_error(3);
-  if(!eval_expr(op->offset,&val,sec,pc)&&bitsize!=32)
     cpu_error(2);
+  if(!eval_expr(op->offset,&val,sec,pc)&&bitsize!=32)
+    general_error(38);
   if(bitsize==8){
     new->data[0]=val;
   }else if(bitsize==16){
@@ -271,7 +263,7 @@ static taddr opsize(operand *p)
 
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
-taddr instruction_size(instruction *p,section *sec,taddr pc)
+size_t instruction_size(instruction *p,section *sec,taddr pc)
 {
   int c;
   size_t size=2;
diff --git a/cpus/test/cpu.h b/cpus/test/cpu.h
index ecf7016..0122cd2 100644
--- a/cpus/test/cpu.h
+++ b/cpus/test/cpu.h
@@ -14,7 +14,8 @@
 /* maximum number of additional command-line-flags for this cpu */
 
 /* data type to represent a target-address */
-typedef long taddr;
+typedef int32_t taddr;
+typedef uint32_t utaddr;
 
 /* minimum instruction alignment */
 #define INST_ALIGN 2
@@ -52,5 +53,3 @@ typedef struct {
   unsigned int available;
   unsigned int opcode;
 } mnemonic_extension;
-
-
diff --git a/cpus/test/cpu_errors.h b/cpus/test/cpu_errors.h
index 92e5505..06cb621 100644
--- a/cpus/test/cpu_errors.h
+++ b/cpus/test/cpu_errors.h
@@ -1,5 +1,3 @@
-"illegal operand",ERROR,
+  "illegal operand",ERROR,
   "illegal qualifier <%s>",ERROR,
-  "illegal relocation",ERROR,
   "data size not supported",ERROR,
-
diff --git a/cpus/tr3200/cpu.c b/cpus/tr3200/cpu.c
new file mode 100644
index 0000000..5306802
--- /dev/null
+++ b/cpus/tr3200/cpu.c
@@ -0,0 +1,502 @@
+/* cpu.c tr3200 cpu description file */
+/* (c) in 2014 by Luis Panadero Guardeno */
+
+#include "vasm.h"
+
+/*#define CPU_DEBUG (1)*/
+#ifdef CPU_DEBUG
+#define OPERAND_DEBUG (1)
+#define INSTR_DEBUG (1)
+#endif
+
+char *cpu_copyright="vasm TR3200 cpu module v0.1.0 by Luis Panadero Guardeno";
+
+char *cpuname="tr3200";
+int bitsperbyte=8;
+int bytespertaddr=4;
+
+mnemonic mnemonics[]={
+#include "opcodes.h"
+};
+
+int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
+
+
+static taddr opsize(operand *p, unsigned char num_operands, section *sec, taddr pc);
+
+/* parse instruction */
+char *parse_instruction(char *s, int *inst_len, char **ext, int *ext_len,
+                        int *ext_cnt)
+{
+  char* inst = s;
+#ifdef CPU_DEBUG
+    fprintf(stderr, "parse_inst : \"%.*s\"\n", *inst_len, s);
+#endif
+/*
+  while (*s && !isspace((unsigned char)*s))
+    s++;
+  *inst_len = s - inst; */
+  return s;
+}
+
+/* Sets op if is a valid register */
+static int parse_reg(char **p, int len, operand *op)
+{
+  char *rp = skip(*p);
+  int reg = -1;
+
+  if (len < 2) {
+    return 0;
+  }
+
+  if (*rp != '%') {
+    return 0;
+  }
+  rp++;
+
+  if (tolower((unsigned char)rp[0]) != 'r') {
+    /* Could be y, bp, sp, ia or flags */
+    if (len == 2 && tolower((unsigned char)rp[0]) == 'y') {
+      rp++;
+      *p = skip(rp);
+      op->type = OP_GPR;
+      op->reg = 11;
+
+      return 1;
+    } else if ( len == 3 && (tolower((unsigned char)rp[0]) == 'b')
+        && (tolower((unsigned char)rp[1]) == 'p')  ) {
+      rp++; rp++;
+      *p = skip(rp);
+      op->type = OP_GPR;
+      op->reg = 12;
+
+      return 1;
+    } else if ( len == 3 && (tolower((unsigned char)rp[0]) == 's')
+        && (tolower((unsigned char)rp[1]) == 'p')  ) {
+      rp++; rp++;
+      *p = skip(rp);
+      op->type = OP_GPR;
+      op->reg = 13;
+
+      return 1;
+    } else if ( len == 3 && (tolower((unsigned char)rp[0]) == 'i')
+        && (tolower((unsigned char)rp[1]) == 'a')  ) {
+      rp++; rp++;
+      *p = skip(rp);
+      op->type = OP_GPR;
+      op->reg = 14;
+
+      return 1;
+    } else if ( len == 6
+        && (tolower((unsigned char)rp[0]) == 'f')
+        && (tolower((unsigned char)rp[1]) == 'l')
+        && (tolower((unsigned char)rp[2]) == 'a')
+        && (tolower((unsigned char)rp[3]) == 'g')
+        && (tolower((unsigned char)rp[4]) == 's')
+        ) {
+      rp += 5;
+      *p = skip(rp);
+      op->type = OP_GPR;
+      op->reg = 14;
+
+      return 1;
+    }
+    /* It's not a register */
+    return 0;
+  }
+
+  rp++;
+  /* Get number */
+  if (len < 2 || sscanf(rp, "%u", &reg) != 1) {
+    return 0;
+  }
+
+  /* "%r0 .. %r15" are valid */
+  if (reg < 0 || reg > 15) {
+    return 0;
+  }
+
+  /* skip digits and return new pointer together with register number */
+  while ( isdigit((unsigned char)*rp) ) {
+    rp++;
+  }
+
+  *p = skip(rp);
+  op->type = OP_GPR;
+  op->reg = reg;
+  return 1;
+}
+
+/* Parses operands and reads expressions
+ * *p string
+ * len string length
+ * *op operand
+ * requires Type of operand expected
+ */
+int parse_operand(char *p, int len, operand *op, int requires)
+{
+  op->type = NO_OP;
+#ifdef OPERAND_DEBUG
+    fprintf(stderr, "parse_operand (reqs=%02x): \"%.*s\"\t",
+           (unsigned)requires, len, p);
+#endif
+
+  /* Try to grab the register */
+  if (1 != parse_reg(&p, len, op) ) {
+#ifdef OPERAND_DEBUG
+    fprintf(stderr, "imm\t");
+#endif
+    /* Its not a register, should be a immediate value or a expression */
+    if(p[0]=='#') { /* Immediate value */
+      expr *tree;
+#ifdef OPERAND_DEBUG
+    fprintf(stderr, "# ");
+#endif
+      op->type = OP_IMM;
+      p=skip(p+1);
+      tree = parse_expr(&p);
+      if (!tree) { /* It's not a valid expresion */
+        return PO_NOMATCH;
+      }
+      op->value = tree;
+    } else { /* expresion that would be a immediate value */
+#ifdef OPERAND_DEBUG
+    fprintf(stderr, "expr\t");
+#endif
+      op->type = OP_IMM;
+
+      int parent=0;
+      expr *tree;
+
+      /*
+      if (*p=='(') {
+        parent=1;
+        p=skip(p+1);
+      }
+      */
+
+      tree = parse_expr(&p);
+      if (!tree) { /* It's not a valid expresion */
+        return PO_NOMATCH ;
+      }
+
+      /* Inside of a ( ) */
+      /*
+      p=skip(p);
+      if(parent) {
+        if(*p!=')'){
+          cpu_error(0);
+          return 0;
+        } else
+        p=skip(p+1);
+      }
+      */
+
+      op->value=tree;
+    }
+  }
+
+#ifdef OPERAND_DEBUG
+    fprintf(stderr, "(type=%02x)\n", (unsigned) op->type);
+#endif
+
+  if(requires == op->type) { /* Matched type */
+    return PO_MATCH;
+  }
+
+  return PO_NOMATCH; /* Ops! Not match */
+}
+
+/* Convert an instruction into a DATA atom including relocations,
+   if necessary. */
+dblock *eval_instruction (instruction *p, section *sec, taddr pc)
+{
+  /* Calc instruction size */
+  size_t size = instruction_size(p, sec, pc);
+  dblock *db = new_dblock();
+  mnemonic m = mnemonics[p->code];
+  unsigned char *opcode, *d; /* Data */
+  taddr val;
+  unsigned char ml_bits = 0;
+  unsigned char num_operands = 0;
+  unsigned char srn = 0; /* Size of Rn */
+  operand* rn = NULL;
+
+#ifdef INSTR_DEBUG
+  fprintf(stderr, "eval_instruction code \"%s\" ", m.name);
+#endif
+
+  num_operands += (m.operand_type[0] != NO_OP)? 1 : 0;
+  num_operands += (m.operand_type[1] != NO_OP)? 1 : 0;
+  num_operands += (m.operand_type[2] != NO_OP)? 1 : 0;
+  if (num_operands > 0) {
+    rn = p->op[m.ext.rn_pos];
+  }
+
+#ifdef INSTR_DEBUG
+  fprintf(stderr, "P%d ", num_operands);
+  if (num_operands > 0)
+    fprintf(stderr, "rn type=%02x ", (unsigned) rn->type);
+#endif
+
+  /* See if Rn is an immediate to set ML bits*/
+  if (rn != NULL && rn->type == OP_IMM) {
+    srn = opsize(rn, num_operands, sec, pc);
+    ml_bits = 2 | (srn == 4);
+  }
+  ml_bits = ml_bits << 6; /* Emplace ML bits */
+#ifdef INSTR_DEBUG
+  fprintf(stderr, "IMM=%d ", srn);
+  fprintf(stderr, "ml %02x ", ml_bits);
+#endif
+
+  db->size=size;
+  db->data = mymalloc(size); /* allocate for the data block */
+  memset(db->data, 0, db->size);
+  /* Here to write data ! */
+  d = db->data;
+  d[3] = m.ext.opcode; /* Common part */
+  d[2] = ml_bits;
+
+  switch (num_operands) {
+    case 3: /* format P3 */
+      /* Rn is always at the LSBytes side */
+      if( rn->type == OP_GPR) { /* Is a register */
+        d[0] = (rn->reg) & 0xF;
+      } else if (ml_bits == 0x80 ) { /* ML are 10 -> immediate */
+        eval_expr(rn->value, &val, sec, pc);
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %04x ", val);
+#endif
+        d[1] = (val >>8)  & 0x3F;
+        d[0] = (val )     & 0xFF;
+      } else { /* 32 bit immediate */
+        eval_expr(rn->value, &val, sec, pc);
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %08x ", val);
+#endif
+        d[7] = (val >>24) & 0xFF;
+        d[6] = (val >>16) & 0xFF;
+        d[5] = (val >>8 ) & 0xFF;
+        d[4] = (val )     & 0xFF;
+      }
+
+      if (m.ext.rn_pos == 1) { /* Special case of STORE */
+        d[1] |= (p->op[0]->reg & 0xF) << 6;
+        d[2] |= (p->op[0]->reg & 0xF) >> 2;
+        d[2] |= (p->op[2]->reg) << 2; /* rd */
+      } else {
+        d[1] |= (p->op[1]->reg & 0xF) << 6;
+        d[2] |= (p->op[1]->reg & 0xF) >> 2;
+        d[2] |= (p->op[0]->reg) << 2; /* rd */
+      }
+
+      break;
+
+    case 2: /* format P2 */
+      if( rn->type == OP_GPR) { /* Is a register */
+        d[0] = (rn->reg) & 0xF;
+      } else if (ml_bits == 0x80 ) { /* ML are 10 -> immediate */
+        eval_expr(rn->value, &val, sec, pc);
+        /* CALL/JUMP stuff */
+        if (m.ext.opcode == 0x4B || m.ext.opcode == 0x4C ) {
+          val = val >> 2; /* CALL/JMP does a left shift of two bits */
+        }
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %06x ", val);
+#endif
+        d[2] |= (val >>16)  & 0x03;
+        d[1] =  (val >>8)  & 0xFF;
+        d[0] =  (val )     & 0xFF;
+
+      } else { /* 32 bit immediate */
+        eval_expr(rn->value, &val, sec, pc);
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %08x ", val);
+#endif
+        d[7] = (val >>24) & 0xFF;
+        d[6] = (val >>16) & 0xFF;
+        d[5] = (val >>8 ) & 0xFF;
+        d[4] = (val )     & 0xFF;
+      }
+
+      if (m.ext.rn_pos == 0) { /* Special case of STORE */
+        d[2] |= (p->op[1]->reg) << 2;
+      } else {
+        d[2] |= (p->op[0]->reg) << 2;
+      }
+      break;
+
+    case 1: /* format P1 */
+      if( rn->type == OP_GPR) { /* Is a register */
+        d[0] = (rn->reg) & 0xF;
+      } else if (ml_bits == 0x80 ) { /* ML are 10 -> immediate */
+        eval_expr(rn->value, &val, sec, pc);
+        /* CALL/JUMP stuff */
+        if (m.ext.opcode >= 0x27 && m.ext.opcode <= 0x28 ) {
+          val = val - pc; /* Relative jump/call */
+          val = val >> 2; /* CALL/JMP does a left shift of two bits */
+        } else if (m.ext.opcode >= 0x25 && m.ext.opcode <= 0x26 ) {
+          val = val >> 2; /* CALL/JMP does a left shift of two bits */
+        }
+
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %06x ", val);
+#endif
+        d[2] |= (val >>16)  & 0x3F;
+        d[1] =  (val >>8)  & 0xFF;
+        d[0] =  (val )     & 0xFF;
+
+      } else { /* 32 bit immediate */
+        eval_expr(rn->value, &val, sec, pc);
+        /* CALL/JUMP stuff */
+        if (m.ext.opcode >= 0x27 && m.ext.opcode <= 0x28 ) {
+          val = val - pc; /* Relative jump/call */
+        }
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "val %08x ", val);
+#endif
+        d[7] = (val >>24) & 0xFF;
+        d[6] = (val >>16) & 0xFF;
+        d[5] = (val >>8 ) & 0xFF;
+        d[4] = (val )     & 0xFF;
+      }
+
+      break;
+
+    case 0: /* format NP */
+#ifdef INSTR_DEBUG
+    fprintf(stderr, "NP ");
+#endif
+    default:
+    ;
+  }
+#ifdef INSTR_DEBUG
+  {
+    int i;
+    for(i= db->size -1; i >= 0; i-- ) {
+      fprintf(stderr, "%02X ", d[i]);
+    }
+  }
+  fprintf(stderr, "\n");
+#endif
+
+  return db;
+}
+
+/* Create a dblock (with relocs, if necessary) for size bits of data. */
+dblock *eval_data(operand *op, size_t bitsize, section *sec, taddr pc)
+{
+  dblock *new=new_dblock();
+  taddr val;
+  new->size = bitsize >> 3;
+  new->data = mymalloc(new->size);
+#ifdef CPU_DEBUG
+    fprintf(stderr, "eval_data ");
+#endif
+  if(op->type != OP_IMM) { /* ??? */
+#ifdef CPU_DEBUG
+    fprintf(stderr, "!= OP_IMM\n");
+#endif
+    ierror(0);
+  }
+
+  if(bitsize!=8 && bitsize!=16 && bitsize!=32) {
+#ifdef CPU_DEBUG
+    fprintf(stderr, "bad data size\n");
+#endif
+    cpu_error(2); /* Invalid data size */
+  }
+  if(!eval_expr(op->value, &val, sec, pc) ) {
+#ifdef CPU_DEBUG
+    fprintf(stderr, "can't eval\n");
+#endif
+    general_error(38);
+  }
+
+  if(bitsize == 8){
+    new->data[0] = val & 0xFF;
+
+  } else if (bitsize == 16){
+    new->data[1] = (val>>8)  & 0xFF;
+    new->data[0] = val       & 0xFF;
+
+  } else if (bitsize == 32){
+    new->data[3] = (val>>24) & 0xFF;
+    new->data[2] = (val>>16) & 0xFF;
+    new->data[1] = (val>>8)  & 0xFF;
+    new->data[0] = val       & 0xFF;
+  }
+  return new;
+}
+
+/* Size of a operand
+ * *p operand
+ * num_operand Total number of operands
+ * */
+static taddr opsize(operand *p, unsigned char num_operands, section *sec, taddr pc)
+{
+  taddr val = 0;
+  if(!p) {
+    return 0;
+
+  } else if (p->type == OP_IMM ) {
+    eval_expr(p->value, &val, sec, pc);
+    if (num_operands == 3
+        && (val < -8192 || val > 8191) ) {          /* 14 bits */
+      return 4; /* 32 bit immediate */
+    } else if (num_operands == 2
+        && (val < -131072 || val > 131071) ) {  /* 18 bits */
+      return 4; /* 32 bit immediate */
+    } else if (num_operands == 1
+        && (val < -2097152 || val > 2097151) ) { /* 22 bits */
+      return 4; /* 32 bit immediate */
+    }
+  }
+  return 0;
+}
+
+/* Calculate the size of the current instruction; must be identical
+   to the data created by eval_instruction. */
+size_t instruction_size (instruction *p, section *sec, taddr pc)
+{
+  size_t size = 4; /* four bytes */
+  unsigned char num_operands = 0;
+  num_operands += (p->op[0] != 0)? 1 : 0;
+  num_operands += (p->op[1] != 0)? 1 : 0;
+  num_operands += (p->op[2] != 0)? 1 : 0;
+
+  size += opsize(p->op[0], num_operands, sec, pc);
+  size += opsize(p->op[1], num_operands, sec, pc);
+  size += opsize(p->op[2], num_operands, sec, pc);
+
+  return size;
+}
+
+operand *new_operand()
+{
+  operand *new = mymalloc(sizeof(*new));
+  new->type=-1;
+  return new;
+}
+
+/* return true, if initialization was successfull */
+int init_cpu()
+{
+  return 1;
+}
+
+/* return true, if the passed argument is understood */
+int cpu_args(char *p)
+{
+  /* no args */
+  return 0;
+}
+
+/* parse cpu-specific directives; return pointer to end of
+   cpu-specific text */
+char *parse_cpu_special(char *s)
+{
+  /* no specials */
+  return s;
+}
diff --git a/cpus/tr3200/cpu.h b/cpus/tr3200/cpu.h
new file mode 100644
index 0000000..03258d6
--- /dev/null
+++ b/cpus/tr3200/cpu.h
@@ -0,0 +1,48 @@
+/* cpu.h TR3200 cpu-description header-file */
+/* (c) in 2014 by Luis Panadero Guardeno */
+
+#define LITTLEENDIAN 1
+#define BIGENDIAN 0
+#define VASM_CPU_TR3200 1
+
+/* maximum number of operands in one mnemonic */
+#define MAX_OPERANDS 3
+
+/* maximum number of mnemonic-qualifiers per mnemonic */
+#define MAX_QUALIFIERS 0
+
+/* maximum number of additional command-line-flags for this cpu */
+
+/* data type to represent a target-address */
+typedef int32_t taddr;
+typedef uint32_t utaddr;
+
+/* minimum instruction alignment */
+#define INST_ALIGN 4
+
+/* default alignment for n-bit data */
+#define DATA_ALIGN(n) ((n)<=8 ? 1 : ((n)<=16 ? 2 : 4))
+
+
+/* type to store each operand */
+typedef struct {
+  int16_t type;               /* type of operand from mnemonic.operand_type */
+  uint8_t reg;                /* Register number if there is one */
+  expr *value;                /* single register, immed. val. or branch loc.*/
+} operand;
+
+/* operand types */
+#define  NO_OP    (0)
+#define  OP_GPR   (1) /* %r0 to %r15 or %y, %bp %sp, %ia %flags */
+#define  OP_IMM   (2)
+
+/* operand class for n-bit data definitions */
+#define DATA_OPERAND(n) OP_IMM
+
+#define CPU_ALL  (-1)
+
+typedef struct {
+  unsigned char opcode;    /* OpCode */
+  unsigned char rn_pos;    /* Position of Rn */
+  unsigned char available; /* CPU variants were is available */
+} mnemonic_extension;
diff --git a/cpus/tr3200/cpu_errors.h b/cpus/tr3200/cpu_errors.h
new file mode 100644
index 0000000..06cb621
--- /dev/null
+++ b/cpus/tr3200/cpu_errors.h
@@ -0,0 +1,3 @@
+  "illegal operand",ERROR,
+  "illegal qualifier <%s>",ERROR,
+  "data size not supported",ERROR,
diff --git a/cpus/tr3200/opcodes.h b/cpus/tr3200/opcodes.h
new file mode 100644
index 0000000..159c7bb
--- /dev/null
+++ b/cpus/tr3200/opcodes.h
@@ -0,0 +1,150 @@
+/* name, operand 1, operand 2, operand 3, OpCode, Rn pos, CPU model */
+"and",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x80, 2, CPU_ALL},
+"and",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x80, 2, CPU_ALL},
+"or",       {OP_GPR, OP_GPR,  OP_GPR  },  {0x81, 2, CPU_ALL},
+"or",       {OP_GPR, OP_GPR,  OP_IMM  },  {0x81, 2, CPU_ALL},
+"xor",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x82, 2, CPU_ALL},
+"xor",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x82, 2, CPU_ALL},
+"bitc",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x83, 2, CPU_ALL},
+"bitc",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x83, 2, CPU_ALL},
+
+"add",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x84, 2, CPU_ALL},
+"add",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x84, 2, CPU_ALL},
+"addc",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x85, 2, CPU_ALL},
+"addc",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x85, 2, CPU_ALL},
+"sub",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x86, 2, CPU_ALL},
+"sub",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x86, 2, CPU_ALL},
+"subb",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x87, 2, CPU_ALL},
+"subb",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x87, 2, CPU_ALL},
+"rsb",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x88, 2, CPU_ALL},
+"rsb",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x88, 2, CPU_ALL},
+"rsbb",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x89, 2, CPU_ALL},
+"rsbb",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x89, 2, CPU_ALL},
+
+"lls",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x8A, 2, CPU_ALL},
+"lls",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x8A, 2, CPU_ALL},
+"lrs",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x8B, 2, CPU_ALL},
+"lrs",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x8B, 2, CPU_ALL},
+"ars",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x8C, 2, CPU_ALL},
+"ars",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x8C, 2, CPU_ALL},
+"rotl",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x8D, 2, CPU_ALL},
+"rotl",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x8D, 2, CPU_ALL},
+"rotr",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x8E, 2, CPU_ALL},
+"rotr",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x8E, 2, CPU_ALL},
+
+"mul",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x8F, 2, CPU_ALL},
+"mul",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x8F, 2, CPU_ALL},
+"smul",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x90, 2, CPU_ALL},
+"smul",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x90, 2, CPU_ALL},
+"div",      {OP_GPR, OP_GPR,  OP_GPR  },  {0x91, 2, CPU_ALL},
+"div",      {OP_GPR, OP_GPR,  OP_IMM  },  {0x91, 2, CPU_ALL},
+"sdiv",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x92, 2, CPU_ALL},
+"sdiv",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x92, 2, CPU_ALL},
+
+/* P2 */
+
+"mov",      {OP_GPR, OP_GPR },            {0x40, 1, CPU_ALL},
+"mov",      {OP_GPR, OP_IMM },            {0x40, 1, CPU_ALL},
+"swp",      {OP_GPR, OP_GPR },            {0x41, 1, CPU_ALL},
+"not",      {OP_GPR, OP_GPR },            {0x42, 1, CPU_ALL},
+"not",      {OP_GPR, OP_IMM },            {0x42, 1, CPU_ALL},
+
+"sigxb",    {OP_GPR, OP_GPR },            {0x43, 1, CPU_ALL},
+"sigxb",    {OP_GPR, OP_IMM },            {0x43, 1, CPU_ALL},
+"sigxw",    {OP_GPR, OP_GPR },            {0x44, 1, CPU_ALL},
+"sigxw",    {OP_GPR, OP_IMM },            {0x44, 1, CPU_ALL},
+
+"jmp",      {OP_GPR, OP_GPR },            {0x4B, 1, CPU_ALL},
+"jmp",      {OP_GPR, OP_IMM },            {0x4B, 1, CPU_ALL},
+"call",     {OP_GPR, OP_GPR },            {0x4C, 1, CPU_ALL},
+"call",     {OP_GPR, OP_IMM },            {0x4C, 1, CPU_ALL},
+
+/* Branch */
+"ifeq",     {OP_GPR, OP_GPR },            {0x70, 1, CPU_ALL},
+"ifeq",     {OP_GPR, OP_IMM },            {0x70, 1, CPU_ALL},
+"ifneq",    {OP_GPR, OP_GPR },            {0x71, 1, CPU_ALL},
+"ifneq",    {OP_GPR, OP_IMM },            {0x71, 1, CPU_ALL},
+
+"ifl",      {OP_GPR, OP_GPR },            {0x72, 1, CPU_ALL},
+"ifl",      {OP_GPR, OP_IMM },            {0x72, 1, CPU_ALL},
+"ifsl",     {OP_GPR, OP_GPR },            {0x73, 1, CPU_ALL},
+"ifsl",     {OP_GPR, OP_IMM },            {0x73, 1, CPU_ALL},
+"ifle",     {OP_GPR, OP_GPR },            {0x74, 1, CPU_ALL},
+"ifle",     {OP_GPR, OP_IMM },            {0x74, 1, CPU_ALL},
+"ifsle",    {OP_GPR, OP_GPR },            {0x75, 1, CPU_ALL},
+"ifsle",    {OP_GPR, OP_IMM },            {0x75, 1, CPU_ALL},
+
+"ifg",      {OP_GPR, OP_GPR },            {0x76, 1, CPU_ALL},
+"ifg",      {OP_GPR, OP_IMM },            {0x76, 1, CPU_ALL},
+"ifsg",     {OP_GPR, OP_GPR },            {0x77, 1, CPU_ALL},
+"ifsg",     {OP_GPR, OP_IMM },            {0x77, 1, CPU_ALL},
+"ifge",     {OP_GPR, OP_GPR },            {0x78, 1, CPU_ALL},
+"ifge",     {OP_GPR, OP_IMM },            {0x78, 1, CPU_ALL},
+"ifsge",    {OP_GPR, OP_GPR },            {0x79, 1, CPU_ALL},
+"ifsge",    {OP_GPR, OP_IMM },            {0x79, 1, CPU_ALL},
+
+"ifbits",   {OP_GPR, OP_GPR },            {0x7A, 1, CPU_ALL},
+"ifbits",   {OP_GPR, OP_IMM },            {0x7A, 1, CPU_ALL},
+"ifclear",  {OP_GPR, OP_GPR },            {0x7B, 1, CPU_ALL},
+"ifclear",  {OP_GPR, OP_IMM },            {0x7B, 1, CPU_ALL},
+
+/* P1 instructions */
+"xchgb",    {OP_GPR },                    {0x20, 0, CPU_ALL},
+"xchgb",    {OP_IMM },                    {0x20, 0, CPU_ALL},
+"xchgw",    {OP_GPR },                    {0x21, 0, CPU_ALL},
+"xchgw",    {OP_IMM },                    {0x21, 0, CPU_ALL},
+
+"getpc",    {OP_GPR },                    {0x22, 0, CPU_ALL},
+
+"pop",      {OP_GPR },                    {0x23, 0, CPU_ALL},
+"push",     {OP_GPR },                    {0x24, 0, CPU_ALL},
+"push",     {OP_IMM },                    {0x24, 0, CPU_ALL},
+
+"jmp",      {OP_GPR },                    {0x25, 0, CPU_ALL},
+"jmp",      {OP_IMM },                    {0x25, 0, CPU_ALL},
+"call",     {OP_GPR },                    {0x26, 0, CPU_ALL},
+"call",     {OP_IMM },                    {0x26, 0, CPU_ALL},
+
+"rjmp",     {OP_GPR },                    {0x27, 0, CPU_ALL},
+"rjmp",     {OP_IMM },                    {0x27, 0, CPU_ALL},
+"rcall",    {OP_GPR },                    {0x28, 0, CPU_ALL},
+"rcall",    {OP_IMM },                    {0x28, 0, CPU_ALL},
+
+"int",      {OP_GPR },                    {0x29, 0, CPU_ALL},
+"int",      {OP_IMM },                    {0x29, 0, CPU_ALL},
+
+/* NP instructions */
+"sleep",    { },                          {0x00, 0, CPU_ALL},
+"ret",      { },                          {0x01, 0, CPU_ALL},
+"rfi",      { },                          {0x02, 0, CPU_ALL},
+
+  /* Load / Store*/
+/*          Register    Were to read  */
+"load",     {OP_GPR, OP_GPR,  OP_GPR  },  {0x93, 2, CPU_ALL},
+"load",     {OP_GPR, OP_GPR,  OP_IMM  },  {0x93, 2, CPU_ALL},
+"load",     {OP_GPR, OP_GPR   },          {0x45, 1, CPU_ALL},
+"load",     {OP_GPR, OP_IMM   },          {0x45, 1, CPU_ALL},
+"loadw",    {OP_GPR, OP_GPR,  OP_GPR  },  {0x94, 2, CPU_ALL},
+"loadw",    {OP_GPR, OP_GPR,  OP_IMM  },  {0x94, 2, CPU_ALL},
+"loadw",    {OP_GPR, OP_GPR   },          {0x46, 1, CPU_ALL},
+"loadw",    {OP_GPR, OP_IMM   },          {0x46, 1, CPU_ALL},
+"loadb",    {OP_GPR, OP_GPR,  OP_GPR  },  {0x95, 2, CPU_ALL},
+"loadb",    {OP_GPR, OP_GPR,  OP_IMM  },  {0x95, 2, CPU_ALL},
+"loadb",    {OP_GPR, OP_GPR   },          {0x47, 1, CPU_ALL},
+"loadb",    {OP_GPR, OP_IMM   },          {0x47, 1, CPU_ALL},
+/*           Were to write     data to write  */
+"store",    {OP_GPR, OP_GPR,  OP_GPR  },  {0x96, 1, CPU_ALL},
+"store",    {OP_GPR, OP_IMM,  OP_GPR  },  {0x96, 1, CPU_ALL},
+"store",    {OP_GPR, OP_GPR   },          {0x48, 0, CPU_ALL},
+"store",    {OP_IMM, OP_GPR   },          {0x48, 0, CPU_ALL},
+"storew",   {OP_GPR, OP_GPR,  OP_GPR  },  {0x97, 1, CPU_ALL},
+"storew",   {OP_GPR, OP_IMM,  OP_GPR  },  {0x97, 1, CPU_ALL},
+"storew",   {OP_GPR, OP_GPR   },          {0x49, 0, CPU_ALL},
+"storew",   {OP_IMM, OP_GPR   },          {0x49, 0, CPU_ALL},
+"storeb",   {OP_GPR, OP_GPR,  OP_GPR  },  {0x98, 1, CPU_ALL},
+"storeb",   {OP_GPR, OP_IMM,  OP_GPR  },  {0x98, 1, CPU_ALL},
+"storeb",   {OP_GPR, OP_GPR   },          {0x4A, 0, CPU_ALL},
+"storeb",   {OP_IMM, OP_GPR   },          {0x4A, 0, CPU_ALL},
+
+/* TODO Others */
+
diff --git a/cpus/vidcore/cpu.c b/cpus/vidcore/cpu.c
new file mode 100644
index 0000000..f984110
--- /dev/null
+++ b/cpus/vidcore/cpu.c
@@ -0,0 +1,1206 @@
+/* cpu.c example cpu-description file */
+/* (c) in 2013 by Volker Barthelmann */
+
+#include "vasm.h"
+
+char *cpu_copyright="VideoCore IV cpu backend 0.1 (c) in 2013 Volker Barthelmann";
+char *cpuname="vidcore";
+
+mnemonic mnemonics[]={
+#include "opcodes.h"
+};
+
+int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
+
+int bitsperbyte=8;
+int bytespertaddr=4;
+
+static char *ccs[]={"eq","ne","cs","cc","mi","pl","vs","vc",
+		    "hi","ls","ge","lt","gt","le","???","f"};
+
+static char *vflags[]={"all","none","ifz","ifnz","ifn","ifnn","ifc","ifnc"};
+
+static char *accs[]={
+  "???", "sub", "wba", "???", "clra", "???", "???", "???",
+  "sign", "???", "???", "???", "???", "???", "???", "???",
+  "high", "???", "???", "???", "???", "???", "???", "???",
+  "???", "???", "???", "???", "???", "???", "???", "???",
+  "uadd", "usub", "uacc", "udec", "???", "???", "???", "???",
+  "sadd", "ssub", "sacc", "sdec", "???", "???", "???", "???",
+  "uaddh", "usubh", "uacch", "udech", "???", "???", "???", "???",
+  "saddh", "ssubh", "sacch", "sdech", "???", "???", "???", "???"};
+
+static char *sru[]={
+  "sumu", "sums", "???", "imin", "???", "imax", "???", "max"};
+
+static size_t oplen(int op)
+{
+  if(op<=EN_MEMDISP16)
+    return 2;
+  else if(op<=EN_ARITHI32)
+    return 4;
+  else if(op<=EN_VARITHI48)
+    return 6;
+  else if(op<=EN_ADDCMPB64)
+    return 8;
+  else if(op<=EN_VARITHI80)
+    return 10;
+  ierror(0);
+}
+
+static char *skip_reg(char *s,int *reg)
+{
+  int r=-1;
+  char* orig=s;
+  if(s[0]=='p'&&s[1]=='c'){
+    *reg=31;
+    return s+2;
+  }
+  if(s[0]=='s'&&s[1]=='r'){
+    *reg=30;
+    return s+2;
+  }
+  if(s[0]=='l'&&s[1]=='r'){
+    *reg=26;
+    return s+2;
+  }
+  if(s[0]=='s'&&s[1]=='p'){
+    *reg=25;
+    return s+2;
+  }
+  if(*s!='r'){
+    return s;
+  }
+  s++;
+  if(*s<'0'||*s>'9'){
+    return orig;
+  }
+  r=*s++-'0';
+  if(*s>='0'&&*s<='9')
+    r=10*r+*s++-'0';
+  if(isalnum(*s)||*s=='_'){
+    return orig;
+  }
+  *reg=r;
+  return s;
+}
+
+int parse_operand(char *p,int len,operand *op,int req)
+{
+  int r;
+  char *s,*start=p;
+
+  op->type=-1;
+  p=skip(p);
+
+  if(req>=OP_REG&&req<=OP_LR){
+    int reg;
+    s=skip_reg(p,&r);
+    if(s!=p){
+      if((req==OP_REG&&r<=31)||
+	 (req==OP_SREG&&r<=15)||
+	 (req==OP_PC&&r==31)||
+	 (req==OP_LR&&r==26)||
+	 (req==OP_MREG&&(r==0||r==6||r==16||r==24))){
+	op->type=OP_REG;
+	op->reg=r;
+      }else
+	return 0;
+    }else
+      return 0;
+    p=skip(s);
+  }else if(req==OP_MREG){
+    int first;
+    s=skip_reg(p,&r);
+    if(s==p)
+      return 0;
+    if(r==0)
+      op->dreg=0;
+    else if(r==6)
+      op->dreg=1;
+    else if(r==16)
+      op->dreg=2;
+    else if(r==24)
+      op->dreg=3;
+    else
+      return 0;
+    s=skip(s);
+    if(*s!='-')
+      return 0;
+    p=skip(s+1);
+    first=r;
+    s=skip_reg(p,&r);
+    if(s==p) 
+      return 0;
+    p=skip(s);
+    op->reg=(r-first)&31;
+  }else if(req==OP_IND){
+    p=skip(p);
+    if(*p!='(') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&r);
+    if(s==p) return 0;
+    if(r>15) return 0;
+    p=skip(s);
+    op->reg=r;
+    if(*p!=')') return 0;
+    p=skip(p+1);
+    op->type=OP_IND;
+  }else if(req==OP_VIND){
+    int nodisp=0;
+    p=skip(p);
+    if(*p=='('){
+      char *m;
+      m=s=skip(p+1);
+      s=skip_reg(s,&r);
+      if((m!=s)||(*s=='0')) nodisp=1;
+    }
+    if(!nodisp){
+      op->offset=parse_expr(&p);
+      if(!op->offset) return 0;
+    }else
+      op->offset=0;
+    if(*p!='(') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&r);
+    if (s==p){
+      /* Special case: Allow '0' instead of a register */
+      if (*p=='0'){
+	p=skip(p+1);
+	op->reg=15;
+      }
+      else return 0;
+    }else{
+      if(r>14) return 0;
+      p=skip(s);
+      op->reg=r;
+    }
+    op->dreg=15;
+    if(*p=='+'&&p[1]=='='){
+      p=skip(p+2);
+      s=skip_reg(p,&r);
+      if(s==p) return 0;
+      if(r>14) return 0;
+      p=skip(s);
+      op->dreg=r;
+    }
+    if(*p!=')') return 0;
+    p=skip(p+1);
+    op->type=OP_IND;
+  }else if(req==OP_PREDEC){
+    p=skip(p);
+    if(p[0]!='-'||p[1]!='-') return 0;
+    p=skip(p+2);
+    if(*p!='(') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&r);
+    if(s==p) return 0;
+    p=skip(s);
+    if(*p!=')') return 0;
+    p=skip(p+1);
+    op->reg=r;
+    op->type=OP_PREDEC;
+  }else if(req==OP_POSTINC){
+    p=skip(p);
+    if(*p!='(') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&r);
+    if(s==p) return 0;
+    p=skip(s);
+    if(*p!=')') return 0;
+    p=skip(p+1);
+    if(*p++!='+') return 0;
+    if(*p!='+') return 0;
+    p=skip(p+1);
+    op->reg=r;
+    op->type=OP_POSTINC;
+  }else if(req==OP_REGIND){
+    p=skip(p);
+    if(*p!='(') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&op->reg);
+    if(s==p) return 0;  
+    p=skip(s);
+    if(*p!=',') return 0;
+    p=skip(p+1);
+    s=skip_reg(p,&op->dreg);
+    if(s==p) return 0;
+    p=skip(s);
+    if(*p!=')') return 0;
+    op->type=OP_REGIND;
+    p=skip(p+1);
+  }else if(req==OP_IMMIND||
+	   req==OP_IMMINDSP||
+	   req==OP_IMMINDSD||
+	   req==OP_IMMINDR0||
+	   req==OP_IMMINDS||
+	   req==OP_IMMINDPC){
+    op->offset=0;
+    if(*p=='('){
+      char *p2;
+      p2=skip(p+1);
+      s=skip_reg(p2,&r);
+      if(s!=p2){
+	p=skip(s);
+	if(*p==')'){
+	  p=skip(p+1);
+	  op->offset=number_expr(0);
+	}
+      }
+    }
+    if(!op->offset){
+      op->offset=parse_expr(&p);
+      if(!op->offset) return 0;
+      p=skip(p);
+      if(*p!='(') return 0;
+      p=skip(p+1);
+      s=skip_reg(p,&r);
+      if(s==p) return 0;
+      p=skip(s);
+      if(*p!=')') return 0;
+    }
+    if(req==OP_IMMINDSP&&r!=25) return 0;
+    if(req==OP_IMMINDPC&&r!=31) return 0;
+    if(req==OP_IMMINDSD&&r!=24) return 0;
+    if(req==OP_IMMINDR0&&r!=0) return 0;
+    if(req==OP_IMMINDS&&r>15) return 0;
+    op->reg=r;
+    op->type=OP_IMMIND;
+    p=skip(p+1);
+  }else if(req>=OP_IMM4&&req<=OP_IMM32&&skip_reg(p,&r)==p){
+    op->type=OP_IMM32;
+    op->offset=parse_expr(&p);
+    simplify_expr(op->offset);
+    p=skip(p);
+  }else if((req==OP_ABS||req==OP_REL)&&skip_reg(p,&r)==p){
+    op->type=req;
+    op->offset=parse_expr(&p);
+    simplify_expr(op->offset);
+    p=skip(p);
+  }else if(req==OP_VREG||req==OP_VREGM||req==OP_VREGMM||req==OP_VREGA80){
+    s=skip_reg(p,&r);
+    op->offset=0;
+    if(s!=p){
+      if (*s=='+'||*s=='-'){
+        if(req==OP_VREG) return 0;
+        op->offset=parse_expr(&s);
+      }
+      p=skip(s);
+      op->type=OP_VREG;
+      if(req==OP_VREG){
+	op->reg=(0xE<<6)|r;
+	op->dreg=0x3c;
+      }else{
+	op->reg=(0xE<<6);
+	op->dreg=r<<2;
+      }
+    }else if(*p=='-'){
+      p=skip(p+1);
+      op->type=OP_VREG;
+      op->reg=(0xF<<6);
+      op->dreg=0x3c;
+    }else{
+      int size,vert,x,y,inc=15<<2;
+      expr *e;
+      if(*p=='H'||*p=='h')
+	vert=0;
+      // Disable vertical registers in 48-bit instructions for now
+      else if((req!=OP_VREG)&&(*p=='V'||*p=='v'))
+	vert=1;
+      else
+	return 0;
+      p=skip(p+1);
+      if(*p=='X'||*p=='x'){
+	size=2;
+	p=skip(p+1);
+      }else if(*p=='1'&&p[1]=='6'){
+	size=2;
+	p=skip(p+2);
+      }else if(*p=='Y'||*p=='y'){
+	size=4;
+	p=skip(p+1);
+      }else if(*p=='3'&&p[1]=='2'){
+	size=4;
+	p=skip(p+2);
+      }else if(*p=='8'){
+	size=1;
+	p=skip(p+1);
+      }else{
+	size=1;
+	p=skip(p);
+      }
+      if(*p!='(') return 0;
+      p=skip(p+1);
+      e=parse_expr(&p);
+      if(e->type!=NUM) return 0;
+      y=e->c.val;
+      p=skip(p);
+#if 1
+      if(req!=OP_VREG&&*p=='+'){
+	p++;
+	if(*p!='+') return 0;
+	if(vert) {
+	  cpu_error(4);
+	  return 0;
+	}
+	p=skip(p+1);
+	inc|=2;
+      }
+#endif
+      if(*p!=',') return 0;
+      p=skip(p+1);
+      if((*p=='c')||(*p=='C'))
+      {
+	p++;
+	if (*p!='b'&&*p!='B') return 0;
+	p++;
+	if (*p!='+') return 0;
+	inc|=1;
+      }
+      e=parse_expr(&p);
+      if(e->type!=NUM) return 0;
+      x=e->c.val;
+      p=skip(p);
+#if 1
+      if(req!=OP_VREG&&*p=='+'){
+	p++;
+	if(*p!='+') return 0;
+	if(!vert) {
+	  cpu_error(4);
+	  return 0;
+	}
+	p=skip(p+1);
+	inc|=2;
+      }
+#endif
+      if(*p!=')') return 0;
+      p=skip(p+1);
+      if(req!=OP_VREG&&*p=='*'){
+	p=skip(p+1);
+	inc|=1;
+      }
+      if(req!=OP_VREG&&*p=='+'){
+	p=skip(p+1);
+	s=skip_reg(p,&r);
+	if(s==p) return 0;
+	p=skip(s);
+	inc&=~0x3c;
+	inc|=(r<<2);
+      }
+      if(req==OP_VREGA80){
+	if(size==1){
+	  op->reg=(vert<<6)|((x&48)<<3);
+	}else if(size==2){
+	  if(x&16) return 0;
+	  op->reg=(vert<<6)|(8<<6)|((x&32)<<2);
+	}else{
+	  if(x&48) return 0;
+	  op->reg=(vert<<6)|(12<<6);
+	}
+	if(y<0||y>63) return 0;
+	op->reg|=y&63;
+	inc|=(x&15)<<6;
+      }else{
+	if(vert){
+	  if(size==1){
+	    op->reg=(1<<6)|((x&48)<<3);
+	  }else if(size==2){
+	    if(x&16) return 0;
+	    op->reg=(9<<6)|((x&32)<<2);
+	  }else{
+	    if(x&48) return 0;
+	    op->reg=13<<6;
+	  }
+	  if(y<0||y>63||(y&15)) return 0;
+	  op->reg|=(y&48)|(x&15);
+	}
+	else{
+	  if(size==1){
+	    if(x&15) return 0;
+	    op->reg=(x&48)<<3;
+	  }else if(size==2){
+	    if(x&31) return 0;
+	    op->reg=(8<<6)|((x&32)<<2);
+	  }else{
+	    if(x) return 0;
+	    op->reg=12<<6;
+	  }
+	if(y<0||y>63) return 0;
+	op->reg|=y&63;
+	}
+      }
+      op->dreg=inc;
+      op->type=OP_VREG;
+    }
+  }else
+    return 0;
+
+  if(req==OP_VREGMM||req==OP_IMM32M||req==OP_VIND){
+    int vecmod=0,i;
+    while(1){
+      if(!strncasecmp(p,"rep",3)&&isspace((unsigned char)p[3])){
+	expr *e;
+	taddr x;
+	p=skip(p+3);
+	if((*p=='r')&&(p[1]=='0')&&!isdigit(p[2])){
+	  p=skip(p+2);
+	  vecmod|=7<<16;
+	  i=0;
+	}else{
+	  e=parse_expr(&p);
+	  if(e->type!=NUM) return 0;
+	  x=e->c.val;
+	  for(i=0;i<8;i++){
+	    if((1<<i)==x){
+	      vecmod|=i<<16;
+	      break;
+	    }
+	  }
+	}
+	if(i>=8) return 0;
+	p=skip(p);
+	continue;
+      }
+      for(i=0;i<sizeof(vflags)/sizeof(vflags[0]);i++){
+	if((!strncasecmp(p,vflags[i],strlen(vflags[i])))&&
+	   (!isalpha(p[strlen(vflags[i])]))){
+	  if(vecmod&0x380) return 0;
+	  vecmod|=i<<7;
+	  p=skip(p+strlen(vflags[i]));
+	  continue;
+	}
+      }
+      for (i=0;i<sizeof(sru)/sizeof(sru[0]);i++){
+	if(!strncasecmp(p,sru[i],strlen(sru[i]))){
+	  p=skip(p+strlen(sru[i]));
+	  p=skip_reg(p,&r);
+	  if((r<0)||(r>7)) return 0;
+	  vecmod|=(1<<6)|(i<<3)|r;
+	  continue;
+	}
+      }
+      for (i=0;i<sizeof(accs)/sizeof(accs[0]);i++){
+	if((!strncasecmp(p,accs[i],strlen(accs[i])))&&
+	   (!isalpha(p[strlen(accs[i])]))){
+	  if(vecmod&0x40) return 0;
+	  vecmod|=i;
+	  p=skip(p+strlen(accs[i]));
+	  continue;
+	}
+      }
+      if(!strncasecmp(p,"ena",3)){
+	if(vecmod&0x40) return 0;
+	p=skip(p+3);
+	vecmod|=32;
+      }
+      if(!strncasecmp(p,"setf",4)){
+	p=skip(p+4);
+	vecmod|=1<<20;
+	continue;
+      }
+      break;
+    }
+
+    op->vecmod=vecmod;
+  }
+
+  if(p>=start+len)
+    return 1;
+  else
+    return 0;
+}
+
+static taddr dooffset(int rel,expr *tree,section *sec,taddr pc,rlist **relocs,int roffset,int size,taddr mask)
+{
+  taddr val;
+  if(!eval_expr(tree,&val,sec,pc)){
+    taddr addend=val;
+    symbol *base;
+    if(find_base(tree,&base,sec,pc)!=BASE_OK){
+      general_error(38);
+      return val;
+    }
+    if(rel==REL_PC){
+      val-=pc;
+      addend+=roffset/8;
+    }
+    if(rel!=REL_PC||!LOCREF(base)||base->sec!=sec){
+      add_nreloc_masked(relocs,base,addend,rel,size,roffset,mask);
+      return 0;
+    }
+  }
+#if 0
+  if(val<-(1<<(size-1))||val>((1<<(size-1))-1))
+    cpu_error(1,size);
+#endif
+  return val&mask;
+}
+
+static taddr reloffset(expr *tree,section *sec,taddr pc,rlist **relocs,int roffset,int size,taddr mask)
+{
+  /* taddr mask=size==32?0xffffffff:((((taddr)1)<<size)-1);*/
+  return dooffset(REL_PC,tree,sec,pc,relocs,roffset,size,mask);
+}
+
+static taddr absoffset(expr *tree,section *sec,taddr pc,rlist **relocs,int roffset,int size)
+{
+  /* taddr mask=size==32?0xffffffff:((((taddr)1)<<size)-1);*/
+  return dooffset(REL_ABS,tree,sec,pc,relocs,roffset,size,0xffffffff);
+}
+
+static taddr absval(expr *tree,section *sec,taddr pc,int bits,int sgn)
+{
+  taddr val;
+  if(!eval_expr(tree,&val,sec,pc))
+    cpu_error(0);
+  if(!sgn){
+    if(val<0||val>=(1<<bits))
+      cpu_error(1,bits);
+  }else{
+    if(val<-(1<<(bits-1))||val>=(1<<(bits-1)))
+      cpu_error(1,bits);
+  }
+  return val&((1<<bits)-1);
+}
+
+static int chkval(expr *tree,section *sec,taddr pc,int bits,int sgn)
+{
+  taddr val;
+  if(!eval_expr(tree,&val,sec,pc))
+    cpu_error(0);
+  if(!sgn){
+    if(val<0||val>=(1<<bits))
+      return 0;
+  }else{
+    if(val<-(1<<(bits-1))||val>=(1<<(bits-1)))
+      return 0;
+  }
+  return 1;
+}
+
+/* replace instruction by one with encoding enc */
+static int replace(int c,int enc)
+{
+  int i=c+1;
+  while(!strcmp(mnemonics[c].name,mnemonics[i].name)){
+    if(mnemonics[i].ext.encoding==enc){
+      c=i;
+      break;
+    }
+    i++;
+  }
+  if(c!=i) ierror(0);  
+  return c;
+}
+static int translate(instruction *p,section *sec,taddr pc)
+{
+  int c=p->code,e=mnemonics[c].ext.encoding;
+  taddr val;
+
+  if(p->qualifiers[0]){
+    /* extend to larger variants if ccs are required */
+    if(e==EN_MEMDISP16)
+      c=replace(c,EN_MEMDISP32);
+    if(e==EN_ARITHR16)
+      c=replace(c,EN_ARITHR32);
+    if(e==EN_ARITHI16)
+      c=replace(c,EN_ARITHI32);
+  }
+  if(e==EN_ARITHI32){
+    if(p->op[2]){
+      if(!chkval(p->op[2]->offset,sec,pc,6,1)&&(!strcmp("add",mnemonics[c].name)||!strcmp("sub",mnemonics[c].name)))
+	c=replace(c,EN_ADD48);
+    }else{
+      if((c<32)&&(!chkval(p->op[1]->offset,sec,pc,6,1)))
+	c=replace(c,EN_ARITHI48);
+    }
+  }
+  if(e==EN_ARITHI16){
+    if(!chkval(p->op[1]->offset,sec,pc,5,0))
+      c=replace(c,EN_ARITHI48);
+  }
+  if(e==EN_RBRANCH16){
+    symbol *base;
+    if(find_base(p->op[0]->offset,&base,sec,pc)!=BASE_OK||!LOCREF(base)||base->sec!=sec)
+      c=replace(c,EN_RBRANCH32);
+    else{
+      int i;
+      i=eval_expr(p->op[0]->offset,&val,sec,pc);
+      val-=pc;
+      if(val>126||val<-128)
+	c=replace(c,EN_RBRANCH32);
+    }
+  }
+  if(e==EN_ADDCMPB32){
+    int i;
+    i=eval_expr(p->op[3]->offset,&val,sec,pc);
+    val-=pc;
+    if(val>1022||val<-1024)
+      c+=4;
+    else if(p->op[2]->type!=OP_REG&&(val>254||val<-256))
+      c+=4;
+  }
+  if((e==EN_MEMDISP16||e==EN_MEMDISP32||e==EN_MEM12DISP32||e==EN_MEM16DISP32)){
+    if(!eval_expr(p->op[1]->offset,&val,sec,pc)){
+      c=replace(c,EN_MEM48);
+    }else{
+      if(e==EN_MEMDISP16&&(val<0||val>54||(val&3))){
+	if(val<=4095&&val>=-4096)
+	  c=replace(c,EN_MEM12DISP32);
+	else
+	  c=replace(c,EN_MEM48);
+      }
+    }
+  }
+  /* todo */
+  return c;
+}
+
+/* Convert an instruction into a DATA atom including relocations,
+   if necessary. */
+dblock *eval_instruction(instruction *p,section *sec,taddr pc)
+{
+  dblock *db=new_dblock();
+  int c,sz,enc,cc,ww,m=0;
+  unsigned long code,code2,code3;
+  rlist *relocs=0;
+
+  if(p->qualifiers[0]){
+    int i;
+    for(i=0;i<15;i++){
+      if(!strcmp(p->qualifiers[0],ccs[i])){
+	cc=i;
+	break;
+      }
+    }
+    if(i>15) ierror(0);
+  }else
+    cc=14;
+
+  c=translate(p,sec,pc);
+  enc=mnemonics[c].ext.encoding;
+
+  db->size=sz=oplen(enc);
+  db->data=mymalloc(db->size);
+
+  code=mnemonics[c].ext.code;
+
+  switch(enc){
+  case EN_ARITHR16:
+    if(cc!=14) cpu_error(3);
+    code=0x40000000|(code<<24);
+    code|=(p->op[0]->reg<<16)|(p->op[1]->reg<<20);
+    break;
+  case EN_ARITHI16:
+    if(cc!=14) cpu_error(3);
+    code=0x60000000|((code>>1)<<25);
+    code|=(p->op[0]->reg<<16)|(absval(p->op[1]->offset,sec,pc,5,0)<<20);
+    break;
+  case EN_FIX16:
+    if(cc!=14) cpu_error(3);
+    break;
+  case EN_IBRANCH16:
+    if(cc!=14) cpu_error(3);
+    code|=(p->op[0]->reg<<16);
+    break;
+  case EN_RBRANCH16:
+    code=0x18000000;
+    code|=cc<<23;
+    code|=((reloffset(p->op[0]->offset,sec,pc,&relocs,0,7,0xfe)>>1)&127)<<16;
+    break;
+  case EN_MREG16:
+    if(cc!=14) cpu_error(3);
+    code|=(p->op[0]->dreg<<21)|(p->op[0]->reg<<16);
+    break;
+  case EN_RBRANCH32:
+    if(code==0x90000000)
+      code|=cc<<24;
+    else
+      code|=((reloffset(p->op[0]->offset,sec,pc,&relocs,8,4,0xF000000)>>24)&0xf)<<24;
+    code|=((reloffset(p->op[0]->offset,sec,pc,&relocs,16,16,0x1fffe)>>1)&0x7fffff);
+    code|=((reloffset(p->op[0]->offset,sec,pc,&relocs,0,7,0xfe0000)>>17)&0x7f)<<16;
+    break;
+  case EN_FUNARY32:
+    code=0xC0000040|(code<<21);
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<11;
+    code|=cc<<7;
+    break;
+  case EN_ARITHR32:
+    code=0xC0000000|(code<<21);
+    code|=p->op[0]->reg<<16;
+    if(p->op[2]){
+      code|=p->op[1]->reg<<11;
+      code|=p->op[2]->reg;
+    }else{
+      code|=p->op[0]->reg<<11;
+      code|=p->op[1]->reg;
+    }      
+    code|=cc<<7;
+    break;
+  case EN_ARITHI32:
+    code=0xC0000040|(code<<21);
+    code|=p->op[0]->reg<<16;
+    if(p->op[2]){
+      code|=p->op[1]->reg<<11;
+      code|=absval(p->op[2]->offset,sec,pc,6,1);
+    }else{
+      code|=p->op[0]->reg<<11;
+      code|=absval(p->op[1]->offset,sec,pc,6,1);
+    }
+    code|=cc<<7;
+    break;
+  case EN_ADDCMPB64:
+    // Large offset: invert CC, place a long branch after
+    // so we really generate the following:
+    //   addcmpb<~cc> d, a, b, skip
+    //   b <destination>
+    // skip:
+    //   <rest of code>
+    m=1;
+    if(cc&1) cc--; else cc++;
+  case EN_ADDCMPB32:
+    code=0x80000000|(code<<14);
+    code|=cc<<24;
+    code|=p->op[0]->reg<<16;
+    if(code&0x4000){
+      code|=absval(p->op[1]->offset,sec,pc,4,1)<<20;
+    }else{
+      code|=p->op[1]->reg<<20;
+    }
+    if(code&0x8000){
+      code|=absval(p->op[2]->offset,sec,pc,6,0)<<8;
+      if(m)
+	code|=4;
+      else
+	code|=((reloffset(p->op[3]->offset,sec,pc,&relocs,16,9,0x1ff)>>1)&0xff);
+    }else{
+      code|=p->op[2]->reg<<10;
+      if(m)
+	code|=4;
+      else
+	code|=((reloffset(p->op[3]->offset,sec,pc,&relocs,16,11,0x7ff)>>1)&0x3ff);
+    }
+    if(m){
+      code2=0x90000000|(14<<24);
+      code2|=((reloffset(p->op[3]->offset,sec,pc+4,&relocs,48,16,0x1fffe)>>1)&0x7fffff);
+      code2|=((reloffset(p->op[3]->offset,sec,pc+4,&relocs,32,7,0xfe0000)>>17)&0x7f)<<16;
+    }
+    break;
+  case EN_ARITHI48:
+    if(cc!=14) cpu_error(3);
+    code=0xE8000000|(code<<21);
+    code|=p->op[0]->reg<<16;
+    code2=absoffset(p->op[1]->offset,sec,pc,&relocs,16,32);
+    break;
+  case EN_ADD48:
+    if(cc!=14) cpu_error(3);
+    if(p->op[2])
+      code2=absoffset(p->op[2]->offset,sec,pc,&relocs,16,32);
+    else
+      code2=absoffset(p->op[1]->offset,sec,pc,&relocs,16,32);
+    /* pseudo sub */
+    if(code==6)
+      code2=-code2;
+    code=0xEC000000;
+    code|=p->op[0]->reg<<16;
+    if(p->op[2])
+      code|=p->op[1]->reg<<21;
+    else
+      code|=p->op[0]->reg<<21;
+    break;
+  case EN_MEMREG16:
+    if(cc!=14) cpu_error(3);
+    code=0x08000000|(code<<24);
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<20;
+    ww=0; /*FIXME*/
+    code|=ww<<25;
+    break;
+  case EN_MEMSTACK16:
+    if(cc!=14) cpu_error(3);
+    code=0x04000000|(code<<25);
+    code|=p->op[0]->reg<<16;
+    code|=(absval(p->op[1]->offset,sec,pc,7,1)>>2)<<20;
+    break;
+  case EN_MEMDISP16:
+    if(cc!=14) cpu_error(3);
+    code=0x20000000|(code<<28);
+    code|=p->op[0]->reg<<16;
+    code|=(absval(p->op[1]->offset,sec,pc,6,0)>>2)<<24;
+    code|=p->op[1]->reg<<20;
+    break;
+  case EN_LEA16:
+    if(cc!=14) cpu_error(3);
+    code=0x10000000;
+    code|=p->op[0]->reg<<16;
+    code|=(absval(p->op[1]->offset,sec,pc,8,1)>>2)<<21;
+    break;
+  case EN_LEA48:
+    if(cc!=14) cpu_error(3);
+    code=0xE5000000|(p->op[0]->reg<<16);
+    code2=reloffset(p->op[1]->offset,sec,pc,&relocs,16,32,0xffffffff);
+    break;
+  case EN_MEM48:
+    if(cc!=14) cpu_error(3);
+    code=0xE6000000|(code<<21);
+    code|=p->op[0]->reg<<16;
+    if(p->op[1]->reg==31)
+      code2=reloffset(p->op[1]->offset,sec,pc,&relocs,16,27,0xffffffff)&0x7ffffff;
+    else
+      /* TODO: other relocs */
+      code2=absoffset(p->op[1]->offset,sec,pc,&relocs,16,27)&0x7ffffff;
+    code2|=p->op[1]->reg<<27;
+    break;
+  case EN_MEMREG32:
+    code=0xA0000000|(code<<21);
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<11;
+    code|=p->op[1]->dreg;
+    code|=cc<<7;
+    break;
+  case EN_MEMDISP32:
+    code=0xA0000040|(code<<21);
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<11;
+    code|=absval(p->op[1]->offset,sec,pc,5,1);
+    code|=cc<<7;
+    break;
+  case EN_MEMPREDEC:
+  case EN_MEMPOSTINC:
+    code<<=21;
+    if(p->op[1]->type==OP_POSTINC)
+      code|=0xA5000000;
+    else
+      code|=0xA4000000;
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<11;
+    code|=cc<<7;
+    break;
+  case EN_MEM12DISP32:
+    if(cc!=14) cpu_error(3);
+    code=0xA2000000|(code<<21);
+    code|=p->op[0]->reg<<16;
+    code|=p->op[1]->reg<<11;
+    code|=absval(p->op[1]->offset,sec,pc,12,1)&0x7ff;
+    code|=(absval(p->op[1]->offset,sec,pc,12,1)&0x800)<<13;
+    break;
+  case EN_MEM16DISP32:
+    if(cc!=14) cpu_error(3);
+    code|=p->op[0]->reg<<16;
+    if((code&0xff000000)==0xaa000000)
+      code|=reloffset(p->op[1]->offset,sec,pc,&relocs,16,16,0xffff)&0xffff;
+    else
+      code|=absval(p->op[1]->offset,sec,pc,16,1);
+    break;
+  case EN_VLOAD48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<22)|(7<<7)|p->op[1]->reg;
+    break;
+  case EN_VSTORE48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<12)|(7<<7)|p->op[1]->reg;
+    break;
+  case EN_VREAD48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<22)|p->op[1]->reg;
+    break;
+  case EN_VWRITE48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<12)|p->op[1]->reg;
+    break;
+  case EN_VREADI48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<22)|absval(p->op[1]->offset,sec,pc,6,0)|(1<<10);
+    break;
+  case EN_VWRITEI48:
+    code=0xF0000000|(code<<19);
+    code2=(p->op[0]->reg<<12)|absval(p->op[1]->offset,sec,pc,6,0)|(1<<10);
+    break;
+  case EN_VARITHR48:
+    if(code<48) code|=64;
+    code=0xF4000000|(code<<19);
+    if(p->op[2]){
+      code2=(p->op[0]->reg<<22)|(p->op[1]->reg<<12)|p->op[2]->reg;
+    }else{
+      code2=(p->op[0]->reg<<22)|p->op[1]->reg;
+    }
+    break;
+  case EN_VARITHI48:
+    if(code<48) code|=64;
+    code=0xF4000000|(code<<19);
+    if(p->op[2]){
+      code2=(p->op[0]->reg<<22)|(p->op[1]->reg<<12)|absval(p->op[2]->offset,sec,pc,6,0)|(1<<10);
+    }else{
+      code2=(p->op[0]->reg<<22)|absval(p->op[1]->offset,sec,pc,6,0)|(1<<10);
+    }
+    break;
+  // TODO: Check these!
+  case EN_VLOAD80:
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    code2=(p->op[0]->reg<<22);
+    code3=(p->op[1]->reg<<2)|(p->op[0]->dreg<<26)|((p->op[1]->dreg)<<22);
+    if(p->op[1]->offset){
+      code2|=(absval(p->op[1]->offset,sec,pc,16,1)&0x7f);
+      code3|=(absval(p->op[1]->offset,sec,pc,16,1)>>7)&3;
+      code3|=((absval(p->op[1]->offset,sec,pc,16,1)>>9)&0x7f)<<6;
+    }
+    break;
+  case EN_VSTORE80:
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    code2=(p->op[0]->reg<<12);
+    code3=(p->op[1]->reg<<2)|(p->op[0]->dreg<<20)|((p->op[1]->dreg)<<28);
+    if(p->op[1]->offset){
+      code2|=(absval(p->op[1]->offset,sec,pc,16,1)&0x7f);
+      code3|=(absval(p->op[1]->offset,sec,pc,16,1)>>7)&3;
+      code3|=((absval(p->op[1]->offset,sec,pc,16,1)>>9)&0x7f)<<6;
+    }
+    break;
+  case EN_VREAD80:
+    if(p->op[1]->offset){
+      p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+      p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7)&3;
+    }
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    code2=(p->op[0]->reg<<22)|(p->op[1]->reg);
+    if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+    code3=(p->op[0]->dreg<<26)|(p->op[1]->dreg);
+    code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    break;
+  case EN_VWRITE80:
+    if(p->op[1]->offset){
+      p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+      p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7)&3;
+    }
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    code2=(p->op[0]->reg<<12)|(p->op[1]->reg);
+    if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+    code3=((p->op[0]->dreg&0x3f)<<20)|((p->op[0]->dreg&0x3c0)<<10)|(p->op[1]->dreg);
+    code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    break;
+  case EN_VREADI80:
+    if(p->op[1]->offset){
+      p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+      p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7)&3;
+    }
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+    code2=(p->op[0]->reg<<22)|(1<<10)|(absval(p->op[1]->offset,sec,pc,16,0)&0x3ff);
+    code3=(p->op[0]->dreg<<26)|((absval(p->op[1]->offset,sec,pc,16,0)>>10)&0x3f);
+    code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    break;
+  case EN_VWRITEI80:
+    if(p->op[1]->offset){
+      p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+      p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7)&3;
+    }
+    code=0xF8000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+    if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+    code2=(p->op[0]->reg<<12)|(1<<10)|(absval(p->op[1]->offset,sec,pc,16,0)&0x3ff);
+    code3=((p->op[0]->dreg&0x3f)<<20)|((p->op[0]->dreg&0x3c0)<<10)|((absval(p->op[1]->offset,sec,pc,16,0)>>10)&0x3f);
+    code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    break;
+  case EN_VARITHR80:
+    if(code<48) code|=64;
+    if(p->op[2]){
+      if(p->op[2]->offset){
+	p->op[2]->reg|=(absval(p->op[2]->offset,sec,pc,9,1)&0x7f);
+	p->op[2]->dreg|=(absval(p->op[2]->offset,sec,pc,9,1)>>7)&3;
+      }
+      code=0xFC000000|(code<<19)|(p->op[2]->vecmod&0x70000);
+      code2=(p->op[0]->reg<<22)|(p->op[1]->reg<<12)|(p->op[2]->reg);
+      if(p->op[2]->vecmod&(1<<20)) code2|=(1<<11);
+      code3=(p->op[0]->dreg<<26)|((p->op[1]->dreg&0x3f)<<20)|((p->op[1]->dreg&0x3c0)<<10)|(p->op[2]->dreg);
+      code3|=(p->op[2]->vecmod&0x3fff)<<6;
+    }else{
+      if(p->op[1]->offset){
+	p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+	p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7)&3;
+      }
+      code=0xFC000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+      code2=(p->op[0]->reg<<22)|(p->op[1]->reg);
+      if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+      code3=(p->op[0]->dreg<<26)|(p->op[1]->dreg);
+      code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    }
+    break;
+  case EN_VARITHI80:
+    if(code<48) code|=64;
+    if(p->op[2]){
+      if(p->op[2]->offset){
+	p->op[2]->reg|=(absval(p->op[2]->offset,sec,pc,9,1)&0x7f);
+	p->op[2]->dreg|=(absval(p->op[2]->offset,sec,pc,9,1)>>7);
+      }
+      code=0xFC000000|(code<<19)|(p->op[2]->vecmod&0x70000);
+      if(p->op[2]->vecmod&(1<<20)) code2|=(1<<11);
+      code2=(p->op[0]->reg<<22)|(p->op[1]->reg<<12)|(1<<10)|(absval(p->op[2]->offset,sec,pc,16,0)&0x3ff);
+      code3=(p->op[0]->dreg<<26)|((p->op[1]->dreg&0x3f)<<20)|((p->op[1]->dreg&0x3c0)<<10)|((absval(p->op[2]->offset,sec,pc,16,0)>>10)&0x3f);
+      code3|=(p->op[2]->vecmod&0x3fff)<<6;
+    }else{
+      if(p->op[1]->offset){
+	p->op[1]->reg|=(absval(p->op[1]->offset,sec,pc,9,1)&0x7f);
+	p->op[1]->dreg|=(absval(p->op[1]->offset,sec,pc,9,1)>>7);
+      }
+      code=0xFC000000|(code<<19)|(p->op[1]->vecmod&0x70000);
+      if(p->op[1]->vecmod&(1<<20)) code2|=(1<<11);
+      code2=(p->op[0]->reg<<22)|(1<<10)|(absval(p->op[1]->offset,sec,pc,16,0)&0x3ff);
+      code3=(p->op[0]->dreg<<26)|((absval(p->op[1]->offset,sec,pc,16,0)>>10)&0x3f);
+      code3|=(p->op[1]->vecmod&0x3fff)<<6;
+    }
+    break;
+  default:
+    ierror(0);
+  }
+
+  if(enc>=EN_VLOAD48&&enc<=EN_VARITHI48){
+    db->data[0]=(code>>16)&0xff;
+    db->data[1]=(code>>24)&0xff;
+    db->data[3]=(code2>>24)&0xff;
+    db->data[2]=(code2>>16)&0xff;
+    db->data[5]=(code2>>8)&0xff;
+    db->data[4]=(code2>>0)&0xff;
+  }else if(sz==2){
+    db->data[0]=(code>>16)&0xff;
+    db->data[1]=(code>>24)&0xff;
+  }else if(sz==4){
+    db->data[1]=(code>>24)&0xff;
+    db->data[0]=(code>>16)&0xff;
+    db->data[3]=(code>>8)&0xff;
+    db->data[2]=(code)&0xff;
+  }else if(sz==6){
+    db->data[0]=(code>>16)&0xff;
+    db->data[1]=(code>>24)&0xff;
+    db->data[5]=(code2>>24)&0xff;
+    db->data[4]=(code2>>16)&0xff;
+    db->data[3]=(code2>>8)&0xff;
+    db->data[2]=(code2>>0)&0xff;
+  }
+  else if(sz==8){
+    db->data[1]=(code>>24)&0xff;
+    db->data[0]=(code>>16)&0xff;
+    db->data[3]=(code>>8)&0xff;
+    db->data[2]=(code)&0xff;
+    db->data[5]=(code2>>24)&0xff;
+    db->data[4]=(code2>>16)&0xff;
+    db->data[7]=(code2>>8)&0xff;
+    db->data[6]=(code2)&0xff;
+  }else if(sz==10){
+    db->data[0]=(code>>16)&0xff;
+    db->data[1]=(code>>24)&0xff;
+    db->data[3]=(code2>>24)&0xff;
+    db->data[2]=(code2>>16)&0xff;
+    db->data[5]=(code2>>8)&0xff;
+    db->data[4]=(code2>>0)&0xff;
+    db->data[7]=(code3>>24)&0xff;
+    db->data[6]=(code3>>16)&0xff;
+    db->data[9]=(code3>>8)&0xff;
+    db->data[8]=(code3>>0)&0xff;
+  }
+  db->relocs=relocs;
+  return db;
+}
+
+/* Create a dblock (with relocs, if necessary) for size bits of data. */
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
+{
+  dblock *new=new_dblock();
+  taddr val;
+  new->size=(bitsize+7)/8;
+  new->data=mymalloc(new->size);
+  if(op->type!=OP_ABS)
+    ierror(0);
+  if(bitsize!=8&&bitsize!=16&&bitsize!=32)
+    cpu_error(2);
+  val=absoffset(op->offset,sec,pc,&new->relocs,0,bitsize);
+  if(bitsize==32){
+    new->data[3]=val>>24;
+    new->data[2]=val>>16;    
+    new->data[1]=val>>8;
+    new->data[0]=val;        
+  }else if(bitsize==16){
+    new->data[1]=val>>8;
+    new->data[0]=val;    
+  }else
+    new->data[0]=val;
+  return new;
+}                                     
+
+
+/* Calculate the size of the current instruction; must be identical
+   to the data created by eval_instruction. */
+size_t instruction_size(instruction *p,section *sec,taddr pc)
+{
+  int c;
+  c=translate(p,sec,pc);
+  return oplen(mnemonics[c].ext.encoding);
+}
+
+operand *new_operand()
+{
+  operand *new=mymalloc(sizeof(*new));
+  new->type=-1;
+  return new;
+}
+
+/* return true, if initialization was successfull */
+int init_cpu()
+{
+  return 1;
+}
+
+/* return true, if the passed argument is understood */
+int cpu_args(char *p)
+{
+  return 0;
+}
+
+/* parse cpu-specific directives; return pointer to end of
+   cpu-specific text */
+char *parse_cpu_special(char *s)
+{
+  char *name=s,*merk=s;
+
+  return merk;
+}
+
+int set_default_qualifiers(char **q,int *q_len)
+/* fill in pointers to default qualifiers, return number of qualifiers */
+{
+  q[0]="u32";
+  q_len[0]=3;
+  q[1]="";
+  q_len[1]=0;
+  return 2;
+}
+
+char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
+                        int *ext_cnt)
+/* parse instruction and save extension locations */
+{
+  char *inst = s, l, i;
+  int cnt = 0;
+
+  while (*s && *s!='.' && !isspace((unsigned char)*s))
+    s++;
+  l = s - inst;
+
+  if(strncasecmp("divs",inst,l)&&strncmp("vreadacc",inst,l)&&
+     strncasecmp("vcmpge",inst,l)){
+    for(i=0;i<16;i++){
+      int cl=strlen(ccs[i]);
+      if(l>cl&&!strncasecmp(s-cl,ccs[i],cl)){
+	ext[0]=s-cl;
+	ext_len[0]=cl;
+	cnt=1;
+	l-=cl;
+	break;
+      }
+    }
+  }
+
+  *ext_cnt = cnt;
+
+  *inst_len=l;
+
+  return s;
+}
diff --git a/cpus/vidcore/cpu.h b/cpus/vidcore/cpu.h
new file mode 100644
index 0000000..e145bed
--- /dev/null
+++ b/cpus/vidcore/cpu.h
@@ -0,0 +1,142 @@
+/* cpu.h VideoCore IV cpu-description header-file */
+/* (c) in 2013 by Volker Barthelmann */
+
+
+/* maximum number of operands in one mnemonic */
+#define MAX_OPERANDS 4
+
+/* maximum number of mnemonic-qualifiers per mnemonic */
+#define MAX_QUALIFIERS 2
+
+/* maximum number of additional command-line-flags for this cpu */
+
+/* data type to represent a target-address */
+typedef int32_t taddr;
+typedef uint32_t utaddr;
+
+#define LITTLEENDIAN 1
+#define BIGENDIAN 0
+#define VASM_CPU_VC4 1
+
+/* minimum instruction alignment */
+#define INST_ALIGN 2
+
+/* default alignment for n-bit data */
+#define DATA_ALIGN(n) ((n)<=8?1:(n<=16?2:4))
+
+/* operand class for n-bit data definitions */
+#define DATA_OPERAND(n) OP_ABS
+
+#define cc reg
+
+/* type to store each operand */
+typedef struct {
+  int type;
+  int reg;
+  int dreg;
+  long vecmod;
+  expr *offset;
+} operand;
+
+/* vecmod:
+   0-15: f_i or add-reg for vload/vstore
+   16-18: rep
+   20: setf
+   
+   for 80-bit 'A' registers, 'dreg' is formatted as
+   0-5: flags
+   6-9: ra_x
+*/
+
+/* operand-types */
+enum {
+  OP_REG=1,
+  OP_SREG,
+  OP_PC,
+  OP_LR,
+  OP_MREG,
+  OP_VREG,
+  OP_VREGA80,
+  OP_VREGM,
+  OP_VREGMM,
+  OP_ABS,
+  OP_REL,
+  OP_IMM4,
+  OP_IMM5,
+  OP_IMM6,
+  OP_IMM32M,
+  OP_IMM32,
+  OP_REGIND,
+  OP_IMMINDPC,
+  OP_IMMINDSP,
+  OP_IMMINDSD,
+  OP_IMMINDR0,
+  OP_IMMINDS,
+  OP_IMMIND,
+  OP_PREDEC,
+  OP_POSTINC,
+  OP_IND,
+  OP_VIND,
+  OP_DISP5,
+  OP_DISP12,
+  OP_DISP16,
+  OP_DISP27,
+};
+
+
+#define CPU_VC4 1
+#define CPU_ALL  (-1)
+
+enum {
+  EN_ARITHR16,
+  EN_ARITHI16,
+  EN_FIX16,
+  EN_LEA16,
+  EN_IBRANCH16,
+  EN_RBRANCH16,
+  EN_TABLE16,
+  EN_MREG16,
+  EN_MEMSTACK16,
+  EN_MEMREG16,
+  EN_MEMDISP16,
+  EN_CONDR32,
+  EN_CONDI32,
+  EN_RBRANCH32,
+  EN_ADDCMPB32,
+  EN_MEMREG32,
+  EN_MEMDISP32,
+  EN_MEMPREDEC,
+  EN_MEMPOSTINC,
+  EN_MEM12DISP32,
+  EN_MEM16DISP32,
+  EN_FUNARY32,
+  EN_ARITHR32,
+  EN_ARITHI32,
+  EN_LEA48,
+  EN_MEM48,
+  EN_ARITHI48,
+  EN_ADD48,
+  EN_VLOAD48,
+  EN_VSTORE48,
+  EN_VREAD48,
+  EN_VWRITE48,
+  EN_VREADI48,
+  EN_VWRITEI48,
+  EN_VARITHR48,
+  EN_VARITHI48,
+  EN_ADDCMPB64,
+  EN_VLOAD80,
+  EN_VSTORE80,
+  EN_VREAD80,
+  EN_VWRITE80,
+  EN_VREADI80,
+  EN_VWRITEI80,
+  EN_VARITHR80,
+  EN_VARITHI80,
+};
+
+typedef struct {
+  unsigned int encoding;
+  unsigned int code;
+  unsigned int available;
+} mnemonic_extension;
diff --git a/cpus/vidcore/cpu_errors.h b/cpus/vidcore/cpu_errors.h
new file mode 100644
index 0000000..3ecde18
--- /dev/null
+++ b/cpus/vidcore/cpu_errors.h
@@ -0,0 +1,5 @@
+  "illegal operand",ERROR,
+  "value does not find in %d bits",WARNING,
+  "data size not supported",ERROR,
+  "condition not allowed here",ERROR,
+  "Invalid increment",ERROR,
diff --git a/cpus/vidcore/opcodes.h b/cpus/vidcore/opcodes.h
new file mode 100644
index 0000000..4c4f490
--- /dev/null
+++ b/cpus/vidcore/opcodes.h
@@ -0,0 +1,1041 @@
+"mov",OP_SREG,OP_SREG,0,0,EN_ARITHR16,0,CPU_ALL,
+  "mov",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,0,CPU_ALL,
+  "mov",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,0,CPU_ALL,
+  "mov",OP_REG,OP_REG,0,0,EN_ARITHR32,0,CPU_ALL,
+  "mov",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,0,CPU_ALL,
+  "mov",OP_REG,OP_IMM5,0,0,EN_ARITHI32,0,CPU_ALL,
+  "mov",OP_REG,OP_IMM32,0,0,EN_ARITHI48,0,CPU_ALL,
+
+  "cmn",OP_SREG,OP_SREG,0,0,EN_ARITHR16,1,CPU_ALL,
+  "cmn",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,1,CPU_ALL,
+  "cmn",OP_REG,OP_REG,0,0,EN_ARITHR32,1,CPU_ALL,
+  "cmn",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,1,CPU_ALL,
+  "cmn",OP_REG,OP_IMM5,0,0,EN_ARITHI32,1,CPU_ALL,
+  "cmn",OP_REG,OP_IMM32,0,0,EN_ARITHI48,1,CPU_ALL,
+
+  "add",OP_SREG,OP_SREG,0,0,EN_ARITHR16,2,CPU_ALL,
+  "add",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,2,CPU_ALL,
+  "add",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,2,CPU_ALL,
+  "add",OP_REG,OP_REG,0,0,EN_ARITHR32,2,CPU_ALL,
+  "add",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,2,CPU_ALL,
+  "add",OP_REG,OP_IMM5,0,0,EN_ARITHI32,2,CPU_ALL,
+  "add",OP_REG,OP_IMM32,0,0,EN_ARITHI48,2,CPU_ALL,
+  "add",OP_REG,OP_REG,OP_IMM32,0,EN_ADD48,2,CPU_ALL,
+
+
+  "bic",OP_SREG,OP_SREG,0,0,EN_ARITHR16,3,CPU_ALL,
+  "bic",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,3,CPU_ALL,
+  "bic",OP_REG,OP_REG,0,0,EN_ARITHR32,3,CPU_ALL,
+  "bic",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,3,CPU_ALL,
+  "bic",OP_REG,OP_IMM5,0,0,EN_ARITHI32,3,CPU_ALL,
+  "bic",OP_REG,OP_IMM32,0,0,EN_ARITHI48,3,CPU_ALL,
+
+  "mul",OP_SREG,OP_SREG,0,0,EN_ARITHR16,4,CPU_ALL,
+  "mul",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,4,CPU_ALL,
+  "mul",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,4,CPU_ALL,
+  "mul",OP_REG,OP_REG,0,0,EN_ARITHR32,4,CPU_ALL,
+  "mul",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,4,CPU_ALL,
+  "mul",OP_REG,OP_IMM5,0,0,EN_ARITHI32,4,CPU_ALL,
+  "mul",OP_REG,OP_IMM32,0,0,EN_ARITHI48,4,CPU_ALL,
+
+  "eor",OP_SREG,OP_SREG,0,0,EN_ARITHR16,5,CPU_ALL,
+  "eor",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,5,CPU_ALL,
+  "eor",OP_REG,OP_REG,0,0,EN_ARITHR32,5,CPU_ALL,
+  "eor",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,5,CPU_ALL,
+  "eor",OP_REG,OP_IMM5,0,0,EN_ARITHI32,5,CPU_ALL,
+  "eor",OP_REG,OP_IMM32,0,0,EN_ARITHI48,5,CPU_ALL,
+
+  "sub",OP_SREG,OP_SREG,0,0,EN_ARITHR16,6,CPU_ALL,
+  "sub",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,6,CPU_ALL,
+  "sub",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,6,CPU_ALL,
+  "sub",OP_REG,OP_REG,0,0,EN_ARITHR32,6,CPU_ALL,
+  "sub",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,6,CPU_ALL,
+  "sub",OP_REG,OP_IMM5,0,0,EN_ARITHI32,6,CPU_ALL,
+  "sub",OP_REG,OP_IMM32,0,0,EN_ARITHI48,6,CPU_ALL,
+  "sub",OP_REG,OP_REG,OP_IMM32,0,EN_ADD48,6,CPU_ALL,
+
+  "and",OP_SREG,OP_SREG,0,0,EN_ARITHR16,7,CPU_ALL,
+  "and",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,7,CPU_ALL,
+  "and",OP_REG,OP_REG,0,0,EN_ARITHR32,7,CPU_ALL,
+  "and",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,7,CPU_ALL,
+  "and",OP_REG,OP_IMM5,0,0,EN_ARITHI32,7,CPU_ALL,
+  "and",OP_REG,OP_IMM32,0,0,EN_ARITHI48,7,CPU_ALL,
+
+  "mvn",OP_SREG,OP_SREG,0,0,EN_ARITHR16,8,CPU_ALL,
+  "mvn",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,8,CPU_ALL,
+  "mvn",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,8,CPU_ALL,
+  "mvn",OP_REG,OP_REG,0,0,EN_ARITHR32,8,CPU_ALL,
+  "mvn",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,8,CPU_ALL,
+  "mvn",OP_REG,OP_IMM5,0,0,EN_ARITHI32,8,CPU_ALL,
+  "mvn",OP_REG,OP_IMM32,0,0,EN_ARITHI48,8,CPU_ALL,
+  // Alternate name
+  "not",OP_SREG,OP_SREG,0,0,EN_ARITHR16,8,CPU_ALL,
+  "not",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,8,CPU_ALL,
+  "not",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,8,CPU_ALL,
+  "not",OP_REG,OP_REG,0,0,EN_ARITHR32,8,CPU_ALL,
+  "not",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,8,CPU_ALL,
+  "not",OP_REG,OP_IMM5,0,0,EN_ARITHI32,8,CPU_ALL,
+  "not",OP_REG,OP_IMM32,0,0,EN_ARITHI48,8,CPU_ALL,
+
+  "ror",OP_SREG,OP_SREG,0,0,EN_ARITHR16,9,CPU_ALL,
+  "ror",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,9,CPU_ALL,
+  "ror",OP_REG,OP_REG,0,0,EN_ARITHR32,9,CPU_ALL,
+  "ror",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,9,CPU_ALL,
+  "ror",OP_REG,OP_IMM5,0,0,EN_ARITHI32,9,CPU_ALL,
+  "ror",OP_REG,OP_IMM32,0,0,EN_ARITHI48,9,CPU_ALL,
+
+  "cmp",OP_SREG,OP_SREG,0,0,EN_ARITHR16,10,CPU_ALL,
+  "cmp",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,10,CPU_ALL,
+  "cmp",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,10,CPU_ALL,
+  "cmp",OP_REG,OP_REG,0,0,EN_ARITHR32,10,CPU_ALL,
+  "cmp",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,10,CPU_ALL,
+  "cmp",OP_REG,OP_IMM5,0,0,EN_ARITHI32,10,CPU_ALL,
+  "cmp",OP_REG,OP_IMM32,0,0,EN_ARITHI48,10,CPU_ALL,
+
+  "rsb",OP_SREG,OP_SREG,0,0,EN_ARITHR16,11,CPU_ALL,
+  "rsb",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,11,CPU_ALL,
+  "rsb",OP_REG,OP_REG,0,0,EN_ARITHR32,11,CPU_ALL,
+  "rsb",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,11,CPU_ALL,
+  "rsb",OP_REG,OP_IMM5,0,0,EN_ARITHI32,11,CPU_ALL,
+  "rsb",OP_REG,OP_IMM32,0,0,EN_ARITHI48,11,CPU_ALL,
+
+  "btst",OP_SREG,OP_SREG,0,0,EN_ARITHR16,12,CPU_ALL,
+  "btst",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,12,CPU_ALL,
+  "btst",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,12,CPU_ALL,
+  "btst",OP_REG,OP_REG,0,0,EN_ARITHR32,12,CPU_ALL,
+  "btst",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,12,CPU_ALL,
+  "btst",OP_REG,OP_IMM5,0,0,EN_ARITHI32,12,CPU_ALL,
+  "btst",OP_REG,OP_IMM32,0,0,EN_ARITHI48,12,CPU_ALL,
+
+  "or",OP_SREG,OP_SREG,0,0,EN_ARITHR16,13,CPU_ALL,
+  "or",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,13,CPU_ALL,
+  "or",OP_REG,OP_REG,0,0,EN_ARITHR32,13,CPU_ALL,
+  "or",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,13,CPU_ALL,
+  "or",OP_REG,OP_IMM5,0,0,EN_ARITHI32,13,CPU_ALL,
+  "or",OP_REG,OP_IMM32,0,0,EN_ARITHI48,13,CPU_ALL,
+
+  "extu",OP_SREG,OP_SREG,0,0,EN_ARITHR16,14,CPU_ALL,
+  "extu",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,14,CPU_ALL,
+  "extu",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,14,CPU_ALL,
+  "extu",OP_REG,OP_REG,0,0,EN_ARITHR32,14,CPU_ALL,
+  "extu",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,14,CPU_ALL,
+  "extu",OP_REG,OP_IMM5,0,0,EN_ARITHI32,14,CPU_ALL,
+  "extu",OP_REG,OP_IMM32,0,0,EN_ARITHI48,14,CPU_ALL,
+
+  "max",OP_SREG,OP_SREG,0,0,EN_ARITHR16,15,CPU_ALL,
+  "max",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,15,CPU_ALL,
+  "max",OP_REG,OP_REG,0,0,EN_ARITHR32,15,CPU_ALL,
+  "max",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,15,CPU_ALL,
+  "max",OP_REG,OP_IMM5,0,0,EN_ARITHI32,15,CPU_ALL,
+  "max",OP_REG,OP_IMM32,0,0,EN_ARITHI48,15,CPU_ALL,
+
+  "bset",OP_SREG,OP_SREG,0,0,EN_ARITHR16,16,CPU_ALL,
+  "bset",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,16,CPU_ALL,
+  "bset",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,16,CPU_ALL,
+  "bset",OP_REG,OP_REG,0,0,EN_ARITHR32,16,CPU_ALL,
+  "bset",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,16,CPU_ALL,
+  "bset",OP_REG,OP_IMM5,0,0,EN_ARITHI32,16,CPU_ALL,
+  "bset",OP_REG,OP_IMM32,0,0,EN_ARITHI48,16,CPU_ALL,
+
+  "min",OP_SREG,OP_SREG,0,0,EN_ARITHR16,17,CPU_ALL,
+  "min",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,17,CPU_ALL,
+  "min",OP_REG,OP_REG,0,0,EN_ARITHR32,17,CPU_ALL,
+  "min",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,17,CPU_ALL,
+  "min",OP_REG,OP_IMM5,0,0,EN_ARITHI32,17,CPU_ALL,
+  "min",OP_REG,OP_IMM32,0,0,EN_ARITHI48,17,CPU_ALL,
+
+  "bclr",OP_SREG,OP_SREG,0,0,EN_ARITHR16,18,CPU_ALL,
+  "bclr",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,18,CPU_ALL,
+  "bclr",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,18,CPU_ALL,
+  "bclr",OP_REG,OP_REG,0,0,EN_ARITHR32,18,CPU_ALL,
+  "bclr",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,18,CPU_ALL,
+  "bclr",OP_REG,OP_IMM5,0,0,EN_ARITHI32,18,CPU_ALL,
+  "bclr",OP_REG,OP_IMM32,0,0,EN_ARITHI48,18,CPU_ALL,
+
+  "adds2",OP_SREG,OP_SREG,0,0,EN_ARITHR16,19,CPU_ALL,
+  "adds2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,19,CPU_ALL,
+  "adds2",OP_REG,OP_REG,0,0,EN_ARITHR32,19,CPU_ALL,
+  "adds2",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,19,CPU_ALL,
+  "adds2",OP_REG,OP_IMM5,0,0,EN_ARITHI32,19,CPU_ALL,
+  "adds2",OP_REG,OP_IMM32,0,0,EN_ARITHI48,19,CPU_ALL,
+  // Alternate name
+  "addscale2",OP_SREG,OP_SREG,0,0,EN_ARITHR16,19,CPU_ALL,
+  "addscale2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,19,CPU_ALL,
+  "addscale2",OP_REG,OP_REG,0,0,EN_ARITHR32,19,CPU_ALL,
+  "addscale2",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,19,CPU_ALL,
+  "addscale2",OP_REG,OP_IMM5,0,0,EN_ARITHI32,19,CPU_ALL,
+  "addscale2",OP_REG,OP_IMM32,0,0,EN_ARITHI48,19,CPU_ALL,
+
+  "bchg",OP_SREG,OP_SREG,0,0,EN_ARITHR16,20,CPU_ALL,
+  "bchg",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,20,CPU_ALL,
+  "bchg",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,20,CPU_ALL,
+  "bchg",OP_REG,OP_REG,0,0,EN_ARITHR32,20,CPU_ALL,
+  "bchg",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,20,CPU_ALL,
+  "bchg",OP_REG,OP_IMM5,0,0,EN_ARITHI32,20,CPU_ALL,
+  "bchg",OP_REG,OP_IMM32,0,0,EN_ARITHI48,20,CPU_ALL,
+
+  "adds4",OP_SREG,OP_SREG,0,0,EN_ARITHR16,21,CPU_ALL,
+  "adds4",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,21,CPU_ALL,
+  "adds4",OP_REG,OP_REG,0,0,EN_ARITHR32,21,CPU_ALL,
+  "adds4",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,21,CPU_ALL,
+  "adds4",OP_REG,OP_IMM5,0,0,EN_ARITHI32,21,CPU_ALL,
+  "adds4",OP_REG,OP_IMM32,0,0,EN_ARITHI48,21,CPU_ALL,
+  // Alternate name
+  "addscale4",OP_SREG,OP_SREG,0,0,EN_ARITHR16,21,CPU_ALL,
+  "addscale4",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,21,CPU_ALL,
+  "addscale4",OP_REG,OP_REG,0,0,EN_ARITHR32,21,CPU_ALL,
+  "addscale4",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,21,CPU_ALL,
+  "addscale4",OP_REG,OP_IMM5,0,0,EN_ARITHI32,21,CPU_ALL,
+  "addscale4",OP_REG,OP_IMM32,0,0,EN_ARITHI48,21,CPU_ALL,
+
+  "adds8",OP_SREG,OP_SREG,0,0,EN_ARITHR16,22,CPU_ALL,
+  "adds8",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,22,CPU_ALL,
+  "adds8",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,22,CPU_ALL,
+  "adds8",OP_REG,OP_REG,0,0,EN_ARITHR32,22,CPU_ALL,
+  "adds8",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,22,CPU_ALL,
+  "adds8",OP_REG,OP_IMM5,0,0,EN_ARITHI32,22,CPU_ALL,
+  "adds8",OP_REG,OP_IMM32,0,0,EN_ARITHI48,22,CPU_ALL,
+  // Alternate name
+  "addscale8",OP_SREG,OP_SREG,0,0,EN_ARITHR16,22,CPU_ALL,
+  "addscale8",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,22,CPU_ALL,
+  "addscale8",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,22,CPU_ALL,
+  "addscale8",OP_REG,OP_REG,0,0,EN_ARITHR32,22,CPU_ALL,
+  "addscale8",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,22,CPU_ALL,
+  "addscale8",OP_REG,OP_IMM5,0,0,EN_ARITHI32,22,CPU_ALL,
+  "addscale8",OP_REG,OP_IMM32,0,0,EN_ARITHI48,22,CPU_ALL,
+
+  "adds16",OP_SREG,OP_SREG,0,0,EN_ARITHR16,23,CPU_ALL,
+  "adds16",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,23,CPU_ALL,
+  "adds16",OP_REG,OP_REG,0,0,EN_ARITHR32,23,CPU_ALL,
+  "adds16",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,23,CPU_ALL,
+  "adds16",OP_REG,OP_IMM5,0,0,EN_ARITHI32,23,CPU_ALL,
+  "adds16",OP_REG,OP_IMM32,0,0,EN_ARITHI48,23,CPU_ALL,
+  // Alternate name
+  "addscale16",OP_SREG,OP_SREG,0,0,EN_ARITHR16,23,CPU_ALL,
+  "addscale16",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,23,CPU_ALL,
+  "addscale16",OP_REG,OP_REG,0,0,EN_ARITHR32,23,CPU_ALL,
+  "addscale16",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,23,CPU_ALL,
+  "addscale16",OP_REG,OP_IMM5,0,0,EN_ARITHI32,23,CPU_ALL,
+  "addscale16",OP_REG,OP_IMM32,0,0,EN_ARITHI48,23,CPU_ALL,
+
+  "exts",OP_SREG,OP_SREG,0,0,EN_ARITHR16,24,CPU_ALL,
+  "exts",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,24,CPU_ALL,
+  "exts",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,24,CPU_ALL,
+  "exts",OP_REG,OP_REG,0,0,EN_ARITHR32,24,CPU_ALL,
+  "exts",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,24,CPU_ALL,
+  "exts",OP_REG,OP_IMM5,0,0,EN_ARITHI32,24,CPU_ALL,
+  "exts",OP_REG,OP_IMM32,0,0,EN_ARITHI48,24,CPU_ALL,
+
+  "neg",OP_SREG,OP_SREG,0,0,EN_ARITHR16,25,CPU_ALL,
+  "neg",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,25,CPU_ALL,
+  "neg",OP_REG,OP_REG,0,0,EN_ARITHR32,25,CPU_ALL,
+  "neg",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,25,CPU_ALL,
+  "neg",OP_REG,OP_IMM5,0,0,EN_ARITHI32,25,CPU_ALL,
+  "neg",OP_REG,OP_IMM32,0,0,EN_ARITHI48,25,CPU_ALL,
+
+  "lsr",OP_SREG,OP_SREG,0,0,EN_ARITHR16,26,CPU_ALL,
+  "lsr",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,26,CPU_ALL,
+  "lsr",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,26,CPU_ALL,
+  "lsr",OP_REG,OP_REG,0,0,EN_ARITHR32,26,CPU_ALL,
+  "lsr",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,26,CPU_ALL,
+  "lsr",OP_REG,OP_IMM5,0,0,EN_ARITHI32,26,CPU_ALL,
+  "lsr",OP_REG,OP_IMM32,0,0,EN_ARITHI48,26,CPU_ALL,
+
+  "clz",OP_SREG,OP_SREG,0,0,EN_ARITHR16,27,CPU_ALL,
+  "clz",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,27,CPU_ALL,
+  "clz",OP_REG,OP_REG,0,0,EN_ARITHR32,27,CPU_ALL,
+  "clz",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,27,CPU_ALL,
+  "clz",OP_REG,OP_IMM5,0,0,EN_ARITHI32,27,CPU_ALL,
+  "clz",OP_REG,OP_IMM32,0,0,EN_ARITHI48,27,CPU_ALL,
+
+  "lsl",OP_SREG,OP_SREG,0,0,EN_ARITHR16,28,CPU_ALL,
+  "lsl",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,28,CPU_ALL,
+  "lsl",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,28,CPU_ALL,
+  "lsl",OP_REG,OP_REG,0,0,EN_ARITHR32,28,CPU_ALL,
+  "lsl",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,28,CPU_ALL,
+  "lsl",OP_REG,OP_IMM5,0,0,EN_ARITHI32,28,CPU_ALL,
+  "lsl",OP_REG,OP_IMM32,0,0,EN_ARITHI48,28,CPU_ALL,
+
+  "brev",OP_SREG,OP_SREG,0,0,EN_ARITHR16,29,CPU_ALL,
+  "brev",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,29,CPU_ALL,
+  "brev",OP_REG,OP_REG,0,0,EN_ARITHR32,29,CPU_ALL,
+  "brev",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,29,CPU_ALL,
+  "brev",OP_REG,OP_IMM5,0,0,EN_ARITHI32,29,CPU_ALL,
+  "brev",OP_REG,OP_IMM32,0,0,EN_ARITHI48,29,CPU_ALL,
+
+  "asr",OP_SREG,OP_SREG,0,0,EN_ARITHR16,30,CPU_ALL,
+  "asr",OP_SREG,OP_IMM5,0,0,EN_ARITHI16,30,CPU_ALL,
+  "asr",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,30,CPU_ALL,
+  "asr",OP_REG,OP_REG,0,0,EN_ARITHR32,30,CPU_ALL,
+  "asr",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,30,CPU_ALL,
+  "asr",OP_REG,OP_IMM5,0,0,EN_ARITHI32,30,CPU_ALL,
+  "asr",OP_REG,OP_IMM32,0,0,EN_ARITHI48,30,CPU_ALL,
+
+  "abs",OP_SREG,OP_SREG,0,0,EN_ARITHR16,31,CPU_ALL,
+  "abs",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,31,CPU_ALL,
+  "abs",OP_REG,OP_REG,0,0,EN_ARITHR32,31,CPU_ALL,
+  "abs",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,31,CPU_ALL,
+  "abs",OP_REG,OP_IMM5,0,0,EN_ARITHI32,31,CPU_ALL,
+  "abs",OP_REG,OP_IMM32,0,0,EN_ARITHI48,31,CPU_ALL,
+  
+  "mulhds",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,32,CPU_ALL,
+  "mulhds",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,32,CPU_ALL,
+  "mulhdsu",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,33,CPU_ALL,
+  "mulhdsu",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,33,CPU_ALL,
+  "mulhdus",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,34,CPU_ALL,
+  "mulhdus",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,34,CPU_ALL,
+  "mulhdu",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,35,CPU_ALL,
+  "mulhdu",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,35,CPU_ALL,
+
+  "divs",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,36,CPU_ALL,
+  "divs",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,36,CPU_ALL,
+  "divsu",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,37,CPU_ALL,
+  "divsu",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,37,CPU_ALL,
+  "divus",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,38,CPU_ALL,
+  "divus",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,38,CPU_ALL,
+  "divu",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,39,CPU_ALL,
+  "divu",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,39,CPU_ALL,
+  
+  "adds",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,40,CPU_ALL,
+  "adds",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,40,CPU_ALL,
+  "subs",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,41,CPU_ALL,
+  "subs",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,41,CPU_ALL,
+  "shls",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,42,CPU_ALL,
+  "shls",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,42,CPU_ALL,
+  // Alternate name
+  "lsls",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,42,CPU_ALL,
+  "lsls",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,42,CPU_ALL,
+  
+  "clamp16",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,43,CPU_ALL,
+  "clamp16",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,43,CPU_ALL,
+  
+  // All of the following have alternate names, as well as 2- and 3-arg forms
+  "adds32",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,44,CPU_ALL,
+  "adds32",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,44,CPU_ALL,
+  "adds32",OP_REG,OP_REG,0,0,EN_ARITHR32,44,CPU_ALL,
+  "adds32",OP_REG,OP_IMM5,0,0,EN_ARITHI32,44,CPU_ALL,
+  "addscale32",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,44,CPU_ALL,
+  "addscale32",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,44,CPU_ALL,
+  "addscale32",OP_REG,OP_REG,0,0,EN_ARITHR32,44,CPU_ALL,
+  "addscale32",OP_REG,OP_IMM5,0,0,EN_ARITHI32,44,CPU_ALL,
+  "adds64",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,45,CPU_ALL,
+  "adds64",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,45,CPU_ALL,
+  "adds64",OP_REG,OP_REG,0,0,EN_ARITHR32,45,CPU_ALL,
+  "adds64",OP_REG,OP_IMM5,0,0,EN_ARITHI32,45,CPU_ALL,
+  "addscale64",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,45,CPU_ALL,
+  "addscale64",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,45,CPU_ALL,
+  "addscale64",OP_REG,OP_REG,0,0,EN_ARITHR32,45,CPU_ALL,
+  "addscale64",OP_REG,OP_IMM5,0,0,EN_ARITHI32,45,CPU_ALL,
+  "adds128",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,46,CPU_ALL,
+  "adds128",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,46,CPU_ALL,
+  "adds128",OP_REG,OP_REG,0,0,EN_ARITHR32,46,CPU_ALL,
+  "adds128",OP_REG,OP_IMM5,0,0,EN_ARITHI32,46,CPU_ALL,
+  "addscale128",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,46,CPU_ALL,
+  "addscale128",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,46,CPU_ALL,
+  "addscale128",OP_REG,OP_REG,0,0,EN_ARITHR32,46,CPU_ALL,
+  "addscale128",OP_REG,OP_IMM5,0,0,EN_ARITHI32,46,CPU_ALL,
+  "adds256",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,47,CPU_ALL,
+  "adds256",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,47,CPU_ALL,
+  "adds256",OP_REG,OP_REG,0,0,EN_ARITHR32,47,CPU_ALL,
+  "adds256",OP_REG,OP_IMM5,0,0,EN_ARITHI32,47,CPU_ALL,
+  "addscale256",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,47,CPU_ALL,
+  "addscale256",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,47,CPU_ALL,
+  "addscale256",OP_REG,OP_REG,0,0,EN_ARITHR32,47,CPU_ALL,
+  "addscale256",OP_REG,OP_IMM5,0,0,EN_ARITHI32,47,CPU_ALL,
+  
+  "count",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,48,CPU_ALL,
+  "count",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,48,CPU_ALL,
+  "count",OP_REG,OP_REG,0,0,EN_ARITHR32,48,CPU_ALL,
+  "count",OP_REG,OP_IMM5,0,0,EN_ARITHI32,48,CPU_ALL,
+  "popcnt",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,48,CPU_ALL,
+  "popcnt",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,48,CPU_ALL,
+  "popcnt",OP_REG,OP_REG,0,0,EN_ARITHR32,48,CPU_ALL,
+  "popcnt",OP_REG,OP_IMM5,0,0,EN_ARITHI32,48,CPU_ALL,
+  
+  "subs2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,49,CPU_ALL,
+  "subs2",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,49,CPU_ALL,
+  "subs2",OP_REG,OP_REG,0,0,EN_ARITHR32,49,CPU_ALL,
+  "subs2",OP_REG,OP_IMM5,0,0,EN_ARITHI32,49,CPU_ALL,
+  "subscale2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,49,CPU_ALL,
+  "subscale2",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,49,CPU_ALL,
+  "subscale2",OP_REG,OP_REG,0,0,EN_ARITHR32,49,CPU_ALL,
+  "subscale2",OP_REG,OP_IMM5,0,0,EN_ARITHI32,49,CPU_ALL,
+  "subs4",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,50,CPU_ALL,
+  "subs4",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,50,CPU_ALL,
+  "subs4",OP_REG,OP_REG,0,0,EN_ARITHR32,50,CPU_ALL,
+  "subs4",OP_REG,OP_IMM5,0,0,EN_ARITHI32,50,CPU_ALL,
+  "subscale4",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,50,CPU_ALL,
+  "subscale4",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,50,CPU_ALL,
+  "subscale4",OP_REG,OP_REG,0,0,EN_ARITHR32,50,CPU_ALL,
+  "subscale4",OP_REG,OP_IMM5,0,0,EN_ARITHI32,50,CPU_ALL,
+  "subs8",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,51,CPU_ALL,
+  "subs8",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,51,CPU_ALL,
+  "subs8",OP_REG,OP_REG,0,0,EN_ARITHR32,51,CPU_ALL,
+  "subs8",OP_REG,OP_IMM5,0,0,EN_ARITHI32,51,CPU_ALL,
+  "subscale8",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,51,CPU_ALL,
+  "subscale8",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,51,CPU_ALL,
+  "subscale8",OP_REG,OP_REG,0,0,EN_ARITHR32,51,CPU_ALL,
+  "subscale8",OP_REG,OP_IMM5,0,0,EN_ARITHI32,51,CPU_ALL,
+  "subs16",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,52,CPU_ALL,
+  "subs16",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,52,CPU_ALL,
+  "subs16",OP_REG,OP_REG,0,0,EN_ARITHR32,52,CPU_ALL,
+  "subs16",OP_REG,OP_IMM5,0,0,EN_ARITHI32,52,CPU_ALL,
+  "subscale16",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,52,CPU_ALL,
+  "subscale16",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,52,CPU_ALL,
+  "subscale16",OP_REG,OP_REG,0,0,EN_ARITHR32,52,CPU_ALL,
+  "subscale16",OP_REG,OP_IMM5,0,0,EN_ARITHI32,52,CPU_ALL,
+  "subs32",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,53,CPU_ALL,
+  "subs32",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,53,CPU_ALL,
+  "subs32",OP_REG,OP_REG,0,0,EN_ARITHR32,53,CPU_ALL,
+  "subs32",OP_REG,OP_IMM5,0,0,EN_ARITHI32,53,CPU_ALL,
+  "subscale32",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,53,CPU_ALL,
+  "subscale32",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,53,CPU_ALL,
+  "subscale32",OP_REG,OP_REG,0,0,EN_ARITHR32,53,CPU_ALL,
+  "subscale32",OP_REG,OP_IMM5,0,0,EN_ARITHI32,53,CPU_ALL,
+  "subs64",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,54,CPU_ALL,
+  "subs64",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,54,CPU_ALL,
+  "subs64",OP_REG,OP_REG,0,0,EN_ARITHR32,54,CPU_ALL,
+  "subs64",OP_REG,OP_IMM5,0,0,EN_ARITHI32,54,CPU_ALL,
+  "subscale64",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,54,CPU_ALL,
+  "subscale64",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,54,CPU_ALL,
+  "subscale64",OP_REG,OP_REG,0,0,EN_ARITHR32,54,CPU_ALL,
+  "subscale64",OP_REG,OP_IMM5,0,0,EN_ARITHI32,54,CPU_ALL,
+  "subs128",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,55,CPU_ALL,
+  "subs128",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,55,CPU_ALL,
+  "subs128",OP_REG,OP_REG,0,0,EN_ARITHR32,55,CPU_ALL,
+  "subs128",OP_REG,OP_IMM5,0,0,EN_ARITHI32,55,CPU_ALL,
+  "subscale128",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,55,CPU_ALL,
+  "subscale128",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,55,CPU_ALL,
+  "subscale128",OP_REG,OP_REG,0,0,EN_ARITHR32,55,CPU_ALL,
+  "subscale128",OP_REG,OP_IMM5,0,0,EN_ARITHI32,55,CPU_ALL,
+  "subs256",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,56,CPU_ALL,
+  "subs256",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,56,CPU_ALL,
+  "subs256",OP_REG,OP_REG,0,0,EN_ARITHR32,56,CPU_ALL,
+  "subs256",OP_REG,OP_IMM5,0,0,EN_ARITHI32,56,CPU_ALL,
+  "subscale256",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,56,CPU_ALL,
+  "subscale256",OP_REG,OP_REG,OP_IMM5,0,EN_ARITHI32,56,CPU_ALL,
+  "subscale256",OP_REG,OP_REG,0,0,EN_ARITHR32,56,CPU_ALL,
+  "subscale256",OP_REG,OP_IMM5,0,0,EN_ARITHI32,56,CPU_ALL,
+
+
+  "bkpt",0,0,0,0,EN_FIX16,0x00000000,CPU_ALL,
+  "nop",0,0,0,0,EN_FIX16,0x00010000,CPU_ALL,
+  "sleep",0,0,0,0,EN_FIX16,0x00020000,CPU_ALL,
+  "user",0,0,0,0,EN_FIX16,0x00030000,CPU_ALL,
+  "ei",0,0,0,0,EN_FIX16,0x00040000,CPU_ALL,
+  "di",0,0,0,0,EN_FIX16,0x00050000,CPU_ALL,
+  "cbclr",0,0,0,0,EN_FIX16,0x00060000,CPU_ALL,
+  "cbinc",0,0,0,0,EN_FIX16,0x00070000,CPU_ALL,
+  "cbchg",0,0,0,0,EN_FIX16,0x00080000,CPU_ALL,
+  "cbdec",0,0,0,0,EN_FIX16,0x00090000,CPU_ALL,
+  "rts",0,0,0,0,EN_FIX16,0x005A0000,CPU_ALL,
+  "rti",0,0,0,0,EN_FIX16,0x000A0000,CPU_ALL,
+
+  "b",OP_REG,0,0,0,EN_IBRANCH16,0x00400000,CPU_ALL,
+  "b",OP_REL,0,0,0,EN_RBRANCH16,0,CPU_ALL,
+  "b",OP_REL,0,0,0,EN_RBRANCH32,0x90000000,CPU_ALL,
+
+
+  "bl",OP_REG,0,0,0,EN_IBRANCH16,0x00600000,CPU_ALL,
+  "bl",OP_REL,0,0,0,EN_RBRANCH32,0x90800000,CPU_ALL,
+
+
+  "tbb",OP_REG,0,0,0,EN_IBRANCH16,0x00800000,CPU_ALL,
+  "tbs",OP_REG,0,0,0,EN_IBRANCH16,0x00A00000,CPU_ALL,
+
+  "pop",OP_PC,0,0,0,EN_FIX16,0x036f0000,CPU_ALL,
+  "pop",OP_MREG,0,0,0,EN_MREG16,0x02000000,CPU_ALL,
+  "pop",OP_MREG,OP_PC,0,0,EN_MREG16,0x03000000,CPU_ALL,
+
+  "push",OP_LR,0,0,0,EN_FIX16,0x03ef0000,CPU_ALL,
+  "push",OP_MREG,0,0,0,EN_MREG16,0x02800000,CPU_ALL,
+  "push",OP_MREG,OP_LR,0,0,EN_MREG16,0x03800000,CPU_ALL,
+
+  "ldb",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,4,CPU_ALL,
+  "ldb",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,4,CPU_ALL,
+  "ldb",OP_REG,OP_REGIND,0,0,EN_MEMREG32,4,CPU_ALL,
+  "ldb",OP_SREG,OP_IND,0,0,EN_MEMREG16,4,CPU_ALL,
+  "ldb",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8800000,CPU_ALL,
+  "ldb",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9800000,CPU_ALL,
+  "ldb",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAA800000,CPU_ALL,
+  "ldb",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xAB800000,CPU_ALL,
+  "ldb",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,4,CPU_ALL,
+  "ldb",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,4,CPU_ALL,
+  "ldb",OP_REG,OP_IMMIND,0,0,EN_MEM48,4,CPU_ALL,
+
+  "ldh",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,2,CPU_ALL,
+  "ldh",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,2,CPU_ALL,
+  "ldh",OP_REG,OP_REGIND,0,0,EN_MEMREG32,2,CPU_ALL,
+  "ldh",OP_SREG,OP_IND,0,0,EN_MEMREG16,2,CPU_ALL,
+  "ldh",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8400000,CPU_ALL,
+  "ldh",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9400000,CPU_ALL,
+  "ldh",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAA400000,CPU_ALL,
+  "ldh",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xAB400000,CPU_ALL,
+  "ldh",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,2,CPU_ALL,
+  "ldh",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,2,CPU_ALL,
+  "ldh",OP_REG,OP_IMMIND,0,0,EN_MEM48,2,CPU_ALL,
+
+
+  "ldhs",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,6,CPU_ALL,
+  "ldhs",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,6,CPU_ALL,
+  "ldhs",OP_REG,OP_REGIND,0,0,EN_MEMREG32,6,CPU_ALL,
+  "ldhs",OP_SREG,OP_IND,0,0,EN_MEMREG16,6,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8C00000,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9C00000,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAAC00000,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xABC00000,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,6,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,6,CPU_ALL,
+  "ldhs",OP_REG,OP_IMMIND,0,0,EN_MEM48,6,CPU_ALL,
+
+
+  "ld",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,0,CPU_ALL,
+  "ld",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,0,CPU_ALL,
+  "ld",OP_REG,OP_REGIND,0,0,EN_MEMREG32,0,CPU_ALL,
+  "ld",OP_SREG,OP_IND,0,0,EN_MEMREG16,0,CPU_ALL,
+  "ld",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8000000,CPU_ALL,
+  "ld",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9000000,CPU_ALL,
+  "ld",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAA000000,CPU_ALL,
+  "ld",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xAB000000,CPU_ALL,
+  "ld",OP_SREG,OP_IMMINDSP,0,0,EN_MEMSTACK16,0,CPU_ALL,
+  "ld",OP_SREG,OP_IMMINDS,0,0,EN_MEMDISP16,0,CPU_ALL,
+  "ld",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,0,CPU_ALL,
+  "ld",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,0,CPU_ALL,
+  "ld",OP_REG,OP_IMMIND,0,0,EN_MEM48,0,CPU_ALL,
+
+  "stb",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,5,CPU_ALL,
+  "stb",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,5,CPU_ALL,
+  "stb",OP_REG,OP_REGIND,0,0,EN_MEMREG32,5,CPU_ALL,
+  "stb",OP_SREG,OP_IND,0,0,EN_MEMREG16,5,CPU_ALL,
+  "stb",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8A00000,CPU_ALL,
+  "stb",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9A00000,CPU_ALL,
+  "stb",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAAA00000,CPU_ALL,
+  "stb",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xABA00000,CPU_ALL,
+  "stb",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,5,CPU_ALL,
+  "stb",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,5,CPU_ALL,
+  "stb",OP_REG,OP_IMMIND,0,0,EN_MEM48,5,CPU_ALL,
+
+  "sth",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,3,CPU_ALL,
+  "sth",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,3,CPU_ALL,
+  "sth",OP_REG,OP_REGIND,0,0,EN_MEMREG32,3,CPU_ALL,
+  "sth",OP_SREG,OP_IND,0,0,EN_MEMREG16,3,CPU_ALL,
+  "sth",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8600000,CPU_ALL,
+  "sth",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9600000,CPU_ALL,
+  "sth",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAA600000,CPU_ALL,
+  "sth",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xAB600000,CPU_ALL,
+  "sth",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,3,CPU_ALL,
+  "sth",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,3,CPU_ALL,
+  "sth",OP_REG,OP_IMMIND,0,0,EN_MEM48,3,CPU_ALL,
+
+  "st",OP_REG,OP_POSTINC,0,0,EN_MEMPOSTINC,1,CPU_ALL,
+  "st",OP_REG,OP_PREDEC,0,0,EN_MEMPREDEC,1,CPU_ALL,
+  "st",OP_REG,OP_REGIND,0,0,EN_MEMREG32,1,CPU_ALL,
+  "st",OP_SREG,OP_IND,0,0,EN_MEMREG16,1,CPU_ALL,
+  "st",OP_REG,OP_IMMINDSD,0,0,EN_MEM16DISP32,0xA8200000,CPU_ALL,
+  "st",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xA9200000,CPU_ALL,
+  "st",OP_REG,OP_IMMINDPC,0,0,EN_MEM16DISP32,0xAA200000,CPU_ALL,
+  "st",OP_REG,OP_IMMINDSP,0,0,EN_MEM16DISP32,0xAB200000,CPU_ALL,
+  "st",OP_SREG,OP_IMMINDSP,0,0,EN_MEMSTACK16,1,CPU_ALL,
+  "st",OP_SREG,OP_IMMINDS,0,0,EN_MEMDISP16,1,CPU_ALL,
+  "st",OP_REG,OP_IMMIND,0,0,EN_MEM12DISP32,1,CPU_ALL,
+  "st",OP_REG,OP_IMMIND,0,0,EN_MEMDISP32,1,CPU_ALL,
+  "st",OP_REG,OP_IMMIND,0,0,EN_MEM48,1,CPU_ALL,
+
+  "lea",OP_REG,OP_IMMINDSP,0,0,EN_LEA16,0,CPU_ALL,
+  "lea",OP_REG,OP_IMMINDPC,0,0,EN_LEA48,0,CPU_ALL,
+
+  "addcmpb",OP_SREG,OP_SREG,OP_SREG,OP_REL,EN_ADDCMPB32,0,CPU_ALL,
+  "addcmpb",OP_SREG,OP_IMM4,OP_SREG,OP_REL,EN_ADDCMPB32,1,CPU_ALL,
+  "addcmpb",OP_SREG,OP_SREG,OP_IMM6,OP_REL,EN_ADDCMPB32,2,CPU_ALL,
+  "addcmpb",OP_SREG,OP_IMM4,OP_IMM6,OP_REL,EN_ADDCMPB32,3,CPU_ALL,
+/*dummy for large offsets */
+  "addcmpb",OP_SREG,OP_SREG,OP_SREG,OP_REL,EN_ADDCMPB64,0,CPU_ALL,
+  "addcmpb",OP_SREG,OP_IMM4,OP_SREG,OP_REL,EN_ADDCMPB64,1,CPU_ALL,
+  "addcmpb",OP_SREG,OP_SREG,OP_IMM6,OP_REL,EN_ADDCMPB64,2,CPU_ALL,
+  "addcmpb",OP_SREG,OP_IMM4,OP_IMM6,OP_REL,EN_ADDCMPB64,3,CPU_ALL,
+
+  "fadd",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|0,CPU_ALL,
+  "fsub",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|1,CPU_ALL,
+  "fmul",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|2,CPU_ALL,
+  "fdiv",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|3,CPU_ALL,
+  "fcmp",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|4,CPU_ALL,
+  "fabs",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|5,CPU_ALL,
+  "frsb",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|6,CPU_ALL,
+  "fmax",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|7,CPU_ALL,
+  "frcp",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|8,CPU_ALL,
+  "frsqrt",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|9,CPU_ALL,
+  "fnmul",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|10,CPU_ALL,
+  "fmin",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|11,CPU_ALL,
+  
+  "fld1",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|12,CPU_ALL,
+  "fld0",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|13,CPU_ALL,
+  // Alternate names
+  "fceil",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|12,CPU_ALL,
+  "ffloor",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|13,CPU_ALL,
+  
+  "log2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|14,CPU_ALL,
+  "exp2",OP_REG,OP_REG,OP_REG,0,EN_ARITHR32,64|15,CPU_ALL,
+  "ftrunc",OP_REG,OP_REG,0,0,EN_FUNARY32,64|16,CPU_ALL,
+  "floor",OP_REG,OP_REG,0,0,EN_FUNARY32,64|17,CPU_ALL,
+  "flts",OP_REG,OP_REG,0,0,EN_FUNARY32,64|18,CPU_ALL,
+  "fltu",OP_REG,OP_REG,0,0,EN_FUNARY32,64|19,CPU_ALL,
+
+  "vld",OP_VREG,OP_IND,0,0,EN_VLOAD48,2,CPU_ALL,
+  "vld",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,2,CPU_ALL,
+
+  "vldb",OP_VREG,OP_IND,0,0,EN_VLOAD48,0,CPU_ALL,
+  "vldb",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,0,CPU_ALL,
+
+  "vldh",OP_VREG,OP_IND,0,0,EN_VLOAD48,1,CPU_ALL,
+  "vldh",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,1,CPU_ALL,
+  
+  "vlookupmh",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(1<<2)|2,CPU_ALL,
+  "vlookupmhs",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(1<<2)|2,CPU_ALL,
+
+  "vlookupmhb",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(1<<2)|0,CPU_ALL,
+  "vlookupmhsb",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(1<<2)|0,CPU_ALL,
+
+  "vlookupmhh",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(1<<2)|1,CPU_ALL,
+  "vlookupmhsh",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(1<<2)|1,CPU_ALL,
+  
+  "vlookupml",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(2<<2)|2,CPU_ALL,
+  "vlookupmls",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(2<<2)|2,CPU_ALL,
+
+  "vlookupmlb",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(2<<2)|0,CPU_ALL,
+  "vlookupmlsb",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(2<<2)|0,CPU_ALL,
+
+  "vlookupmlh",OP_VREGM,OP_VIND,0,0,EN_VLOAD80,(2<<2)|1,CPU_ALL,
+  "vlookupmlsh",OP_VREG,OP_VIND,0,0,EN_VLOAD48,(2<<2)|1,CPU_ALL,
+
+  "vst",OP_VREG,OP_IND,0,0,EN_VSTORE48,(4<<2)|2,CPU_ALL,
+  "vst",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(4<<2)|2,CPU_ALL,
+
+  "vstb",OP_VREG,OP_IND,0,0,EN_VSTORE48,(4<<2)|0,CPU_ALL,
+  "vstb",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(4<<2)|0,CPU_ALL,
+
+  "vsth",OP_VREG,OP_IND,0,0,EN_VSTORE48,(4<<2)|1,CPU_ALL,
+  "vsth",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(4<<2)|1,CPU_ALL,
+
+  "vindexwritemh",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(5<<2)|2,CPU_ALL,
+  "vindexwritemhs",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(5<<2)|2,CPU_ALL,
+
+  "vindexwritemhb",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(5<<2)|0,CPU_ALL,
+  "vindexwritemhsb",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(5<<2)|0,CPU_ALL,
+
+  "vindexwritemhh",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(5<<2)|1,CPU_ALL,
+  "vindexwritemhsh",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(5<<2)|1,CPU_ALL,
+
+  "vindexwriteml",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(6<<2)|2,CPU_ALL,
+  "vindexwritemls",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(6<<2)|2,CPU_ALL,
+
+  "vindexwritemlb",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(6<<2)|0,CPU_ALL,
+  "vindexwritemlsb",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(6<<2)|0,CPU_ALL,
+
+  "vindexwritemlh",OP_VREGA80,OP_VIND,0,0,EN_VSTORE80,(6<<2)|1,CPU_ALL,
+  "vindexwritemlsh",OP_VREG,OP_VIND,0,0,EN_VSTORE48,(6<<2)|1,CPU_ALL,
+  
+  "vreadlut",OP_VREG,OP_VREG,0,0,EN_VREAD48,(8<<2)|2,CPU_ALL,
+  "vreadlut",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(8<<2)|2,CPU_ALL,
+  "vreadlut",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(8<<2)|2,CPU_ALL,
+  "vreadlut",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(8<<2)|2,CPU_ALL,
+  
+  "vreadlutb",OP_VREG,OP_VREG,0,0,EN_VREAD48,(8<<2)|0,CPU_ALL,
+  "vreadlutb",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(8<<2)|0,CPU_ALL,
+  "vreadlutb",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(8<<2)|0,CPU_ALL,
+  "vreadlutb",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(8<<2)|0,CPU_ALL,
+  
+  "vreadluth",OP_VREG,OP_VREG,0,0,EN_VREAD48,(8<<2)|1,CPU_ALL,
+  "vreadluth",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(8<<2)|1,CPU_ALL,
+  "vreadluth",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(8<<2)|1,CPU_ALL,
+  "vreadluth",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(8<<2)|1,CPU_ALL,
+  
+  "vwritelut",OP_VREG,OP_VREG,0,0,EN_VWRITE48,(9<<2)|2,CPU_ALL,
+  "vwritelut",OP_VREGM,OP_VREGMM,0,0,EN_VWRITE80,(9<<2)|2,CPU_ALL,
+  "vwritelut",OP_VREG,OP_IMM6,0,0,EN_VWRITEI48,(9<<2)|2,CPU_ALL,
+  "vwritelut",OP_VREGM,OP_IMM32M,0,0,EN_VWRITEI80,(9<<2)|2,CPU_ALL,
+  
+  "vwritelutb",OP_VREG,OP_VREG,0,0,EN_VWRITE48,(9<<2)|0,CPU_ALL,
+  "vwritelutb",OP_VREGM,OP_VREGMM,0,0,EN_VWRITE80,(9<<2)|0,CPU_ALL,
+  "vwritelutb",OP_VREG,OP_IMM6,0,0,EN_VWRITEI48,(9<<2)|0,CPU_ALL,
+  "vwritelutb",OP_VREGM,OP_IMM32M,0,0,EN_VWRITEI80,(9<<2)|0,CPU_ALL,
+  
+  "vwriteluth",OP_VREG,OP_VREG,0,0,EN_VWRITE48,(9<<2)|1,CPU_ALL,
+  "vwriteluth",OP_VREGM,OP_VREGMM,0,0,EN_VWRITE80,(9<<2)|1,CPU_ALL,
+  "vwriteluth",OP_VREG,OP_IMM6,0,0,EN_VWRITEI48,(9<<2)|1,CPU_ALL,
+  "vwriteluth",OP_VREGM,OP_IMM32M,0,0,EN_VWRITEI80,(9<<2)|1,CPU_ALL,
+  
+  "vreadacc",OP_VREG,OP_VREG,0,0,EN_VREAD48,(24<<2)|0,CPU_ALL,
+  "vreadacc",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(24<<2)|0,CPU_ALL,
+  "vreadacc",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(24<<2)|0,CPU_ALL,
+  "vreadacc",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(24<<2)|0,CPU_ALL,
+  
+  "vreadaccs32",OP_VREG,OP_VREG,0,0,EN_VREAD48,(24<<2)|1,CPU_ALL,
+  "vreadaccs32",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(24<<2)|1,CPU_ALL,
+  "vreadaccs32",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(24<<2)|1,CPU_ALL,
+  "vreadaccs32",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(24<<2)|1,CPU_ALL,
+  
+  "vreadaccs16",OP_VREG,OP_VREG,0,0,EN_VREAD48,(24<<2)|3,CPU_ALL,
+  "vreadaccs16",OP_VREGM,OP_VREGMM,0,0,EN_VREAD80,(24<<2)|3,CPU_ALL,
+  "vreadaccs16",OP_VREG,OP_IMM6,0,0,EN_VREADI48,(24<<2)|3,CPU_ALL,
+  "vreadaccs16",OP_VREGM,OP_IMM32M,0,0,EN_VREADI80,(24<<2)|3,CPU_ALL,
+
+  "vmov",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,0,CPU_ALL,
+  "vmov",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,0,CPU_ALL,
+  "vmov",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,0,CPU_ALL,
+  "vmov",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,0,CPU_ALL,
+  "vmov",OP_VREG,OP_VREG,0,0,EN_VARITHR48,0,CPU_ALL,
+  "vmov",OP_VREGM,OP_VREGMM,0,0,EN_VARITHR80,0,CPU_ALL,
+  "vmov",OP_VREG,OP_IMM6,0,0,EN_VARITHI48,0,CPU_ALL,
+  "vmov",OP_VREGM,OP_IMM32M,0,0,EN_VARITHI80,0,CPU_ALL,
+
+  "vmask",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,1,CPU_ALL,
+  "vmask",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,1,CPU_ALL,
+  "vmask",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,1,CPU_ALL,
+  "vmask",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,1,CPU_ALL,
+
+  "vcmbod",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,2,CPU_ALL,
+  "vcmbod",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,2,CPU_ALL,
+  "vcmbod",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,2,CPU_ALL,
+  "vcmbod",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,2,CPU_ALL,
+  // Alternate name
+  "vodd",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,2,CPU_ALL,
+  "vodd",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,2,CPU_ALL,
+  "vodd",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,2,CPU_ALL,
+  "vodd",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,2,CPU_ALL,
+
+  "vcmbev",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,3,CPU_ALL,
+  "vcmbev",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,3,CPU_ALL,
+  "vcmbev",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,3,CPU_ALL,
+  "vcmbev",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,3,CPU_ALL,
+  // Alternate name
+  "veven",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,3,CPU_ALL,
+  "veven",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,3,CPU_ALL,
+  "veven",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,3,CPU_ALL,
+  "veven",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,3,CPU_ALL,
+
+  "valtl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,4,CPU_ALL,
+  "valtl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,4,CPU_ALL,
+  "valtl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,4,CPU_ALL,
+  "valtl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,4,CPU_ALL,
+
+  "valtu",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,5,CPU_ALL,
+  "valtu",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,5,CPU_ALL,
+  "valtu",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,5,CPU_ALL,
+  "valtu",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,5,CPU_ALL,
+
+  "vbrev",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,6,CPU_ALL,
+  "vbrev",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,6,CPU_ALL,
+  "vbrev",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,6,CPU_ALL,
+  "vbrev",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,6,CPU_ALL,
+
+  "vror",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,7,CPU_ALL,
+  "vror",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,7,CPU_ALL,
+  "vror",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,7,CPU_ALL,
+  "vror",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,7,CPU_ALL,
+
+  "vlsl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,8,CPU_ALL,
+  "vlsl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,8,CPU_ALL,
+  "vlsl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,8,CPU_ALL,
+  "vlsl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,8,CPU_ALL,
+  // Alternate name
+  "vshl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,8,CPU_ALL,
+  "vshl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,8,CPU_ALL,
+  "vshl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,8,CPU_ALL,
+  "vshl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,8,CPU_ALL,
+
+  "vasl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,9,CPU_ALL,
+  "vasl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,9,CPU_ALL,
+  "vasl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,9,CPU_ALL,
+  "vasl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,9,CPU_ALL,
+
+  "vlsr",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,10,CPU_ALL,
+  "vlsr",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,10,CPU_ALL,
+  "vlsr",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,10,CPU_ALL,
+  "vlsr",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,10,CPU_ALL,
+  // Alternate name
+  "vshr",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,10,CPU_ALL,
+  "vshr",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,10,CPU_ALL,
+  "vshr",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,10,CPU_ALL,
+  "vshr",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,10,CPU_ALL,
+
+  "vasr",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,11,CPU_ALL,
+  "vasr",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,11,CPU_ALL,
+  "vasr",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,11,CPU_ALL,
+  "vasr",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,11,CPU_ALL,
+  
+  "vsshl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,12,CPU_ALL,
+  "vsshl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,12,CPU_ALL,
+  "vsshl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,12,CPU_ALL,
+  "vsshl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,12,CPU_ALL,
+  // Alternate name
+  "vslsl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,12,CPU_ALL,
+  "vslsl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,12,CPU_ALL,
+  "vslsl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,12,CPU_ALL,
+  "vslsl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,12,CPU_ALL,
+  
+  "vsasl",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,14,CPU_ALL,
+  "vsasl",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,14,CPU_ALL,
+  "vsasl",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,14,CPU_ALL,
+  "vsasl",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,14,CPU_ALL,
+  
+  "vsasls",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,15,CPU_ALL,
+  "vsasls",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,15,CPU_ALL,
+  "vsasls",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,15,CPU_ALL,
+  "vsasls",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,15,CPU_ALL,
+  
+  "vand",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,16,CPU_ALL,
+  "vand",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,16,CPU_ALL,
+  "vand",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,16,CPU_ALL,
+  "vand",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,16,CPU_ALL,
+
+  "vor",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,17,CPU_ALL,
+  "vor",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,17,CPU_ALL,
+  "vor",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,17,CPU_ALL,
+  "vor",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,17,CPU_ALL,
+
+  "veor",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,18,CPU_ALL,
+  "veor",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,18,CPU_ALL,
+  "veor",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,18,CPU_ALL,
+  "veor",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,18,CPU_ALL,
+
+  "vandn",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,19,CPU_ALL,
+  "vandn",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,19,CPU_ALL,
+  "vandn",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,19,CPU_ALL,
+  "vandn",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,19,CPU_ALL,
+  // Alternate name
+  "vbic",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,19,CPU_ALL,
+  "vbic",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,19,CPU_ALL,
+  "vbic",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,19,CPU_ALL,
+  "vbic",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,19,CPU_ALL,
+
+  "vpopcnt",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,20,CPU_ALL,
+  "vpopcnt",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,20,CPU_ALL,
+  "vpopcnt",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,20,CPU_ALL,
+  "vpopcnt",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,20,CPU_ALL,
+
+  "vlog2",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,21,CPU_ALL,
+  "vlog2",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,21,CPU_ALL,
+  "vlog2",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,21,CPU_ALL,
+  "vlog2",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,21,CPU_ALL,
+  // Alternate name
+  "vmsb",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,21,CPU_ALL,
+  "vmsb",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,21,CPU_ALL,
+  "vmsb",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,21,CPU_ALL,
+  "vmsb",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,21,CPU_ALL,
+
+  "vmin",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,24,CPU_ALL,
+  "vmin",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,24,CPU_ALL,
+  "vmin",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,24,CPU_ALL,
+  "vmin",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,24,CPU_ALL,
+
+  "vmax",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,25,CPU_ALL,
+  "vmax",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,25,CPU_ALL,
+  "vmax",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,25,CPU_ALL,
+  "vmax",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,25,CPU_ALL,
+
+  "vdist",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,26,CPU_ALL,
+  "vdist",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,26,CPU_ALL,
+  "vdist",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,26,CPU_ALL,
+  "vdist",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,26,CPU_ALL,
+
+  "vdists",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,27,CPU_ALL,
+  "vdists",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,27,CPU_ALL,
+  "vdists",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,27,CPU_ALL,
+  "vdists",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,27,CPU_ALL,
+
+  "vclamp",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,28,CPU_ALL,
+  "vclamp",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,28,CPU_ALL,
+  "vclamp",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,28,CPU_ALL,
+  "vclamp",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,28,CPU_ALL,
+
+  "vsgn",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,29,CPU_ALL,
+  "vsgn",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,29,CPU_ALL,
+  "vsgn",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,29,CPU_ALL,
+  "vsgn",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,29,CPU_ALL,
+
+  "vclamps",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,30,CPU_ALL,
+  "vclamps",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,30,CPU_ALL,
+  "vclamps",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,30,CPU_ALL,
+  "vclamps",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,30,CPU_ALL,
+
+  // TODO: test this
+  "vcmpge",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,31,CPU_ALL,
+  "vcmpge",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,31,CPU_ALL,
+  "vcmpge",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,31,CPU_ALL,
+  "vcmpge",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,31,CPU_ALL,
+
+  "vadd",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,32,CPU_ALL,
+  "vadd",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,32,CPU_ALL,
+  "vadd",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,32,CPU_ALL,
+  "vadd",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,32,CPU_ALL,
+
+  "vadds",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,33,CPU_ALL,
+  "vadds",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,33,CPU_ALL,
+  "vadds",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,33,CPU_ALL,
+  "vadds",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,33,CPU_ALL,
+
+  "vaddc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,34,CPU_ALL,
+  "vaddc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,34,CPU_ALL,
+  "vaddc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,34,CPU_ALL,
+  "vaddc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,34,CPU_ALL,
+
+  "vaddsc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,35,CPU_ALL,
+  "vaddsc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,35,CPU_ALL,
+  "vaddsc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,35,CPU_ALL,
+  "vaddsc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,35,CPU_ALL,
+
+  "vsub",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,36,CPU_ALL,
+  "vsub",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,36,CPU_ALL,
+  "vsub",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,36,CPU_ALL,
+  "vsub",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,36,CPU_ALL,
+
+  "vsubs",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,37,CPU_ALL,
+  "vsubs",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,37,CPU_ALL,
+  "vsubs",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,37,CPU_ALL,
+  "vsubs",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,37,CPU_ALL,
+
+  "vsubc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,38,CPU_ALL,
+  "vsubc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,38,CPU_ALL,
+  "vsubc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,38,CPU_ALL,
+  "vsubc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,38,CPU_ALL,
+
+  "vsubsc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,39,CPU_ALL,
+  "vsubsc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,39,CPU_ALL,
+  "vsubsc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,39,CPU_ALL,
+  "vsubsc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,39,CPU_ALL,
+
+  "vrsb",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,40,CPU_ALL,
+  "vrsb",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,40,CPU_ALL,
+  "vrsb",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,40,CPU_ALL,
+  "vrsb",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,40,CPU_ALL,
+  // Alternate name
+  "vrsub",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,40,CPU_ALL,
+  "vrsub",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,40,CPU_ALL,
+  "vrsub",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,40,CPU_ALL,
+  "vrsub",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,40,CPU_ALL,
+
+  "vrsbs",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,41,CPU_ALL,
+  "vrsbs",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,41,CPU_ALL,
+  "vrsbs",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,41,CPU_ALL,
+  "vrsbs",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,41,CPU_ALL,
+  // Alternate name
+  "vrsubs",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,41,CPU_ALL,
+  "vrsubs",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,41,CPU_ALL,
+  "vrsubs",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,41,CPU_ALL,
+  "vrsubs",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,41,CPU_ALL,
+
+  "vrsbc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,42,CPU_ALL,
+  "vrsbc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,42,CPU_ALL,
+  "vrsbc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,42,CPU_ALL,
+  "vrsbc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,42,CPU_ALL,
+  // Alternate name
+  "vrsubc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,42,CPU_ALL,
+  "vrsubc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,42,CPU_ALL,
+  "vrsubc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,42,CPU_ALL,
+  "vrsubc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,42,CPU_ALL,
+
+  "vrsbsc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,43,CPU_ALL,
+  "vrsbsc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,43,CPU_ALL,
+  "vrsbsc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,43,CPU_ALL,
+  "vrsbsc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,43,CPU_ALL,
+  // Alternate name
+  "vrsubsc",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,43,CPU_ALL,
+  "vrsubsc",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,43,CPU_ALL,
+  "vrsubsc",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,43,CPU_ALL,
+  "vrsubsc",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,43,CPU_ALL,
+
+  // Operations 48-63 do different things depending on the 'X' bit
+  // (equivalently, the 64 bit in the opcode)
+  // First, X=0
+  
+  "vmul",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,48,CPU_ALL,
+  "vmul",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,48,CPU_ALL,
+  "vmul",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,48,CPU_ALL,
+  "vmul",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,48,CPU_ALL,
+  // Alternate name
+  "vmull",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,48,CPU_ALL,
+  "vmull",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,48,CPU_ALL,
+  "vmull",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,48,CPU_ALL,
+  "vmull",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,48,CPU_ALL,
+
+  "vmuls",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,49,CPU_ALL,
+  "vmuls",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,49,CPU_ALL,
+  "vmuls",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,49,CPU_ALL,
+  "vmuls",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,49,CPU_ALL,
+  // Alternate name
+  "vmulls",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,49,CPU_ALL,
+  "vmulls",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,49,CPU_ALL,
+  "vmulls",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,49,CPU_ALL,
+  "vmulls",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,49,CPU_ALL,
+  
+  "vmulmd",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,50,CPU_ALL,
+  "vmulmd",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,50,CPU_ALL,
+  "vmulmd",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,50,CPU_ALL,
+  "vmulmd",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,50,CPU_ALL,
+
+  "vmulmds",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,51,CPU_ALL,
+  "vmulmds",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,51,CPU_ALL,
+  "vmulmds",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,51,CPU_ALL,
+  "vmulmds",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,51,CPU_ALL,
+
+  "vmulhds",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,52,CPU_ALL,
+  "vmulhds",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,52,CPU_ALL,
+  "vmulhds",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,52,CPU_ALL,
+  "vmulhds",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,52,CPU_ALL,
+
+  "vmulhdsu",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,53,CPU_ALL,
+  "vmulhdsu",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,53,CPU_ALL,
+  "vmulhdsu",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,53,CPU_ALL,
+  "vmulhdsu",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,53,CPU_ALL,
+
+  "vmulhdus",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,54,CPU_ALL,
+  "vmulhdus",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,54,CPU_ALL,
+  "vmulhdus",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,54,CPU_ALL,
+  "vmulhdus",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,54,CPU_ALL,
+
+  "vmulhdu",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,55,CPU_ALL,
+  "vmulhdu",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,55,CPU_ALL,
+  "vmulhdu",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,55,CPU_ALL,
+  "vmulhdu",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,55,CPU_ALL,
+
+  "vmulhdrs",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,56,CPU_ALL,
+  "vmulhdrs",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,56,CPU_ALL,
+  "vmulhdrs",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,56,CPU_ALL,
+  "vmulhdrs",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,56,CPU_ALL,
+
+  "vmulhdrsu",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,57,CPU_ALL,
+  "vmulhdrsu",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,57,CPU_ALL,
+  "vmulhdrsu",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,57,CPU_ALL,
+  "vmulhdrsu",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,57,CPU_ALL,
+
+  "vmulhdrus",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,58,CPU_ALL,
+  "vmulhdrus",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,58,CPU_ALL,
+  "vmulhdrus",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,58,CPU_ALL,
+  "vmulhdrus",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,58,CPU_ALL,
+
+  "vmulhdru",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,59,CPU_ALL,
+  "vmulhdru",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,59,CPU_ALL,
+  "vmulhdru",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,59,CPU_ALL,
+  "vmulhdru",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,59,CPU_ALL,
+  
+  // Then X=1
+
+  "vmul32s",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,52|64,CPU_ALL,
+  "vmul32s",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,52|64,CPU_ALL,
+  "vmul32s",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,52|64,CPU_ALL,
+  "vmul32s",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,52|64,CPU_ALL,
+  
+  "vmul32su",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,53|64,CPU_ALL,
+  "vmul32su",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,53|64,CPU_ALL,
+  "vmul32su",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,53|64,CPU_ALL,
+  "vmul32su",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,53|64,CPU_ALL,
+  
+  "vmul32us",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,54|64,CPU_ALL,
+  "vmul32us",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,54|64,CPU_ALL,
+  "vmul32us",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,54|64,CPU_ALL,
+  "vmul32us",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,54|64,CPU_ALL,
+  
+  "vmul32u",OP_VREG,OP_VREG,OP_VREG,0,EN_VARITHR48,55|64,CPU_ALL,
+  "vmul32u",OP_VREGM,OP_VREGA80,OP_VREGMM,0,EN_VARITHR80,55|64,CPU_ALL,
+  "vmul32u",OP_VREG,OP_VREG,OP_IMM6,0,EN_VARITHI48,55|64,CPU_ALL,
+  "vmul32u",OP_VREGM,OP_VREGA80,OP_IMM32M,0,EN_VARITHI80,55|64,CPU_ALL,
diff --git a/cpus/x86/cpu.c b/cpus/x86/cpu.c
index 175234a..58b8ad9 100644
--- a/cpus/x86/cpu.c
+++ b/cpus/x86/cpu.c
@@ -1,6 +1,6 @@
 /*
 ** cpu.c x86 cpu-description file
-** (c) in 2005-2006 by Frank Wille
+** (c) in 2005-2006,2011,2015 by Frank Wille
 */
 
 #include "vasm.h"
@@ -10,16 +10,14 @@ mnemonic mnemonics[] = {
 };
 int mnemonic_cnt = sizeof(mnemonics)/sizeof(mnemonics[0]);
 
-char *cpu_copyright = "vasm x86 cpu backend 0.5 (c) 2005-2006 Frank Wille";
+char *cpu_copyright = "vasm x86 cpu backend 0.6a (c) 2005-2006,2011,2015 Frank Wille";
 char *cpuname = "x86";
 int bitsperbyte = 8;
 int bytespertaddr = 4;
 
 /* cpu options */
-unsigned long cpu_type = CPUAny | CPUNo64;
-static long debug = 0;
-
-static hashtable *regsymhash;   /* hash-table for x86 register symbols */
+uint32_t cpu_type = CPUAny | CPUNo64;
+static long cpudebug = 0;
 
 static regsym x86_regsyms[] = {
 #include "registers.h"
@@ -97,20 +95,6 @@ int x86_data_operand(int bits)
 }
 
 
-static int addregsym(regsym *rsym)
-/* add a new register symbol, return 0 if already exists */
-{
-  hashdata data;
-
-  if (find_name(regsymhash,rsym->reg_name,&data))
-    return 0;
-
-  data.ptr = rsym;
-  add_hashentry(regsymhash,rsym->reg_name,data);
-  return 1;
-}
-
-
 static void print_operand_type(int ot,char c)
 {
   int i,b;
@@ -216,24 +200,6 @@ static int add_seg_prefix(instruction *ip,int segrn)
 }
 
 
-static void addreloc(rlist **relocs,symbol *sym,taddr addend,
-                     int type,int offs,int size,taddr mask)
-{
-  nreloc *r = new_nreloc();
-  rlist *rl = mymalloc(sizeof(rlist));
-
-  r->offset = offs;
-  r->size = size;
-  r->mask = mask;
-  r->sym = sym;
-  r->addend = addend;
-  rl->type = type;
-  rl->reloc = r;
-  rl->next = *relocs;
-  *relocs = rl;
-}
-
-
 static char suffix_from_reg(instruction *ip)
 {
   int i,ot;
@@ -475,7 +441,7 @@ static int process_suffix(instruction *ip,int final)
     /* we have to select word or dword operation mode */
     mnemonic *mnemo = &mnemonics[ip->code];
 
-    if (debug & 64) {
+    if (cpudebug & 64) {
       printf("%s(%c%c): process_suffix(%dbit): %c\n",mnemo->name,
              (mnemo->ext.opcode_modifier & W) ? 'W' : ' ',
              (mnemo->ext.opcode_modifier & ShortForm) ? 'S' : ' ',
@@ -500,7 +466,7 @@ static int process_suffix(instruction *ip,int final)
         if (mnemo->ext.opcode_modifier & JmpByte)
           code = OC_ADDR_PREFIX;  /* jcxz, loop */
 
-        if (debug & 64)
+        if (cpudebug & 64)
           printf("\tadding prefix %02x\n",(unsigned)code);
 
         if (!add_ip_prefix(ip,code)) {
@@ -522,10 +488,10 @@ static int process_suffix(instruction *ip,int final)
 }
 
 
-static unsigned int suffix_flag(instruction *ip)
+static uint32_t suffix_flag(instruction *ip)
 /* return the No_?Suf flag for the instruction's suffix */
 {
-  unsigned int chksuffix;
+  uint32_t chksuffix;
 
   switch (ip->qualifiers[0] ?
           tolower((unsigned char)ip->qualifiers[0][0]) : '\0') {
@@ -549,9 +515,9 @@ static int find_next_mnemonic(instruction *ip)
   char *inst_name = mnemonics[ip->code].name;
   int code = ip->code + 1;
   mnemonic *mnemo = &mnemonics[code];
-  unsigned int chksuffix = suffix_flag(ip);
+  uint32_t chksuffix = suffix_flag(ip);
 
-  if ((debug & 32) && !(debug & 4)) {
+  if ((cpudebug & 32) && !(cpudebug & 4)) {
     printf("Finding next matching instruction for (opcode=0x%x):",
            ip->ext.base_opcode);
     print_operands(ip,-1);
@@ -584,7 +550,7 @@ static int find_next_mnemonic(instruction *ip)
 
     if (i == MAX_OPERANDS) {
       /* all operands match, check suffix and CPU type */
-      if (debug & 32) {
+      if (cpudebug & 32) {
         printf("\toperands match, suffixOK=%d, cpuOK=%d\n",
                (mnemo->ext.opcode_modifier & chksuffix) == 0,
                (mnemo->ext.available & cpu_type) == mnemo->ext.available);
@@ -593,7 +559,7 @@ static int find_next_mnemonic(instruction *ip)
           (mnemo->ext.available & cpu_type)==mnemo->ext.available) {
         for (i=0; i<MAX_OPERANDS; i++) {
           if (ip->op[i]) {
-            if (debug & 32) {
+            if (cpudebug & 32) {
               printf("\tnew op %d: ",i+1);
               print_operand_type(ip->op[i]->parsed_type,'|');
               printf(" & ");
@@ -608,8 +574,7 @@ static int find_next_mnemonic(instruction *ip)
         ip->code = code;
         ip->ext.base_opcode = mnemo->ext.base_opcode;
         assign_suffix(ip);
-        process_suffix(ip,0);  /* @@@ pass 'final'? */
-        if (debug & 32)
+        if (cpudebug & 32)
           printf("\tNew opcode=0x%x!\n",ip->ext.base_opcode);
         return 1;
       }
@@ -620,7 +585,7 @@ static int find_next_mnemonic(instruction *ip)
     code++;
   }
 
-  if (debug & 32)
+  if (cpudebug & 32)
     printf("\tNo matching instruction found!\n");
   return 0;
 }
@@ -723,12 +688,11 @@ static void optimize_jump(instruction *ip,operand *op,section *sec,
   taddr val,diff;
 
   if (!eval_expr(op->value,&val,sec,pc)) {
-    base = find_base(op->value,sec,pc);
-    if (base == NULL) {
-      cpu_error(13);  /* illegal relocation */
+    if (find_base(op->value,&base,sec,pc) != BASE_OK) {
+      general_error(38);  /* illegal relocation */
       return;
     }
-    label_in_sec = (base->type==LABSYM) && (base->sec==sec);
+    label_in_sec = LOCREF(base) && (base->sec==sec);
   }
   else
     label_in_sec = 0;
@@ -853,7 +817,7 @@ static int make_modrm(instruction *ip,mnemonic *mnemo,int final)
     }
   }
   ip->ext.flags |= MODRM_BYTE;
-  if (final && (debug & 8)) {
+  if (final && (cpudebug & 8)) {
     printf("make_modrm(): %s: %d reg operands, %d mem operands\n",
            mnemo->name,reg_operands,mem_operands);
   }
@@ -876,7 +840,7 @@ static int make_modrm(instruction *ip,mnemonic *mnemo,int final)
       operand *memop = ip->op[(ip->op[0]->type & AnyMem) ? 0 :
                               ((ip->op[1]->type & AnyMem) ? 1 : 2)];
 
-      if (final && (debug & 8)) {
+      if (final && (cpudebug & 8)) {
         if (memop->basereg) {
           printf("\tbase=%%%s(",memop->basereg->reg_name);
           print_operand_type(memop->basereg->reg_type,'|');
@@ -1014,7 +978,7 @@ static int make_modrm(instruction *ip,mnemonic *mnemo,int final)
       operand *regop = ip->op[(ip->op[0]->type & AnyReg) ? 0 :
                               ((ip->op[1]->type & AnyReg) ? 1 : 2)];
 
-      if (final && (debug & 8)) {
+      if (final && (cpudebug & 8)) {
         printf("\tregister=%%%s(",regop->basereg->reg_name);
         print_operand_type(regop->basereg->reg_type,'|');
         printf(")\n");
@@ -1034,7 +998,7 @@ static int make_modrm(instruction *ip,mnemonic *mnemo,int final)
       ip->ext.rm.reg = mnemo->ext.extension_opcode;
   }
 
-  if (final && (debug & 8)) {
+  if (final && (cpudebug & 8)) {
     printf("\tMod/RM: mode=%d reg=%d regmem=%d\n",
            (int)ip->ext.rm.mode,(int)ip->ext.rm.reg,(int)ip->ext.rm.regmem);
     if (ip->ext.flags & SIB_BYTE) {
@@ -1147,10 +1111,10 @@ static int get_imm_bits(int t)
 }
 
 
-static int get_opcode_size(instruction *ip)
+static size_t get_opcode_size(instruction *ip)
 {
-  unsigned int c = ip->ext.base_opcode;
-  int size = 1;
+  uint32_t c = ip->ext.base_opcode;
+  size_t size = 1;
 
   if (c > 0xff)
     size++;
@@ -1161,9 +1125,9 @@ static int get_opcode_size(instruction *ip)
 }  
 
 
-static int imm_size(int t)
+static size_t imm_size(int t)
 {
-  int size = 0;
+  size_t size = 0;
 
   if (t & Imm) {
     if (t & (Imm8|Imm8S))
@@ -1179,9 +1143,9 @@ static int imm_size(int t)
 }
 
 
-static int disp_size(int t)
+static size_t disp_size(int t)
 {
-  int size = 0;
+  size_t size = 0;
 
   if (t & Disp) {
     if (t & Disp8)
@@ -1197,16 +1161,14 @@ static int disp_size(int t)
 }
 
 
-static int finalize_instruction(instruction *ip,section *sec,
-                                taddr pc,int final)
+static size_t finalize_instruction(instruction *ip,section *sec,
+                                   taddr pc,int final)
 /* execute optimizations, calculate instruction opcode, opcode-extension,
    modrm- and sib-bytes, and return its size in bytes */
 {
   mnemonic *mnemo = &mnemonics[ip->code];
-  int size,i;
-
-  /* process operation size, add prefixes when required */
-  process_suffix(ip,final);
+  size_t size;
+  int i;
 
   for (i=0; i<MAX_OPERANDS; i++) {
     if (ip->op[i]) {
@@ -1253,12 +1215,15 @@ static int finalize_instruction(instruction *ip,section *sec,
     }
   }
 
+  /* process operation size, add prefixes when required */
+  process_suffix(ip,final);
+
   /* set base opcode, process operands and generate modrm/sib if present */
   process_operands(ip,final);
 
   /* determine size of instruction */
   size = get_opcode_size(ip);
-  size += (int)ip->ext.num_prefixes;
+  size += ip->ext.num_prefixes;
   if (ip->ext.flags & MODRM_BYTE)
     size++;
   if (ip->ext.flags & SIB_BYTE)
@@ -1272,8 +1237,8 @@ static int finalize_instruction(instruction *ip,section *sec,
       break;
   }
 
-  if (debug & 16)
-    printf("%08lx: (%d) %s",(unsigned long)pc,size,mnemo->name);
+  if (cpudebug & 16)
+    printf("%08lx: (%u) %s",(unsigned long)pc,(unsigned)size,mnemo->name);
 
   return size;
 }
@@ -1287,7 +1252,7 @@ static unsigned char make_byte233(unsigned char b76,unsigned char b543,
 }
 
 
-static unsigned char *write_taddr(unsigned char *d,taddr val,int bits)
+static unsigned char *write_taddr(unsigned char *d,taddr val,size_t bits)
 {
   switch (bits) {
     case 8:
@@ -1321,7 +1286,7 @@ static unsigned char *output_prefixes(unsigned char *d,instruction *ip)
 
 static unsigned char *output_opcodes(unsigned char *d,instruction *ip)
 {
-  unsigned int oc = (unsigned int)ip->ext.base_opcode;
+  uint32_t oc = (uint32_t)ip->ext.base_opcode;
 
   if (oc > 0xffff)
     *d++ = (oc >> 16) & 0xff;
@@ -1342,7 +1307,8 @@ static unsigned char *output_opcodes(unsigned char *d,instruction *ip)
 static unsigned char *output_disp(dblock *db,unsigned char *d,
                                   instruction *ip,section *sec,taddr pc)
 {
-  int i,bits;
+  int i;
+  size_t bits;
   operand *op;
   taddr val;
 
@@ -1353,28 +1319,29 @@ static unsigned char *output_disp(dblock *db,unsigned char *d,
 
         if (!eval_expr(op->value,&val,sec,pc)) {
           mnemonic *mnemo = &mnemonics[ip->code];
-          symbol *base = find_base(op->value,sec,pc);
+          symbol *base;
 
-          if (base) {
-            if (mnemo->ext.opcode_modifier & (Jmp|JmpByte|JmpDword)) {
+          if (find_base(op->value,&base,sec,pc) == BASE_OK) {
+            if ((mnemo->ext.opcode_modifier & (Jmp|JmpByte|JmpDword))
+                || (op->flags & OPER_PCREL)) {
               /* handle pc-relative displacement for jumps */
-              if (base->type==LABSYM && base->sec==sec) {
+              if (!is_pc_reloc(base,sec)) {
                 val = val - (pc + (d-(unsigned char *)db->data) + (bits>>3));
               }
               else {
                 val -= bits>>3;
-                addreloc(&db->relocs,base,val,REL_PC,
-                         (int)(d-(unsigned char *)db->data)<<3,bits,-1);
+                add_nreloc(&db->relocs,base,val,REL_PC,bits,
+                           (int)(d-(unsigned char *)db->data)<<3);
               }
             }
             else {
               /* reloc for a normal absolute displacement */
-              addreloc(&db->relocs,base,val,REL_ABS,
-                       (int)(d-(unsigned char *)db->data)<<3,bits,-1);
+              add_nreloc(&db->relocs,base,val,REL_ABS,bits,
+                         (int)(d-(unsigned char *)db->data)<<3);
             }
           }
           else
-            cpu_error(13);  /* illegal relocation */
+            general_error(38);  /* illegal relocation */
         }
         d = write_taddr(d,val,bits);
       }
@@ -1387,7 +1354,8 @@ static unsigned char *output_disp(dblock *db,unsigned char *d,
 static unsigned char *output_imm(dblock *db,unsigned char *d,
                                  instruction *ip,section *sec,taddr pc)
 {
-  int i,bits,ot;
+  int i,ot;
+  size_t bits;
   operand *op;
   taddr val;
 
@@ -1407,14 +1375,14 @@ static unsigned char *output_imm(dblock *db,unsigned char *d,
 #endif
 
         if (!eval_expr(op->value,&val,sec,pc)) {
-          symbol *base = find_base(op->value,sec,pc);
+          symbol *base;
 
-          if (base) {
-            addreloc(&db->relocs,base,val,REL_ABS,
-                     (int)(d-(unsigned char *)db->data)<<3,bits,-1);
+          if (find_base(op->value,&base,sec,pc) == BASE_OK) {
+            add_nreloc(&db->relocs,base,val,REL_ABS,bits,
+                       (int)(d-(unsigned char *)db->data)<<3);
           }
           else
-            cpu_error(13);  /* illegal relocation */
+            general_error(38);  /* illegal relocation */
         }
         d = write_taddr(d,val,bits);
       }
@@ -1464,12 +1432,10 @@ char *parse_cpu_special(char *start)
       mode_flag = CODE_32BIT;
       return s;
     }
-#if 0  /* disabled for the moment... */
     else if (s-name==7 && !strncmp(name,".code64",7)) {
       mode_flag = CODE_64BIT;
       return s;
     }
-#endif
   }
   return start;
 }
@@ -1486,7 +1452,7 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
   /* reset opcode prefixes */
   memset(prefix,0,sizeof(prefix));
   prefix_cnt = 0;
-  if (debug & 1)
+  if (cpudebug & 1)
     printf("parse_instruction: \"%s\"\n",s);
 
   for (;;) {
@@ -1515,7 +1481,7 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
           }
           else {
             /* enter new prefix */
-            if (debug & 1) {
+            if (cpudebug & 1) {
               printf("\tadd prefix %02x for \"%s\"\n",
                      (unsigned)mnemo->ext.base_opcode,mnemo->name);
             }
@@ -1549,7 +1515,7 @@ char *parse_instruction(char *s,int *inst_len,char **ext,int *ext_len,
   }
 
   *inst_len = len;
-  if (debug & 1) {
+  if (cpudebug & 1) {
     printf("\tinst=\"%.*s\" suffix=\"%.*s\"\n",len,inst,
            *ext_cnt?ext_len[0]:0, *ext_cnt?ext[0]:emptystr);
   }
@@ -1568,8 +1534,8 @@ int set_default_qualifiers(char **q,int *q_len)
 static regsym *parse_reg(char **pp)
 /* parse a register name, return pointer to regsym when successful */
 {
-  hashdata data;
   char *p,*start;
+  regsym *r;
 
   p = skip(*pp);
   if (*p++ == '%') {
@@ -1584,9 +1550,7 @@ static regsym *parse_reg(char **pp)
         if (isdigit((unsigned char)*(p+1)) && *(p+2)==')')
           p += 3;
       }
-      if (find_namelen_nc(regsymhash,start,p-start,&data)) {
-        regsym *r = data.ptr;
-
+      if (r = find_regsym_nc(start,p-start)) {
         if ((r->reg_flags & (RegRex64|RegRex)) && mode_flag!=CODE_64BIT)
           return NULL;
         *pp = p;
@@ -1605,7 +1569,7 @@ int parse_operand(char *p,int len,operand *op,int requirements)
   int need_mem_oper = 0;
   int given_type,overlap;
 
-  if (debug & 2) {
+  if (cpudebug & 2) {
     printf("parse_operand (reqs=%08lx): \"%.*s\"\n",
            (unsigned long)requirements,len,p);
   }
@@ -1619,7 +1583,7 @@ int parse_operand(char *p,int len,operand *op,int requirements)
       regsym *sreg = parse_reg(&p);
 
       p = skip(p);
-      if ((sreg->reg_type & (SegReg2|SegReg3)) && *p++==':') {
+      if (sreg!=NULL && (sreg->reg_type & (SegReg2|SegReg3)) && *p++==':') {
         op->segoverride = sreg;
         need_mem_oper = 1;  /* only memory operands may follow */
         p = skip(p);
@@ -1714,7 +1678,7 @@ int parse_operand(char *p,int len,operand *op,int requirements)
   }
 
   overlap = given_type & requirements;
-  if (debug & 2) {
+  if (cpudebug & 2) {
     printf("\ttype given: %08lx  overlap with reqs: %08lx - ",
            (unsigned long)given_type,(unsigned long)overlap);
   }
@@ -1722,7 +1686,7 @@ int parse_operand(char *p,int len,operand *op,int requirements)
       (given_type & (BaseIndex|JmpAbs)) ==
        (overlap & (BaseIndex|JmpAbs))) {
     /* ok, parsed operand type matches requirements */
-    if (debug & 2)
+    if (cpudebug & 2)
       printf("MATCHED!\n");
     op->type = overlap;
 
@@ -1733,7 +1697,7 @@ int parse_operand(char *p,int len,operand *op,int requirements)
     return PO_MATCH;
   }
 
-  if (debug & 2)
+  if (cpudebug & 2)
     printf("failed\n");
   return PO_NOMATCH;
 }
@@ -1753,16 +1717,17 @@ void init_instruction_ext(instruction_ext *ixp)
 }
 
 
-taddr instruction_size(instruction *realip,section *sec,taddr pc)
+size_t instruction_size(instruction *realip,section *sec,taddr pc)
 /* Calculate the size of the current instruction; must be identical
    to the data created by eval_instruction. */
 {
   mnemonic *mnemo = &mnemonics[realip->code];
-  int i,size,diff;
+  int i,diff;
+  size_t size;
 
   /* assign the suffix, which was unknown during operand evaluation */
   if (!(realip->ext.flags & SUFFIX_CHECKED)) {
-    if (debug & 4) {
+    if (cpudebug & 4) {
       printf("instruction_size():");
       print_operands(realip,pc);
     }
@@ -1793,20 +1758,20 @@ taddr instruction_size(instruction *realip,section *sec,taddr pc)
   /* work on a copy of the current instruction and finalize it */
   size = finalize_instruction(copy_instruction(realip),sec,pc,0);
 
-  if (realip->ext.last_size>=0 && (diff = realip->ext.last_size - size)!=0) {
+  if (realip->ext.last_size>=0 && (diff=realip->ext.last_size-(int)size)!=0) {
     if (diff > 0) {
-      if (debug & 16)
+      if (cpudebug & 16)
         printf(" (%d bytes gained)\n",diff);
       realip->ext.flags |= POSOPT;
     }
     else {
-      if (debug & 16)
+      if (cpudebug & 16)
         printf(" (%d bytes lost)\n",-diff);
       realip->ext.flags |= NEGOPT;
     }
   }
   else {
-    if (debug & 16)
+    if (cpudebug & 16)
       printf("\n");
   }
   realip->ext.last_size = size;
@@ -1824,9 +1789,9 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 
   db->size = finalize_instruction(ip,sec,pc,1);
   db->data = mymalloc(db->size);
-  if (debug & 16)
+  if (cpudebug & 16)
     printf("\n");
-  if (debug & 4) {
+  if (cpudebug & 4) {
     printf("eval_instruction():");
     print_operands(ip,pc);
   }
@@ -1839,7 +1804,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 }
 
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 /* Create a dblock (with relocs, if necessary) for size bits of data. */
 {
   dblock *db = new_dblock();
@@ -1848,12 +1813,16 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
   db->size = bitsize >> 3;
   db->data = mymalloc(db->size);
   if (!eval_expr(op->value,&val,sec,pc)) {
-    symbol *base = find_base(op->value,sec,pc);
-
+    symbol *base;
+    int btype;
+    
+    btype = find_base(op->value,&base,sec,pc);
     if (base)
-      addreloc(&db->relocs,base,val,REL_ABS,0,bitsize,-1);
-    else
-      cpu_error(13);  /* illegal relocation */
+      add_nreloc(&db->relocs,base,val,
+                 btype==BASE_PCREL?REL_PC:REL_ABS,
+                 bitsize,0);
+    else if (btype != BASE_NONE)
+      general_error(38);  /* illegal relocation */
   }
   write_taddr(db->data,val,bitsize);
   return db;
@@ -1901,10 +1870,9 @@ int init_cpu()
       OC_JMP_DISP = (unsigned char)mnemonics[i].ext.base_opcode;
   }
 
-  /* define register symbols */
-  regsymhash = new_hashtable(REGSYMHTSIZE);
+  /* define all register symbols */
   for (r=x86_regsyms; r->reg_name!=NULL; r++)
-    addregsym(r);
+    add_regsym(r);
 
   return 1;
 }
@@ -1912,8 +1880,8 @@ int init_cpu()
 
 int cpu_args(char *p)
 {
-  if (!strncmp(p,"-debug=",7)) {
-    if (!sscanf(p+7,"%li",&debug))
+  if (!strncmp(p,"-cpudebug=",7)) {
+    if (!sscanf(p+10,"%li",&cpudebug))
       return 0;
   }
   else if (!strncmp(p,"-m",2)) {
@@ -1931,6 +1899,11 @@ int cpu_args(char *p)
     else if (!strcmp(p,"k6")) cpu_type = CPU086|CPU186|CPU286|CPU386|CPU486|CPU586|CPUK6|CPUMMX|CPU3dnow;
     else if (!strcmp(p,"athlon")) cpu_type = CPU086|CPU186|CPU286|CPU386|CPU486|CPU586|CPU686|CPUK6|CPUAthlon|CPUMMX|CPU3dnow;
     else if (!strcmp(p,"sledgehammer")) cpu_type = CPU086|CPU186|CPU286|CPU386|CPU486|CPU586|CPU686|CPUK6|CPUAthlon|CPUSledgehammer|CPUMMX|CPU3dnow|CPUSSE|CPUSSE2;
+    else if (!strcmp(p,"64")) {
+      /* 64 bits architecture */
+      cpu_type = CPUAny|CPU64;
+      bytespertaddr = 8;
+    }
     else return 0;
   }
   return 1;
diff --git a/cpus/x86/cpu.h b/cpus/x86/cpu.h
index 628e5a5..848213c 100644
--- a/cpus/x86/cpu.h
+++ b/cpus/x86/cpu.h
@@ -4,18 +4,17 @@
 #define LITTLEENDIAN 1
 #define BIGENDIAN 0
 #define VASM_CPU_X86 1
+#define MNEMOHTABSIZE 0x8000
 
 /* maximum number of operands in one mnemonic */
 #define MAX_OPERANDS 3
 
-/* allowed to call parse_operand() with an arbitrary number of operands */
-#define CPU_CHECKS_OPCNT 0
-
 /* maximum number of mnemonic-qualifiers per mnemonic */
 #define MAX_QUALIFIERS 1
 
 /* data type to represent a target-address */
-typedef long long taddr;
+typedef int64_t taddr;
+typedef int64_t utaddr;
 
 /* minimum instruction alignment */
 #define INST_ALIGN 1
@@ -31,17 +30,12 @@ int x86_data_operand(int);
 #define DATA_OPERAND(n) x86_data_operand(n)
 
 /* make sure operand is cleared upon first entry into parse_operand() */
-#define NEED_CLEARED_OPERANDS
+#define NEED_CLEARED_OPERANDS 1
 
 
 /* register symbols */
+#define HAVE_REGSYMS
 #define REGSYMHTSIZE 64
-typedef struct regsym {
-  char *reg_name;
-  int reg_type;                 /* see operand_type */
-  unsigned int reg_flags;
-  unsigned int reg_num;         /* usually 0-7 */
-} regsym;
 
 /* reg_flags: */
 #define RegRex	    0x1         /* Extended register.  */
@@ -171,10 +165,10 @@ typedef struct {
 
 
 /* instruction extension */
-#define HAVE_INSTRUCTION_EXTENSION
+#define HAVE_INSTRUCTION_EXTENSION 1
 
 typedef struct {
-  unsigned int base_opcode;
+  uint32_t base_opcode;
   unsigned char flags;
   unsigned char num_prefixes;
   unsigned char prefix[MAX_PREFIXES];
@@ -201,10 +195,10 @@ typedef struct {
 
 /* additional mnemonic data */
 typedef struct {
-  unsigned int base_opcode;
-  unsigned int extension_opcode;
-  unsigned int opcode_modifier;
-  unsigned int available;
+  uint32_t base_opcode;
+  uint32_t extension_opcode;
+  uint32_t opcode_modifier;
+  uint32_t available;
 } mnemonic_extension;
 
 /* extension_opcode */
diff --git a/cpus/x86/cpu_errors.h b/cpus/x86/cpu_errors.h
index 9a9dd4d..83bdb40 100644
--- a/cpus/x86/cpu_errors.h
+++ b/cpus/x86/cpu_errors.h
@@ -11,7 +11,7 @@
   "%%%s not allowed with '%c' suffix",ERROR,                    /* 10 */
   "illegal suffix '%c'",ERROR,
   "instruction has no suffix and no register operands - size is unknown",ERROR,
-  "illegal relocation",ERROR,
+  "UNUSED",ERROR,
   "memory operand expected",ERROR,
   "you cannot pop %%%s",ERROR,                                  /* 15 */
   "translating to %s %%%s,%%%s",WARNING,
diff --git a/cpus/z80/cpu.c b/cpus/z80/cpu.c
index 7686306..4bb46c7 100644
--- a/cpus/z80/cpu.c
+++ b/cpus/z80/cpu.c
@@ -37,7 +37,7 @@
  * Note: All z80 opcodes work as expected
  */
 mnemonic mnemonics[] = {
-    "adc",  { OP_HL|OP_INDEX|OP_RALT, OP_INDEX|OP_ARITH16 },    { TYPE_ARITH16, 0xed4a, CPU_ZILOG|CPU_RABBIT, F_ALTD },
+    "adc",  { OP_HL|OP_INDEX|OP_RALT, OP_ARITH16 },             { TYPE_ARITH16, 0xed4a, CPU_ZILOG|CPU_RABBIT, F_ALTD },
     "adc",  { OP_REG8|OP_INDEX },                               { TYPE_ARITH8,  0x88, CPU_ALL, F_ALL, 0, 0, RCM_EMU_INCREMENT },
     "adc",  { OP_REG8|OP_INDEX },                               { TYPE_ARITH8,  0x7f88, CPU_RCM4000, F_ALL },
     "adc",  { OP_A|OP_RALT, OP_REG8 | OP_INDEX },               { TYPE_ARITH8,  0x88, CPU_ALL, F_ALTD, 0, 0, RCM_EMU_INCREMENT },
@@ -180,6 +180,7 @@ mnemonic mnemonics[] = {
     "jp",   { OP_FLAGS, OP_ABS16 },                             { TYPE_FLAGS, 0xc2, CPU_ALL, 0 },
     "jp",   { OP_FLAGS_RCM, OP_ABS16 },                         { TYPE_FLAGS, 0xA2, CPU_RCM4000, 0 },
     "jp",   { OP_HL|OP_INDIR|OP_INDEX },                        { TYPE_NONE, 0xE9, CPU_ALL, 0 },
+    "jp",   { OP_HL|OP_INDEX },                                 { TYPE_NONE, 0xE9, CPU_ALL, 0 },
     "jp",   { OP_ABS16 },                                       { TYPE_NONE, 0xc3, CPU_ALL, 0 },
 
     "lcall",{ OP_ABS24 },                                       { TYPE_NONE, 0xcf, CPU_RABBIT, 0 },
@@ -428,6 +429,7 @@ mnemonic mnemonics[] = {
     "out",  { OP_PORT, OP_REG8},                                { TYPE_MISC8, 0xed41, CPU_ZILOG, 0 },  
     "out",  { OP_PORT       },                                  { TYPE_NONE, 0xed71, CPU_ZILOG, 0 }, /* Undoc out(c) */ 
     "out",  { OP_PORT, OP_F },                                  { TYPE_NONE, 0xed71, CPU_ZILOG, 0 }, /* Undoc out (c),f */
+    "out",  { OP_PORT, OP_NUMBER },                             { TYPE_OUT_C_0, 0xed71, CPU_ZILOG, 0 }, /* Undoc out (c),0 */
     "out",  { OP_ADDR8, OP_A },                                 { TYPE_NONE, 0xD3, CPU_8080|CPU_ZILOG, 0 },   /* out (xx),a */
     "out0", { OP_ADDR8, OP_REG8 },                              { TYPE_MISC8, 0xed01, CPU_Z180|CPU_EZ80, 0 }, /* out0 (xx),r */
 
@@ -574,7 +576,7 @@ mnemonic mnemonics[] = {
 
 int mnemonic_cnt=sizeof(mnemonics)/sizeof(mnemonics[0]);
 
-char *cpu_copyright="vasm 8080/gbz80/z80/z180/rcmX000 cpu backend 0.2b (c) 2007,2009 Dominic Morris";
+char *cpu_copyright="vasm 8080/gbz80/z80/z180/rcmX000 cpu backend 0.2g (c) 2007,2009 Dominic Morris";
 char *cpuname = "z80";
 int bitsperbyte = 8;
 int bytespertaddr = 2;
@@ -697,14 +699,20 @@ int ext_unary_eval(int type,taddr val,taddr *result,int cnst)
     return 0;  /* unknown type */
 }
 
-symbol *ext_find_base(expr *p,section *sec,taddr pc)
+int ext_find_base(symbol **base,expr *p,section *sec,taddr pc)
 {
+    if ( p->type==DIV || p->type ==MOD) {
+        if (p->right->type == NUM && p->right->c.val == 256 ) {
+           p->type = p->type == DIV ? HIBYTE : LOBYTE;
+        }
+    } else if ( p->type == BAND && p->right->type == NUM && p->right->c.val == 255 ) {
+        p->type = LOBYTE;
+    }
     if (p->type==LOBYTE || p->type==HIBYTE) {
         modifier = p->type;
-        return find_base(p->left,sec,pc);
+        return find_base(p->left,base,sec,pc);
     }
-    modifier = 0;
-    return 0;
+    return BASE_ILLEGAL;
 }
                                                 
 
@@ -812,7 +820,11 @@ int parse_operand(char *p, int len, operand *op, int optype)
     op->bit = 0;
 
     p = skip(p);
-    if ( *p == '(' ) {
+    /* Here I disable the possiblity to use parentheses around constants 
+     * when addressing is not possible. This old behavior created a lot of
+     * inexisting instructions and bugs.
+     */
+    if ( *p == '(' && optype != OP_DATA && check_indir(p,start+len) ) {
         int   llen;
         char *end;
         p++;
@@ -905,8 +917,8 @@ int parse_operand(char *p, int len, operand *op, int optype)
                 } 
             }
         } else {
-            if ( *p == '#' ) { /* Constant identifier - compatibility with z80asm */
-                p++;
+            if ( z80asm_compat && *p == '#' ) {
+                p++;  /* Constant identifier - compatibility with z80asm */
             }
             if ( ( op->value = parse_expr(&p) ) != NULL ) {
                 opt = OP_ABS16;
@@ -1055,6 +1067,7 @@ int parse_operand(char *p, int len, operand *op, int optype)
             if ( !PERMITTED(opt, optype, OP_INDIR) || op->value == NULL ) {
                 goto nomatch;
             }
+        case OP_DATA:
             opt = optype;
             break;
         case OP_PORT:
@@ -1221,10 +1234,10 @@ char *parse_cpu_special(char *start)
     return start;
 }
 
-taddr instruction_size(instruction *ip,  section *sec,taddr pc)
+size_t instruction_size(instruction *ip, section *sec, taddr pc)
 {
     mnemonic *opcode = &mnemonics[ip->code];
-    int       size;
+    size_t    size;
 
     /* Try and find the right opcode as necessary */
     if ( (opcode->ext.cpus & cpu_type)  ) {
@@ -1331,6 +1344,25 @@ taddr instruction_size(instruction *ip,  section *sec,taddr pc)
 
 
 
+static taddr apply_modifier(rlist *rl, taddr val)
+{
+    switch (modifier) {
+    case LOBYTE:
+        if (rl)
+            ((nreloc *)rl->reloc)->mask = 0xff;
+        val = val & 0xff;
+        break;
+    case HIBYTE:
+        if (rl)
+            ((nreloc *)rl->reloc)->mask = 0xff00;
+        val = (val >> 8) & 0xff;
+        break;
+    }
+    return val;
+}
+
+
+
 static void write_opcode(mnemonic *opcode, dblock *db, int size, section *sec, taddr pc, operand *op1, operand *op2, int add, instruction_ext *ext)
 {
     int   reg1 = 0 , reg2 = 0;
@@ -1452,13 +1484,24 @@ static void write_opcode(mnemonic *opcode, dblock *db, int size, section *sec, t
     /* Now we can write out the index */
     if ( indexit ) {
         taddr val = 0;
+        int cbmode = 0;
+        /* If it's a CB code then the index isn't last */
+        if ( (( opcode->ext.opcode & 0xffffff00 ) >> 8) == 0x000000cb )
+            cbmode = 1;
         if ( indexit->value && eval_expr(indexit->value, &val, sec, pc) == 0 ) {
-            cpu_error(7); /* Need to have a constant index */
+            symbol *base;
+            rlist *rl;
+            modifier = 0;
+            if ( find_base(indexit->value, &base, sec, pc) == BASE_OK ) {
+                rl = add_nreloc(&db->relocs, base, val, REL_ABS, 8,
+                                cbmode ? ((d-1)-start)*8 : (d-start)*8);
+                val = apply_modifier(rl, val);
+            } else
+                general_error(38);  /* illegal relocation */
         }
-        if ( ( (indexit->reg == REG_SP || ( indexit->reg & REG_PLAIN) == REG_HL) && val >= 0 && val <= 255 ) 
+        if ( ( (indexit->reg == REG_SP || ( indexit->reg & REG_PLAIN) == REG_HL) && val >= 0 && val <= 255 )
              || ( val >= -128 && val <= 127 ) )  {
-            /* If it's a CB code then the index isn't last */
-            if ( (( opcode->ext.opcode & 0xffffff00 ) >> 8) == 0x000000cb ) {
+            if ( cbmode ) {
                 *d = *(d - 1);
                 *(d -1 ) = val;
             } else {
@@ -1475,28 +1518,20 @@ static void write_opcode(mnemonic *opcode, dblock *db, int size, section *sec, t
             symbol *base;
             rlist *rl;
             modifier = 0;
-            if ( base = find_base(expr,sec,pc) ) {
+            if ( find_base(expr, &base, sec, pc) == BASE_OK ) {
                 if ( opcode->ext.mode == TYPE_RELJUMP ) {
-                    add_reloc(&db->relocs,base, val -1, REL_PC, exprsize * 8, (d - start) * 8);
+                    add_nreloc(&db->relocs, base, val -1, REL_PC, exprsize * 8, (d - start) * 8);
                     val -= (pc + db->size);
                     if (modifier)
                         ierror(0);  /* @@@ Hi/Lo modifier makes no sense here? */
                 } else {
-                    rl = add_reloc(&db->relocs,base, val, REL_ABS, exprsize * 8, (d - start) * 8);
-                    switch (modifier) {
-                    case LOBYTE:
-                        ((nreloc *)rl->reloc)->mask = 0xff;
-                        val = val & 0xff;
-                        break;
-                    case HIBYTE:
-                        ((nreloc *)rl->reloc)->mask = 0xff00;
-                        val = (val >> 8) & 0xff;
-                        break;
-                    }
+                    rl = add_nreloc(&db->relocs, base, val, REL_ABS,
+                                    exprsize * 8, (d - start) * 8);
+                    val = apply_modifier(rl, val);
                 }
                 
             } else {
-                /* What does this mean? */
+                general_error(38);  /* illegal relocation */
             }
         } else {
             /* It was a constant, if it's relative calculate now */
@@ -1565,8 +1600,11 @@ static void rabbit_emu_call(instruction *ip,dblock *db,section *sec,taddr pc)
         /* Create a temporary expression */
         expr = parse_expr(&t_expr);
         if ( eval_expr(expr, &val, sec, pc) == 0 ) {
-            symbol *base = find_base(expr,sec,pc);
-            add_reloc(&db->relocs,base, val, REL_ABS, 8, (d - start) * 8);
+            symbol *base;
+            if ( find_base(expr, &base, sec, pc) == BASE_OK )
+                add_nreloc(&db->relocs,base, val, REL_ABS, 8, (d - start) * 8);
+            else
+                general_error(38);  /* illegal relocation */
         } 
         free_expr(expr);
         *d++ = val % 256;
@@ -1575,8 +1613,11 @@ static void rabbit_emu_call(instruction *ip,dblock *db,section *sec,taddr pc)
     *d++ = 0xcd;  /* call */
     /* Evaluate the real expression */
     if ( eval_expr(ip->op[1]->value, &val, sec, pc) == 0 ) {
-        symbol *base = find_base(ip->op[1]->value,sec,pc);
-        add_reloc(&db->relocs,base, val, REL_ABS, 8, (d - start) * 8);
+        symbol *base;
+        if ( find_base(ip->op[1]->value, &base, sec, pc) == BASE_OK )
+            add_nreloc(&db->relocs,base, val, REL_ABS, 8, (d - start) * 8);
+        else
+            general_error(38);  /* illegal relocation */
     } 
     *d++ = val % 256;
     *d++ = val / 256;
@@ -1597,7 +1638,7 @@ static int is_offset_operand(operand *op)
     return 0;
 }
 
-dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
+dblock *eval_data(operand *op,size_t bitsize,section *sec,taddr pc)
 {
     dblock *db = new_dblock();
     taddr val;
@@ -1609,27 +1650,21 @@ dblock *eval_data(operand *op,taddr bitsize,section *sec,taddr pc)
     db->data = mymalloc(db->size);
     if (!eval_expr(op->value,&val,sec,pc)) {
         symbol *base;
+        int btype;
         rlist *rl;
 
         modifier = 0;
-        base = find_base(op->value,sec,pc);
- 
-        rl = add_reloc(&db->relocs,base,val,REL_ABS,bitsize,0);
-        switch (modifier) {
-        case LOBYTE:
-            ((nreloc *)rl->reloc)->mask = 0xff;
-            val = val & 0xff;
-            break;
-        case HIBYTE:
-            ((nreloc *)rl->reloc)->mask = 0xff00;
-            val = (val >> 8) & 0xff;
-            break;
+        btype = find_base(op->value, &base, sec, pc);
+        if ( btype == BASE_OK || ( btype == BASE_PCREL && modifier == 0 ) ) {
+            rl = add_nreloc(&db->relocs, base, val,
+                            btype==BASE_PCREL ? REL_PC : REL_ABS, bitsize, 0);
+            val = apply_modifier(rl, val);
         }
+        else if (btype != BASE_NONE)
+            general_error(38);  /* illegal relocation */
     }
-    if (bitsize < 16) {
-        if (val<0 || val>0xff)
-            cpu_error(4);  /* operand doesn't fit into 8-bits */
-    }
+    if (bitsize < 16 && (val<-0x80 || val>0xff))
+        cpu_error(3, val);  /* operand doesn't fit into 8-bits */
     setval(0,db->data,db->size,val);
  
     return db;
@@ -1639,6 +1674,7 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
 {
     dblock *db;
     mnemonic *opcode = &mnemonics[ip->code];
+    symbol *base;
     unsigned char *d;
     taddr val = 0;
     int   size = 0, reg,offs = 0; 
@@ -1689,8 +1725,10 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
                     /* Create a temporary expression */
                     expr = parse_expr(&bufptr);
                     if ( eval_expr(expr, &val, sec, pc) == 0 ) {
-                        symbol *base = find_base(expr,sec,pc);
-                        add_reloc(&db->relocs,base, val, REL_ABS, 8,  8);
+                        if (find_base(expr, &base, sec, pc) == BASE_OK)
+                            add_nreloc(&db->relocs,base, val, REL_ABS, 8, 8);
+                        else
+                            general_error(38);  /* illegal relocation */
                     } 
                     *d++ = val % 256;
                     *d++ = val / 256;
@@ -1781,8 +1819,6 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
     }
 
 
-
-
     db = new_dblock();
 
     db->size = size;
@@ -1805,11 +1841,46 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
         }
         break;
     case TYPE_LD8:
+        /* ix/iy couples forbidden */
+        if ( (ip->op[0]->reg & (REG_IX |REG_IY)) &&
+             (ip->op[1]->reg & (REG_IX|REG_IY)) &&
+             (((ip->op[0]->reg & REG_IX) && (ip->op[1]->reg & REG_IY)) ||
+              ((ip->op[1]->reg & REG_IX) && (ip->op[0]->reg & REG_IY)) )){
+            cpu_error(23,opcode->name);
+        }
+        /* forbid ld ixl, (ix+0) */
+        if ( (ip->op[0]->reg & (REG_IX |REG_IY)) &&
+             (ip->op[1]->reg & (REG_IX|REG_IY)) &&
+             (ip->op[1]->type & OP_OFFSET)
+           ){
+            cpu_error(23,opcode->name);
+        }
+        /* forbid ld ixl,(hl) or similar expressions */
+        if ( (ip->op[0]->reg & (REG_IX|REG_IY)) &&
+             (ip->op[1]->reg & REG_PLAIN) == REG_HLREF)
+        {
+            cpu_error(24,opcode->name);
+        }
         offs =  ((ip->op[0]->reg & REG_PLAIN) * 8) + ( ip->op[1]->reg & REG_PLAIN);
         break;
     case TYPE_ARITH16:
+        /* Forbid instructions of type ld (hl), (memory) */
+        if ( opcode->operand_type[1] && (opcode->operand_type[1] & (OP_ADDR)) &&
+             opcode->operand_type[0] && (OP_INDIR) &&
+             (ip->op[0]->reg & REG_PLAIN) == REG_HL) {
+            cpu_error(25);
+        }
+        /* Forbid instructions of type ld (memory), (hl) */
+        if (BASIC_TYPE(ip->op[0]->type) == OP_ABS16 && 
+             BASIC_TYPE(ip->op[1]->type) == OP_HL) {
+            cpu_error(25);
+        }
         if ( opcode->operand_type[1] && (opcode->operand_type[1] & ( OP_ARITH16)) ) {
             offs = (ip->op[1]->reg & REG_PLAIN) * 16;
+            if ( (ip->op[0]->reg & REG_PLAIN) == REG_HL && (ip->op[1]->reg & REG_PLAIN) == REG_HL &&
+                (ip->op[0]->reg & (REG_IX|REG_IY)) != (ip->op[1]->reg & (REG_IX|REG_IY)) ) {
+                cpu_error(21,opcode->name);
+            }
         } else {
             if ( (ip->op[0]->reg & REG_PLAIN) == REG_AF ) {
                 offs = 3 * 16;
@@ -1818,7 +1889,6 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
             }
         }
         reg = ip->op[0]->reg & (REG_IX | REG_IY);
-        /* TODO: Check that ix/iy match on both operands */
         break;
     case TYPE_IDX32:
         offs = 0;
@@ -1907,11 +1977,30 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
             error = 1;
         }
         break;
-    case TYPE_RST:
-        if ( eval_expr(ip->op[0]->value, &val, sec, pc) == 0 ) {
+    case TYPE_OUT_C_0:
+        if ( eval_expr(ip->op[1]->value, &val, sec, pc) == 0 ) {
             cpu_error(19, opcode->name);
             error = 1;
-        } else  if ( val >=0 && val <= 56 && val % 8 == 0) {
+        } else if (val != 0){
+            cpu_error(22,opcode->name);
+            error = 1;
+        }
+        break;
+    case TYPE_RST:
+        if ( eval_expr(ip->op[0]->value, &val, sec, pc) == 0 ) {
+            /* Also allow known labels from an absolute program segment */
+            if ( find_base(ip->op[0]->value, &base, sec, pc) != BASE_OK ) {
+                general_error(38);  /* illegal relocation */
+                error = 1;
+                break;
+            }
+            if ( !( base->sec->flags & ABSOLUTE ) || EXTREF(base) ) {
+                cpu_error(19, opcode->name);
+                error = 1;
+                break;
+            }
+            offs = val;
+        } else if ( (val & ~0x38) == 0 ) {
             if ( cpu_type == CPU_RCM2000 ) {
                 /* Check for valid rst on Rabbit */
                 if ( val == 0 ||  val == 8 || val == 0x30 ) {
@@ -1923,7 +2012,6 @@ dblock *eval_instruction(instruction *ip,section *sec,taddr pc)
         } else {
             cpu_error(5, val, val);  /* rst out of range */
             error = 1;
-            break;
         }
         break;
     }
diff --git a/cpus/z80/cpu.h b/cpus/z80/cpu.h
index e10e10c..02f2287 100644
--- a/cpus/z80/cpu.h
+++ b/cpus/z80/cpu.h
@@ -34,18 +34,16 @@
 /* maximum number of operands for one mnemonic */
 #define MAX_OPERANDS 2
 
-/* allowed to call parse_operand() with an arbitrary number of operands */
-#define CPU_CHECKS_OPCNT 0
-
 /* maximum number of mnemonic-qualifiers per mnemonic */
 #define MAX_QUALIFIERS 0
 
 /* maximum number of additional command-line-flags for this cpu */
 
 /* data type to represent a target-address */
-typedef long taddr;
+typedef int32_t taddr;
+typedef uint32_t utaddr;
 
-#define HAVE_INSTRUCTION_EXTENSION
+#define HAVE_INSTRUCTION_EXTENSION 1
 typedef struct {
     int  altd;
     int  ioi;
@@ -59,17 +57,17 @@ typedef struct {
 #define DATA_ALIGN(n) 1
 
 /* operand class for n-bit data definitions */
-#define DATA_OPERAND(n) OP_ABS
+#define DATA_OPERAND(n) OP_DATA
 
 /* we define two additional unary operations, '<' and '>' */
 int ext_unary_eval(int,taddr,taddr *,int);
-symbol *ext_find_base(expr *,section *,taddr);
+int ext_find_base(symbol **,expr *,section *,taddr);
 #define LOBYTE (LAST_EXP_TYPE+1)   
 #define HIBYTE (LAST_EXP_TYPE+2)
 #define EXT_UNARY_NAME(s) (*s=='<'||*s=='>')
 #define EXT_UNARY_TYPE(s) (*s=='<'?LOBYTE:HIBYTE)
 #define EXT_UNARY_EVAL(t,v,r,c) ext_unary_eval(t,v,r,c)
-#define EXT_FIND_BASE(e,s,p) ext_find_base(e,s,p)
+#define EXT_FIND_BASE(b,e,s,p) ext_find_base(b,e,s,p)
 
 
 /* type to store each operand */
@@ -223,6 +221,7 @@ typedef struct {
 #define OP_IDX32  0x25
 #define OP_SU     0x26
 #define OP_HTR    0x27
+#define OP_DATA   0x3e
 
 #define OP_MASK     0x3f     /* Gets the basic operation out */
 
@@ -263,3 +262,4 @@ typedef struct {
 #define TYPE_IDX32    0x0c    /* p? * 16 */
 #define TYPE_NOPREFIX 0x0d    /* Don't add on an indexing prefix (RCM) */
 #define TYPE_IDX32R   0x0e    /* p? * 16 + p? * 64*/
+#define TYPE_OUT_C_0  0x0f    /* for out (c), number, number can only be 0 */
diff --git a/cpus/z80/cpu_errors.h b/cpus/z80/cpu_errors.h
index b45bae9..bfdb342 100644
--- a/cpus/z80/cpu_errors.h
+++ b/cpus/z80/cpu_errors.h
@@ -19,3 +19,8 @@
     "%s specifier has no effect on the opcode %s",WARNING,
     "Operand value must evaluate to a constant for opcode %s",ERROR,
     "Unhandled operand type wanted 0x%x got 0x%x",ERROR, /* 20 */
+    "Missed matched index registers on %s",ERROR,
+    "Only out (c),0 is supported for the opcode %s",ERROR,
+    "Operations between different index registers are forbidden",ERROR,
+    "Operations between ix/iy/hl are forbidden", ERROR, 
+    "Double indirection forbidden", ERROR, /* 25 */
diff --git a/doc/cpu_6502.texi b/doc/cpu_6502.texi
index e97be12..009fa56 100644
--- a/doc/cpu_6502.texi
+++ b/doc/cpu_6502.texi
@@ -3,7 +3,7 @@ microprocessor family.
 
 @section Legal
 
-    This module is copyright in 2002,2006,2008,2009 by Frank Wille.
+    This module is copyright in 2002,2006,2008-2012,2014 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -19,13 +19,16 @@ microprocessor family.
 This module provides the following additional options:
 
 @table @option
+    @item -c02
+        Recognize all 65C02 instructions. This excludes DTV (@option{-dtv})
+        and illegal (@option{-illegal}) instructions.
+    @item -dtv
+        Recognize the three additional C64-DTV instructions.
+    @item -illegal
+        Allow 'illegal' 6502 instructions to be recognized.
     @item -opt-branch
         Enables 'optimization' of B<cc> branches into
         "B<!cc> *+3 ; JMP label" sequences when necessary.
-    @item -illegal
-        Allow 'illegal' 6502 instructions to be recognized.
-    @item -dtv
-        Recognize the three additional C64-DTV instructions.
 @end table
 
 @section General
@@ -57,6 +60,10 @@ This backend provides the following specific extensions:
  and @code{>} for the high-byte. It has to be the first character before
  an expression.
 
+@item When applying the operation @code{/256}, @code{%256} or @code{&256}
+ on a label, an appropriate lo/hi-byte relocation will automatically be
+ generated.
+
 @end itemize
 
 @section Optimizations
@@ -76,7 +83,7 @@ This backend performs the following operand optimizations:
 
 @itemize @minus
 
-@item None?
+@item None.
 
 @end itemize
 
@@ -93,6 +100,5 @@ This module has the following error messages:
 @item 2005: relocation does not allow hi/lo modifier
 @item 2006: operand doesn't fit into 8-bits
 @item 2007: branch destination out of range
-@item 2008: illegal relocation
 
 @end itemize
diff --git a/doc/cpu_6800.texi b/doc/cpu_6800.texi
new file mode 100644
index 0000000..0031e7c
--- /dev/null
+++ b/doc/cpu_6800.texi
@@ -0,0 +1,80 @@
+This chapter documents the backend for the Motorola 6800
+microprocessor family.
+
+@section Legal
+
+    This module is copyright in 2013-2014 by Esben Norby and Frank Wille.
+
+    This archive may be redistributed without modifications and used
+    for non-commercial purposes.
+
+    Distributing modified versions and commercial usage needs my written
+    consent.
+
+    Certain modules may fall under additional copyrights.
+
+
+@section Additional options for this module
+
+This module provides the following additional options:
+
+@table @option
+    @item -m6800
+        Generate code for the 6800 CPU (default setting).
+    @item -m68hc11
+        Generate code for the 68HC11 CPU.
+@end table
+
+@section General
+
+This backend accepts 6800 family instructions for the following CPUs:
+6800, 6801, 6802, 6803, 6805, 68HC05, 6808, 68HC08, 68HC11.
+
+The target address type is 16 bit.
+
+Instructions consist of one up to five bytes and require no alignment.
+There is also no alignment requirement for sections and data.
+
+@section Extensions
+
+This backend provides the following specific extensions:
+
+@itemize @minus
+
+@item When an instruction supports direct and extended addressing mode
+ the @code{<} character can be used to force direct mode and the
+ @code{>} character forces extended mode. Otherwise the assembler selects
+ the best mode automatically, which defaults to extended mode for external
+ symbols.
+
+@item When applying the operation @code{/256}, @code{%256} or @code{&256}
+ on a label, an appropriate lo/hi-byte relocation will automatically be
+ generated.
+
+@end itemize
+
+@section Optimizations
+
+None.
+
+@section Known Problems
+
+    Some known problems of this module at the moment:
+
+@itemize @minus
+
+@item None?
+
+@end itemize
+
+@section Error Messages
+
+This module has the following error messages:
+
+@itemize @minus
+
+@item 2001: data size %d not supported
+@item 2002: operand doesn't fit into 8-bits
+@item 2003: branch destination out of range
+
+@end itemize
diff --git a/doc/cpu_arm.texi b/doc/cpu_arm.texi
index 5c7150f..1e9994c 100644
--- a/doc/cpu_arm.texi
+++ b/doc/cpu_arm.texi
@@ -19,6 +19,27 @@ microprocessor family.
 This module provides the following additional options:
 
 @table @option
+    @item -a2
+        Generate code compatible with ARM V2 architecture.
+
+    @item -a3
+        Generate code compatible with ARM V3 architecture.
+
+    @item -a3m
+        Generate code compatible with ARM V3m architecture.
+
+    @item -a4
+        Generate code compatible with ARM V4 architecture.
+
+    @item -a4t
+        Generate code compatible with ARM V4t architecture.
+
+    @item -big
+        Output big-endian code and data.
+
+    @item -little
+        Output little-endian code and data (default).
+
     @item -m2
         Generate code for the ARM2 CPU.
 
@@ -94,29 +115,10 @@ This module provides the following additional options:
     @item -mstrongarm1100
         Generate code for the STRONGARM1100 CPU.
 
-    @item -a2
-        Generate code compatible with ARM V2 architecture.
-
-    @item -a3
-        Generate code compatible with ARM V3 architecture.
-
-    @item -a3m
-        Generate code compatible with ARM V3m architecture.
-
-    @item -a4
-        Generate code compatible with ARM V4 architecture.
-
-    @item -a4t
-        Generate code compatible with ARM V4t architecture.
-
-    @item -little
-        Output little-endian code and data (default).
-
-    @item -big
-        Output big-endian code and data.
-
-    @item -thumb
-        Start assembling in Thumb mode.
+    @item -opt-adr
+        The @code{ADR} directive will be automatically converted into
+        @code{ADRL} if required (which inserts an additional
+        @code{ADD}/@code{SUB} to calculate an address).
 
     @item -opt-ldrpc
         The maximum range in which PC-relative symbols can be accessed
@@ -125,10 +127,8 @@ This module provides the following additional options:
         This is done by automatically inserting an additional @code{ADD}
         or @code{SUB} instruction before the @code{LDR}/@code{STR}.
 
-    @item -opt-adr
-        The @code{ADR} directive will be automatically converted into
-        @code{ADRL} if required (which inserts an additional
-        @code{ADD}/@code{SUB} to calculate an address).
+    @item -thumb
+        Start assembling in Thumb mode.
 @end table
 
 
diff --git a/doc/cpu_c16x.texi b/doc/cpu_c16x.texi
index e2edf96..72cf296 100644
--- a/doc/cpu_c16x.texi
+++ b/doc/cpu_c16x.texi
@@ -51,7 +51,7 @@ Default alignment for sections and instructions is 2 bytes.
 
 This backend provides the following specific extensions:
 
-@table @minus
+@itemize @minus
 
 @item
 There is a pseudo instruction @code{jmp} that will be translated
@@ -82,13 +82,13 @@ Example:
         mov r3,#SEG farfunc
 @end example
 
-@end table
+@end itemize
 
 @section Optimizations
 
 This backend performs the following optimizations:
 
-@table @minus
+@itemize @minus
 
 @item
  @code{jmp} is translated to @code{jmpr}, if possible. Also, if
@@ -104,7 +104,7 @@ This backend performs the following optimizations:
  For instruction that have two forms @code{gpr,#IMM3/4} and
         @code{reg,#IMM16} the smaller form is used, if possible.
 
-@end table
+@end itemize
 
 @section Known Problems
 
@@ -120,5 +120,12 @@ This backend performs the following optimizations:
 
 This module has the following error messages:
 
-FIXME
-
+@itemize @minus
+@item 2001: illegal operand
+@item 2002: word register expected
+@item 2004: value does not find in %d bits
+@item 2005: data size not supported
+@item 2006: illegal use of SOF
+@item 2007: illegal use of SEG
+@item 2008: illegal use of DPP prefix
+@end itemize
diff --git a/doc/cpu_jagrisc.texi b/doc/cpu_jagrisc.texi
new file mode 100644
index 0000000..d1224bb
--- /dev/null
+++ b/doc/cpu_jagrisc.texi
@@ -0,0 +1,131 @@
+This chapter documents the backend for the Atari Jaguar GPU/DSP RISC processor.
+
+@section Legal
+
+    This module is copyright in 2014-2015 by Frank Wille.
+
+    This archive may be redistributed without modifications and used
+    for non-commercial purposes.
+
+    Distributing modified versions and commercial usage needs my written
+    consent.
+
+    Certain modules may fall under additional copyrights.
+
+
+@section Additional options for this module
+
+This module provides the following additional options:
+
+@table @option
+    @item -big
+        Output big-endian code and data (default).
+
+    @item -little
+        Output little-endian code and data.
+
+    @item -many
+        Generate code for GPU or DSP RISC. All instructions are accepted
+        (default).
+
+    @item -mdsp
+    @itemx -mjerry
+        Generate code for the DSP RISC (part of Jerry).
+
+    @item -mgpu
+    @itemx -mtom
+        Generate code for the GPU RISC (part of Tom).
+
+@end table
+
+
+@section General
+
+This backend accepts RISC instructions for the GPU or DSP in Atari's
+Jaguar custom chip set according to the "Jaguar Technical Reference Manual
+for Tom & Jerry", Revision 8. Documentation bugs were fixed by using
+various sources on the net.
+
+The target address type is 32 bits.
+
+Default alignment for instructions is 2 bytes.
+Data is aligned to its natural alignment by default.
+
+
+@section Optimizations
+
+This backend performs the following optimizations and translations for
+the GPU/DSP RISC instruction set:
+
+@itemize @minus
+
+@item @code{load (Rn+0),Rm} is optimized to @code{load (Rn),Rm}.
+
+@item @code{store Rn,(Rm+0)} is optimized to @code{store Rn,(Rm)}.
+
+@end itemize
+
+
+@section Extensions
+
+This backend extends the selected syntax module by the following
+directives (note that a leading dot is optional):
+
+@table @code
+@item <symbol> ccdef <expression>
+      Allows defining a symbol for the condition codes used in @code{jump}
+      and @code{jr} instructions. Must be constant number in the range of
+      0 to 31 or another condition code symbol.
+
+@item ccundef <symbol>
+      Undefine a condition code symbol previously defined via @code{ccdef}.
+
+@item dsp
+      Select DSP instruction set.
+
+@item <symbol> equr <Rn>
+      Define a new symbol named <symbol> and assign the address register
+      @code{Rn} to it. <Rn> may also be another register symbol.
+      Note that a register symbol must be defined before it can be used.
+
+@item equrundef <symbol>
+      Undefine a register symbol previously defined via @code{equr}.
+
+@item gpu
+      Select GPU instruction set.
+
+@item <symbol> regequ <Rn>
+      Equivalent to @code{equr}.
+
+@item regundef <symbol>
+      Undefine a register symbol previously defined via @code{regequ}.
+
+@end table      
+
+All directives may be optionally preceded by a dot (@code{.}), for
+compatibility with various syntax modules.
+
+
+@section Known Problems
+
+    Some known problems of this module at the moment:
+
+@itemize @minus
+
+@item Encoding of @code{MOVEI} instruction in little-endian mode is unkown.
+@item The developer has to provide the necessary @code{NOP} instructions
+      after jumps, or @code{OR} instructions to work around hardware bugs,
+      himself.
+
+@end itemize
+
+@section Error Messages
+
+This module has the following error messages:
+
+@itemize @minus
+
+@item 2001: data size %d not supported
+@item 2002: value from %ld to %ld required
+
+@end itemize
diff --git a/doc/cpu_m68k.texi b/doc/cpu_m68k.texi
index e346642..39cf6cd 100644
--- a/doc/cpu_m68k.texi
+++ b/doc/cpu_m68k.texi
@@ -3,7 +3,7 @@ microprocessor family.
 
 @section Legal
 
-    This module is copyright in 2002-2010 by Frank Wille.
+    This module is copyright in 2002-2014 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -111,9 +111,10 @@ This module provides the following additional options:
         different section, into absolute jump instructions.
 
     @item -opt-clr
-        Enables optimization from @code{MOVE #0,<ea>} into @code{CLR <ea>}.
-        Note that @code{CLR} will execute a read-modify-write cycle
-        on the MC68000.
+        Enables optimization from @code{MOVE #0,<ea>} into @code{CLR <ea>}
+        for the MC68000. Note that @code{CLR} will execute a read-modify-write
+        cycle on the 68000, so it is disabled by default. With 68010 and
+        higher this is a generic standard optimization.
 
     @item -opt-fconst
         Floating point constants are loaded with the lowest precision
@@ -127,8 +128,10 @@ This module provides the following additional options:
         @code{FMUL #1/c,FPn}.
 
     @item -opt-lsl
-        Allows optimization of @code{LSL} into @code{ADD}. This optimization
-        may modify the V-flag, which might not be intended.
+        Allows optimization of @code{LSL #1} into @code{ADD}. It is also
+        needed to optimize @code{ASL #2} and @code{LSL #2} into two @code{ADD}
+        instructions (together with @option{-opt-speed}).
+        These optimizations may modify the V-flag, which might not be intended.
 
     @item -opt-movem
         Enables optimization from @code{MOVEM <ea>,Rn} into
@@ -150,6 +153,15 @@ This module provides the following additional options:
         situations (e.g. @code{MULS.W #4,Dn}). The latter will additionally
         require the @option{-opt-speed} flag.
 
+    @item -opt-div
+        Unsigned immediate divisors, which are a power of two (from 2 to 256),
+        are optimized to shifts. Divisions by 1 are replaced by @code{TST.L Dn}
+        (32-bit) or @code{MVZ.W Dn,Dn} (16-bit, ColdFire only). Divisions by
+        -1 are replaced by @code{NEG.L Dn} (32-bit) or by a combination of
+        @code{NEG.W Dn} and @code{MVZ.W Dn,Dn} (16-bit, ColdFire only).
+        This optimization will leave the flags in a different state as
+        can normally be expected after a division instruction.
+
     @item -opt-pea
         Enables optimization from @code{MOVE #x,-(SP)} into @code{PEA x}.
         This optimization will leave the flags unmodified, which might
@@ -157,15 +169,21 @@ This module provides the following additional options:
 
     @item -opt-speed
         Optimize for speed, even if this would increase code size.
-        It enables optimization of @code{ASL.W #2,Dn} into two
+        For example it enables optimization of @code{ASL.W #2,Dn} into two
         @code{ADD.W Dn,Dn} instructions. Or @code{MULS.W #-4,Dn} into
         @code{EXT.L Dn + ASL.L #2,Dn + NEG.L Dn}.
+        Generally the assembler will never optimize a single into multiple
+        instructions without this option.
 
     @item -opt-st
         Enables optimization from @code{MOVE.B #-1,<ea>} into @code{ST <ea>}.
         This optimization will leave the flags unmodified, which might
         not be intended.
 
+    @item -sc
+        All @code{JMP} and @code{JSR} instructions to external labels
+        will be converted into 16-bit PC-relative jumps.
+
     @item -showcrit
         Print all critical optimizations which have side effects. Among
         those are @code{-opt-lsl}, @code{-opt-mul}, @code{-opt-st},
@@ -178,33 +196,46 @@ This module provides the following additional options:
 
 In its default setting (no @option{-devpac} or @option{-phxass} option)
 vasm performs the following optimizations:
-@table @minus
+@itemize @minus
 @item Absolute to PC-relative.
 @item Branches without explicit size.
 @item Displacements (32 to 16 bit, @code{(0,An)} to @code{(An)}, etc).
+@item Optimize floating point constants to the lowest possible precision.
 @item Many instruction optimizations which are safe.
-@end table
+@end itemize
 
 @subsection Other options
 @table @option
-    @item -sdreg=<n>
-        Set the small data base register to @code{An}. <n> is valid
-        between 2 and 6.
-
-    @item -elfregs
-        Register names are preceded by a '%' to prevent confusion
-        with symbol names.
-
     @item -conv-brackets
         Brackets (@code{'['} and @code{']'}) in an operand are automatically
         converted into parentheses (@code{'('} and @code{')'}) as long as
         the CPU is 68000 or 68010. This is a compatibility option for some
         old assemblers.
 
-    @item -rangewarnings
-        Values which are out of range usually produce an error. With this
-        option the errors 2026, 2030, 2033 and 2037 will be displayed as
-        a warning, allowing the user to create an object file.
+    @item -devpac
+        All options are initially set to be Devpac compatible. Which means
+        that all optimizations are disabled, no debugging symbols will be
+        written and vasm will warn about any optimization being done.
+        When symbol output is enabled by {opt d+}, then the TOS symbol
+        table defaults to standard DRI format (limited to 8 characters).
+        Shift-right operations are performed using an unsigned 32-bit value.
+        Other options are the same as vasm's defaults.
+        The symbol @code{__G2} is defined, which contains information
+        about the selected cpu type.
+        The symbol @code{__LK} reflects the type of output file generated.
+        Which is 0 for TOS executables, 4 for Amiga executables and 3 for
+        Amiga object files. All other formats are represented by 99, as
+        they are unknown to Devpac.
+        It will also automatically enable @option{-guess-ext}.
+
+    @item -elfregs
+        Register names are preceded by a '%' to prevent confusion
+        with symbol names.
+
+    @item -guess-ext
+        Accept illegal size extensions for an instruction, as long as
+        the instruction is unsized or there is just a single size possible.
+        This is the default setting in PhxAss and Devpac compatibility mode.
 
     @item -phxass
         PhxAss-compatibilty mode. The "current PC symbol" (e.g. @code{*} in
@@ -214,13 +245,17 @@ vasm performs the following optimizations:
         @code{__FPU} and @code{__MMU} are defined.
         @code{JMP/JSR (label,PC)} will never be optimized (into a branch,
         for example).
-        It will also automatically enable @option{-opt-allbra}.
+        It will also automatically enable @option{-opt-allbra} and
+        @option{-guess-ext}.
 
-    @item -devpac
-        All options are initially set to be Devpac compatible. Which means
-        that all optimizations are disabled, no debugging symbols will be
-        written and vasm will warn about any optimization being done.
-        Other options are the same as vasm's defaults.
+    @item -rangewarnings
+        Values which are out of range usually produce an error. With this
+        option the errors 2026, 2030, 2033 and 2037 will be displayed as
+        a warning, allowing the user to create an object file.
+
+    @item -sdreg=<n>
+        Set the small data base register to @code{An}. <n> is valid
+        between 2 and 6.
 @end table
 
 @section General
@@ -230,19 +265,63 @@ Mototola's M68000 family Programmer's Reference Manual. Additionally
 it supports ColdFire instructions as described in Motorola's ColdFire
 Microprocessor Family Programmer's Reference Manual.
 
-The syntax for the scale factor in ColdFire @code{MAC} instruction is
+The syntax for the scale factor in ColdFire @code{MAC} instructions is
 @code{<<} for left- and @code{>>} for right-shift. The scale factor may be
-inserted as an optional operand, when needed. Example: @code{mac d0.l,d1.u,<<}.
+appended as an optional operand, when needed.
+Example: @code{mac d0.l,d1.u,<<}.
 
 The mask flag in @code{MAC} instructions is written as @code{&} and is
-appended directly on the effective address operand. Example:
+appended directly to the effective address operand. Example:
 @code{mac d0,d1,(a0)&,d2}.
 
 The target address type is 32bit.
 
-Default alignment for instructions is 2 bytes. Sections will be aligned
-to 8 bytes by default. The default alignment for data is 2 bytes, when
-the data size is larger than 8 bits.
+Default alignment for instructions is 2 bytes. The default alignment for
+data is 2 bytes, when the data size is larger than 8 bits.
+
+Depending on the selected cpu type the @code{__VASM} symbol will have
+a value defined by the following bits:
+@table @code
+@item bit 0
+      MC68000 instruction set. Also used by MC6830x, MC68322, MC68356.
+@item bit 1
+      MC68010 instruction set.
+@item bit 2
+      MC68020 instruction set.
+@item bit 3
+      MC68030 instruction set.
+@item bit 4
+      MC68040 instruction set.
+@item bit 5
+      MC68060 instruction set.
+@item bit 6
+      MC68881 or MC68882 FPU.
+@item bit 7
+      MC68851 PMMU.
+@item bit 8
+      CPU32. Any MC6833x or MC6834x CPU.
+@item bit 9
+      ColdFire ISA_A.
+@item bit 10
+      ColdFire ISA_A+.
+@item bit 11
+      ColdFire ISA_B.
+@item bit 12
+      ColdFire ISA_C.
+@item bit 13
+      ColdFire hardware division support.
+@item bit 14
+      ColdFire MAC instructions.
+@item bit 15
+      ColdFire enhanced MAC instructions.
+@item bit 16
+      ColdFire USP register.
+@item bit 17
+      ColdFire FPU instructions.
+@item bit 18
+      ColdFire MMU instructions.
+@end table
+
 
 @section Extensions
 
@@ -321,6 +400,11 @@ directives:
       previously defined small data mode, which might be switched off
       by a @code{far} directive.
 
+@item near code
+      All @code{JMP} and @code{JSR} instructions to external labels
+      will be converted into 16-bit PC-relative jumps. The small code
+      mode can be switched off by a @code{far} directive.
+
 @item opt <option>[,<option>...]
       Sets Devpac-compatible options. When option @option{-phxass} is
       given, then it will parse PhxAss options (which is discouraged,
@@ -335,7 +419,8 @@ directives:
         Case-sensitivity for all symbols, instructions and macros.
         Default is on.
       @item d
-        Include all symbols for debugging in the output file.
+        Include all symbols for debugging in the output file. May also
+        generate line debugging information in some output formats.
         Default is off in Devpac-comptability mode, otherwise on.
       @item o
         Enable all optimizations (o1 to o12), or disable all optimizations.
@@ -386,8 +471,11 @@ directives:
         Show assembler warnings.
         Default is on.
       @item x
-        Only include xdefs in the output file (no symbols).
-        This flag has always the inverted state of @code{d}.
+        For Amiga hunk format objects @code{x+} strips local symbols from
+        the symbol table (symbols without @code{xdef}).
+        For Atari TOS executables this will enable the extended (HiSoft)
+        DRI symbol table format, which allows symbols with up to 22
+        characters. DRI standard only supports 8 characters.
    @end table
 
    Also the following Devpac3-style options are supported:
@@ -435,6 +523,9 @@ directives:
    @table @code
       @item oc
         Enable optimizations to @code{CLR} (refer to @code{-opt-clr}).
+      @item od
+        Enable optimization of divisions into shifts (refer to
+        @code{-opt-div}).
       @item of
         Enable immediate float constant optimizations (refer to
         @code{-opt-fconst}).
@@ -442,7 +533,7 @@ directives:
         Enable generic vasm optimizations. All optimizations which cannot
         be controlled by another option.
       @item oj
-        Enable branch to jump optimizations (refer to @code{-opt-brajmp}).
+        Enable branch to jump translations (refer to @code{-opt-brajmp}).
       @item ol
         Enable shift optimizations to @code{ADD} (refer to @code{-opt-lsl}).
       @item om
@@ -587,84 +678,165 @@ This backend performs the following instruction optimizations:
 @item @code{<op>.L #x,An} optimized to @code{<op>.W #x,An}, when @code{x} is
  between -32768 and 32767.
 
-@item @code{MOVE.L #x,Dn} optimized to @code{MOVEQ #x,Dn}, when @code{x} is
- between -128 and 127.
+@item @code{ADD.? #x,<ea>} optimized to @code{ADDQ.? #x,<ea>}, when @code{x} is
+ between 1 and 8.
 
-@item @code{MOVE.L #x,<ea>} optimized to @code{MOV3Q #x,<ea>}, for ColdFire
- ISA_B and ISA_C, when @code{x} is -1 or between 1 and 7.
+@item @code{ADD.? #x,<ea>} optimized to @code{SUBQ.? #x,<ea>}, when @code{x} is
+ between -1 and -8.
 
-@item @code{MOVE.? #0,<ea>} optimized to @code{CLR.? <ea>}, when allowed by
- the option @code{-opt-clr} or a different CPU than the MC68000 was
- selected.
+@item @code{ADDA.? #0,An} and @code{SUBA.? #0,An} will be deleted.
 
-@item @code{MOVE.B #-1,<ea>} optimized to @code{ST <ea>}, when allowed by the
- option @code{-opt-st}.
+@item @code{ADDA.? #x,An} optimized to @code{LEA (x,An),An}, when @code{x} is
+ between -32768 and 32767.
 
-@item @code{MOVE.? #x,-(SP)} optimized to @code{PEA x}, when allowed by the
- option @code{-opt-pea}. The move-size must not be byte (@code{.b}).
+@item @code{ANDI.L #$ff,Dn} optimized to @code{MVZ.B Dn,Dn},
+ for ColdFire ISA_B/C.
 
-@item @code{MVZ.? #x,Dn} and @code{MVS.? #x,Dn} are optimized to
- @code{MOVEQ #x,Dn}.
+@item @code{ANDI.L #$ffff,Dn} optimized to @code{MVZ.W Dn,Dn},
+ for ColdFire ISA_B/C.
 
-@item @code{MOVEA.? #0,An} optimized to @code{SUBA.L An,An}.
+@item @code{ANDI.? #0,<ea>} optimized to @code{CLR.? <ea>}, when allowed
+ by the option @code{-opt-clr} or a different CPU than the MC68000 was
+ selected.
 
-@item @code{MOVEA.L #x,An} optimized to @code{MOVEA.W #x,An}, when @code{x} is
- between -32768 and 32767.
+@item @code{ANDI.? #-1,<ea>} optimized to @code{TST.? <ea>}.
 
-@item @code{MOVEA.L #label,An} optimized to @code{LEA label,An}, which could
- allow further optimization to @code{LEA label(PC),An}.
+@item @code{ASL.? #1,Dn} optimized to @code{ADD.? Dn,Dn} for 68000 and 68010.
 
-@item @code{MOVEM.? <reglist>} is deleted, when the register list was empty.
+@item @code{ASL.? #2,Dn} optimized into a sequence of two @code{ADD.? Dn,Dn}
+for 68000 and 68010, when the operation size is either byte or word and
+the options @code{-opt-speed} and @code{-opt-lsl} are given.
 
-@item @code{MOVEM.? <ea>,An} optimized to @code{MOVE.? <ea>,An}, when the
- register list only contains a single address register.
+@item @code{B<cc> <label>} translated into a combination of
+ @code{B!<cc> *+8} and @code{JMP <label>}, when <label> is not defined in the
+ same section (and option @code{-opt-brajmp} is given),
+ or outside the range of -32768 to 32767 bytes from the current address
+ when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
 
-@item @code{MOVEM.? <ea>,Rn} optimized to @code{MOVE.? <ea>,Rn} and
- @code{MOVEM.? Rn,<ea>} optimized to @code{MOVE.? Rn,<ea>}, when allowed
- by the option @code{-opt-movem} or when just loading an address register.
+@item @code{B<cc> <label>} is automatically optimized to 8-bit, 16-bit or
+ 32-bit (68020 up, CPU32, MCF5407 only), whatever fits best. When the
+ selected CPU doesn't support 32-bit branches it will try to change the
+ conditional branch into a @code{B<!cc> *+8} and @code{JMP <label>} sequence.
 
-@item @code{MOVEM.? <ea>,Rm/Rn} and @code{MOVEM.? Rm/Rn,<ea>} are optimized
-into a sequence of two @code{MOVE} for all cpus except 68000 and 68010.
-Complex addressing modes with displacements or addresses are optimized
-for 68040 only. Has to be enabled by the option @code{-opt-movem}.
+@item @code{BRA <label>} translated to @code{JMP <label>}, when <label> is
+ not defined in the same section (and option @code{-opt-brajmp} is given),
+ or outside the range of -32768 to 32767 bytes from the current address
+ when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
 
-@item @code{FMOVEM.? <reglist>} is deleted, when the register list was empty.
+@item @code{BSR <label>} translated to @code{JSR <label>}, when <label> is
+ not defined in the same section (and option @code{-opt-brajmp} is given),
+ or outside the range of -32768 to 32767 bytes from the current address
+ when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
+
+@item @code{<cp>B<cc> <label>} is automatically optimized to 16-bit or 32-bit,
+ whatever fits best. <cp> means coprocessor and is @code{P} for the PMMU
+ and @code{F} for the FPU.
 
 @item @code{CLR.L Dn} optimized to @code{MOVEQ #0,Dn}.
 
+@item @code{CMP.? #0,<ea>} optimized to @code{TST.? <ea>}. The selected CPU type
+ must be MC68020 up, ColdFire or CPU32 to support address register direct
+ as effective address (@code{<ea>}).
+
+@item @code{DIVS.W/DIVU.W #1,Dn} optimized to @code{MVZ.W Dn,Dn}, for
+ColdFire ISA_B/C (@code{-opt-div}).
+
+@item @code{DIVS.W #-1,Dn} optimized to the sequence of @code{NEG.W Dn} and
+@code{MVZ.W Dn,Dn} (@code{-opt-div} and @code{-opt-speed}).
+
+@item @code{DIVS.L/DIVU.L #1,Dn} optimized to @code{TST.L Dn}
+(@code{-opt-div}).
+
+@item @code{DIVS.L #-1,Dn} optimized to @code{NEG.L Dn}
+(@code{-opt-div}).
+
+@item @code{DIVU.L #2..256,Dn} optimized to @code{LSR.L #x,Dn}
+(@code{-opt-div}).
+
 @item @code{EORI.? #-1,<ea>} optimized to @code{NOT.? <ea>}.
 
-@item @code{ADD.? #x,<ea>} optimized to @code{ADDQ.? #x,<ea>}, when @code{x} is
- between 1 and 8.
+@item @code{EORI.? #0,<ea>} optimized to @code{TST.? <ea>}.
 
-@item @code{SUB.? #x,<ea>} optimized to @code{SUBQ.? #x,<ea>}, when @code{x} is
- between 1 and 8.
+@item @code{FMOVEM.? <reglist>} is deleted, when the register list was empty.
 
-@item @code{ADD.? #x,<ea>} optimized to @code{SUBQ.? #x,<ea>}, when @code{x} is
- between -1 and -8.
+@item @code{FxDIV.? #m,FPn} optimized to @code{FxMUL.? #1/m,FPn} when m is
+a power of 2 and option @code{-opt-fconst} is given.
 
-@item @code{SUB.? #x,<ea>} optimized to @code{ADDQ.? #x,<ea>}, when @code{x} is
- between -1 and -8.
+@item @code{JMP <label>} optimized to @code{BRA.? <label>}, when <label> is defined
+ in the same section and in the range of -32768 to 32767 bytes from the
+ current address.
+ Note that @code{JMP (<lab>,PC)} is never optimized.
 
-@item @code{ADDA.? #0,An} and @code{SUBA.? #0,An} will be deleted.
+@item @code{JSR <label>} optimized to @code{BSR.? <label>}, when <label> is defined
+ in the same section and in the range of -32768 to 32767 bytes from the
+ current address.
+ Note that @code{JSR (<lab>,PC)} is never optimized.
 
-@item @code{ADDA.? #x,An} optimized to @code{LEA (x,An),An}, when @code{x} is
- between -32768 and 32767.
+@item @code{LEA 0,An} optimized to @code{SUBA.L An,An}.
 
-@item @code{SUBA.? #x,An} optimized to @code{LEA (-x,An),An}, when @code{x} is
- between -32767 and 32768.
+@item @code{LEA (0,An),An} and @code{LEA (An),An} will be deleted.
 
-@item @code{ASL.? #1,Dn} optimized to @code{ADD.? Dn,Dn} for 68000 and 68010.
+@item @code{LEA (d,An),An} is optimized to @code{ADDQ.L #d,An} when @code{d}
+ is between 1 and 8 and to @code{SUBQ.L #-d,An} when @code{d} is between
+ -1 and -8.
+
+@item @code{LEA (d,Am),An} will be translated into a combination of
+ @code{MOVEA} and @code{ADDA.L} for 68000 and 68010, when @code{d} is lower
+ than -32768 or higher than 32767. The @code{MOVEA} will be omitted when
+ @code{Am} and @code{An} are identical. Otherwise @code{-opt-speed} is
+ required.
+
+@item @code{LINK.L An,#x} optimized to @code{LINK.W An,#x}, when @code{x} is
+ between -32768 and 32767.
+
+@item @code{LINK.W An,#x} translated to @code{LINK.L An,#x}, when @code{x} is
+ not between -32768 and 32767 and selected CPU supports this instruction.
 
 @item @code{LSL.? #1,Dn} optimized to @code{ADD.? Dn,Dn} for 68000 and 68010,
  when option @code{-opt-lsl} is given.
 
-@item @code{ASL.? #2,Dn} optimized into a sequence of two @code{ADD.? Dn,Dn}
-for 68000 and 68010, when the operation size is either byte or word.
-
 @item @code{LSL.? #2,Dn} optimized into a sequence of two @code{ADD.? Dn,Dn}
 for 68000 and 68010, when the operation size is either byte or word and
-the option @code{-opt-lsl} is given.
+the options @code{-opt-speed} and @code{-opt-lsl} are given.
+
+@item @code{MOVE.? #0,<ea>} optimized to @code{CLR.? <ea>}, when allowed by
+ the option @code{-opt-clr} or a different CPU than the MC68000 was
+ selected.
+
+@item @code{MOVE.? #x,-(SP)} optimized to @code{PEA x}, when allowed by the
+ option @code{-opt-pea}. The move-size must not be byte (@code{.b}).
+
+@item @code{MOVE.B #-1,<ea>} optimized to @code{ST <ea>}, when allowed by the
+ option @code{-opt-st}.
+
+@item @code{MOVE.L #x,Dn} optimized to @code{MOVEQ #x,Dn}, when @code{x} is
+ between -128 and 127.
+
+@item @code{MOVE.L #x,<ea>} optimized to @code{MOV3Q #x,<ea>}, for ColdFire
+ ISA_B and ISA_C, when @code{x} is -1 or between 1 and 7.
+
+@item @code{MOVEA.? #0,An} optimized to @code{SUBA.L An,An}.
+
+@item @code{MOVEA.L #x,An} optimized to @code{MOVEA.W #x,An}, when @code{x} is
+ between -32768 and 32767.
+
+@item @code{MOVEA.L #label,An} optimized to @code{LEA label,An}, which could
+ allow further optimization to @code{LEA label(PC),An}.
+
+@item @code{MOVEM.? <reglist>} is deleted, when the register list was empty.
+
+@item @code{MOVEM.? <ea>,An} optimized to @code{MOVE.? <ea>,An}, when the
+ register list only contains a single address register.
+
+@item @code{MOVEM.? <ea>,Rn} optimized to @code{MOVE.? <ea>,Rn} and
+ @code{MOVEM.? Rn,<ea>} optimized to @code{MOVE.? Rn,<ea>}, when allowed
+ by the option @code{-opt-movem} or when just loading an address register.
+
+@item @code{MOVEM.? <ea>,Rm/Rn} and @code{MOVEM.? Rm/Rn,<ea>} are optimized
+ into a sequence of two @code{MOVE} for all cpus except 68000 and 68010.
+ Complex addressing modes with displacements or addresses are optimized
+ for 68040 only. Has to be enabled by the options @code{-opt-movem} and
+ @code{-opt-speed}.
 
 @item @code{MULS.?/MULU.? #0,Dn} optimized to @code{MOVEQ #0,Dn}
 (@code{-opt-mul}).
@@ -672,87 +844,41 @@ the option @code{-opt-lsl} is given.
 @item @code{MULS.?/MULU.? #1,Dn} is deleted (@code{-opt-mul}).
 
 @item @code{MULS.W #-1,Dn} optimized to the sequence @code{EXT.L Dn} and
-@code{NEG.L Dn} (@code{-opt-mul}).
+@code{NEG.L Dn} (@code{-opt-mul} and @code{-opt-speed}).
 
 @item @code{MULS.L #-1,Dn} optimized to @code{NEG.L Dn} (@code{-opt-mul}).
 
 @item @code{MULS.W #2..256,Dn} optimized to the sequence @code{EXT.L Dn} and
-@code{ASL.L #x,Dn} (@code{-opt-mul}).
+@code{ASL.L #x,Dn} (@code{-opt-mul} and @code{-opt-speed}).
 
 @item @code{MULS.W #-2..-256,Dn} optimized to the sequence @code{EXT.L Dn},
-@code{ASL.L #x,Dn} and @code{NEG.L Dn} (@code{-opt-mul}).
+@code{ASL.L #x,Dn} and @code{NEG.L Dn} (@code{-opt-mul} and @code{-opt-speed}).
 
 @item @code{MULS.L #2..256,Dn} optimized to @code{ASL.L #x,Dn}
 (@code{-opt-mul}).
 
-@item @code{MULS.L #-2..-256,Dn} optimized to the sequence code{ASL.L #x,Dn}
-and @code{NEG.L Dn} (@code{-opt-mul}).
+@item @code{MULS.L #-2..-256,Dn} optimized to the sequence @code{ASL.L #x,Dn}
+and @code{NEG.L Dn} (@code{-opt-mul} and @code{-opt-speed}).
 
 @item @code{MULU.W #2..256,Dn} optimized to the sequence @code{MVZ.W Dn,Dn} and
-@code{ASL.L #x,Dn} for ColdFire ISA_B/C (@code{-opt-mul}).
+@code{ASL.L #x,Dn} for ColdFire ISA_B/C (@code{-opt-mul} and @code{-opt-speed}).
 
 @item @code{MULU.L #2..256,Dn} optimized to @code{LSL.L #x,Dn}
 (@code{-opt-mul}).
 
-@item @code{FxDIV.? #m,FPn} optimized to @code{FxMUL.? #1/m,FPn} when m is
-a power of 2 and option @code{-opt-fconst} is given.
-
-@item @code{LEA (0,An),An} and @code{LEA (An),An} will be deleted.
-
-@item @code{LEA (d,An),An} is optimized to @code{ADDQ.L #d,An} when @code{d}
- is between 1 and 8 and to @code{SUBQ.L #-d,An} when @code{d} is between
- -1 and -8.
-
-@item @code{LEA (d,Am),An} will be translated into a combination of
- @code{MOVEA} and @code{ADDA.L} for 68000 and 68010, when @code{d} is lower
- than -32768 or higher than 32767. The @code{MOVEA} will be omitted when
- @code{Am} and @code{An} are identical.
-
-@item @code{LINK.L An,#x} optimized to @code{LINK.W An,#x}, when @code{x} is
- between -32768 and 32767.
-
-@item @code{LINK.W An,#x} translated to @code{LINK.L An,#x}, when @code{x} is
- not between -32768 and 32767 and selected CPU supports this instruction.
-
-@item @code{LINK An,#0} optimized into a combination of @code{PEA (An)} and
- @code{MOVE.L A7,An}.
-
-@item @code{CMP.? #0,<ea>} optimized to @code{TST.? <ea>}. The selected CPU type
- must be MC68020 up, ColdFire or CPU32 to support address register direct
- as effective address (@code{<ea>}).
-
-@item @code{JMP <label>} optimized to @code{BRA.? <label>}, when <label> is defined
- in the same section and in the range of -32768 to 32767 bytes from the
- current address.
-
-@item @code{JSR <label>} optimized to @code{BSR.? <label>}, when <label> is defined
- in the same section and in the range of -32768 to 32767 bytes from the
- current address.
+@item @code{MVZ.? #x,Dn} and @code{MVS.? #x,Dn} are optimized to
+ @code{MOVEQ #x,Dn}.
 
-@item @code{BRA <label>} translated to @code{JMP <label>}, when <label> is
- not defined in the same section (and option @code{-opt-brajmp} is given),
- or outside the range of -32768 to 32767 bytes from the current address
- when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
+@item @code{ORI.? #0,<ea>} optimized to @code{TST.? <ea>}.
 
-@item @code{BSR <label>} translated to @code{JSR <label>}, when <label> is
- not defined in the same section (and option @code{-opt-brajmp} is given),
- or outside the range of -32768 to 32767 bytes from the current address
- when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
-
-@item @code{B<cc> <label>} translated into a combination of
- @code{B!<cc> *+8} and @code{JMP <label>}, when <label> is not defined in the
- same section (and option @code{-opt-brajmp} is given),
- or outside the range of -32768 to 32767 bytes from the current address
- when the selected CPU is not 68020 up, CPU32 or ColdFire ISA_B/C.
+@item @code{SUB.? #x,<ea>} optimized to @code{SUBQ.? #x,<ea>}, when @code{x} is
+ between 1 and 8.
 
-@item @code{B<cc> <label>} is automatically optimized to 8-bit, 16-bit or
- 32-bit (68020 up, CPU32, MCF5407 only), whatever fits best. When the
- selected CPU doesn't support 32-bit branches it will try to change the
- conditional branch into a @code{B<!cc> *+8} and @code{JMP <label>} sequence.
+@item @code{SUB.? #x,<ea>} optimized to @code{ADDQ.? #x,<ea>}, when @code{x} is
+ between -1 and -8.
 
-@item @code{<cp>B<cc> <label>} is automatically optimized to 16-bit or 32-bit,
- whatever fits best. <cp> means coprocessor and is @code{P} for the PMMU
- and @code{F} for the FPU.
+@item @code{SUBA.? #x,An} optimized to @code{LEA (-x,An),An}, when @code{x} is
+ between -32767 and 32768.
 
 @end itemize
 
@@ -779,7 +905,7 @@ This module has the following error messages:
 @item 2004: missing ) in register indirect addressing mode
 @item 2005: address register required
 @item 2006: bad size extension
-@item 2007: displacement outside parentheses ignored
+@item 2007: displacement at bad position
 @item 2008: base or index register expected
 @item 2009: missing ] in memory indirect addressing mode
 @item 2010: no extension allowed here
@@ -790,7 +916,7 @@ This module has the following error messages:
 @item 2015: missing outer displacement
 @item 2016: %c expected
 @item 2017: can't use PC register as index
-@item 2018: illegal relocation
+@item 2018: double registers in list
 @item 2019: data register required
 @item 2020: illegal bitfield width/offset
 @item 2021: constant integer expression required
@@ -833,5 +959,6 @@ This module has the following error messages:
 @item 2058: short-branch to following instruction turned into a nop
 @item 2059: not a valid small data register
 @item 2060: small data mode is not enabled
+@item 2061: division by zero
 
 @end itemize
diff --git a/doc/cpu_ppc.texi b/doc/cpu_ppc.texi
index 219d40c..fd2aefe 100644
--- a/doc/cpu_ppc.texi
+++ b/doc/cpu_ppc.texi
@@ -2,7 +2,7 @@ This chapter documents the Backend for the PowerPC microprocessor family.
 
 @section Legal
 
-    This module is written in 2002-2006,2008,2011 by Frank Wille.
+    This module is written in 2002-2015 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -22,46 +22,46 @@ This module provides the following additional options:
     @item -big
         Select big-endian mode.
 
-    @item -no-regnames
-        Don't predefine any register-name symbols.
-
     @item -little
         Select little-endian mode.
 
-    @item -mpwrx, -mpwr2
-        Generate code for the POWER2 family.
-
-    @item -mpwr
-        Generate code for the POWER family.
-
     @item -m601
         Generate code for the 601.
 
-    @item -mppc, -mppc32, -m403, -m603, -m604
-        Generate code for the 32-bit PowerPC family.
-
-    @item -mppc, -mppc64, -m620
-        Generate code for the 64-bit PowerPC family.
+    @item -many
+        Allow any PPC instruction.
 
-    @item -mavec
+    @item -mavec, -maltivec
         Generate code for the Altivec unit.
 
     @item -mcom
-        Allow common PPC instructions.
+        Allow only common PPC instructions.
 
-    @item -many
-        Allows any PPC instruction.
+    @item -mppc32, -mppc -m403, -m405, -m603, -m604, -m750, -m860
+        Generate code for the 32-bit PowerPC family.
 
-    @item -sdreg=<n>
-        Sets small data base register to @code{Rn}.
+    @item -mppc64, -m620
+        Generate code for the 64-bit PowerPC family.
 
-    @item -sd2reg=<n>
-        Sets the 2nd small data base register to @code{Rn}.
+    @item -mpwr
+        Generate code for the POWER family.
+
+    @item -mpwrx, -mpwr2
+        Generate code for the POWER2 family.
+
+    @item -no-regnames
+        Don't predefine any register-name symbols.
 
     @item -opt-branch
         Enables 'optimization' of 16-bit branches into
         "B<!cc> $+8 ; B label" sequences when necessary.
 
+    @item -sd2reg=<n>
+        Sets the 2nd small data base register to @code{Rn}.
+
+    @item -sdreg=<n>
+        Sets small data base register to @code{Rn}.
+
 @end table
 
 @section General
@@ -70,6 +70,9 @@ This backend accepts PowerPC instructions as described in the
 instruction set manuals from IBM and Motorola (e.g. the PowerPC
 Programming Environments).
 
+The full instruction set of the following families is supported:
+POWER, POWER2, 40x, 60x, 620, 750, 74xx (including Altivec), 860.
+
 The target address type is 32bit.
 
 Default alignment for sections and instructions is 4 bytes. Data is
@@ -79,14 +82,14 @@ aligned to its natural alignment by default.
 
 This backend provides the following specific extensions:
 
-@table @minus
+@itemize @minus
 
 @item When not disabled by the option @code{-no-regnames}, the registers r0 - r31,
  f0 - f31, v0 - v31, cr0 - cr7, vrsave, sp, rtoc, fp, fpscr, xer, lr, ctr,
  and the symbols lt, gt, so and un will be predefined on startup and may
  be referenced by the program.
 
-@end table
+@end itemize
 
 This backend extends the selected syntax module by the following
 directives:
@@ -105,12 +108,12 @@ directives:
 
 This backend performs the following optimizations:
 
-@table @minus
+@itemize @minus
 
-@item 16-bit branches where the destination is out of range are translated
+@item 16-bit branches, where the destination is out of range, are translated
  into @code{B<!cc> $+8} and a 26-bit unconditional branch.
 
-@end table
+@end itemize
 
 @section Known Problems
 
@@ -118,7 +121,9 @@ This backend performs the following optimizations:
 
 @itemize @minus
 
-@item None?
+@item No real differantiation between 403, 750, 860 instructions
+      at the moment.
+@item New instructions from modern CPUs are still missing.
 
 @end itemize
 
@@ -136,7 +141,7 @@ This module has the following error messages:
 @item 2008: multiple relocation attributes
 @item 2009: multiple hi/lo modifiers
 @item 2010: data size %d not supported
-@item 2011: illegal relocation
+@item 2011: data has illegal type
 @item 2012: relocation attribute not supported by operand
 @item 2013: operand out of range: %ld (allowed: %ld to %ld)
 @item 2014: not a valid register (0-31)
diff --git a/doc/cpu_tr3200.texi b/doc/cpu_tr3200.texi
new file mode 100644
index 0000000..1663c4a
--- /dev/null
+++ b/doc/cpu_tr3200.texi
@@ -0,0 +1,125 @@
+This chapter documents the Backend for the TR3200 cpu.
+
+@section Legal
+
+    This module is written in 2014 by Luis Panadero Guarde@~no. Based on test CPU
+    module written by Volker Barthelmann in 2002.
+
+    This archive may be redistributed without modifications and used
+    for non-commercial purposes.
+
+    Distributing modified versions and commercial usage needs my written
+    consent.
+
+    Certain modules may fall under additional copyrights.
+
+@section General
+
+This backend accepts TR3200 instructions as described in the
+@uref{https://github.com/trillek-team/trillek-computer, TR3200 specification}
+
+The target address type is 32 bits.
+
+Default alignment for sections is 4 bytes. Instructions alignment is 4 bytes.
+Data is aligned to its natural alignment by default, i.e. 2 byte wide data
+alignment is 2 bytes and 4 byte wide data alignment is 4 byte.
+
+The backend uses TR3200 syntax! This means the left operands are always the
+destination and the right operand is the source (except for single operand
+instructions). Register names have to be prefixed by a '@code{%}'
+(@code{%bp}, @code{%r0}, etc.)
+This means that it should accept WaveAsm assembly files if oldstyle syntax module
+is being used. The instructions are lowercase, @option{-dotdir} option is being used
+and directives are not in the first column.
+
+@section Extensions
+
+Predefined register symbols in this backend:
+
+@itemize @minus
+@item register by number: @code{r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15}
+@item special registers by name: @code{bp sp y ia flags}
+@end itemize
+
+@section Known Problems
+
+    This module need to be fully checked, but has been tested building a full
+    program that could be found here : @uref{https://github.com/Zardoz89/trillek-firmware}
+
+@section Error Messages
+
+This module has the following error messages:
+
+@itemize @minus
+@item 2001: illegal operand
+@item 2002: illegal qualifier <%s>
+@item 2003: data size not supported
+@end itemize
+
+@section Example
+
+It follows a little example to illustrate TR3200 assembly using
+the oldstyle syntax module (option @option{-dotdir} required):
+
+@example
+const   .equ 0xBEBACAFE           ; A constant
+an_addr .equ 0x100                ; Other constant
+
+; ROM code
+      .org 0x100000
+      .text
+_start                            ; Label with or without a ending ":"
+      mov %sp, 0x1000             ; Set the initial stack
+
+      mov %r0, 0
+      mov %r1, 0xA5
+      mov %r2, 0
+      storeb %r0, an_addr, %r1
+
+      add %r0, %r2, %bp
+      add %r0, %r2, 0
+      add %r0, %r0, 10
+      add %r0, %r0, 10h
+      add %r0, %r0, 0x100010
+      add %r0, %r0, (256 + 100)   ; vasm parses math expressions
+
+      mov %r2, 0
+      mov %r3, 0x10200
+
+      loadb %r6, 0x100200
+      loadb %r1, %r2, 0x100200
+      loadb %r1, %r2, %r3
+      loadb %r4, var1
+
+      push %r0
+      .repeat 2                 ; directives to repeat stuff!
+      push const
+      .endrepeat
+
+      .repeat 2
+      pop %r5
+      .endrepeat
+      pop %r0
+
+      rcall foo                 ; Relative call/jump!
+      sleep
+
+foo:      ; Subrutine
+      ifneq %r5, 0
+        mul %r5, %r5, 2
+      sub %r5, %r5, 1
+
+      ret
+
+; ROM data
+      .org 0x100500
+var1  .db 0x20                  ; A byte size variable
+      .even                     ; Enforce to align to even address
+var3  .dw 0x1020                ; A word size variable
+var4  .dd 0x0A0B0C20            ; A double word size variable
+str1  .asciiz "Hello world!"    ; ASCII string with null termination
+str2  .string "Hello world!"    ; ASCII string with null termination
+      .fill 5, 0xFF             ; Fill 5 bytes with 0xFF
+      .reserve 5                ; Reserves space for 5 byte
+
+@end example
diff --git a/doc/cpu_x86.texi b/doc/cpu_x86.texi
index 84c8a73..fb25030 100644
--- a/doc/cpu_x86.texi
+++ b/doc/cpu_x86.texi
@@ -2,7 +2,7 @@ This chapter documents the Backend for the 80x86 microprocessor family.
 
 @section Legal
 
-    This module is written in 2005-2006 by Frank Wille.
+    This module is written in 2005-2006,2011 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -19,6 +19,9 @@ This module provides the following additional options:
 
 @table @option
 
+    @item -cpudebug=<n>
+        Enables debugging output.
+
     @item -m8086
         Generate code for the 8086 CPU.
 
@@ -55,8 +58,8 @@ This module provides the following additional options:
     @item -msledgehammer
         Generate code for the Sledgehammer CPU.
 
-    @item -debug=<n>
-        Enables debugging output.
+    @item -m64
+        Generate code for 64-bit architectures (x86_64).
 
 @end table
 
@@ -79,7 +82,7 @@ suffix behind the mnemonic.
 
 Predefined register symbols in this backend:
 
-@table @minus
+@itemize @minus
 @item 8-bit registers: @code{al cl dl bl ah ch dh bh axl cxl dxl spl bpl sil dil r8b r9b r10b r11b r12b r13b r14b r15b}
 @item 16-bit registers: @code{ax cx dx bx sp bp si di r8w r9w r10w r11w r12w r13w r14w r15w}
 @item 32-bit registers: @code{eax ecx edx ebx esp ebp esi edi r8d r9d r10d r11d r12d r13d r14d r15d}
@@ -90,7 +93,7 @@ Predefined register symbols in this backend:
 @item test registers: @code{tr0 tr1 tr2 tr3 tr4 tr5 tr6 tr7}
 @item MMX and SIMD registers: @code{mm0 mm1 mm2 mm3 mm4 mm5 mm6 mm7 xmm0 xmm1 xmm2 xmm3 xmm4 xmm5 xmm6 xmm7 xmm8 xmm9 xmm10 xmm11 xmm12 xmm13 xmm14 xmm15}
 @item FPU registers: @code{st st(0) st(1) st(2) st(3) st(4) st(5) st(6) st(7)}
-@end table
+@end itemize
 
 This backend extends the selected syntax module by the following
 directives:
@@ -102,6 +105,9 @@ directives:
 @item .code32
  Sets the assembler into 32-bit addressing mode, which is the default.
 
+@item .code64
+ Sets the assembler into 64-bit addressing mode.
+
 @end table
 
 
@@ -109,7 +115,7 @@ directives:
 
 This backend performs the following optimizations:
 
-@table @minus
+@itemize @minus
 
 @item Immediate operands are optimized to the smallest size which can
  still represent the absolute value.
@@ -119,7 +125,7 @@ This backend performs the following optimizations:
 
 @item Jump instructions are optimized to 8-bit displacements, when possible.
 
-@end table
+@end itemize
 
 @section Known Problems
 
@@ -127,7 +133,7 @@ This backend performs the following optimizations:
 
 @itemize @minus
 
-@item 64-bit operations are disabled at the moment.
+@item 64-bit operations are incomplete and experimental.
 
 @end itemize
 
@@ -149,7 +155,6 @@ This module has the following error messages:
 @item 2011: %%%s not allowed with '%c' suffix
 @item 2012: illegal suffix '%c'
 @item 2013: instruction has no suffix and no register operands - size is unknown
-@item 2014: illegal relocation
 @item 2015: memory operand expected
 @item 2016: you cannot pop %%%s
 @item 2017: translating to %s %%%s,%%%s
diff --git a/doc/cpu_z80.texi b/doc/cpu_z80.texi
index b8abf0d..92871b6 100644
--- a/doc/cpu_z80.texi
+++ b/doc/cpu_z80.texi
@@ -10,18 +10,14 @@ microprocessor family.
 This module provides the following additional options:
 
 @table @option
-    @item -swapixiy
-        Swaps the usage of ix and iy registers. This is useful
-        for compiling generic code that uses an index register that
-        is reserved on the target machine.
     @item -8080
         Turns on 8080 compatibility mode. Any use of z80 (or higher)
         opcodes will result in an error being generated.
-    @item -hd64180
-        Turns on 64180 mode supporting additional 64180 opcodes.
     @item -gbz80
         Turns on gbz80 compatibility mode. Any use of non-supported
         opcodes will result in an error being generated.
+    @item -hd64180
+        Turns on 64180 mode supporting additional 64180 opcodes.
     @item -rcm2000
     @item -rcm3000
     @item -rcm4000
@@ -32,11 +28,14 @@ This module provides the following additional options:
     @item -rcmemu
          Turns on emulation of some instructions which aren't available
          on the Rabbit processors.
+    @item -swapixiy
+        Swaps the usage of ix and iy registers. This is useful
+        for compiling generic code that uses an index register that
+        is reserved on the target machine.
     @item -z80asm
-         Switches on z80asm mode, this translates ASMPC to $ and accepts
+         Switches on z80asm mode. This translates ASMPC to $ and accepts
          some pseudo opcodes that z80asm supports. Most emulation of 
-         z80asm directives is provided by the oldsyntax syntax module.
-         
+         z80asm directives is provided by the oldsyntax syntax module.         
 @end table
 
 @section General
@@ -44,8 +43,9 @@ This module provides the following additional options:
 This backend accepts z80 family instructions in standard
 Zilog syntax. Rabbit opcodes are accepted as defined in the 
 publically available reference material from Rabbit Semiconductor,
-with the exception that the ljp and lcall opcodes need to be supplied
-with a 24 bit number rather than an 8 bit xpc and a 16 bit address.
+with the exception that the @code{ljp} and @code{lcall} opcodes need
+to be supplied with a 24 bit number rather than an 8 bit @code{xpc} and a
+16 bit address.
 
 The target address type is 16 bit.
 
@@ -58,8 +58,9 @@ This backend provides the following specific extensions:
 
 @itemize @minus
 
-@item Certain Rabbit opcodes can be prefixed by the altd and/or the ioi/ioe
- modifier. For details of which instructions these are valid for please
+@item Certain Rabbit opcodes can be prefixed by the @code{altd} and/or the
+ @code{ioi}/@code{ioe} modifier.
+ For details of which instructions these are valid for please
  see the documentation from Rabbit.
 
 @item The parser understands a lo/hi-modifier to select low- or high-byte
@@ -67,18 +68,23 @@ This backend provides the following specific extensions:
  and @code{>} for the high-byte. It has to be the first character before
  an expression.
 
+@item When applying the operation @code{/256}, @code{%256} or @code{&256}
+ on a label, an appropriate lo/hi-byte relocation will automatically be
+ generated.
+
 @end itemize
 
 @section Optimisations
 
 This backend supports the emulation of certain z80 instructions on the
-Rabbit/gbz80 processor. These instructions are rld, rrd, cpi, cpir, cpd
-and cpdr. The link stage should provide routines with the opcode name
-prefixed with rcmx_ (eg rcmx_rld) which implements the same functionality.
+Rabbit/gbz80 processor. These instructions are @code{rld}, @code{rrd},
+@code{cpi}, @code{cpir}, @code{cpd} and @code{cpdr}.
+The link stage should provide routines with the opcode name prefixed with
+@code{rcmx_} (eg @code{rcmx_rld}) which implements the same functionality.
 Example implementations are available within the z88dk CVS tree.
 
-Additionally, for the Rabbit targets the missing call cc, opcodes will
-be emulated.
+Additionally, for the Rabbit targets the missing call @code{cc}, opcodes
+will be emulated.
 
 @section Known Problems
 
@@ -86,7 +92,8 @@ be emulated.
 
 @itemize @minus
 
-@item Not all RCM4000 opcodes are supported (llcall, lljp are not available).
+@item Not all RCM4000 opcodes are supported (@code{llcall}, @code{lljp}
+ are not available).
 
 @end itemize
 
@@ -115,5 +122,10 @@ This module has the following error messages:
 @item 2018: %s specifier redundant for the opcode %s
 @item 2019: %s specifier has no effect on the opcode %s
 @item 2020: Operand value must evaluate to a constant for opcode %s
+@item 2021: Unhandled operand type wanted 0x%x got 0x%x
+@item 2022: Missed matched index registers on %s
+@item 2023: Only out (c),0 is supported for the opcode %s
+@item 2024: Operations between different index registers are forbidden
+@item 2025: Operations between ix/iy/hl are forbidden
+@item 2026: Double indirection forbidden
 @end itemize
-
diff --git a/doc/interface.texi b/doc/interface.texi
index 98f2d80..fe6ac36 100644
--- a/doc/interface.texi
+++ b/doc/interface.texi
@@ -77,8 +77,17 @@ Directory the object modules will be stored in.
        Here you will usually define an option like @option{-c} to instruct
        the compiler to generate an object file.
        Additional options, like the optimization level, should also be
-       inserted here as well. E.g. if you are compiling for the Amiga
-       with @command{vbcc} you should add @option{-DAMIGA}.
+       inserted here as well. When the host operating system is different
+       from a Unix (MacOSX and MiNT are Unix), you have to define one of the
+       following preprocessor macros:
+       @table @code
+          @item -DAMIGA
+          AmigaOS (M68k or PPC), MorphOS, AROS.
+          @item -DATARI
+          Atari TOS.
+          @item -DMSDOS
+          CP/M, MS-DOS, Windows.
+       @end table
 
     @item CCOUT
        Here you define the option which is used to specify the name of
@@ -145,6 +154,31 @@ with "gmake".
       make CPU=ppc SYNTAX=std
 @end example
 
+The following CPU modules can be selected:
+@itemize
+@item @code{CPU=6502}
+@item @code{CPU=6800}
+@item @code{CPU=arm}
+@item @code{CPU=c16x}
+@item @code{CPU=jagrisc}
+@item @code{CPU=m68k}
+@item @code{CPU=ppc}
+@item @code{CPU=test}
+@item @code{CPU=tr3200}
+@item @code{CPU=vidcore}
+@item @code{CPU=x86}
+@item @code{CPU=z80}
+@end itemize
+
+The following syntax modules can be selected:
+@itemize
+@item @code{SYNTAX=std}
+@item @code{SYNTAX=mot}
+@item @code{SYNTAX=madmac}
+@item @code{SYNTAX=oldstyle}
+@item @code{SYNTAX=test}
+@end itemize
+
 For Windows and various Amiga targets there are already Makefiles included,
 which you may either copy on top of the default @file{Makefile}, or call
 it explicitely with @command{make}'s @option{-f} option:
@@ -187,17 +221,20 @@ was included or called.
 @item size_t size;
         Size of the source text to assemble in bytes.
 
+@item macro *macro;
+        Pointer to macro structure, when currently inside a macro
+        (see also @code{num_params}).
+
 @item unsigned long repeat;
         Number of repetitions of this source text. Usually this is 1, but
-        for text blocks between a @code{rept} and @code{endr} directive,
+        for text blocks between a @code{rept} and @code{endr} directive
         it allows any number of repetitions, which is decremented everytime
         the end of this source text block is reached.
 
 @item int cond_level;
-        Current level of conditional nesting while calling this macro.
-        The level is provided by the syntax module through
-         @code{execute_macro()}. The syntax module may use this information
-        to restore the last valid level when exiting a macro in the middle.
+        Current level of conditional nesting while entering this source
+        text. It is automatically restored to the previous level when
+        leaving the source prematurely through @code{end_source()}.
 
 @item int num_params;
         Number of macro parameters passed at the invocation point from
@@ -205,12 +242,21 @@ was included or called.
         For macros 0 (no parameters) or higher.
 
 @item char *param[MAXMACPARAMS];
-        Pointer to the macro parameters. Parameter 0 is usually reserved
-        for a special purpose, like an extension.
+        Pointer to the macro parameters.
 
 @item int param_len[MAXMACPARAMS];
         Number of characters per macro parameter.
 
+@item int num_quals;
+        (If @code{MAX_QUALIFIERS!=0}.) Number of qualifiers for a macro.
+        when not passed on invocation these are the default qualifiers.
+
+@item char *qual[MAX_QUALIFIERS];
+        (If @code{MAX_QUALIFIERS!=0}.) Pointer to macro qualifiers.
+
+@item int qual_len[MAX_QUALIFIERS];
+        (If @code{MAX_QUALIFIERS!=0}.) Number of characters per macro qualifier.
+
 @item unsigned long id;
         Every source has its unique id. Useful for macros supporting
         the special @code{\@@} parameter.
@@ -233,7 +279,7 @@ was included or called.
 
 @subsection Sections
 
-One of the top level structures is linked list of sections describing
+One of the top level structures is a linked list of sections describing
 continuous blocks of memory. A section is specified by an object of
 type @code{section} with the following members that can be accessed by
 the modules:
@@ -255,25 +301,41 @@ the modules:
         Pointers to the first and last atom of the section. See following
         sections for information on atoms.
 
-@item  int align;
+@item  taddr align;
         Alignment of the section in bytes.
 
-@item  int flags;
+@item  uint32_t flags;
         Flags of the section. Currently available flags are:
 @table @code
 @item HAS_SYMBOLS
         At least one symbol is defined in this section.
+@item RESOLVE_WARN
+        The current atom changed its size multiple times, so atom_size()
+        is now called with this flag set in its section to make the
+        backend (e.g. @code{instruction_size()}) aware of it and do less
+        aggressive optimizations.
+@item UNALLOCATED
+        Section is unallocated, which means it doesn't use any memory space
+        in the output file. Such a section will be removed before creating
+        the output file and all its labels converted into absolute expression
+        symbols. Used for "offset" sections. Refer to
+        @code{switch_offset_section()}.
+@item LABELS_ARE_LOCAL
+        As long as this flag is set new labels in a section are defined
+        as local labels, with the section name as global parent label.
+@item ABSOLUTE
+        Section is loaded at an absolute address in memory.
 @end table
 
 @item  taddr org;
         Start address of a section. Usually zero.
 
 @item  taddr pc;
-        Current offset/program counter in this section. Can be used
-        while traversing through section. Has to be updated by a
+        Current address in this section. Can be used
+        while traversing through the section. Has to be updated by a
         module using it. Is set to @code{org} at the beginning.
 
-@item   size_t idx;
+@item   uint32_t idx;
         A member usable by the output module for private purposes.
 
 @end table
@@ -295,10 +357,10 @@ following members that can be accessed by the modules:.
         The symbol is imported from another file.
 
 @item #define EXPRESSION 3
-        The symbol is defined using an expressing.
+        The symbol is defined using an expression.
 @end table
 
-@item  int flags;
+@item  uint32_t flags;
         Flags of this symbol. Available are:
 @table @code
 @item #define TYPE_UNKNOWN  0
@@ -311,7 +373,7 @@ following members that can be accessed by the modules:.
         The symbol defines a function.
 
 @item #define TYPE_SECTION  3
-        The symbl defines a section.
+        The symbol defines a section.
 
 @item #define TYPE_FILE     4
       The symbol defines a file.  
@@ -331,6 +393,17 @@ following members that can be accessed by the modules:.
         undefined, in which case the linker would assign them a value of
         zero.
 
+@item #define VASMINTERN (1<<7)
+        Vasm-internal symbol, which is usually not exported into an output
+        file.
+
+@item #define PROTECTED (1<<8)
+        Used internally to protect the current-PC symbol from deletion.
+
+@item #define REFERENCED (1<<9)
+        Symbol was referenced in the source and a relocation entry has
+        been created.
+
 @item #define RSRVD_S (1L<<24)
         The range from bit 24 to 27 (counted from the LSB) is reserved for
         use by the syntax module.
@@ -356,17 +429,43 @@ expects a pointer to a symbol as argument.
         The section a @code{LABSYM} symbol is defined in.
 
 @item  taddr pc;
-        The offset of a @code{LABSYM} symbol in bytes relative to the
-        beginning of the section.
+        The address of a @code{LABSYM} symbol.
 
 @item  taddr align;
         The alignment of the symbol in bytes.
 
-@item  size_t idx;
+@item  uint32_t idx;
         A member usable by the output module for private purposes.
 
 @end table
 
+@subsection Register symbols
+
+Optional register symbols are available when the backend defines
+@code{HAVE_REGSYMS} in @file{cpu.h} together with the hash table size.
+Example:
+@example
+#define HAVE_REGSYMS
+#define REGSYMHTSIZE 256
+@end example
+
+A register symbol is defined by an object of type @code{regsym}
+with the following members that can be accessed by the modules:
+
+@table @code
+@item char *reg_name;
+      Symbol name.
+@item int reg_type;
+      Optional type of register.
+@item unsigned int reg_flags;
+      Optional register symbol flags.
+@item unsigned int reg_num;
+      Register number or value.
+@end table
+
+Refer to @file{symbol.h} for functions to create and find register
+symbols.
+
 @subsection Atoms
 
 The contents of each section are a linked list built out of non-separable
@@ -376,7 +475,9 @@ atoms. The general structure of an atom is:
 typedef struct atom @{
   struct atom *next;
   int type;
-  int align;
+  taddr align;
+  taddr lastsize;
+  unsigned changes;
   source *src;
   int line;
   listing *list;
@@ -389,7 +490,10 @@ typedef struct atom @{
     void *opts;
     int srcline;
     char *ptext;
-    expr *pexpr;
+    printexpr *pexpr;
+    expr *roffs;
+    taddr *rorg;
+    assertion *assert;
   @} content;
 @} atom;
 @end example
@@ -440,15 +544,40 @@ is automatically appended.
 @item #define PRINTEXPR 9
 Prints the value of an expression during the final assembler pass to stdout.
 
-@item #define RORG 10
+@item #define ROFFS 10
 Set the program counter to an address relative to the section's start
 address. These atoms will be translated into @code{SPACE} atoms in the
 final pass.
 
+@item #define RORG 11
+Assemble this block under the given base address, while the code is still
+written into the original memory region.
+
+@item #define RORGEND 12
+Ends a RORG block and returns to the original addessing.
+
+@item #define ASSERT 13
+The assertion expression is checked in the final pass and an error message
+is generated (using the expression string and an optional message out of
+this atom) when it evaluates to 0.
+
 @end table
 
-@item  int align;
-The alignment of this atom.
+@item taddr align;
+The alignment of this atom. Address must be dividable by @code{align}.
+
+@item taddr lastsize;
+The size of this atom in the last resolver pass. When the size has
+changed in the current pass, the assembler will request another resolver
+run through the section.
+
+@item unsigned changes;
+Number of changes in the size of this atom since pass number
+@code{FASTOPTPHASE}. An increasing number usually indicates a problem in
+the cpu backend's optimizer and will be flagged by setting
+@code{RESOLVE_WARN} in the Section flags, as soon as @code{changes} exceeds
+@code{MAXSIZECHANGES}. So the backend can choose not to optimize this atom
+as aggressive as before.
 
 @item source *src;
 Pointer to the source text object to which this atom belongs.
@@ -518,6 +647,10 @@ Optional. Evaluated and copied to @code{fill} in the final pass, when not null.
 
 @item rlist *relocs;
 A pointer to relocation information for the space.
+
+@item taddr maxalignbytes;
+An optional number of maximum padding bytes to fulfil the atom's alignment
+requirement. Zero means there is no restriction.
 @end table
 
 @item    defblock *defb;
@@ -544,21 +677,55 @@ case of a @code{LINE}-atom.
 (In union @code{content}.) A string to print to stdout in case of a
 @code{PRINTTEXT}-atom.
 
-@item    expr *pexpr;
-(In union @code{content}.) An expression to evaluate and print to stdout in
-case of a @code{PRINTEXPR}-atom.
+@item    printexpr *pexpr;
+(In union @code{content}.) Pointer to a printexpr structure in the case of
+a @code{PRINTEXPR}-atom. Contains the following elements:
+@table @code
+@item expr *print_exp;
+Pointer to an expression to evaluate and print.
+
+@item short type;
+Format type of the printed value. We can print as hexadecimal
+(@code{PEXP_HEX}), signed decimal (@code{PEXP_SDEC}),
+unsigned decimal (@code{PEXP_UDEC}), binary (@code{PEXP_BIN}) OR
+ASCII (@code{PEXP_ASC}).
+
+@item short size;
+Size (precision) of the printed value in bits. Excessive bits will be
+masked out, and sign-extended when requested.
+@end table
 
 @item    expr *roffs;
 (In union @code{content}.) The expression holds the relative section offset
-to align to in case of a @code{RORG}-atom.
+to align to in case of a @code{ROFFS}-atom.
+
+@item    taddr *rorg;
+(In union @code{content}.) Assemble the code under the base address in
+@code{rorg} in case of a @code{RORG}-atom.
+
+@item    assertion *assert;
+(In union @code{content}.) Pointer to an assertion structure in the case of
+an @code{ASSERT}-atom. Contains the following elements:
+@table @code
+@item expr *assert_exp;
+Pointer to an expression which should evaluate to non-zero.
+
+@item char *exprstr;
+Pointer to the expression as text (to be used in the output).
+
+@item char *msgstr;
+Pointer to the message, which would be printed when @code{assert_exp} evaluates
+to zero.
+
+@end table
 
 @end table
 
 @subsection Relocations
 
-@code{DATA}-atoms can have a relocations list attached that describes
-how this data must be modified when linking/relocating. They always
-refer to the data in this atom only.
+@code{DATA} and @code{SPACE} atoms can have a relocation list attached
+that describes how this data must be modified when linking/relocating.
+They always refer to the data in this atom only.
 
 There are a number of predefined standard relocations and it is possible
 to add other cpu-specific relocations. Note however, that it is always
@@ -610,27 +777,28 @@ To describe the meaning of these entries, we will define the steps that
 shall be performed when performing a relocation:
 
 @enumerate 1
-@item Extract the <size> bits from the data atom, starting with bit number
-        <offset>. <offset> zero means to start from the first bit.
+@item Extract the @code{size} bits from the data atom, starting with bit
+        number @code{offset}. An @code{offset} of zero means starting with
+        the first bit (MSB).
 
 @item Determine the relocation value of the symbol. For a simple absolute
-        relocation, this will be the value of the symbol <sym> plus the
-        <addend>. For other relocation types, more complex calculations will
-        be needed. For example, in a program-counter relative relocation,
+        relocation, this will be the value of the symbol @code{sym} plus the
+        @code{addend}. For other relocation types, more complex calculations
+        will be needed. For example, in a program-counter relative relocation,
         the value will be obtained by subtracting the address of the data
         atom (possibly offset by a target specific value) from the value
-        of <sym> plus <addend>.
+        of @code{sym} plus @code{addend}.
 
 @item Calculate the bit-wise "and" of the value obtained in the step above
-        and the <mask> value.
+        and the @code{mask} value.
 
-@item Shift the value above right as many bit positions as there are low order
-        zero bits in <mask>.
+@item Normalize, i.e. shift the value above right as many bit positions as
+        there are low order zero bits in @code{mask}.
 
 @item Add this value to the value extracted in step 1.
 
-@item Insert the low order <size> bits of this value into the data atom
-        starting with bit <offset>.
+@item Insert the low order @code{size} bits of this value into the data atom
+        starting with bit @code{offset}.
 @end enumerate
 
 
@@ -664,19 +832,36 @@ must be written.
 
 @item #define ISIDSTART(x)/ISIDCHAR(x)
 These macros should return non-zero if and only if the argument is a
-valid character to start and identifier/inside an identifier respectively.
+valid character to start an identifier or a valid character inside an
+identifier, respectively.
 @code{ISIDCHAR} must be a superset of @code{ISIDSTART}.
 
+@item #define ISEOL(x)
+This macro returns true when the string pointing at @code{x} is either
+a comment character or end-of-line.
+
 @item #define CHKIDEND(s,e) chkidend((s),(e))
 Defines an optional function to be called at the end of the identifier
 recognition process. It allows you to adjust the length of the identifier
 by returning a modified @code{e}. Default is to return @code{e}. The
 function is defined as @code{char *chkidend(char *startpos,char *endpos)}.
 
+@item #define BOOLEAN(x) -(x)
+Defines the result of boolean operations. Usually this is @code{(x)}, as
+in C, or @code{-(x)} to return -1 for True.
+
 @item #define NARGSYM "NARG"
 Defines the name of an optional symbol which contains the number of
 arguments in a macro.
 
+@item #define CARGSYM "CARG"
+Defines the name of an optional symbol which can be used to select a
+specific macro argument with @code{\.}, @code{\+} and @code{\-}.
+
+@item #define REPTNSYM "REPTN"
+Defines the name of an optional symbol containing the counter of the
+current repeat iteration.
+
 @item #define EXPSKIP() s=exp_skip(s)
 Defines an optional replacement for skip() to be used in expr.c, to skip
 blanks in an expression. Useful to forbid blanks in an expression and to
@@ -688,6 +873,52 @@ Should be defined when the syntax module wants to ignore the operand field
 on instructions without an operand. Useful, when everything following
 an operand should be regarded as comment, without a comment character.
 
+@item #define MAXMACPARAMS 35
+Optionally defines the maximum number of macro arguments, if you need more than
+the default number of 9.
+
+@item #define SKIP_MACRO_ARGNAME(p) skip_identifier(p)
+An optional function to skip a named macro argument in the macro
+definition.
+Argument is the current source stream pointer.
+The default is to skip an identifier.
+
+@item #define MACRO_ARG_OPTS(m,n,a,p) NULL
+An optional function to parse and skip options, default values and
+qualifiers for each macro argument. Returns @code{NULL} when no argument
+options have been found.
+Arguments are:
+  @table @code
+    @item struct macro *m;
+      Pointer to the macro structure being currently defined.
+    @item int n;
+      Argument index, starting with zero.
+    @item char *a;
+      Name of this argument.
+    @item char *p;
+      Current source stream pointer. An updated pointer will be returned.
+  @end table
+Defaults to unused.
+
+@item #define MACRO_ARG_SEP(p) (*p==',' ? skip(p+1) : NULL)
+An optional function to skip a separator between the macro argument
+names in the macro definition. Returns NULL when no valid separator is
+found.
+Argument is the current source stream pointer.
+Defaults to using comma as the only valid separator.
+
+@item #define MACRO_PARAM_SEP(p) (*p==',' ? skip(p+1) : NULL)
+An optional function to skip a separator between the macro parameters
+in a macro call. Returns NULL when no valid separator is found.
+Argument is the current source stream pointer.
+Defaults to using comma as the only valid separator.
+
+@item #define EXEC_MACRO(s)
+An optional function to be called just before a macro starts execution.
+Parameters and qualifiers are already parsed.
+Argument is the @code{source} pointer of the new macro.
+Defaults to unused.
+
 @end table
 
 @subsection The file @file{syntax.c}
@@ -700,6 +931,9 @@ should be @code{static} to prevent name clashes):
 @item char *syntax_copyright;
 A string that will be emitted as part of the copyright message.
 
+@item hashtable *dirhash;
+A pointer to the hash table with all directives.
+
 @item char commentchar;
 A character used to introduce a comment until the end of the line.
 
@@ -713,8 +947,8 @@ case.
 Type of the default section (see above). May be NULL.
 
 @item int init_syntax();
-Will be called during startup. Must return zero if initializations failed,
-non-zero otherwise.
+Will be called during startup, after argument parsing Must return zero if
+initializations failed, non-zero otherwise.
 
 @item int syntax_args(char *);
 This function will be called with the command line arguments (unless they
@@ -741,11 +975,37 @@ that may indicate the base) and write the base of the number through the
 pointer passed as second argument. Return zero if it does not point to a
 number.
 
+@item char *const_suffix(char *,char *);
+First argument points to the start of the constant (including prefix) and
+the second argument to first character after the constant (excluding suffix).
+Checks for a constant-suffix and skips it. Return pointer to the first
+character after that constant. Example: constants with a 'h' suffix to
+indicate a hexadecimal base.
+
 @item void parse(void);
 This is the main parsing function. It has to read lines via
 the @code{read_next_line()} function, parse them and create sections,
 atoms and symbols. Pseudo directives are usually handled by the syntax 
-module.
+module. Instructions can be parsed by the cpu module using
+@code{parse_instruction()}.
+
+@item char *parse_macro_arg(struct macro *,char *,struct namelen *,struct namelen *);
+Called to parse a macro parameter by using the source stream pointer in
+the second argument. The start pointer and length of a single passed
+parameter is written to the first @code{struct namelen}, while the optionally
+selected named macro argument is passed in the second @code{struct namelen}.
+When the @code{len} field of the second @code{namelen} is zero, then the
+argument is selected by position instead by name. Returns the updated
+source stream pointer after successful parsing.
+
+@item int expand_macro(source *,char **,char *,int);
+Expand parameters and special commands inside a macro source. The second
+argument is a pointer to the current source stream pointer, which is
+updated on any succesful expansion. The function will return the
+number of characters written to the destination buffer (third argument)
+in this case. Returning @code{-1} means: no expansion took place.
+The last argument defines the space in characters which is left in the
+destination buffer.
 
 @item char *get_local_label(char **);
 Gets a pointer to the current source pointer. Has to check if a valid
@@ -772,17 +1032,16 @@ should be @code{static} to prevent name clashes) in @code{cpu.h}:
 @item #define MAX_OPERANDS 3
 Maximum number of operands of one instruction.
 
-@item #define CPU_CHECKS_OPCNT 0
-When non-zero, @code{parse_operand()} is called with an arbitrary number
-of operands, and it is the task of the cpu module to check it.
-
 @item #define MAX_QUALIFIERS 0
 Maximum number of mnemonic-qualifiers per mnemonic.
 
-@item typedef long taddr;
+@item typedef int32_t taddr;
 Data type to represent a target-address. Preferrably use the ones from
 @file{stdint.h}.
 
+@item typedef uint32_t utaddr;
+Unsigned data type to represent a target-address.
+
 @item #define LITTLEENDIAN 1
 @itemx #define BIGENDIAN 0
 Define these according to the target endianess. For CPUs which support big-
@@ -796,24 +1055,13 @@ Insert the cpu specifier.
 @item #define INST_ALIGN 2
 Minimum instruction alignment.
 
-@item #define SECTION_ALIGN 2
-Default section alignment.
-
 @item #define DATA_ALIGN(n) ...
-Default alignment for n-bit data. Can also be a function.
+Default alignment for @code{n}-bit data. Can also be a function.
 
 @item #define DATA_OPERAND(n) ...
 Operand class for n-bit data definitions. Can also be a function.
 Negative values denote a floating point data definition of -n bits.
 
-@item #define CHECK_ATOMSIZE
-Usually vasm will start another assembler pass when a label changed its
-value. With complex optimizers (e.g. M68k) it can happen that the effect
-from optimizations and translations of instructions is nullified, so the
-labels do not change. @code{CHECK_ATOMSIZE} will remember the sizes of
-all atoms from the previous pass and check them for changes, which is
-much safer but requires more resources.
-
 @item typedef ... operand;
 Structure to store an operand.
 
@@ -830,7 +1078,7 @@ If cpu-specific data should be added to all instruction atoms.
 @item typedef ... instruction_ext;
 Type for the above extension.
 
-@item NEED_CLEARED_OPERANDS
+@item #define NEED_CLEARED_OPERANDS 1
 Backend requires a zeroed operand structure when calling @code{parse_operand()}
 for the first time. Defaults to undefined.
 
@@ -839,32 +1087,46 @@ Valid opening parenthesis for instruction operands. Defaults to @code{'('}.
 
 @item END_PARENTH(x)
 Valid closing parenthesis for instruction operands. Defaults to @code{')'}.
+
+@item #define MNEMONIC_VALID(i)
+An optional function with the arguments @code{(int idx)}. Returns true
+when the mnemonic with index @code{idx} is valid for the current state of
+the backend (e.g. it is available for the selected cpu architecture).
+
+@item #define OPERAND_OPTIONAL(p,t)
+When defined, this is a function with the arguments
+@code{(operand *op,int type)}, which returns true when the given operand
+type (@code{type}) is optional. The function is only called for missing
+operands and should also initialize @code{op} with default values (e.g. 0).
 @end table
 
 Implementing additional target-specific unary operations is done by defining
 the following optional macros:
 
 @table @code
-@item EXT_UNARY_NAME(s)
+@item #define EXT_UNARY_NAME(s)
 Should return True when the string in @code{s} points to an operation name
 we want to handle.
 
-@item EXT_UNARY_TYPE(s)
+@item #define EXT_UNARY_TYPE(s)
 Returns the operation type code for the string in @code{s}. Note that the
 last valid standard operation is defined as @code{LAST_EXP_TYPE}, so the
 target-specific types will start with @code{LAST_EXP_TYPE+1}.
 
-@item EXT_UNARY_EVAL(t,v,r,c)
+@item #define EXT_UNARY_EVAL(t,v,r,c)
 Defines a function with the arguments @code{(int t, taddr v, taddr *r, int c)}
 to handle the operation type @code{t} returning an @code{int} to indicate
 whether this type has been handled or not. Your operation will by applied on
 the value @code{v} and the result is stored in @code{*r}. The flag @code{c}
 is passed as 1 when the value is constant (no relocatable addresses involved).
 
-@item EXT_FIND_BASE(e,s,p)
-Defines a function with the arguments @code{(expr *e, section *s, taddr p)}
-to return a pointer to the base symbol of expression @code{e}. The type
-in @code{e->type} has to checked to be one of the operations to handle.
+@item #define EXT_FIND_BASE(b,e,s,p)
+Defines a function with the arguments
+@code{(symbol **b, expr *e, section *s, taddr p)}
+to save a pointer to the base symbol of expression @code{e} into the
+symbol pointer, pointed to by @code{b}. The type of this base is given
+by an @code{int} return code. Further on, @code{e->type} has to checked
+to be one of the operations to handle.
 The section pointer @code{s} and the current pc @code{p} are needed to call
 the standard @code{find_base()} function.
 @end table
@@ -872,7 +1134,7 @@ the standard @code{find_base()} function.
 @subsection The file @file{cpu.c}
 
 A cpu module has to provide the following elements (all other functions
-should be @code{static} to prevent name clashes) in @code{cpu.c}:
+and data should be @code{static} to prevent name clashes) in @code{cpu.c}:
 
 @table @code
 @item int bitsperbyte;
@@ -888,8 +1150,8 @@ A string that will be emitted as part of the copyright message.
 A string describing the target cpu.
 
 @item int init_cpu();
-Will be called during startup. Must return zero if initializations failed,
-non-zero otherwise.
+Will be called during startup, after argument parsing. Must return zero if
+initializations failed, non-zero otherwise.
 
 @item int cpu_args(char *);
 This function will be called with the command line arguments (unless they
@@ -915,12 +1177,14 @@ when the operand matches the operand-type passed in @code{requires} and
 @code{PO_NOMATCH} otherwise. When the source is definitely identified as
 garbage, the function may return @code{PO_CORRUPT} to tell the assembler
 that it is useless to try matching against any other operand types.
+Another special case is @code{PO_SKIP}, which is also a match, but skips
+the next operand from the mnemonic table (because it was already handled
+together with the current operand).
 
 @item mnemonic mnemonics[];
-The mnemonic table is usually defined in @file{opcodes.h} and keeps a list
-of mnemonic names and operand types the assembler with match against using
-@code{parse_operand()}. It may also include a target specific
-@code{mnemonic_extension}.
+The mnemonic table keeps a list of mnemonic names and operand types the
+assembler will match against using @code{parse_operand()}. It may also
+include a target specific @code{mnemonic_extension}.
 
 @item taddr instruction_size(instruction *ip, section *sec, taddr pc);
 Returns the size of the instruction @code{ip} in bytes, which must be
@@ -972,7 +1236,7 @@ several output modules are linked into one vasm executable and their
 structure differs somewhat from syntax and cpu modules.
 
 Usually, an output module for some object format @code{fmt} should be contained
-in a file @file{output_fmt.c} (it may use/include other files if necessary).
+in a file @file{output_<fmt>.c} (it may use/include other files if necessary).
 To automatically include this format in the build process, the @file{make.rules}
 has to be extended. The module should be added to the @code{OBJS} variable
 at the start of @file{make.rules}. Also, a dependency line should be added
@@ -1018,7 +1282,8 @@ At last, a call to the @code{output_init_<fmt>} has to be added in the
 @code{init_output()} function in @file{vasm.c} (should be self-explanatory).
 
 Some remarks:
-@table @minus
+@itemize @minus
+
 @item
 Some output modules can not handle all supported CPUs. Nevertheless,
 they have to be written in a way that they can be compiled. If code
@@ -1044,7 +1309,7 @@ module should try to find appropriate relocations supported by the
 object format. The goal is to avoid special CPU specific
 relocations as much as possible.
 
-@end table
+@end itemize
 
 Volker Barthelmann                                      vb@@compilers.de
 
diff --git a/doc/output_aout.texi b/doc/output_aout.texi
index bc7b010..5d54041 100644
--- a/doc/output_aout.texi
+++ b/doc/output_aout.texi
@@ -3,7 +3,7 @@ selected with the @option{-Faout} option.
 
 @section Legal
 
-    This module is copyright in 2008 by Frank Wille.
+    This module is copyright in 2008-2012 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -65,4 +65,5 @@ This module has the following error messages:
 @itemize @minus
 @item 3004: section attributes <attr> not suppported
 @item 3008: output module doesn't allow multiple sections of the same type
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
 @end itemize
diff --git a/doc/output_bin.texi b/doc/output_bin.texi
index 692563f..1bbb89f 100644
--- a/doc/output_bin.texi
+++ b/doc/output_bin.texi
@@ -3,7 +3,7 @@ selected with the @option{-Fbin} option.
 
 @section Legal
 
-    This module is copyright in 2002,2008 by Volker Barthelmann.
+    This module is copyright in 2002-2009,2013 by Volker Barthelmann.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -46,5 +46,5 @@ This module has the following error messages:
 @itemize @minus
 @item 3001: sections must not overlap
 @item 3007: undefined symbol <%s>
-
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
 @end itemize
diff --git a/doc/output_elf.texi b/doc/output_elf.texi
index 0cfaba2..ef00cbc 100644
--- a/doc/output_elf.texi
+++ b/doc/output_elf.texi
@@ -3,7 +3,7 @@ selected with the @option{-Felf} option.
 
 @section Legal
 
-    This module is copyright in 2002-2008 by Frank Wille.
+    This module is copyright in 2002-2015 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -33,6 +33,8 @@ the following architectures:
 @item M68k
 @item ARM
 @item i386
+@item x86_64
+@item Jaguar RISC
 
 @end itemize
 
@@ -55,7 +57,7 @@ This module has the following error messages:
 @itemize @minus
 @item 3002: output module doesn't support cpu <name>
 @item 3003: write error
-@item 3004: section attributes <attr> not suppported
 @item 3005: reloc type <m>, size <n>, mask <mask> (symbol <sym> + <offset>) not supported
 @item 3006: reloc type <n> not supported
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
 @end itemize
diff --git a/doc/output_hunk.texi b/doc/output_hunk.texi
index 24944e4..166becc 100644
--- a/doc/output_hunk.texi
+++ b/doc/output_hunk.texi
@@ -4,7 +4,7 @@ selected with the @option{-Fhunk} option to generate objects and with the
 
 @section Legal
 
-    This module is copyright in 2002-2010 by Frank Wille.
+    This module is copyright in 2002-2015 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -15,6 +15,21 @@ selected with the @option{-Fhunk} option to generate objects and with the
     Certain modules may fall under additional copyrights.
 
 @section Additional options for this version
+@table @option
+    @item -kick1hunks
+        Use only those hunk types and external reference types which have
+        been valid at the time of Kickstart 1.x for compatibility with
+        old assembler sources and old linkers. For example: no longer
+        differentiate between absolute and relative references.
+        In executables it will prevent the assembler from using
+        16-bit relocation offsets in hunks and rejects 32-bit PC-relative
+        relocations.
+    @item -linedebug
+        Automatically generate an SAS/C-compatible LINE DEBUG hunk for
+        the input source. Overrides any line debugging directives from
+        the source.
+@end table
+
 These options are valid for the @code{hunkexe} module only:
 @table @option
     @item -databss
@@ -94,4 +109,7 @@ This module has the following error messages:
 @item 3004: section attributes <attr> not suppported
 @item 3005: reloc type <m>, size <n>, mask <mask> (symbol <sym> + <offset>) not supported
 @item 3006: reloc type <n> not supported
+@item 3009: undefined symbol <%s> at %s+0x%lx, reloc type %d
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
+@item 3011: weak symbol <%s> not supported by output format, treating as global
 @end itemize
diff --git a/doc/output_tos.texi b/doc/output_tos.texi
index a5f67e2..5e48ab0 100644
--- a/doc/output_tos.texi
+++ b/doc/output_tos.texi
@@ -3,7 +3,7 @@ selected with the @option{-Ftos} option.
 
 @section Legal
 
-    This module is copyright in 2009-2010 by Frank Wille.
+    This module is copyright in 2009-2014 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -16,6 +16,8 @@ selected with the @option{-Ftos} option.
 @section Additional options for this version
  
 @table @option
+    @item -monst
+        Write Devpac "MonST"-compatible symbols.
     @item -tos-flags=<flags>
         Sets the flags field in the TOS file header. Defaults to 0.
         Overwrites a TOS flags definition in the assembler source.
@@ -24,17 +26,16 @@ selected with the @option{-Ftos} option.
 @section General
 
 This module outputs the TOS executable file format, which is used
-on Atari 16/32-bit computers with 68000 up to 68060 CPU.
+on Atari 16/32-bit computers with 68000 up to 68060 CPU. The symbol
+table uses the DRI format.
 
 @section Restrictions
 
-@table @minus
-@item
-  All symbols must be defined, otherwise the generation of the executable
+@itemize @minus
+@item All symbols must be defined, otherwise the generation of the executable
   fails. Unknown symbols are listed by vasm.
-@item
-  The only relocations allowed in this format are 32-bit absolute.
-@end table
+@item The only relocations allowed in this format are 32-bit absolute.
+@end itemize
 Those are restrictions of the output format, not of vasm.
 
 @section Known Problems
@@ -55,4 +56,6 @@ This module has the following error messages:
 @item 3006: reloc type %d not supported
 @item 3007: undefined symbol <%s>
 @item 3008: output module doesn't allow multiple sections of the same type
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
+@item 3011: weak symbol <%s> not supported by output format, treating as global
 @end itemize
diff --git a/doc/output_vobj.texi b/doc/output_vobj.texi
index 2b29ad6..5b3a7b8 100644
--- a/doc/output_vobj.texi
+++ b/doc/output_vobj.texi
@@ -3,7 +3,7 @@ selected with the @option{-Fvobj} option.
 
 @section Legal
 
-    This module is copyright in 2002-2008 by Volker Barthelmann.
+    This module is copyright in 2002-2014 by Volker Barthelmann.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -41,5 +41,5 @@ None.
 
 This module has the following error messages:
 @itemize @minus
-@item None.
+@item 3010: section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx
 @end itemize
diff --git a/doc/syntax_madmac.texi b/doc/syntax_madmac.texi
new file mode 100644
index 0000000..ad66982
--- /dev/null
+++ b/doc/syntax_madmac.texi
@@ -0,0 +1,357 @@
+This chapter describes the madmac syntax module, which is compatible
+to the MadMac assembler syntax, written by Landon Dyer for Atari and
+improved later to support Jaguar and JRISC.
+It is mainly intended for Atari's 6502, 68000 and Jaguar systems.
+
+@section Legal
+
+    This module is copyright in 2015 by Frank Wille.
+
+    This archive may be redistributed without modifications and used
+    for non-commercial purposes.
+
+    Distributing modified versions and commercial usage needs my written
+    consent.
+
+    Certain modules may fall under additional copyrights.
+
+@section Additional options for this version
+ 
+This syntax module provides the following additional options:
+ 
+@table @option
+ 
+@item -rorg
+ Relocated ORG mode. Default behaviour is to regard the code after an
+ @code{ORG} directive as a separate section with a fixed start address.
+ @option{-rorg} will change the function of @code{ORG} to relocate all labels
+ in the current section to the given address. But the code and data are
+ still part of the previous section. Such a RORG block is automatically
+ ended by the next section directive (or @code{.68000} for Jaguar RISC).
+
+@end table
+
+@section General Syntax
+
+A statement may contain up to four fields which are identified by order
+of appearance and terminating characters. The general form is:
+@example
+label:    operator    operand(s)    ; comment
+@end example
+
+Labels must not start at the first column, as they are identified by the
+mandatory terminating colon (@code{:}) character. A double colon (@code{::})
+automatically makes the label externally visible.
+
+Labels preceded by '@code{.}' have local scope and are only valid between
+two global labels.
+
+Equate directives, starting in the operator field, have a symbol without
+terminating colon in the first field, left of the operator.
+The equals-character (@code{=}) can be used as an alias for @code{equ}.
+A double-equals (@code{==}) automatically makes the symbol externally
+visible.
+@example
+symbol    equate    expression    ; comment
+@end example
+
+Identifiers, like symbols or labels, may start with any upper- or lower-case
+character, a dot (@code{.}), question-mark (@code{?}) or underscore
+(@code{_}). The remaining characters may be any alphanumeric character,
+a dollar-sign (@code{$}), question-mark (@code{?}) or underscore (@code{_}).
+
+The operands are separated from the operator by whitespace. Multiple
+operands are separated by comma (@code{,}).
+
+Comments are introduced by the comment character @code{;}. The asterisk
+(@code{*}) can be used at the first column to start a comment.
+The rest of the line will be ignored.
+
+In expressions, numbers starting with @code{$} are hexadecimal (e.g.
+@code{$fb2c}). @code{%} introduces binary numbers (e.g. @code{%1100101}).
+Numbers starting with @code{@@} are assumed to be octal numbers, e.g.
+@code{@@237}.
+All other numbers starting with a digit are decimal, e.g. @code{1239}.
+
+NOTE: Unlike the original Madmac assembler all expressions are evaluated
+following the usual mathematical operator priorities.
+
+C-like escape characters are supported in strings.
+
+
+@section Directives
+
+The following directives are supported by this syntax module (if the
+CPU- and output-module allow it). Note that all directives, besides the
+equals-character, may be optionally preceded by a dot (@code{.}).
+
+@table @code
+@item <symbol> = <expression>
+      Equivalent to @code{<symbol> equ <expression>}.
+
+@item <symbol> == <expression>
+      Equivalent to @code{<symbol> equ <expression>}, but declare <symbol>
+      as externally visible.
+
+@item assert <expresion>[,<expression>...]
+      Assert that all conditions are true (non-zero), otherwise issue a
+      warning.
+
+@item bss
+      The following data (space definitions) are going into the BSS section.
+      The BSS section cannot contain any initialized data.
+
+@item data
+      The following data are going into the data section, which usually
+      contains pre-initialized data and no executable code.
+
+@item dc <exp1>[,<exp2>...]
+      Equivalent to @code{dc.w}.
+
+@item dc.b <exp1>[,<exp2>,"<string1>",'<string2>'...]
+      Assign the integer or string constant operands into successive
+      bytes of memory in the current section. Any combination of integer
+      and character string constant operands is permitted.
+
+@item dc.i <exp1>[,<exp2>...]
+      Assign the values of the operands into successive 32-bit words
+      of memory in the current section. In contrast to @code{dc.l} the
+      high and low half-words will be swapped as with the Jaguar-RISC
+      @code{movei} instruction.
+
+@item dc.l <exp1>[,<exp2>...]
+      Assign the values of the operands into successive 32-bit words
+      of memory in the current section.
+
+@item dc.w <exp1>[,<exp2>...]
+      Assign the values of the operands into successive 16-bit words
+      of memory in the current section.
+
+@item text
+      The following code and data is going into the text section, which
+      usually is the first program section, containing the executable code.
+
+@item dcb
+      Equivalent to @code{dcb.w}.
+
+@item dcb.b <exp>[,<fill>]
+      Insert <exp> zero or <fill> bytes into the current section.
+
+@item dcb.l <exp>[,<fill>]
+      Insert <exp> zero or <fill> 32-bit words into the current section.
+
+@item dcb.w <exp>[,<fill>]
+      Insert <exp> zero or <fill> 16-bit words into the current section.
+
+@item dphrase
+      Align the program counter to the next integral double phrase
+      boundary (16 bytes).
+
+@item ds <exp>
+      Equivalent to @code{dcb.w <exp>,0}.
+
+@item ds.b <exp>
+      Equivalent to @code{dcb.b <exp>,0}.
+
+@item ds.l <exp>
+      Equivalent to @code{dcb.l <exp>,0}.
+
+@item ds.w <exp>
+      Equivalent to @code{dcb.w <exp>,0}.
+
+@item else
+      Else-part of a conditional-assembly block. Refer to '@code{if}'.
+
+@item end
+      End the assembly of the current file. Parsing of an include file is 
+      terminated here and assembling of the parent source commences. It
+      also works to break the current conditional block, repetition or macro.
+
+@item endif
+      Ends a block of conditional assembly.
+
+@item endm
+      Ends a macro definition.
+
+@item endr
+      Ends a repetition block.
+
+@item <symbol> equ <expression>
+      Define a new program symbol with the name <symbol> and assign to it
+      the value of <expression>. Defining <symbol> twice will cause
+      an error.
+
+@item even
+      Align the program counter to an even value, by inserting a zero-byte
+      when it is odd.
+
+@item exitm
+      Exit the current macro (proceed to @code{endm}) at this point and
+      continue assembling the parent context.
+      Note that this directive also resets the level of conditional
+      assembly to a state before the macro was invoked (which means that
+      it works as a 'break' command on all new @code{if} directives).
+
+@item extern <symbol>[,<symbol>...]
+      Declare the given symbols as externally defined. Internally there is
+      no difference to @code{globl}, as both declare the symbols, no
+      matter if defined or not, as externally visible.
+
+@item globl <symbol>[,<symbol>...]
+      Declare the given symbols as externally visible in the object file
+      for the linker. Note that you can have the same effect by using
+      a double-colon (@code{::}) on labels or a double-equal (@code{==})
+      on equate-symbols.
+
+@item if <expression>
+      Start of block of conditional assembly. If <expression> is true, the
+      block between '@code{if}' and the matching '@code{endif}' or
+      '@code{else}' will be assembled. When false, ignore all lines until
+      and '@code{else}' or '@code{endif}' directive is encountered.
+      It is possible to leave such a block early from within an include
+      file (with @code{end}) or a macro (with @code{endm}).
+
+@item iif <expression>, <statement>
+      A single-line conditional assembly. The <statement> will be parsed
+      when <expression> evaluates to true (non-zero).
+      <statement> may be a normal source line, including labels, operators
+      and operands.
+
+@item incbin "<file>"
+      Inserts the binary contents of <file> into the object code at
+      this position. The file will be searched first in the current
+      directory, then in all paths defined by @option{-I} in the order
+      of occurence.
+
+@item include "<file>"
+      Include source text of <file> at this position. The include file
+      will be searched first in the current directory, then in all
+      paths defined by @option{-I} in the order of occurence.
+
+@item list
+      The following lines will appear in the listing file, if it was
+      requested.
+
+@item long
+      Align the program counter to the next integral longword boundary
+      (4 bytes), by inserting as many zero-bytes as needed.
+
+@item macro <name> [<argname>[,<argname>...]]
+      Defines a macro which can be referenced by <name> (case-sensitive).
+      The macro definition is terminated by an @code{endm} directive
+      and may be exited by @code{exitm}.
+      When calling a macro you may pass up to 64 arguments, separated by
+      comma. The first ten arguments are referenced within the macro
+      context as @code{\1} to @code{\9} and @code{\0} for the tenth.
+      Optionally you can specify a list of argument names, which are
+      referenced with a leading backslash character (@code{\}) within the macro.
+      The special code @code{\~} inserts a unique id, useful for
+      defining labels. @code{\#} is replaced by the number of arguments.
+      @code{\!} writes the the size-qualifier (M68k) including the dot.
+      @code{\?argname} expands to @code{1} when the named argument is
+      specified and non-empty, otherwise it expands to @code{0}.
+      It is also allowed to enclose argument names in curly braces, which
+      is useful in situations where the argument name is followed by
+      another valid identifier character.
+
+@item macundef <name>[,<name>...]
+      Undefine one or more already defined macros, making them unknown for
+      the following source to assemble.
+
+@item nlist
+      The following lines will not be visible in a listing file.
+
+@item nolist
+      The following lines will not be visible in a listing file.
+
+@item org <expression>
+      Sets the absolute base address for the subsequent code.
+      Note that the function of this directive can be changed by the
+      @option{-rorg} option.
+
+@item phrase
+      Align the program counter to the next integral phrase
+      boundary (8 bytes).
+
+@item print <expression>[,<expression>...]
+      Prints strings and formatted expressions to the assembler's console.
+      <expression> is either a string in quotes or an expression, which
+      is optionally preceded by special format flags:
+
+      Several flags can be used to format the output of expressions.
+      The default is a 16-bit signed decimal.
+      @table @code
+      @item /x
+        hexadecimal
+      @item /d
+        signed decimal
+      @item /u
+        unsigned decimal
+      @item /w
+        16-bit word
+      @item /l
+        32-bit longword
+      @end table
+      For example:
+@example
+        .print  "Value: ", /d/l xyz
+@end example
+
+@item qphrase
+      Align the program counter to the next integral quad phrase
+      boundary (32 bytes).
+
+@item rept <expression>
+      The block between @code{rept} and @code{endr} will be repeated
+      <expression> times, which has to be positive.
+
+@item <symbol> set <expression>
+      Create a new symbol with the name <symbol> and assign
+      the value of <expression>. If <symbol> is already assigned, it will
+      contain a new value from now on.
+
+@item text
+      The following code and data is going into the text section, which
+      usually is the first program section, containing the executable code.
+
+@end table
+
+
+@section Known Problems
+
+    Some known problems of this module at the moment:
+
+@itemize @minus
+
+@item Not all Madmac, smac and extended Jaguar-Madmac directives are
+supported.
+
+@item Expressions are not evaluated left-to-right, but mathematically
+correct.
+
+@item Square-brackets (@code{[]}) are currently not supported to
+prioritize terms, as an alternative for parentheses.
+
+@item Functions (@code{^^func}) are currently not supported.
+
+@end itemize
+
+
+@section Error Messages
+
+This module has the following error messages:
+
+@itemize @minus
+@item 1001: malformed immediate-if
+@item 1003: cannot export local symbol
+@item 1004: no space before operands
+@item 1005: too many closing parentheses
+@item 1006: missing closing parentheses
+@item 1007: missing operand
+@item 1008: garbage at end of line
+@item 1009: unknown print format flag '%c'
+@item 1010: invalid data operand
+@item 1011: print format corrupted
+@item 1012: identifier expected
+@item 1014: unexpected "%s" without "%s"
+@end itemize
diff --git a/doc/syntax_mot.texi b/doc/syntax_mot.texi
index dacdce2..80a5b93 100644
--- a/doc/syntax_mot.texi
+++ b/doc/syntax_mot.texi
@@ -1,9 +1,10 @@
 This chapter describes the Motorola syntax module, mostly used for the
-M68k family of CPUs, which is available with the extension @code{mot}.
+M68k and ColdFire families of CPUs, which is available with the extension
+@code{mot}.
 
 @section Legal
 
-    This module is copyright in 2002-2011 by Frank Wille.
+    This module is copyright in 2002-2015 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -20,49 +21,64 @@ This syntax module provides the following additional options:
 @table @option
  
 @item -align
- Enables 16-bit alignment for constant declaration (@code{dc.?},
- except @code{dc.b}) directives.
+ Enables natural alignment for data (e.g. @code{dc.?}, @code{ds.?}) and
+ offset directives (@code{rs.?}, @code{so.?}, @code{fo.?}).
+
+@item -allmp
+ Makes all 35 macro arguments available. Default is 9 (@code{\1} to
+ @code{\9}). More arguments can be accessed through @code{\a} to
+ @code{\z}) which may conflict with escape characters or named arguments,
+ therefore they are not enabled by default.
 
 @item -devpac
- Devpac-compatibility mode.
-@table @minus
-  @item Enables 16-bit alignment for constant declaration (@code{dc.?},
-        except @code{dc.b}) directives.
+ Devpac-compatibility mode. Only directives known to Devpac are recognized.
+@itemize @minus
+  @item Enables natural alignment for data and structure offsets
+        (see option @option{-align}).
   @item Predefines offset symbols @code{__RS}, @code{__SO} and @code{__FO} as
-        @code{0}, which in vasm are undefined until first referenced.
-  @item Disable escape codes in strings (see @option{-noesc}).
+        @code{0}, which otherwise are undefined until first referenced.
+  @item Disable escape codes handling in strings (see @option{-noesc}).
   @item Enable dots within identifiers (see @option{-ldots}).
   @item Up to 35 macro arguments.
-@end table
+@end itemize
 
 @item -ldots
  Allow dots (@code{.}) within all identifiers.
 
 @item -localu
- Local symbols are introduced by @code{'_'} instead of @code{'.'}. For
+ Local symbols are prefixed by @code{'_'} instead of @code{'.'}. For
  Devpac compatbility, which offers a similar option.
 
 @item -phxass
- PhxAss-compatibilty mode. Enables the following features:
-@table @minus
+ PhxAss-compatibilty mode. Only directives known to PhxAss are recognized.
+ Enables the following features:
+@itemize @minus
   @item @code{section <name>} starts a code section named @code{<name>}
         instead of a section which also has the type @code{<name>}.
+  @item Enable escape codes handling in strings (see @option{-esc}).
   @item Macro names are treated as case-insensitive.
   @item Up to 35 macro arguments.
-  @item Defines the symbol @code{_PHXASS_}.
-@end table
+  @item Allow blanks in operands.
+  @item Defines the symbol @code{_PHXASS_} with value 2 (to differentiate
+        from the real PhxAss with value 1).
+  @item When no output file name is given, construct it from the input name.
+@end itemize
 
 @item -spaces
  Allow blanks in operands.
 
+@item -warncomm
+ Warn about all lines, which have comments in the operand field, introduced
+ by a blank character. For example in: @code{dc.w 1 + 2}.
+
 @end table
 
 @section General Syntax
 
-Labels always start at the first column and may be terminated by a
-colon (@code{:}), but don't need to. In the last case the mnemonic
-has to be separated from the label by whitespace (not required in
-any case, e.g. with @code{=}). Qualifiers are appended to the mnemonic
+Labels must either start at the first column of a line or need to be
+terminated by a colon (@code{:}). In the first case the mnemonic
+has to be separated from the label by whitespace (not required in any case,
+e.g. with a @code{=} directive). Qualifiers are appended to the mnemonic,
 separated by a dot (if the CPU-module supports qualifiers). The
 operands are separated from the mnemonic by whitespace. Multiple
 operands are separated by comma (@code{,}).
@@ -73,7 +89,7 @@ Local labels are valid between two global label definitions.
 
 Otherwise dots (@code{.}) are not allowed within a label by default, unless
 the option @option{-ldots} or @option{-devpac} was specified. Even then,
-labels ending on @code{.b}, @code{.w} or @code{.l} are never possible.
+labels ending on @code{.b}, @code{.w} or @code{.l} can't be defined.
 
 It is possible to refer to any local symbol in the source by preceding its
 name with the name of the last global symbol, which was defined before:
@@ -89,9 +105,9 @@ characters, as long as the option @option{-spaces} was not specified.
 
 Comments are introduced by the comment character @code{;} or @code{*}.
 The rest of the line will be ignored. Also everything following the operand
-field, separated by a whitespace, will be regarded as comment. Be careful
-with @code{*}, which is recognized as the "current pc symbol" in any operand
-expression
+field, separated by a whitespace, will be regarded as comment (unless
+@option{-spaces}). Be careful with @code{*}, which is recognized as the
+"current pc symbol" in any operand expression
 
 Example:
 
@@ -113,11 +129,22 @@ CPU- and output-module support them):
 @item <symbol> = <expression>
       Equivalent to @code{<symbol> equ <expression>}.
 
+@item <symbol> =.s <expression>
+      Equivalent to @code{<symbol> fequ.s <expression>}. PhxAss compatibility.
+
+@item <symbol> =.d <expression>
+      Equivalent to @code{<symbol> fequ.d <expression>}. PhxAss compatibility.
+
+@item <symbol> =.x <expression>
+      Equivalent to @code{<symbol> fequ.x <expression>}. PhxAss compatibility.
+
+@item <symbol> =.p <expression>
+      Equivalent to @code{<symbol> fequ.p <expression>}. PhxAss compatibility.
+
 @item align <bitcount>
       Insert as much zero bytes as required to reach an address where
       <bitcount> low order bits are zero. For example @code{align 2} would
       make an alignment to the next 32-bit boundary.
-      Equivalent to @code{cnop 0,1<<bitcount}.
 
 @item blk.b <exp>[,<fill>]
       Equivalent to @code{dcb.b <exp>,<fill>}.
@@ -149,6 +176,14 @@ CPU- and output-module support them):
 @item bss_f
       Equivalent to @code{section bss_f,bss,fast}.
 
+@item cargs [#<offset>,]<symbol1>[.<size1>][,<symbol2>[.<size2>]]...
+      Defines <symbol1> with the value of <offset>. Further symbols
+      on the line, separated by comma, will be assigned the <offset> plus
+      the size of the previous symbol. The size defaults to 2. Valid
+      optional size extensions are: @code{.b}, @code{.w}, @code{.l},
+      where @code{.l} results in a size of 4, the others 2.
+      The <offset> argument defaults to 4, when not given.
+
 @item clrfo
       Reset stack-frame offset counter to zero. See @code{fo} directive.
 
@@ -158,6 +193,8 @@ CPU- and output-module support them):
 @item cnop <offset>,<alignment>
       Insert as much zero bytes as required to reach an address which
       can be divided by <alignment>. Then add <offset> zero bytes.
+      May fill the pad-bytes with no-operation instructions for certain
+      cpus.
 
 @item code
       Equivalent to @code{section code,code}.
@@ -168,6 +205,10 @@ CPU- and output-module support them):
 @item code_f
       Equivalent to @code{section code_f,code,fast}.
 
+@item comm <symbol>,<size>
+      Create a common symbol with the given size. The alignment is always
+      32 bits.
+
 @item comment
       Everything in the operand field is ignored and seen as a comment.
       There is only one exception, when the operand contains @code{HEAD=}.
@@ -303,6 +344,18 @@ CPU- and output-module support them):
       the value of <expression>. Defining <symbol> twice will cause
       an error.
 
+@item <symbol> equ.s <expression>
+      Equivalent to @code{<symbol> fequ.s <expression>}. PhxAss compatibility.
+
+@item <symbol> equ.d <expression>
+      Equivalent to @code{<symbol> fequ.d <expression>}. PhxAss compatibility.
+
+@item <symbol> equ.x <expression>
+      Equivalent to @code{<symbol> fequ.x <expression>}. PhxAss compatibility.
+
+@item <symbol> equ.p <expression>
+      Equivalent to @code{<symbol> fequ.p <expression>}. PhxAss compatibility.
+
 @item erem
       Ends an outcommented block. Assembly will continue.
 
@@ -310,8 +363,23 @@ CPU- and output-module support them):
       Aligns to an even address. Equivalent to @code{cnop 0,2}.
 
 @item fail <message>
-      Immediately break assembly with a fatal error, showing the <message>
-      from the operand field.
+      Show an error message including the <message> string. Do not generate
+      an ouput file.
+
+@item <symbol> fequ.s <expression>
+      Define a new program symbol with the name <symbol> and assign to it
+      the floating point value of <expression>. Defining <symbol> twice
+      will cause an error. The extension is for Devpac-compatibility, but
+      will be ignored.
+
+@item <symbol> fequ.d <expression>
+      Equivalent to @code{<symbol> fequ.s <expression>}.
+
+@item <symbol> fequ.x <expression>
+      Equivalent to @code{<symbol> fequ.s <expression>}.
+
+@item <symbol> fequ.p <expression>
+      Equivalent to @code{<symbol> fequ.s <expression>}.
 
 @item <label> fo.<size> <expression>
       Assigns the current value of the stack-frame offset counter to <label>.
@@ -351,11 +419,13 @@ CPU- and output-module support them):
       Conditionally assemble the following lines if <expression> is
       less than zero or equal.
 
-@item ifd <symbol>
-      Conditionally assemble the following lines if <symbol> is defined.
+@item ifb <operand>
+      Conditionally assemble the following lines when <operand> is
+      completely blank, except an optional comment.
 
-@item ifnd <symbol>
-      Conditionally assemble the following lines if <symbol> is undefined.
+@item ifnb <operand>
+      Conditionally assemble the following lines when <operand> is
+      non-blank.
 
 @item ifc <string1>,<string2>
       Conditionally assemble the following lines if <string1> matches
@@ -365,6 +435,12 @@ CPU- and output-module support them):
       Conditionally assemble the following lines if <string1> does not
       match <string2>.
 
+@item ifd <symbol>
+      Conditionally assemble the following lines if <symbol> is defined.
+
+@item ifnd <symbol>
+      Conditionally assemble the following lines if <symbol> is undefined.
+
 @item incbin <file>
       Inserts the binary contents of <file> into the object code at
       this position. The file will be searched first in the current
@@ -403,13 +479,15 @@ CPU- and output-module support them):
       In Devpac- and PhxAss-compatibility mode up to 35 arguments are
       accepted, where argument 10-35 can be referenced by @code{\a} to
       @code{\z}.
-      The special argument @code{\@@} inserts a unique id, useful for
+      The special code @code{\@@} inserts a unique id, useful for
       defining labels. @code{\#} is replaced by the number of arguments
       (also stored in @code{NARG}) and @code{\?n} is replaced by the
       length of argument @code{n}.
       @code{\.} selects the argument indexed by the current value of
       @code{CARG}. @code{\+} and @code{\-} do the same, but additionally
       post-increment and post-decrement @code{CARG}.
+      @code{\()} may be used as a separator between the name of a macro
+      argument and the subsequent text.
 
 @item mexit
       Leave the current macro and continue with assembling the parent
@@ -427,6 +505,14 @@ CPU- and output-module support them):
 @item odd
       Aligns to an odd address. Equivalent to @code{cnop 1,2}.
 
+@item offset [<expression>]
+      Switches to a special offset-section. The contents of such a section
+      is not included in the output. Their labels may be referenced as
+      absolute offset symbols. Can be used to define structure offsets.
+      The optional <expression> gives the start offset for this section.
+      When missing the last offset of the previous offset-section is used,
+      or 0.
+
 @item org <expression>
       Sets the base address for the subsequent code.
 
@@ -446,12 +532,13 @@ CPU- and output-module support them):
       The the page length for a listing file to <len> lines.
       Currently ignored.
 
-@item printt <string>
-      Prints <string> to stdout.
+@item printt <string>[,<string>...]
+      Prints <string> to stdout. Each additional string into a new line.
+      Quotes are optional.
 
-@item printv <expression>
-      Evaluate <expression> and print it to stdout out in decimal and
-      hexadecimal form.
+@item printv <expression>[,<expression>...]
+      Evaluate <expression> and print it to stdout out in hexadecimal,
+      decimal, ASCII and binary format.
 
 @item public <symbol>[,<symbol>...]
       Flag <symbol> as an external symbol, which means that <symbol> is
@@ -465,6 +552,9 @@ CPU- and output-module support them):
 @item rept <expression>
       Repeats the assembly of the block between @code{rept} and @code{endr}
       <expression> number of times. <expression> has to be positive.
+      The internal symbol @code{REPTN} always holds the iteration counter
+      of the inner repeat loop, starting with 0. @code{REPTN} is -1 outside
+      of any repeat block.
 
 @item rorg <expression>
       Sets the program counter <expression> bytes behind the start of the
@@ -481,18 +571,22 @@ CPU- and output-module support them):
 @item rsset
       Equivalent to @code{setso}, but the symbol manipulated is @code{__RS}.
 
-@item section [<name>,]<sec_type>[,<mem_type>]]
+@item section [<name>,]<sec_type>[,<mem_type>]
       Starts a new section named @code{<name>} or reactivates an old one.
       @code{<sec_type>} defines the section type and may be @code{code},
       @code{text} (same as @code{code}), @code{data} or @code{bss}.
       @code{<sec_type>} defaults to @code{code} in Phxass mode. Otherwise
       a single argument will start a section with the type and name of
       @code{<sec_type>}. When @code{<mem_type>} is given
-      it defines the type of memory, where the section can
-      be loaded. This is Amiga-specific, and allowed identifiers are
-      @code{chip} for Chip-RAM and @code{fast} for Fast-RAM. Optionally
-      it is also possible to attach the suffix @code{_C}, @code{_F} or
-      @code{_P} to the @code{<sec_type>} argument for defining the memory type.
+      it defines a 32-bit memory attribute, which defines where to load
+      the section.
+      @code{<mem_type>} is either a numerical constant or one of the
+      keywords @code{chip} (for Chip-RAM) or @code{fast} (for Fast-RAM).
+      Optionally it is also possible to attach the suffix @code{_C}, @code{_F}
+      or @code{_P} to the @code{<sec_type>} argument for defining the memory
+      type.
+      The memory attributes are currently only used in the hunk-format
+      output module.
 
 @item <symbol> set <expression>
       Create a new symbol with the name <symbol> and assign
@@ -528,6 +622,12 @@ CPU- and output-module support them):
 @item <name> ttl
       Motorola syntax. Equivalent to @code{idnt <name>}.
 
+@item weak <symbol>[,<symbol>...]
+      Flag <symbol> as a weak symbol, which means that <symbol> is
+      visible to all modules in the linking process and may be replaced
+      by any global symbol with the same name.
+      When a weak symbol remains undefined its value defaults to 0.
+
 @item xdef <symbol>[,<symbol>...]
       Flag <symbol> as an global symbol, which means that
       <symbol> is visible to all modules in the linking process.
@@ -567,12 +667,13 @@ This module has the following error messages:
 @item 1010: , expected
 @item 1011: identifier expected
 @item 1012: directive has no effect
-@item 1013: expression must be a constant
+@item 1013: unexpected "%s" without "%s"
 @item 1014: illegal section type
-@item 1015: repeatedly defined symbol
+@item 1015: macro id insert on empty stack
 @item 1016: illegal memory type
-@item 1017: unexpected %s without %s
-@item 1020: maximum if-nesting depth exceeded (%d levels)
+@item 1017: macro id stack overflow
+@item 1018: macro id pull without matching push
+@item 1019: check comment
 @item 1022: missing %c
 
 @end itemize
diff --git a/doc/syntax_oldstyle.texi b/doc/syntax_oldstyle.texi
index c9544b0..51e4a2f 100644
--- a/doc/syntax_oldstyle.texi
+++ b/doc/syntax_oldstyle.texi
@@ -1,10 +1,10 @@
 This chapter describes the oldstyle syntax module suitable
-for some 8-bit CPUs (6502, 680x, Z80, etc.),
+for some 8-bit CPUs (6502, 680x, 68HC1x, Z80, etc.),
 which is available with the extension @code{oldstyle}.
 
 @section Legal
 
-    This module is copyright in 2002-2010 by Frank Wille.
+    This module is copyright in 2002-2015 by Frank Wille.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -23,6 +23,10 @@ This syntax module provides the following additional options:
 @item -dotdir
  Directives have to be preceded by a dot (@code{.}).
 
+@item -autoexp
+ Automatically export all non-local symbols, making them visible
+ to other modules during linking.
+
 @end table
 
 @section General Syntax
@@ -36,6 +40,10 @@ Local labels are preceded by '@code{.}' or terminated by '@code{$}'.
 For the rest, any alphanumeric character including '@code{_}' is allowed.
 Local labels are valid between two global label definitions.
 
+It is allowed, but not recommended, to refer to any local symbol starting with
+'@code{.}' in the source, by preceding its name with the name of the last
+global symbol, which was defined before it: @code{global_name.local_name}.
+
 The operands are separated from the mnemonic by whitespace. Multiple
 operands are separated by comma (@code{,}).
 
@@ -50,10 +58,21 @@ Example:
 @code{mylabel instr op1,op2  ;comment}
 
 In expressions, numbers starting with @code{$} are hexadecimal (e.g.
-@code{$fb2c}). @code{%} introduces binary numbers (e.g. @code{%1100101}).
+@code{$fb2c}). For Z80 also @code{&} may be used as a hexadecimal prefix,
+but make sure to avoid conflicts with the and-operator (either by using
+parentheses or blanks).
+@code{%} introduces binary numbers (e.g. @code{%1100101}).
 Numbers starting with @code{@@} are assumed to be octal numbers, e.g.
-@code{@@237}. All numbers starting with a digit are decimal, e.g. 
-@code{1239}.
+@code{@@237} (except for Z80, where it means binary).
+A special case is a digit followed by a @code{#}, which can be used to
+define an arbitrary base between 2 and 9 (e.g. @code{4#3012}).
+Intel-style constant suffixes are supported: @code{h} for hexadecimal,
+@code{d} for decimal, @code{o} or @code{q} for octal and @code{b} for
+binary. Hexadecimal intel-style constants must start with a digit (prepend
+@code{0}, when required).
+Also C-style prefixes are supported for hexadecimal (@code{0x}) and
+binary (@code{0b}).
+All other numbers starting with a digit are decimal, e.g. @code{1239}.
 
 
 @section Directives
@@ -65,6 +84,12 @@ CPU- and output-module allow it):
 @item <symbol> = <expression>
       Equivalent to @code{<symbol> equ <expression>}.
 
+@item abyte <offset>,<exp1>[,<exp2>,"<string1>"...]
+      Write the integer or string constant operands into successive
+      bytes of memory in the current section while adding the constant
+      <offset> to each byte. Any combination of integer and character
+      string constant operands is permitted.
+
 @item addr <exp1>[,<exp2>...]
       Equivalent to @code{word <exp1>[,<exp2>...]}.
 
@@ -79,9 +104,13 @@ CPU- and output-module allow it):
 @item ascii <exp1>[,<exp2>,"<string1>"...]
       See @code{defm}. 
 
-@item  asciiz "<string1>"[,"<string2>"...]
+@item asciiz "<string1>"[,"<string2>"...]
       See @code{string}. 
 
+@item assert <expression>[,<message>]
+      Display an error with the optional <message> when the expression
+      is false.
+
 @item binary <file>
       Inserts the binary contents of <file> into the object code at
       this position. The file will be searched first in the current
@@ -95,6 +124,9 @@ CPU- and output-module allow it):
       Insert <exp> zero or <fill> 16-bit words into the current section,
       using the endianess of the target CPU.
 
+@item bsz exp>[,<fill>]
+      Equivalent to @code{blk <exp>[,<fill>]}.
+
 @item byt
       Increases the program counter by one.
       Equivalent to @code{blk 1,0}.
@@ -146,6 +178,9 @@ CPU- and output-module allow it):
 @item defs <exp>[,<fill>]
       Equivalent to @code{blk <exp>[,<fill>]}.
 
+@item dephase
+      Equivalent to @code{rend}.
+
 @item ds <exp>[,<fill>]
       Equivalent to @code{blk <exp>[,<fill>]}.
 
@@ -192,6 +227,12 @@ CPU- and output-module allow it):
 @item endrepeat
       Ends a repetition block.
 
+@item endstruct
+      Ends a structure definition.
+
+@item endstructure
+      Ends a structure definition.
+
 @item <symbol> eq <expression>
       Equivalent to @code{<symbol> equ <expression>}.
 
@@ -206,9 +247,22 @@ CPU- and output-module allow it):
 @item even
       Aligns to an even address. Equivalent to @code{align 1}.
 
+@item fail <message>
+      Show an error message including the <message> string. Do not generate
+      an ouput file.
+
 @item fill <exp>
       Equivalent to @code{blk <exp>,0}.
 
+@item fcb <exp1>[,<exp2>,"<string1>"...]
+      Equivalent to @code{byte <exp1>[,<exp2>,"<string1>"...]}.
+
+@item fcc "<string>"
+      Equivalent to @code{text}.
+
+@item fdb <exp1>[,<exp2>,"<string1>"...]
+      Equivalent to @code{word <exp1>[,<exp2>...]}.
+
 @item global <symbol>[,<symbol>...]
       Flag <symbol> as an external symbol, which means that <symbol> is
       visible to all modules in the linking process. It may be either
@@ -223,6 +277,12 @@ CPU- and output-module allow it):
 @item ifndef <symbol>
       Conditionally assemble the following lines if <symbol> is undefined.
 
+@item ifd <symbol>
+      Conditionally assemble the following lines if <symbol> is defined.
+
+@item ifnd <symbol>
+      Conditionally assemble the following lines if <symbol> is undefined.
+
 @item ifeq <expression>
       Conditionally assemble the following lines if <expression> is zero.
 
@@ -245,11 +305,21 @@ CPU- and output-module allow it):
       Conditionally assemble the following lines if <expression> is
       less than zero or equal.
 
-@item incbin <file>
+@item ifused <symbol>
+      Conditionally assemble the following lines if <symbol> has been
+      previously referenced in an expression or in a parameter of an opcode.
+      Issue a warning, when <symbol> is already defined.
+      Note that @code{ifused} does not work, when the symbol has only been
+      used in the following lines of the source.
+
+@item incbin <file>[,<offset>[,<nbytes>]]
       Inserts the binary contents of <file> into the object code at
-      this position. The file will be searched first in the current
-      directory, then in all paths defined by @option{-I} or @code{incdir}
-      in the order of occurence.
+      this position. When <offset> is specified, then the given number
+      of bytes will be skipped at the beginning of the file. The optional
+      <nbytes> argument specifies the maximum number of bytes to be read
+      from that file.
+      The file will be searched first in the current directory, then in all
+      paths defined by @option{-I} or @code{incdir} in the order of occurence.
 
 @item incdir <path>
       Add another path to search for include files to the list of
@@ -265,30 +335,44 @@ CPU- and output-module allow it):
 @item mac <name>
       Equivalent to @code{macro <name>}.
 
+@item list
+      The following lines will appear in the listing file, if it was
+      requested.
+
 @item local <symbol>[,<symbol>...]
       Flag <symbol> as a local symbol, which means that <symbol> is
       local for the current file and invisible to other modules in
       the linking process.
 
-@item macro <name>
+@item macro <name>[,<argname>...]
       Defines a macro which can be referenced by <name>. The <name>
-      may also appear at the left side of the @code{macro} directive,
+      may also appear on the left side of the @code{macro} directive,
       starting at the first column. The macro definition is closed
       by an @code{endm} directive. When calling a macro you may pass
       up to 9 arguments, separated by comma. Those arguments are
-      referenced within the macro context as @code{\1} to @code{\9}.
+      referenced within the macro context as @code{\1} to @code{\9},
+      or optionally by named arguments, which you have to specify in
+      the operand.
       Argument @code{\0} is set to the macro's first qualifier
       (mnemonic extension), when given.
       The special argument @code{\@@} inserts a unique id, useful for
       defining labels.
+      @code{\()} may be used as a separator between the name of a macro
+      argument and the subsequent text.
 
 @item mdat <file>
       Equivalent to @code{incbin <file>}.
 
+@item nolist
+      The following lines will not be visible in a listing file.
+
 @item org <expression>
       Sets the base address for the subsequent code. This is equivalent
       to @code{*=<expression>}.
 
+@item phase <expression>
+      Equivalent to @code{rorg <expression>}.
+
 @item repeat <expression>
       Equivalent to @code{rept <expression>}.
 
@@ -299,6 +383,16 @@ CPU- and output-module allow it):
 @item reserve <exp>
       Equivalent to @code{blk <exp>,0}.
 
+@item rend
+      Ends a @code{rorg} block of label relocation. Following labels will
+      be based on @code{org} again.
+
+@item rorg <expression>
+      Relocate all labels between @code{rorg} and @code{rend} based on the
+      new origin.
+      Note that this directive only makes sense when generating absolute
+      code using @code{org}.
+
 @item section <name>[,"<attributes>"]
       Starts a new section named <name> or reactivate an old one. If
       attributes are given for an already existing section, they must
@@ -346,41 +440,34 @@ CPU- and output-module allow it):
          section is sharable
 @end table
 
-      Section Alignment (only one):
-
-@table @code
-            
-@item 0 
-         align to byte boundary
-            
-@item 1 
-         align to halfword boundary
-            
-@item 2 
-         align to word boundary
-            
-@item 3 
-         align to doubleword boundary
-           
-@item  4 
-         align to quadword boundary
-           
-@item 5 
-         align to 32 byte boundary
-           
-@item 6 
-         align to 64 byte boundary
-@end table
+@item <symbol> set <expression>
+      Create a new symbol with the name <symbol> and assign
+      the value of <expression>. If <symbol> is already assigned, it will
+      contain a new value from now on.
 
 @item spc <exp>
       Equivalent to @code{blk <exp>,0}.
 
 @item string "<string1>"[,"<string2>"...]
-        Like @code{string}, but adds a terminating zero-byte.
-
-@item text "string"
+      Like @code{text}, but adds a terminating zero-byte.
+
+@item struct <name>
+      Defines a structure which can be referenced by <name>. Labels within
+      a structure definitation can be used as field offsets. They will be
+      defined as local labels of @code{<name>} and can be referenced through
+      @code{<name>.<label>}. All directives are allowed, but instructions will
+      be ignored when such a structure is used. Data definitions can be used as
+      default values when the structure is used as initializer. The structure
+      name, <name>, is defined as a global symbol with the structure's size.
+      A structure definition is ended by @code{endstruct}.
+
+@item structure <name>
+      Equivalent to @code{struct <name>}.
+
+@item text "<string>"
       Places a single string constant operands into successive bytes of
-      memory in the current section.
+      memory in the current section. The string delimiters may be any
+      printable ASCII character.
 
 @item weak <symbol>[,<symbol>...]
       Flag <symbol> as a weak symbol, which means that <symbol> is
@@ -411,6 +498,66 @@ CPU- and output-module allow it):
 
 @end table
 
+
+@section Structures
+The oldstyle syntax is able to manage structures.
+Structures can be defined in two ways:
+@example 
+mylabel struct[ure]
+        <fields>
+        endstruct[ure]
+@end example  
+        or:    
+@example      
+        struct[ure] mylabel
+        <fields>
+        endstruct[ure]
+@end example  
+
+Any directive is allowed to define the structure fields. Labels can be used
+to define offsets into the structure. The initialized data is used as default
+value, whenever no value is given for a field when the structure is referenced.
+
+Some examples of structure declarations:
+@example
+  struct point
+x    db 4
+y    db 5
+z    db 6
+  endstruct
+@end example
+
+This will create the following labels:
+@example
+point.x  ; 0   offsets
+point.y  ; 1
+point.z  ; 2
+point    ; 3   size of the structure
+@end example
+
+The structure can be used by optionaly redefining the fields value:
+@example
+point1 point
+point2 point 1, 2, 3
+point3 point ,,4
+@end example
+is equivalent to
+@example
+point1  
+               db 4
+               db 5
+               db 6
+point2
+               db 1
+               db 2
+               db 3
+point3
+               db 4
+               db 5
+               db 4
+@end example
+
+
 @section Known Problems
 
     Some known problems of this module at the moment:
@@ -418,7 +565,8 @@ CPU- and output-module allow it):
 @itemize @minus
 
 @item Addresses assigned to @code{org} or to the current pc symbol @code{'*'}
-(on the z80 the pc symbol is @code{'$'})  must be constant.
+(on the z80 the pc symbol is @code{'$'}) must be constant.
+
 @item Expressions in an @code{if} directive must be constant.
 
 @end itemize
@@ -439,16 +587,12 @@ This module has the following error messages:
 @item 1009: invalid data operand
 @item 1010: , expected
 @item 1011: identifier expected
-@item 1012: illegal escape sequence \%c
-@item 1013: expression must be a constant
-@item 1014: repeatedly defined symbol
-@item 1015: endif without if
-@item 1016: if without endif
-@item 1017: maximum if-nesting depth exceeded (%d levels)
-@item 1018: else without if
-@item 1019: unexpected endr without macro
-@item 1020: unexpected endr without rept
+@item 1012: illegal escape sequence %c
+@item 1013: unexpected "%s" without "%s"
 @item 1021: cannot open binary file "%s"
-@item 1022: symbol <%s> already defined with %s scope
+@item 1023: alignment too big
+@item 1024: label <%s> has already been defined
+@item 1025: skipping instruction in struct init
+@item 1026: last %d bytes of string constant have been cut
 
 @end itemize
diff --git a/doc/syntax_std.texi b/doc/syntax_std.texi
index ef2ec8d..acea44f 100644
--- a/doc/syntax_std.texi
+++ b/doc/syntax_std.texi
@@ -3,7 +3,7 @@ with the extension @code{std}.
 
 @section Legal
 
-    This module is copyright in 2002-2010 by Volker Barthelmann.
+    This module is copyright in 2002-2015 by Volker Barthelmann.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -24,6 +24,8 @@ This syntax module provides the following additional options:
  define them as externally visible.
 @item -nodotneeded
  Recognize assembly directives without a leading dot (@code{.}).
+@item -noesc
+ Ignore escape character sequences in string constants.
 @item -sdlimit=<n>
  Put data up to a maximum size of n bytes into the small-data
  sections. Default is n=0, which means the function is disabled.
@@ -43,8 +45,10 @@ The operands are separated from the mnemonic by whitespace.
 Multiple operands are separated by comma (@code{,}).
 
 Comments are introduced by the comment character @code{#}. The rest
-of the line will be ignored. For the c16x, m68k, 650x and ARM backends,
-the comment character is @code{;} instead of @code{#}.
+of the line will be ignored. For the c16x, m68k, 650x, ARM, Z80, 6800
+and Jaguar-RISC backends, the comment character is @code{;}
+instead of @code{#}, although @code{#} is still allowed when being the
+first non-blank character on a line.
 
 Example:
 
@@ -56,8 +60,12 @@ binary numbers (e.g. @code{0b1100101}). Other numbers starting with
 @code{0} are assumed to be octal numbers, e.g. @code{0237}. All
 numbers starting with a non-zero digit are decimal, e.g. @code{1239}.
 
+C-like escape characters in string constants are allowed by default,
+unless disabled by @option{-noesc}.
+
 @section Directives
 
+All directives are case-insensitive.
 The following directives are supported by this syntax module (if the
 CPU- and output-module allow it):
 
@@ -74,19 +82,35 @@ See @code{.uaquad}.
 @item .ascii <exp1>[,<exp2>,"<string1>"...]
 See @code{.byte}. 
 
+@item .abort <message>
+      Print an error and stop assembly immediately.
+
 @item  .asciiz "<string1>"[,"<string2>"...]
 See @code{.string}.    
 
-@item .align <bit_count>[,<fill>]
-      Insert as much fill bytes as required to reach an address where
-      <bit_count> low order bits are zero. For example @code{.align 2} would
-      make an alignment to the next 32-bit boundary.
-      Note that this directive
+@item .align <bitorbyte_count>[,<fill>][,<maxpad>]
+      Depending on the current CPU backend @code{.align} either behaves
+      like @code{.balign} (x86) or like @code{.p2align} (PPC).
 
-@item .balign <byte_count>[,<fill>]
+@item .balign <byte_count>[,<fill>][,<maxpad>]
       Insert as much fill bytes as required to reach an address which
       is dividable by <byte_count>. For example @code{.balign 2} would
       make an alignment to the next 16-bit boundary.
+      The padding bytes are initialized by <fill>, when given. The optional
+      third argument defines a maximum number of padding bytes to use. When
+      more are needed then the alignment is not done at all.
+
+@item .balignl <bit_count>[,<fill>][,<maxpad>]
+      Works like @code{.balign}, with the only difference that the optional
+      fill value can be specified as a 32-bit word. Padding locations which
+      are not already 32-bit aligned, will cause a warning and padded by
+      zero-bytes.
+
+@item .balignw <bit_count>[,<fill>][,<maxpad>]
+      Works like @code{.balign}, with the only difference that the optional
+      fill value can be specified as a 16-bit word. Padding locations which
+      are not already 16-bit aligned, will cause a warning and padded by
+      zero-bytes.
 
 @item .byte <exp1>[,<exp2>,"<string1>"...]
       Assign the integer or string constant operands into successive
@@ -96,29 +120,51 @@ See @code{.string}.
 @item .comm <symbol>,<size>[,<align>]
       Defines a common symbol which has a size of <size> bytes. The
       final size and alignment will be assigned by the linker, which
-      will use the highes size and alignment values of all common
+      will use the highest size and alignment values of all common
       symbols with the same name found. A common symbol is allocated
       in the .bss section in the final executable. ".comm"-areas of
       less than 8 bytes in size are aligned to word boundaries, other-
       wise to doubleword boundaries.
 
+@item .double <exp1>[,<exp2>...]
+      Parse one of more double precision floating point expressions and
+      write them into successive blocks of 8 bytes into memory using the
+      backend's endianess and alignment.
+
 @item .endm
-        Ends a macro definition.
+      Ends a macro definition.
 
 @item .endr
-        Ends a repetition block.
+      Ends a repetition block.
 
 @item .equ <symbol>,<expression>
-        See @code{.set}.
+      See @code{.set}.
+
+@item .equiv <symbol>,<expression>
+      Assign the <expression> to <symbol> similar to @code{.equ} and
+      @code{.set}, but signals an error when <symbol> has already been
+      defined.
+
+@item .err <message>
+      Print a user error message. Do not create an output file.
 
 @item .extern  <symbol>[,<symbol>...]
         See @code{.global}.
 
+@item .fail <expression>
+      Cause a warning when <expresion> is greater or equal 500. Otherwise
+      cause an error.
+
 @item .file "string"
       Set the filename of the input source. This may be used by some
       output modules. By default, the input filename passed on the
       command line is used.
 
+@item .float <exp1>[,<exp2>...]
+      Parse one of more single precision floating point expressions and
+      write them into successive blocks of 4 bytes into memory using the
+      backend's endianess and alignment.
+
 @item .global <symbol>[,<symbol>...]
       Flag <symbol> as an external symbol, which means that <symbol> is
       visible to all modules in the linking process. It may be either
@@ -158,6 +204,14 @@ See @code{.string}.
       Conditionally assemble the following lines if <expression> is
       less than zero or equal.
 
+@item .ifb <operand>
+      Conditionally assemble the following lines when <operand> is
+      completely blank, except an optional comment.
+
+@item .ifnb <operand>
+      Conditionally assemble the following lines when <operand> is
+      non-blank.
+
 @item .ifdef <symbol>
       Conditionally assemble the following lines if <symbol> is defined.
 
@@ -191,6 +245,10 @@ See @code{.string}.
       low zero bits or 2, whichever is greater.
       <symbol> may be made globally visible by the .globl directive.
 
+@item .list
+      The following lines will appear in the listing file, if it was
+      requested.
+
 @item .local <symbol>[,<symbol>...]
       Flag <symbol> as a local symbol, which means that <symbol> is
       local for the current file and invisible to other modules in
@@ -199,16 +257,47 @@ See @code{.string}.
 @item .long <exp1>[,<exp2>...]
       See @code{.word}.
 
-@item .macro <name>
+@item .macro <name> [<argname1>[=<default>][,<argname2>...]]
       Defines a macro which can be referenced by <name>. The macro
-      definition is closed by an @code{.endm} directive. When calling
-      a macro you may pass up to 9 arguments, separated by comma. Those
-      arguments are referenced within the macro context as @code{\1} to
-      @code{\9}.
-      Argument @code{\0} is set to the macro's first qualifier
-      (mnemonic extension), when given.
+      definition is closed by an @code{.endm} directive. The names
+      of the arguments, which may be passed to this macro, must be
+      declared directly following the macro name. You can define an
+      optional default value in the case an argument is left out.
+      Note that macro names are case-insensitive while the argument
+      names are case-sensitive.
+      Within the macro context arguments are referenced by @code{\argname}.
       The special argument @code{\@@} inserts a unique id,
       useful for defining labels.
+      @code{\()} may be used as a separator between the name of a macro
+      argument and the subsequent text.
+
+@item .nolist
+      The following lines will not be visible in a listing file.
+
+@item .org <exp>
+      Defines the start address for the subsequent code.
+      When <exp> starts with a current-pc symbol and a plus (@code{+})
+      operator, then the directive behaves like @code{.space}.
+
+@item .p2align <bit_count>[,<fill>][,<maxpad>]
+      Insert as much fill bytes as required to reach an address where
+      <bit_count> low order bits are zero. For example @code{.p2align 2} would
+      make an alignment to the next 32-bit boundary.
+      The padding bytes are initialized by <fill>, when given. The optional
+      third argument defines a maximum number of padding bytes to use. When
+      more are needed then the alignment is not done at all.
+
+@item .p2alignl <bit_count>[,<fill>][,<maxpad>]
+      Works like @code{.p2align}, with the only difference that the optional
+      fill value can be specified as a 32-bit word. Padding locations which
+      are not already 32-bit aligned, will cause a warning and padded by
+      zero-bytes.
+
+@item .p2alignw <bit_count>[,<fill>][,<maxpad>]
+      Works like @code{.p2align}, with the only difference that the optional
+      fill value can be specified as a 16-bit word. Padding locations which
+      are not already 16-bit aligned, will cause a warning and padded by
+      zero-bytes.
 
 @item .quad <exp1>[,<exp2>...]
       If the current section location counter is not on a quadword
@@ -220,12 +309,12 @@ See @code{.string}.
       Repeats the assembly of the block between @code{.rept} and @code{.endr}
       <expression> number of times. <expression> has to be positive.
 
-@item .section <name>[,"<attributes>"]
-      Starts a new section named <name> or reactivate an old one. If
+@item .section <name>[,"<attributes>"][,<mem_flags>]
+      Starts a new section named @code{<name>} or reactivate an old one. If
       attributes are given for an already existing section, they must
       match exactly. The section's name will also be defined as a new
       symbol, which represents the section's start address.
-      The "<attributes>" string may consist of the following characters:
+      The @code{"<attributes>"} string may consist of the following characters:
 
       Section Contents:
 @table @code
@@ -271,7 +360,7 @@ See @code{.string}.
       automatically align the section to the highest alignment restriction
       used within.
 
-      Memory flags:
+      Memory flags (Amiga hunk format only):
 
 @table @code
             
@@ -283,6 +372,12 @@ See @code{.string}.
 
 @end table
 
+      When the optional, non-standard, @code{<mem_flags>} argument is given
+      it defines a 32-bit memory attribute, which defines where to load
+      the section (platform specific).
+      The memory attributes are currently only used in the hunk-format
+      output module.
+
 @item .set <symbol>,<expression>
       Create a new program symbol with the name <symbol> and assign to it
       the value of <expression>. If <symbol> is already assigned, it will
@@ -293,10 +388,13 @@ See @code{.string}.
 
 @item .short <exp1>[,<exp2>...]
       See @code{.half}.
- 
-@item .space <exp>[,<fill>]
-      See @code{.space}.
 
+@item .single <exp1>[,<exp2>...]
+      Same as @code{.float}.
+
+@item .skip <exp>[,<fill>]
+      Insert <exp> zero or <fill> bytes into the current section.
+ 
 @item .space <exp>[,<fill>]
       Insert <exp> zero or <fill> bytes into the current section.
 
@@ -311,7 +409,10 @@ See @code{.string}.
       Add an stab-entry for debugging, without symbol-string and value.
 
 @item .string "<string1>"[,"<string2>"...]
-        Like @code{.byte}, but adds a terminating zero-byte.
+      Like @code{.byte}, but adds a terminating zero-byte.
+
+@item .swbeg <op>
+      Just for compatibility. Do nothing.
 
 @item .type <symbol>,<type>
       Set type of symbol called <symbol> to <type>, which must be one of:
@@ -354,6 +455,9 @@ See @code{.string}.
       advance it to the next word boundary. Then assign the values of the
       operands into successive words of memory in the current section. 
 
+@item .zero <exp>[,<fill>]
+      Insert <exp> zero or <fill> bytes into the current section.
+
 @end table
 
 Predefined section directives:
@@ -402,18 +506,17 @@ This module has the following error messages:
 @item 1005: missing closing parentheses
 @item 1006: missing operand
 @item 1007: scratch at end of line
-@item 1008: \" expected
+@item 1008: section flags expected
 @item 1009: invalid data operand
-@item 1010: , expected
+@item 1010: memory flags expected
 @item 1011: identifier expected
-@item 1012: illegal escape sequence \\%c
-@item 1013: expression must be constant
-@item 1014: unexpected endm without macro
-@item 1015: endif without if
-@item 1016: if without endif
-@item 1017: maximum if-nesting depth exceeded (%d levels)
-@item 1018: else without if
+@item 1012: assembly aborted
+@item 1013: unexpected "%s" without "%s"
+@item 1014: pointless default value for required parameter <%s>
 @item 1019: syntax error
-@item 1020: unexpected endr without rept
-@item 1021: symbol <%s> already defined with %s scope
+@item 1021: section name expected
+@item 1022: .fail %lld encountered
+@item 1023: .fail %lld encountered
+@item 1024: alignment too big
+
 @end itemize
diff --git a/doc/vasm.texi b/doc/vasm.texi
index 525b7c4..7f15fa9 100644
--- a/doc/vasm.texi
+++ b/doc/vasm.texi
@@ -1,3 +1,8 @@
+\ifx\pdfminorversion\undefined
+ \pdfoptionpdfminorversion=3
+\else
+ \pdfminorversion=3
+\fi
 \input texinfo
 
 @setfilename index.texi
@@ -8,7 +13,7 @@
 
 This is the manual for the vasm assembler system.
 
-Copyright 2002-2010 Volker Barthelmann
+Copyright 2002-2015 Volker Barthelmann
 
 @end ifinfo
 
@@ -49,7 +54,7 @@ or analyzing the output.
 
 @section Legal
 
-    vasm is copyright in 2002-2010 by Volker Barthelmann.
+    vasm is copyright in 2002-2015 by Volker Barthelmann.
 
     This archive may be redistributed without modifications and used
     for non-commercial purposes.
@@ -74,6 +79,8 @@ module is called @code{vasmppc_std}.
 
 Sometimes the syntax-modifier may be omitted, e.g. @code{vasmppc}.
 
+Detailed instructions how to build vasm can be found in the last chapter.
+
 @node The Assembler
 @chapter The Assembler
 @include vasm_main.texi
@@ -86,6 +93,10 @@ Sometimes the syntax-modifier may be omitted, e.g. @code{vasmppc}.
 @chapter Mot Syntax Module
 @include syntax_mot.texi
 
+@node Madmac Syntax Module
+@chapter Madmac Syntax Module
+@include syntax_madmac.texi
+
 @node Oldstyle Syntax Module
 @chapter Oldstyle Syntax Module
 @include syntax_oldstyle.texi
@@ -146,6 +157,18 @@ Sometimes the syntax-modifier may be omitted, e.g. @code{vasmppc}.
 @chapter z80 cpu module
 @include cpu_z80.texi
 
+@node 6800 cpu module
+@chapter 6800 cpu module
+@include cpu_6800.texi
+
+@node Jaguar RISC cpu module
+@chapter Jaguar RISC cpu module
+@include cpu_jagrisc.texi
+
+@node Trillek TR3200 cpu module
+@chapter Trillek TR3200 cpu module
+@include cpu_tr3200.texi
+
 @node Interface
 @chapter Interface
 @include interface.texi
diff --git a/doc/vasm_main.texi b/doc/vasm_main.texi
index 1d1b077..338bb37 100644
--- a/doc/vasm_main.texi
+++ b/doc/vasm_main.texi
@@ -23,6 +23,10 @@ or additional options.
         Defines a symbol with the name <name> and assigns the value of the
         expression when given. The assigned value defaults to 1 otherwise.
 
+@item -esc
+        Enable escape character sequences. This will make vasm treat the
+        escape character \ in string constants similar as in the C language.
+
 @item -F<fmt>
         Use module <fmt> as output driver. See the chapter on output
         drivers for available formats and options.
@@ -55,6 +59,10 @@ or additional options.
         Defines the maximum number of errors to display before assembly
         is aborted. When <n> is 0 then there is no limit. Defaults to 5.
 
+@item -maxmacrecurs=<n>
+        Defines the maximum of number of recursions within a macro.
+        Defaults to 1000.
+
 @item -nocase
         Disables case-sensitivity for everything - identifiers, directives
         and instructions. Note that directives and instructions may already
@@ -91,6 +99,12 @@ or additional options.
         section with a different name but same attributes as a first one,
         it will switch to the first, instead of starting a new section.
 
+@item -unsshift
+        The shift-right operator (@code{>>}) treats the value to shift as
+        unsigned, which has the effect that 0-bits are inserted on the
+        left side. The number of bits in a value depend on the target
+        address type (refer to the appropriate cpu module documentation).
+
 @item -w
         Hide all warning messages.
 
@@ -101,6 +115,9 @@ or additional options.
 
 @end table
 
+Note that while most options allow an argument without any separating blank,
+some others require it (e.g. @option{-o} and @option{-L}).
+
 @section Expressions
 
 Standard expressions are usually evaluated by the main part of vasm
@@ -137,10 +154,10 @@ priorities, from highest to lowest, are:
 @enumerate 1
 @item @code{+ - ! ~} (unary +/- sign, not, complement)
 @item @code{<< >>} (shift left, shift right)
-@item @code{* / % //} (multiply, divide, modulo)
 @item @code{&} (bitwise and)
 @item @code{^ ~} (bitwise exclusive-or)
 @item @code{| !} (bitwise inclusive-or)
+@item @code{* / % //} (multiply, divide, modulo)
 @item @code{+ -} (plus, minus)
 @item @code{< > <= >=} (less, greater, less or equal, greater or equal)
 @item @code{== != = <>} (equality, inequality)
@@ -157,8 +174,9 @@ and have to be terminated by the same character that started them.
 Multiple characters are allowed and a constant is built according to the
 endianess of the target.
 
-Inside character contants, the following escape sequences are allowed
-(unless @option{-noesc} was specified):
+When the @option{-esc} option was specified, or automatically enabled by
+a syntax module, vasm interprets escape character sequences as in the
+C language:
 
 @table @code
 
@@ -202,12 +220,56 @@ Inside character contants, the following escape sequences are allowed
 
 @end table
 
+Note, that the default behaviour of vasm has changed since V1.7! Escape
+sequence handling has been the default in older versions. This has been
+changed to increase compatibility with other assemblers. Use @option{-esc}
+to assemble sources with escape character sequences. It is still the
+default in the @code{std} syntax module, though.
+
+@section Symbols
+
+You can define as many symbols as your available memory permits. A symbol
+may have any length and can be of global or local scope. Internally, there
+are three types of symbols:
+@table @code
+@item Expression
+      These symbols are usually not visible outside the
+      source, unless they are explicitely exported.
+@item Label
+      Labels are always addresses inside a program section. By
+      default they have local scope for the linker.
+@item Imported
+      These symbols are externally defined and must be
+      resolved by the linker.
+@end table
+
+Beginning with vasm V1.5c one expression symbol is always defined to allow
+conditional assembly depending on the assembler being used: @code{__VASM}.
+Its value depends on the selected cpu module. There may be other symbols which
+are pre-defined by the syntax- or by the cpu module.
+
 @section Include Files
 
-vasm supports include files and defining include paths. Whether this
+Vasm supports include files and defining include paths. Whether this
 functionality is available depends on the syntax module, which has to
 provide the appropriate directives.
 
+On startup vasm will define at least one default include path: the
+current working directory, where the assembler program was launched from.
+When the input file is loaded from a different directory, i.e. the input
+file is a relative or absolute path and not a single file name, then the
+path to the input file name will be added as another include path.
+
+Include paths are searched in the following order:
+@enumerate 1
+@item Current work directory.
+@item Paths specified by @option{-I} in the order of occurence on the
+      command line.
+@item Path to the input source file.
+@item Paths specified by directives inside the source text (in the order
+      of occurence).
+@end enumerate
+
 @section Macros
 
 Macros are supported by vasm, but the directives for defining them have
@@ -220,7 +282,7 @@ first qualifier (mnemonic extension) of the macro invocation when given.
 
 A macro parameter which is enclosed inside @code{<} and @code{>} characters
 is treated as a single parameter, even when it contains commas. @code{>}
-characters within such a parameter may be specified by @code{>>}.
+characters within such a parameter may be specified as @code{>>}.
 
 @code{\@@} inserts a unique id of the form @code{_nnnnnn} (where
 '@code{n}' is a digit between 0 and 9) per macro invocation. Useful
@@ -233,8 +295,13 @@ for defining reusable labels in a macro.
 @code{\#} is replaced by the number of parameters given to the current
 macro invocation.
 
-@code{\?n} represents the total length of parameter n in bytes. Note that the
-quotes in a string parameter are included.
+@code{\?n} represents the total length of parameter @code{n} in bytes.
+Note that the quotes of a string parameter are included in this length.
+
+@section Structures
+
+Vasm supports structures, but the directives for defining them
+have to be implemented in the syntax module.
 
 @section Conditional Assembly
 
@@ -260,16 +327,21 @@ Has to be provided completely by the syntax module.
 @itemize
     @item Frank Wille
     @item Sebastian Pachuta
+    @item Esben Norby
     @item Gunther Nikl
     @item George Nakos
     @item Timm S. Mueller
     @item Gareth Morris
+    @item Dominic Morris
     @item Mauricio Mu@~noz Lucero
     @item J@"org van de Loo
     @item Robert Leffmann
     @item Miro Kropacek
     @item Mikael Kalms
     @item Matthew Hey
+    @item Philippe Guichardon
+    @item Romain Giot
+    @item Francois Galea
     @item Tom Duin
     @item Karoly Balogh
 @end itemize
@@ -287,7 +359,7 @@ The frontend has the following error messages:
 @item 6: symbol <%s> redefined
 @item 7: %c expected
 @item 8: cannot resolve section <%s>, maximum number of passes reached
-@item 9: division by zero
+@item 9: instruction not supported on selected architecture
 @item 10: number or identifier expected
 @item 11: could not initialize %s module
 @item 12: multiple input files
@@ -299,26 +371,56 @@ The frontend has the following error messages:
 @item 18: out of memory
 @item 19: symbol <%s> recursively defined
 @item 20: fail: %s
-@item 21: rorg is lower than current pc
+@item 21: section offset is lower than current pc
 @item 22: character constant too long
-@item 23: undefined local symbol
+@item 23: undefined symbol <%s>
 @item 24: trailing garbage after option -%c
-@item 25: undefined macro parameter '\%d'
-@item 26: missing %s directive for macro "%s"
+@item 25: missing pacro parameters
+@item 26: missing end directive for macro "%s"
 @item 27: macro definition inside macro "%s"
 @item 28: maximum number of %d macro arguments exceeded
 @item 29: option -%c was specified twice
 @item 30: read error on <%s>
 @item 31: expression must be constant
 @item 32: initialized data in bss
-@item 33: missing %s directive in repeat-block
+@item 33: missing end directive in repeat-block
 @item 34: #%d is not a valid warning message
 @item 35: relocation not allowed
 @item 36: illegal escape sequence \%c
 @item 37: no current macro to exit
 @item 38: internal symbol %s redefined by user
 @item 39: illegal relocation
-@item 40: macro id stack overflow
-@item 41: macro id pull without matching push
+@item 42: division by zero
+@item 43: illegal macro argument
+@item 44: reloc org is already set
+@item 45: reloc org was not set
+@item 47: bad file-offset argument
+@item 48: assertion "%s" failed: %s
+@item 49: cannot declare structure within structure
+@item 50: no structure
+@item 51: instruction has been auto-aligned
+@item 52: macro name conflicts with mnemonic
+@item 53: macro name conflicts with directive
+@item 54: non-relocatable expression in equate <%s>
+@item 55: line buffer overflow
+@item 56: illegal structure recursion
+@item 57: maximum number of macro recursions (%d) reached
+@item 58: data has been auto-aligned
+@item 59: register symbol <%s> redefined
+@item 60: cannot evaluate constant huge integer expression
+@item 61: cannot evaluate floating point expression
+@item 62: imported symbol <%s> was not referenced
+@item 63: symbol <%s> already defined with %s scope
+@item 64: unexpected "else" without "if"
+@item 65: unexpected "endif" without "if"
+@item 66: maximum if-nesting depth exceeded (%d levels)
+@item 67: "endif" missing for conditional block started at %s line %d
+@item 68: repeatedly defined symbol <%s>
+@item 69: macro <%s> does not exist
+@item 70: register <%s> does not exist
+@item 71: register symbol <%s> has wrong type
+@item 72: cannot mix positional and keyword arguments
+@item 73: undefined macro argument name
+@item 74: required macro argument %d was left out
 
 @end itemize
diff --git a/elf_reloc_jag.h b/elf_reloc_jag.h
new file mode 100644
index 0000000..4fd71c6
--- /dev/null
+++ b/elf_reloc_jag.h
@@ -0,0 +1,81 @@
+/* elf_reloc_68k.h ELF relocation types for Jaguar RISC */
+/* (c) in 2015 by Frank Wille */
+
+#define R_JAG_NONE 0      /* No reloc */
+#define R_JAG_ABS32 1     /* Direct 32 bit */
+#define R_JAG_ABS16 2     /* Direct 16 bit */
+#define R_JAG_ABS8 3      /* Direct 8 bit */
+#define R_JAG_REL32 4     /* PC relative 32 bit */
+#define R_JAG_REL16 5     /* PC relative 16 bit */
+#define R_JAG_REL8 6      /* PC relative 8 bit */
+#define R_JAG_ABS5 7      /* Direct 5 bit */
+#define R_JAG_REL5 8      /* PC relative 5 bit */
+#define R_JAG_JR 9        /* PC relative branch (distance / 2), 5 bit */
+#define R_JAG_ABS32SWP 10 /* 32 bit direct, halfwords swapped as in MOVEI */
+#define R_JAG_REL32SWP 11 /* 32 bit PC rel., halfwords swapped as in MOVEI */
+
+
+  if ((*rl)->type <= LAST_STANDARD_RELOC) {
+    nreloc *r = (nreloc *)(*rl)->reloc;
+
+    *refsym = r->sym;
+    *addend = r->addend;
+    size = r->size;
+    offset = (taddr)r->offset;
+    mask = r->mask;
+
+    switch ((*rl)->type) {
+
+      case REL_ABS:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_JAG_ABS32;
+          else if (size == 16)
+            t = R_JAG_ABS16;
+          else if (size == 8)
+            t = R_JAG_ABS8;
+        }
+        else if (offset==6 && size==5 && mask==0x1f)
+          t = R_JAG_ABS5;
+        else if (!(offset&15) && size==16 && (mask==0xffff0000 || mask==0xffff)
+                 && (rl2=(*rl)->next)!=NULL
+                 && (*rl)->type==(*rl)->next->type) {
+          nreloc *r2 = (nreloc *)rl2->reloc;
+          if ((mask==0xffff0000 && r2->mask==0xffff && size==r2->size) ||
+              (mask==0xffff && r2->mask==0xffff0000 && size==r2->size)) {
+            t = R_JAG_ABS32SWP;
+            if (offset > (taddr)r2->offset)
+              offset = (taddr)r2->offset;
+            *rl = (*rl)->next;
+          }
+        }
+        break;
+
+      case REL_PC:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_JAG_REL32;
+          else if (size == 16)
+            t = R_JAG_REL16;
+          else if (size == 8)
+            t = R_JAG_REL8;
+        }
+        else if (offset==6 && size==5 && mask==0x1f)
+          t = R_JAG_REL5;
+        else if (offset==6 && size==5 && mask==0x3e)
+          t = R_JAG_JR;
+        else if (!(offset&15) && size==16 && (mask==0xffff0000 || mask==0xffff)
+                 && (rl2=(*rl)->next)!=NULL
+                 && (*rl)->type==(*rl)->next->type) {
+          nreloc *r2 = (nreloc *)rl2->reloc;
+          if ((mask==0xffff0000 && r2->mask==0xffff && size==r2->size) ||
+              (mask==0xffff && r2->mask==0xffff0000 && size==r2->size)) {
+            t = R_JAG_REL32SWP;
+            if (offset > (taddr)r2->offset)
+              offset = (taddr)r2->offset;
+            *rl = (*rl)->next;
+          }
+        }
+        break;
+    }
+  }
diff --git a/elf_reloc_x86_64.h b/elf_reloc_x86_64.h
new file mode 100644
index 0000000..2b646c1
--- /dev/null
+++ b/elf_reloc_x86_64.h
@@ -0,0 +1,89 @@
+/* elf_reloc_x86_64.h ELF relocation types for x86 64-bit architecture */
+/* (c) in 2011 by Frank Wille */
+
+#define R_X86_64_NONE           0
+#define R_X86_64_64             1
+#define R_X86_64_PC32           2
+#define R_X86_64_GOT32          3
+#define R_X86_64_PLT32          4
+#define R_X86_64_COPY           5
+#define R_X86_64_GLOB_DAT       6
+#define R_X86_64_JUMP_SLOT      7
+#define R_X86_64_RELATIVE       8
+#define R_X86_64_GOTPCREL       9
+#define R_X86_64_32             10
+#define R_X86_64_32S            11
+#define R_X86_64_16             12
+#define R_X86_64_PC16           13
+#define R_X86_64_8              14
+#define R_X86_64_PC8            15
+
+/* TLS relocations */
+#define R_X86_64_DTPMOD64       16
+#define R_X86_64_DTPOFF64       17
+#define R_X86_64_TPOFF64        18
+#define R_X86_64_TLSGD          19
+#define R_X86_64_TLSLD          20
+#define R_X86_64_DTPOFF32       21
+#define R_X86_64_GOTTPOFF       22
+#define R_X86_64_TPOFF32        23
+
+
+  if ((*rl)->type <= LAST_STANDARD_RELOC) {
+    nreloc *r = (nreloc *)(*rl)->reloc;
+
+    *refsym = r->sym;
+    *addend = r->addend;
+    size = r->size;
+    offset = (taddr)r->offset;
+    mask = r->mask;
+
+    switch ((*rl)->type) {
+
+      case REL_ABS:
+        if (!(offset&7) && mask==-1) {
+          if (size == 64)
+            t = R_X86_64_64;
+          else if (size == 32)
+            t = R_X86_64_32;
+          else if (size == 16)
+            t = R_X86_64_16;
+          else if (size == 8)
+            t = R_X86_64_8;
+        }
+        break;
+
+      case REL_PC:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_X86_64_PC32;
+          else if (size == 16)
+            t = R_X86_64_PC16;
+          else if (size == 8)
+            t = R_X86_64_PC8;
+        }
+        break;
+
+      case REL_GOT:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_X86_64_GOT32;
+        }
+        break;
+
+      case REL_GOTPC:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_X86_64_GOTPCREL;
+        }
+        break;
+
+      case REL_PLT:
+        if (!(offset&7) && mask==-1) {
+          if (size == 32)
+            t = R_X86_64_PLT32;
+        }
+        break;
+
+    }
+  }
diff --git a/error.c b/error.c
index 76173b1..f2ebb3b 100644
--- a/error.c
+++ b/error.c
@@ -1,5 +1,5 @@
 /* error.c - error output and modification routines */
-/* (c) in 2002-2009 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002-2014 by Volker Barthelmann and Frank Wille */
 
 #include <stdarg.h>
 #include "vasm.h"
@@ -79,20 +79,22 @@ static void error(int n,va_list vl,struct err_out *errlist,int offset)
   if ((flags&DONTWARN) || ((flags&WARNING) && no_warn))
     return;
 
-  if (last_err_source) {
-    /* avoid printing the same error again and again, which might happen
-       when a line is evaluated in multiple passes */
-    if (cur_src!=NULL && cur_src==last_err_source &&
-       cur_src->line==last_err_line &&
-       n+offset==last_err_no)
-      return;
-  }
-
-  if ((flags&MESSAGE) && !(flags&(WARNING|ERROR|FATAL)))
+  if ((flags&MESSAGE) && !(flags&(WARNING|ERROR|FATAL))) {
     f = stdout;  /* print messages to stdout */
-  else
+  }
+  else {
     f = stderr;  /* otherwise stderr */
 
+    if (last_err_source) {
+      /* avoid printing the same error again and again, which might happen
+         when a line is evaluated in multiple passes */
+      if (cur_src!=NULL && cur_src==last_err_source &&
+         cur_src->line==last_err_line &&
+         n+offset==last_err_no)
+        return;
+    }
+  }
+
   if (cur_src) {
     last_err_source = cur_src;
     last_err_line = cur_src->line;
@@ -131,14 +133,27 @@ static void error(int n,va_list vl,struct err_out *errlist,int offset)
   if (!(flags & NOLINE) && cur_src!=NULL) {
     if (cur_src->parent != NULL) {
       source *parent,*child;
-    
+      int recurs;
+
       child = cur_src;
       while (parent = child->parent) {
         if (child->num_params >= 0)
           fprintf(f,"\tcalled");    /* macro called from */
         else
           fprintf(f,"\tincluded");  /* included from */
-        fprintf(f," from line %d of \"%s\"\n",child->parent_line,parent->name);
+        fprintf(f," from line %d of \"%s\"",child->parent_line,parent->name);
+
+        recurs = 1;
+        while (parent->parent!=NULL &&
+               child->parent_line==parent->parent_line &&
+               !strcmp(parent->name,parent->parent->name)) {
+          recurs++;
+          parent = parent->parent;
+        }
+
+        if (recurs > 1)
+          fprintf(f," %d times",recurs);
+        fprintf(f,"\n");
         child = parent;
       }
     }
@@ -149,6 +164,10 @@ static void error(int n,va_list vl,struct err_out *errlist,int offset)
     fprintf(f,"aborting...\n");
     leave();
   }
+  if ((flags & ERROR) && errors>=max_errors) {
+    fprintf(f,"***maximum number of errors reached!***\n");
+    leave();
+  }
 }
 
 
@@ -195,6 +214,14 @@ static void modify_errors(struct err_out *err,int flags,va_list vl)
 }
 
 
+void modify_gen_err(int flags,...)
+{
+  va_list vl;
+  va_start(vl,flags);
+  modify_errors(general_err_out,flags,vl);
+}
+
+
 void modify_syntax_err(int flags,...)
 {
   va_list vl;
diff --git a/error.h b/error.h
index c743df9..29c6401 100644
--- a/error.h
+++ b/error.h
@@ -32,6 +32,7 @@ void general_error(int n,...);
 void syntax_error(int n,...);
 void cpu_error(int n,...);
 void output_error(int n,...);
+void modify_gen_err(int,...);
 void modify_syntax_err(int,...);
 void modify_cpu_err(int,...);
 void disable_warning(int);
diff --git a/expr.c b/expr.c
index 9c6b2ad..f8cfc6a 100644
--- a/expr.c
+++ b/expr.c
@@ -1,18 +1,20 @@
 /* expr.c expression handling for vasm */
-/* (c) in 2002-2011 by Volker Barthelmann */
+/* (c) in 2002-2015 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
 char current_pc_char='$';
+int unsigned_shift;
 static char *s;
+static symbol *cpc;
+static int make_tmp_lab;
+static int exp_type;
 
 #ifndef EXPSKIP
 #define EXPSKIP() s=skip(s)
 #endif
 
 static expr *expression();
-static symbol *cpc;
-static int make_tmp_lab;
 
 
 expr *new_expr(void)
@@ -48,6 +50,7 @@ expr *curpc_expr(void)
   if(!cpc){
     cpc=new_import(" *current pc dummy*");
     cpc->type=LABSYM;
+    cpc->flags|=VASMINTERN|PROTECTED;
   }
   new->type=SYM;
   new->c.sym=cpc;
@@ -79,35 +82,86 @@ static expr *primary_expr(void)
       new=new_expr();
       new->type=SYM;
       new->c.sym=sym;
-    }
-    else
+    }else
       new=copy_tree(sym->expr);
     myfree(name);
     return new;
   }
   m=const_prefix(s,&base);
   if(base!=0){
-    taddr val=0;
-    s=m;
-    if(base<=10){
-      while(*s>='0'&&*s<base+'0')
-        val=base*val+*s++-'0';
-    }else if(base==16){
-      while((*s>='0'&&*s<='9')||(*s>='a'&&*s<='f')||(*s>='A'&&*s<='F')){
-        if(*s>='0'&&*s<='9')
-          val=16*val+*s++-'0';
-        else if(*s>='a'&&*s<='f')
-          val=16*val+*s++-'a'+10;
-        else
-          val=16*val+*s++-'A'+10;
-      }
-    }else{
+    char *start=s;
+    utaddr val,oldval;
+    thuge huge;
+    tfloat flt;
+    switch(exp_type){
+    case NUM:
+      s=m;
+      val=0;
+      if(base<=10){
+        while(*s>='0'&&*s<base+'0'){
+          oldval=val;
+          val=base*val+*s++-'0';
+          if(val<oldval)
+            goto hugeval;  /* overflow, read a thuge value type */
+        }
+        if(*s=='e'||*s=='E'||
+           (*s=='.'&&*(s+1)>='0'&&*(s+1)<='9'))
+          goto fltval;  /* decimal point or exponent: read floating point */
+      }else if(base==16){
+        while((*s>='0'&&*s<='9')||(*s>='a'&&*s<='f')||(*s>='A'&&*s<='F')){
+          oldval=val;
+          if(*s>='0'&&*s<='9')
+            val=16*val+*s++-'0';
+          else if(*s>='a'&&*s<='f')
+            val=16*val+*s++-'a'+10;
+          else
+            val=16*val+*s++-'A'+10;
+          if(val<oldval)
+            goto hugeval;  /* overflow, read a thuge value instead */
+        }
+      }else ierror(0);
+      break;
+    hugeval:
+      exp_type=HUG;
+    case HUG:
+      s=m;
+      huge=huge_zero();
+      if(base<=10){
+        while(*s>='0'&&*s<base+'0')
+          huge=haddi(hmuli(huge,base),*s++-'0');
+        if(base==10&&(*s=='e'||*s=='E'||
+                      (*s=='.'&&*(s+1)>='0'&&*(s+1)<='9')))
+          goto fltval;  /* decimal point or exponent: read floating point */
+      }else if(base==16){
+        while((*s>='0'&&*s<='9')||(*s>='a'&&*s<='f')||(*s>='A'&&*s<='F')){
+          if(*s>='0'&&*s<='9')
+            huge=haddi(hmuli(huge,16),*s++-'0');
+          else if(*s>='a'&&*s<='f')
+            huge=haddi(hmuli(huge,16),*s++-'a'+10);
+          else
+            huge=haddi(hmuli(huge,16),*s++-'A'+10);
+        }
+      }else ierror(0);
+      break;
+    fltval:
+      exp_type=FLT;
+    case FLT:
+      if(base!=10) goto hugeval;
+      s=m;
+      flt=strtotfloat(s,&s);
+      break;
+    default:
       ierror(0);
+      break;
     }
+    s=const_suffix(start,s);
     EXPSKIP();
     new=new_expr();
-    new->type=NUM;
-    new->c.val=val;
+    switch(new->type=exp_type){
+      case NUM: new->c.val=val; break;
+      case HUG: new->c.huge=huge; break;
+      case FLT: new->c.flt=flt; break;
+    }
     return new;
   }
   if(*s==current_pc_char && !ISIDCHAR(*(s+1))){
@@ -174,8 +228,6 @@ static expr *primary_expr(void)
       }else
         ierror(0);
     }
-    if(*(s-1)!=quote)
-      general_error(quote=='\''?19:20);
     EXPSKIP();
     new=new_expr();
     new->type=NUM;
@@ -233,7 +285,7 @@ static expr *shift_expr()
     if(m=='<')
       new->type=LSH;
     else
-      new->type=RSH;
+      new->type=unsigned_shift?RSHU:RSH;
     new->left=left;
     new->right=unary_expr();
     left=new;
@@ -242,40 +294,10 @@ static expr *shift_expr()
   return left;
 }
 
-static expr *multiplicative_expr(void)
-{
-  expr *left,*new;
-  char m;
-  left=shift_expr();
-  EXPSKIP();
-  while(*s=='*'||*s=='/'||*s=='%'){
-    m=*s++;
-    EXPSKIP();
-    new=new_expr();
-    if(m=='/'){
-      if(*s=='/'){
-        s++;
-        new->type=MOD;
-      }
-      else
-        new->type=DIV;
-    }
-    else if(m=='*')
-      new->type=MUL;
-    else
-      new->type=MOD;
-    new->left=left;
-    new->right=shift_expr();
-    left=new;
-    EXPSKIP();
-  }
-  return left;
-}
-
 static expr *and_expr(void)
 {
   expr *left,*new;
-  left=multiplicative_expr();
+  left=shift_expr();
   EXPSKIP();
   while(*s=='&'&&s[1]!='&'){
     s++;
@@ -284,7 +306,7 @@ static expr *and_expr(void)
     new->type=BAND;
     EXPSKIP();
     new->left=left;
-    new->right=multiplicative_expr();
+    new->right=shift_expr();
     left=new;
   }
   return left;
@@ -326,13 +348,43 @@ static expr *inclusive_or_expr(void)
   return left;
 }
 
-static expr *additive_expr(void)
+static expr *multiplicative_expr(void)
 {
   expr *left,*new;
   char m;
   left=inclusive_or_expr();
   EXPSKIP();
-  while(*s=='+'||*s=='-'){
+  while(*s=='*'||*s=='/'||*s=='%'){
+    m=*s++;
+    EXPSKIP();
+    new=new_expr();
+    if(m=='/'){
+      if(*s=='/'){
+        s++;
+        new->type=MOD;
+      }
+      else
+        new->type=DIV;
+    }
+    else if(m=='*')
+      new->type=MUL;
+    else
+      new->type=MOD;
+    new->left=left;
+    new->right=inclusive_or_expr();
+    left=new;
+    EXPSKIP();
+  }
+  return left;
+}
+
+static expr *additive_expr(void)
+{
+  expr *left,*new;
+  char m;
+  left=multiplicative_expr();
+  EXPSKIP();
+  while((*s=='+'&&s[1]!='+')||(*s=='-'&&s[1]!='-')){
     m=*s++;
     EXPSKIP();
     new=new_expr();
@@ -341,7 +393,7 @@ static expr *additive_expr(void)
     else
       new->type=SUB;
     new->left=left;
-    new->right=inclusive_or_expr();
+    new->right=multiplicative_expr();
     left=new;
     EXPSKIP();
   }
@@ -441,12 +493,17 @@ static expr *expression()
 
 /* Tries to parse the string as a constant value. Sets pp to the
    end of the parse. Already defined absolute symbols are
-   recognized. */
+   recognized.
+   Automatically switches to a HUG expression type, when encountering a
+   constant which doesn't fit into taddr.
+   Automatically switches to a FLT expression type, when reading a decimal
+   point or an exponent in a decimal constant. */
 expr *parse_expr(char **pp)
 {
   expr *tree;
   s=*pp;
   make_tmp_lab=0;
+  exp_type=NUM;
   tree=expression();
   simplify_expr(tree);
   *pp=s;
@@ -458,6 +515,36 @@ expr *parse_expr_tmplab(char **pp)
   expr *tree;
   s=*pp;
   make_tmp_lab=1;
+  exp_type=NUM;
+  tree=expression();
+  simplify_expr(tree);
+  *pp=s;
+  return tree;
+}
+
+/* Tries to parse the string as a huge-integer (128 bits) constant (thuge).
+   No labels allowed in this mode. */
+expr *parse_expr_huge(char **pp)
+{
+  expr *tree;
+  s=*pp;
+  make_tmp_lab=0;
+  exp_type=HUG;
+  tree=expression();
+  simplify_expr(tree);
+  *pp=s;
+  return tree;
+}
+
+/* Tries to parse the string as a floating point constant (tfloat).
+   No labels allowed in this mode.
+   When the constant is not decimal switch to reading a HUG expression type. */
+expr *parse_expr_float(char **pp)
+{
+  expr *tree;
+  s=*pp;
+  make_tmp_lab=0;
+  exp_type=FLT;
   tree=expression();
   simplify_expr(tree);
   *pp=s;
@@ -468,286 +555,820 @@ void free_expr(expr *tree)
 {
   if(!tree)
     return;
-  myfree(tree->left);
-  myfree(tree->right);
+  free_expr(tree->left);
+  free_expr(tree->right);
   myfree(tree);
 }
 
+/* Return type of expression.
+   Either NUM, HUG or FLT. Labels or unknown symbols default to NUM.
+   Returns 0 in case of an error (e.g. epxression is NULL pointer). */
+int type_of_expr(expr *tree)
+{
+  int ltype,rtype;
+  if(tree==NULL)
+    return 0;
+  ltype=tree->type;
+  if(ltype==SYM){
+    if(tree->c.sym->flags&INEVAL)
+      general_error(18,tree->c.sym->name);
+    tree->c.sym->flags|=INEVAL;
+    ltype=tree->c.sym->type==EXPRESSION?type_of_expr(tree->c.sym->expr):NUM;
+    tree->c.sym->flags&=~INEVAL;
+    return ltype;
+  }else if(ltype==NUM||ltype==HUG||ltype==FLT)
+    return ltype;
+  ltype=type_of_expr(tree->left);
+  rtype=type_of_expr(tree->right);
+  return rtype>ltype?rtype:ltype;
+}
+
 /* Try to evaluate expression as far as possible. Subexpressions
    only containing constants or absolute symbols are simplified. */
 void simplify_expr(expr *tree)
 {
-  taddr val;
+  taddr ival;
+  thuge hval;
+  tfloat fval;
+  int type=0;
   if(!tree)
     return;
   simplify_expr(tree->left);
   simplify_expr(tree->right);
-  if((tree->left&&tree->left->type!=NUM)||
-     (tree->right&&tree->right->type!=NUM))
-    return;
+  if(tree->type==SUB&&tree->right->type==SYM&&tree->left->type==SUB&&
+     tree->left->left->type!=SYM&&tree->left->right->type==SYM){
+    /* Rearrange nodes from "const-symbol-symbol", so that "symbol-symbol"
+       is evaluated first, as it may yield a constant. */
+    expr *x=tree->right;
+    tree->right=tree->left;
+    tree->left=tree->right->left;
+    tree->right->left=tree->right->right;
+    tree->right->right=x;
+  }
+  if(tree->left){
+    if(tree->left->type==NUM||tree->left->type==HUG||tree->left->type==FLT)
+      type=tree->left->type;
+    else return;
+  }
+  if(tree->right){
+    if(tree->right->type==NUM||tree->right->type==HUG||tree->right->type==FLT){
+      if(tree->right->type>type)
+        type=tree->right->type;
+    } else return;
+  }
+  if(type==NUM){
+    switch(tree->type){
+    case ADD:
+      ival=(tree->left->c.val+tree->right->c.val);
+      break;
+    case SUB:
+      ival=(tree->left->c.val-tree->right->c.val);
+      break;
+    case MUL:
+      ival=(tree->left->c.val*tree->right->c.val);
+      break;
+    case DIV:
+      if(tree->right->c.val==0){
+        general_error(41);
+        ival=0;
+      }else
+        ival=(tree->left->c.val/tree->right->c.val);
+      break;
+    case MOD:
+      if(tree->right->c.val==0){
+        general_error(41);
+        ival=0;
+      }else
+        ival=(tree->left->c.val%tree->right->c.val);
+      break;
+    case NEG:
+      ival=(-tree->left->c.val);
+      break;
+    case CPL:
+      ival=(~tree->left->c.val);
+      break;
+    case LAND:
+      ival=BOOLEAN(tree->left->c.val&&tree->right->c.val);
+      break;
+    case LOR:
+      ival=BOOLEAN(tree->left->c.val||tree->right->c.val);
+      break;
+    case BAND:
+      ival=(tree->left->c.val&tree->right->c.val);
+      break;
+    case BOR:
+      ival=(tree->left->c.val|tree->right->c.val);
+      break;
+    case XOR:
+      ival=(tree->left->c.val^tree->right->c.val);
+      break;
+    case NOT:
+      ival=(!tree->left->c.val);
+      break;
+    case LSH:
+      ival=(tree->left->c.val<<tree->right->c.val);
+      break;
+    case RSH:
+      ival=(tree->left->c.val>>tree->right->c.val);
+      break;
+    case RSHU:
+      ival=((utaddr)tree->left->c.val>>tree->right->c.val);
+      break;
+    case LT:
+      ival=BOOLEAN(tree->left->c.val<tree->right->c.val);
+      break;
+    case GT:
+      ival=BOOLEAN(tree->left->c.val>tree->right->c.val);
+      break;
+    case LEQ:
+      ival=BOOLEAN(tree->left->c.val<=tree->right->c.val);
+      break;
+    case GEQ:
+      ival=BOOLEAN(tree->left->c.val>=tree->right->c.val);
+      break;
+    case NEQ:
+      ival=BOOLEAN(tree->left->c.val!=tree->right->c.val);
+      break;
+    case EQ:
+      ival=BOOLEAN(tree->left->c.val==tree->right->c.val);
+      break;
+    default:
+#ifdef EXT_UNARY_EVAL
+      if (tree->left && EXT_UNARY_EVAL(tree->type,tree->left->c.val,&ival,1))
+        break;
+#endif
+      return;
+    }
+  }
+  else if(type==HUG){
+    thuge lval,rval;
+    if(tree->left){
+      if(tree->left->type==NUM)
+        lval=huge_from_int(tree->left->c.val);
+      else
+        lval=tree->left->c.huge;
+    }
+    if(tree->right){
+      if(tree->right->type==NUM)
+        rval=huge_from_int(tree->right->c.val);
+      else
+        rval=tree->right->c.huge;
+    }
+    switch(tree->type){
+    case ADD:
+      hval=hadd(lval,rval);
+      break;
+    case SUB:
+      hval=hsub(lval,rval);
+      break;
+    case MUL:
+      hval=hmul(lval,rval);
+      break;
+    case DIV:
+      if(hcmp(rval,huge_zero())==0){
+        general_error(41);
+        hval=huge_zero();
+      }else
+        hval=hdiv(lval,rval);
+      break;
+    case MOD:
+      if(hcmp(rval,huge_zero())==0){
+        general_error(41);
+        hval=huge_zero();
+      }else
+        hval=hmod(lval,rval);
+      break;
+    case NEG:
+      hval=hneg(lval);
+      break;
+    case CPL:
+      hval=hcpl(lval);
+      break;
+    case LAND:
+      ival=BOOLEAN(hcmp(lval,huge_zero())!=0&&hcmp(rval,huge_zero())!=0);
+      type=NUM;
+      break;
+    case LOR:
+      ival=BOOLEAN(hcmp(lval,huge_zero())!=0||hcmp(rval,huge_zero())!=0);
+      type=NUM;
+      break;
+    case BAND:
+      hval=hand(lval,rval);
+      break;
+    case BOR:
+      hval=hor(lval,rval);
+      break;
+    case XOR:
+      hval=hxor(lval,rval);
+      break;
+    case NOT:
+      hval=hnot(lval);
+      break;
+    case LSH:
+      hval=hshl(lval,huge_to_int(rval));
+      break;
+    case RSH:
+      hval=hshra(lval,huge_to_int(rval));
+      break;
+    case RSHU:
+      hval=hshr(lval,huge_to_int(rval));
+      break;
+    case LT:
+      ival=BOOLEAN(hcmp(lval,rval)<0);
+      type=NUM;
+      break;
+    case GT:
+      ival=BOOLEAN(hcmp(lval,rval)>0);
+      type=NUM;
+      break;
+    case LEQ:
+      ival=BOOLEAN(hcmp(lval,rval)<=0);
+      type=NUM;
+      break;
+    case GEQ:
+      ival=BOOLEAN(hcmp(lval,rval)>=0);
+      type=NUM;
+      break;
+    case NEQ:
+      ival=BOOLEAN(hcmp(lval,rval)!=0);
+      type=NUM;
+      break;
+    case EQ:
+      ival=BOOLEAN(hcmp(lval,rval)==0);
+      type=NUM;
+      break;
+    default:
+      return;
+    }
+  }
+  else if(type==FLT){
+    tfloat lval,rval;
+    if(tree->left){
+      switch(tree->left->type){
+        case NUM: lval=(tfloat)tree->left->c.val; break;
+        case HUG: lval=huge_to_float(tree->left->c.huge); break;
+        case FLT: lval=tree->left->c.flt; break;
+      }
+    }
+    if(tree->right){
+      switch(tree->right->type){
+        case NUM: rval=(tfloat)tree->right->c.val; break;
+        case HUG: rval=huge_to_float(tree->right->c.huge); break;
+        case FLT: rval=tree->right->c.flt; break;
+      }
+    }
+    switch(tree->type){
+    case ADD:
+      fval=(lval+rval);
+      break;
+    case SUB:
+      fval=(lval-rval);
+      break;
+    case MUL:
+      fval=(lval*rval);
+      break;
+    case DIV:
+      if(rval==0.0){
+        general_error(41);
+        fval=0.0;
+      }else
+        fval=(lval/rval);
+      break;
+    case NEG:
+      fval=(-lval);
+      break;
+    case LT:
+      ival=BOOLEAN(lval<rval);
+      type=NUM;
+      break;
+    case GT:
+      ival=BOOLEAN(lval>rval);
+      type=NUM;
+      break;
+    case LEQ:
+      ival=BOOLEAN(lval<=rval);
+      type=NUM;
+      break;
+    case GEQ:
+      ival=BOOLEAN(lval>=rval);
+      type=NUM;
+      break;
+    case NEQ:
+      ival=BOOLEAN(lval!=rval);
+      type=NUM;
+      break;
+    case EQ:
+      ival=BOOLEAN(lval==rval);
+      type=NUM;
+      break;
+    default:
+      return;
+    }
+  }
+  else{
+    if(tree->type==SYM&&tree->c.sym->type==EXPRESSION){
+      switch(tree->c.sym->expr->type){
+      case NUM:
+        ival=tree->c.sym->expr->c.val;
+        type=NUM;
+        break;
+      case HUG:
+        hval=tree->c.sym->expr->c.huge;
+        type=HUG;
+        break;
+      case FLT:
+        fval=tree->c.sym->expr->c.flt;
+        type=FLT;
+        break;
+      default:
+        return;
+      }
+    }else return;
+  }
+  free_expr(tree->left);
+  free_expr(tree->right);
+  tree->left=tree->right=NULL;
+  switch(tree->type=type){
+    case NUM: tree->c.val=ival; break;
+    case HUG: tree->c.huge=hval; break;
+    case FLT: tree->c.flt=fval; break;
+    default: ierror(0); break;
+  }
+}
+
+/* Evaluate an expression using current values of all symbols.
+   Result is written to *result. The return value specifies
+   whether the result is constant (i.e. only depending on
+   constants or absolute symbols). */
+int eval_expr(expr *tree,taddr *result,section *sec,taddr pc)
+{
+  taddr val,lval,rval;
+  symbol *lsym,*rsym;
+  int cnst=1;
+
+  if(!tree)
+    ierror(0);
+  if(tree->left&&!eval_expr(tree->left,&lval,sec,pc))
+    cnst=0;
+  if(tree->right&&!eval_expr(tree->right,&rval,sec,pc))
+    cnst=0;
+
   switch(tree->type){
   case ADD:
-    val=(tree->left->c.val+tree->right->c.val);
+    val=(lval+rval);
     break;
   case SUB:
-    val=(tree->left->c.val-tree->right->c.val);
+    find_base(tree->left,&lsym,sec,pc);
+    find_base(tree->right,&rsym,sec,pc);
+    if(cnst==0&&lsym!=NULL&&rsym!=NULL&&LOCREF(rsym)){
+      if(LOCREF(lsym)&&lsym->sec==rsym->sec){
+        /* l2-l1 is constant when both have a valid symbol-base, and both
+           symbols are LABSYMs from the same section, e.g. (sym1+x)-(sym2-y) */
+        cnst=1;
+      }else if(rsym->sec==sec&&(EXTREF(lsym)||LOCREF(lsym))){
+        /* Difference between symbols from different section or between an
+           external symbol and a symbol from the current section can be
+           represented by a REL_PC, so we calculate the addend. */
+        if((rsym->flags&ABSLABEL)&&(lsym->flags&ABSLABEL))
+          cnst=1;  /* constant, when labels are from two ORG sections */
+        else{
+          /* prepare a value which works with REL_PC */
+          val=(pc-rval+lval-(lsym->sec?lsym->sec->org:0));
+          break;
+        }
+      }
+    }
+    val=(lval-rval);
     break;
   case MUL:
-    val=(tree->left->c.val*tree->right->c.val);
+    val=(lval*rval);
     break;
   case DIV:
-    if(tree->right->c.val==0){
-      general_error(8);
+    if(rval==0){
+      general_error(41);
       val=0;
     }else
-      val=(tree->left->c.val/tree->right->c.val);
+      val=(lval/rval);
     break;
   case MOD:
-    if(tree->right->c.val==0){
-      general_error(8);
+    if(rval==0){
+      general_error(41);
       val=0;
     }else
-      val=(tree->left->c.val%tree->right->c.val);
+      val=(lval%rval);
     break;
   case NEG:
-    val=(-tree->left->c.val);
+    val=(-lval);
     break;
   case CPL:
-    val=(~tree->left->c.val);
+    val=(~lval);
     break;
   case LAND:
-    val=-(tree->left->c.val&&tree->right->c.val);
+    val=BOOLEAN(lval&&rval);
     break;
   case LOR:
-    val=-(tree->left->c.val||tree->right->c.val);
+    val=BOOLEAN(lval||rval);
     break;
   case BAND:
-    val=(tree->left->c.val&tree->right->c.val);
+    val=(lval&rval);
     break;
   case BOR:
-    val=(tree->left->c.val|tree->right->c.val);
+    val=(lval|rval);
     break;
   case XOR:
-    val=(tree->left->c.val^tree->right->c.val);
+    val=(lval^rval);
     break;
   case NOT:
-    val=(!tree->left->c.val);
+    val=(!lval);
     break;
   case LSH:
-    val=(tree->left->c.val<<tree->right->c.val);
+    val=(lval<<rval);
     break;
   case RSH:
-    val=(tree->left->c.val>>tree->right->c.val);
+    val=(lval>>rval);
+    break;
+  case RSHU:
+    val=((utaddr)lval>>rval);
     break;
   case LT:
-    val=-(tree->left->c.val<tree->right->c.val);
+    val=BOOLEAN(lval<rval);
     break;
   case GT:
-    val=-(tree->left->c.val>tree->right->c.val);
+    val=BOOLEAN(lval>rval);
     break;
   case LEQ:
-    val=-(tree->left->c.val<=tree->right->c.val);
+    val=BOOLEAN(lval<=rval);
     break;
   case GEQ:
-    val=-(tree->left->c.val>=tree->right->c.val);
+    val=BOOLEAN(lval>=rval);
     break;
   case NEQ:
-    val=-(tree->left->c.val!=tree->right->c.val);
+    val=BOOLEAN(lval!=rval);
     break;
   case EQ:
-    val=-(tree->left->c.val==tree->right->c.val);
+    val=BOOLEAN(lval==rval);
     break;
   case SYM:
-    if(tree->c.sym->type==EXPRESSION&&tree->c.sym->expr->type==NUM){
-      val=tree->c.sym->expr->c.val;
-      break;
-    }else 
-      return;
+    if(tree->c.sym->type==EXPRESSION){
+      if(tree->c.sym->flags&INEVAL)
+        general_error(18,tree->c.sym->name);
+      tree->c.sym->flags|=INEVAL;
+      cnst=eval_expr(tree->c.sym->expr,&val,sec,pc);
+      tree->c.sym->flags&=~INEVAL;
+    }else if(LOCREF(tree->c.sym)){
+      if(tree->c.sym==cpc&&sec!=0){
+        cpc->sec=sec;
+        cpc->pc=pc;
+      }
+      val=tree->c.sym->pc;
+      cnst=tree->c.sym->sec==NULL?0:(tree->c.sym->sec->flags&UNALLOCATED)!=0;
+    }else{
+      /* IMPORT */
+      cnst=0;
+      val=0;
+    }
+    break;
+  case NUM:
+    val=tree->c.val;
+    break;
+  case HUG:
+    val=huge_to_int(tree->c.huge);
+    break;
+  case FLT:
+    val=(taddr)tree->c.flt;
+    break;
   default:
 #ifdef EXT_UNARY_EVAL
-    if (tree->left && EXT_UNARY_EVAL(tree->type,tree->left->c.val,&val,1))
+    if (EXT_UNARY_EVAL(tree->type,lval,&val,cnst))
       break;
 #endif
-    return;
+    ierror(0);
   }
-  free_expr(tree->left);
-  free_expr(tree->right);
-  tree->type=NUM;
-  tree->left=tree->right=0;
-  tree->c.val=val;
+  *result=val;
+  return cnst;
 }
 
-/* Evaluate an expression using current values of all symbols.
-   Result is written to *result. The return value specifies
-   whether the result is constant (i.e. only depending on
-   constants or absolute symbols). */
-int eval_expr(expr *tree,taddr *result,section *sec,taddr pc)
+/* Evaluate a huge integer expression using current values of all symbols.
+   Result is written to *result. The return value specifies whether all
+   operations were valid. */
+int eval_expr_huge(expr *tree,thuge *result)
 {
-  taddr val,lval,rval;
-  symbol *lsym,*rsym;
-  int cnst=1;
+  thuge val,lval,rval;
 
   if(!tree)
     ierror(0);
-  if(tree->left&&!eval_expr(tree->left,&lval,sec,pc))
-    cnst=0;
-  if(tree->right&&!eval_expr(tree->right,&rval,sec,pc))
-    cnst=0;
+  if(tree->left&&!eval_expr_huge(tree->left,&lval))
+    return 0;
+  if(tree->right&&!eval_expr_huge(tree->right,&rval))
+    return 0;
 
-  switch(tree->type){
+  switch (tree->type){
   case ADD:
-    val=(lval+rval);
+    val=hadd(lval,rval);
     break;
   case SUB:
-    val=(lval-rval);
-    /* l2-l1 is constant when both have a valid symbol-base, and both
-       symbols are LABSYMs from the same section, e.g. (sym1+x)-(sym2-y) */
-    if(cnst==0&&
-       (lsym=find_base(tree->left,sec,pc))&&
-       (rsym=find_base(tree->right,sec,pc)))
-       cnst=lsym->type==LABSYM&&rsym->type==LABSYM&&lsym->sec==rsym->sec;
+    val=hsub(lval,rval);
     break;
   case MUL:
-    val=(lval*rval);
+    val=hmul(lval,rval);
     break;
   case DIV:
-    if(rval==0){
-      general_error(8);
-      val=0;
+    if(hcmp(rval,huge_zero())==0){
+      general_error(41);
+      val=huge_zero();
     }else
-      val=(lval/rval);
+      val=hdiv(lval,rval);
     break;
   case MOD:
-    if(rval==0){
-      general_error(8);
-      val=0;
+    if(hcmp(rval,huge_zero())==0){
+      general_error(41);
+      val=huge_zero();
     }else
-      val=(lval%rval);
+      val=hmod(lval,rval);
     break;
   case NEG:
-    val=(-lval);
+    val=hneg(lval);
     break;
   case CPL:
-    val=(~lval);
+    val=hcpl(lval);
     break;
   case LAND:
-    val=-(lval&&rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,huge_zero())!=0
+                      &&hcmp(rval,huge_zero())!=0));
     break;
   case LOR:
-    val=-(lval||rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,huge_zero())!=0
+                      ||hcmp(rval,huge_zero())!=0));
     break;
   case BAND:
-    val=(lval&rval);
+    val=hand(lval,rval);
     break;
   case BOR:
-    val=(lval|rval);
+    val=hor(lval,rval);
     break;
   case XOR:
-    val=(lval^rval);
+    val=hxor(lval,rval);
     break;
   case NOT:
-    val=(!lval);
+    val=hnot(lval);
     break;
   case LSH:
-    val=(lval<<rval);
+    val=hshl(lval,huge_to_int(rval));
     break;
   case RSH:
-    val=(lval>>rval);
+    val=hshra(lval,huge_to_int(rval));
+    break;
+  case RSHU:
+    val=hshr(lval,huge_to_int(rval));
     break;
   case LT:
-    val=-(lval<rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)<0));
     break;
   case GT:
-    val=-(lval>rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)>0));
     break;
   case LEQ:
-    val=-(lval<=rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)<=0));
     break;
   case GEQ:
-    val=-(lval>=rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)>=0));
     break;
   case NEQ:
-    val=-(lval!=rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)!=0));
     break;
   case EQ:
-    val=-(lval==rval);
+    val=huge_from_int(BOOLEAN(hcmp(lval,rval)==0));
     break;
   case SYM:
     if(tree->c.sym->type==EXPRESSION){
+      int ok;
       if(tree->c.sym->flags&INEVAL)
         general_error(18,tree->c.sym->name);
       tree->c.sym->flags|=INEVAL;
-      cnst=eval_expr(tree->c.sym->expr,&val,sec,pc);
+      ok=eval_expr_huge(tree->c.sym->expr,&val);
       tree->c.sym->flags&=~INEVAL;
-    }else if(tree->c.sym->type==LABSYM){
-      if(tree->c.sym==cpc&&sec!=0){
-        cpc->sec=sec;
-        cpc->pc=pc;
-      }
-      val=tree->c.sym->pc;
-      cnst=0;
-    }else{
-      /* IMPORT */
-      cnst=0;
-      val=0;
+      if(!ok) return 0;
     }
+#if 0 /* all relocations should be representable by taddr */
+    else if(EXTREF(tree->c.sym))
+      val=huge_zero();
+#endif
+    else
+      return 0;
     break;
   case NUM:
-    val=tree->c.val;
+    val=huge_from_int(tree->c.val);
+    break;
+  case HUG:
+    val=tree->c.huge;
+    break;
+  case FLT:
+    val=huge_from_float(tree->c.flt);
     break;
   default:
-#ifdef EXT_UNARY_EVAL
-    if (EXT_UNARY_EVAL(tree->type,lval,&val,cnst))
-      break;
-#endif
+    return 0;
+  }
+  *result=val;
+  return 1;
+}
+
+/* Evaluate a floating point expression using current values of all symbols.
+   Result is written to *result. The return value specifies whether all
+   operations were valid. */
+int eval_expr_float(expr *tree,tfloat *result)
+{
+  tfloat val,lval,rval;
+
+  if(!tree)
     ierror(0);
+  if(tree->left&&!eval_expr_float(tree->left,&lval))
+    return 0;
+  if(tree->right&&!eval_expr_float(tree->right,&rval))
+    return 0;
+
+  switch(tree->type){
+  case ADD:
+    val=(lval+rval);
+    break;
+  case SUB:
+    val=(lval-rval);
+    break;
+  case MUL:
+    val=(lval*rval);
+    break;
+  case DIV:
+    if(rval==0.0){
+      general_error(41);
+      val=0.0;
+    }else
+      val=(lval/rval);
+    break;
+  case NEG:
+    val=(-lval);
+    break;
+  case LT:
+    val=BOOLEAN(lval<rval);
+    break;
+  case GT:
+    val=BOOLEAN(lval>rval);
+    break;
+  case LEQ:
+    val=BOOLEAN(lval<=rval);
+    break;
+  case GEQ:
+    val=BOOLEAN(lval>=rval);
+    break;
+  case NEQ:
+    val=BOOLEAN(lval!=rval);
+    break;
+  case EQ:
+    val=BOOLEAN(lval==rval);
+    break;
+  case SYM:
+    if(tree->c.sym->type==EXPRESSION){
+      int ok;
+      if(tree->c.sym->flags&INEVAL)
+        general_error(18,tree->c.sym->name);
+      tree->c.sym->flags|=INEVAL;
+      ok=eval_expr_float(tree->c.sym->expr,&val);
+      tree->c.sym->flags&=~INEVAL;
+      if(!ok) return 0;
+    }else
+      return 0;
+    break;
+  case NUM:
+    val=(tfloat)tree->c.val;
+    break;
+  case HUG:
+    val=huge_to_float(tree->c.huge);
+    break;
+  case FLT:
+    val=tree->c.flt;
+    break;
+  default:
+    return 0;
   }
   *result=val;
-  return cnst;
+  return 1;
 }
 
 void print_expr(FILE *f,expr *p)
 {
   simplify_expr(p);
   if(p->type==NUM)
-    fprintf(f,"%lu",(unsigned long)p->c.val);
+    fprintf(f,"%lld",(int64_t)p->c.val);
+  else if(p->type==HUG)
+    fprintf(f,"0x%016llx%016llx",p->c.huge.hi,p->c.huge.lo);
+  else if(p->type==FLT)
+    fprintf(f,"%.8g",(double)p->c.flt);
   else
     fprintf(f,"complex expression");
 }
 
-/* Tests, if an expression is based only on one non-absolute
-   symbol plus constants. Returns that symbol or zero.
-   Note: Does not find all possible solutions. */
-symbol *find_base(expr *p,section *sec,taddr pc)
+/* return a single base symbol from an absolute ORG section, when present */
+static int find_abs_base(expr *tree,symbol **base)
+{
+  if(tree==NULL)
+    return 1;
+  if(tree->type==SYM){
+    if(tree->c.sym->type==EXPRESSION){
+      int ok;
+      if(tree->c.sym->flags&INEVAL)
+        return 0;
+      tree->c.sym->flags|=INEVAL;
+      ok=find_abs_base(tree->c.sym->expr,base);
+      tree->c.sym->flags&=~INEVAL;
+      return ok;
+    }else if(LOCREF(tree->c.sym)){
+      if(tree->c.sym->flags&ABSLABEL){
+        *base=tree->c.sym;
+        return 1;
+      }
+    }else{
+      if(current_section!=NULL&&(current_section->flags&ABSOLUTE)){
+        /* IMPORT in ORG section, will be flagged as BASE_ILLEGAL */
+        *base=tree->c.sym;
+        return 1;
+      }
+    }
+    return 0;
+  }
+  if(!find_abs_base(tree->left,base))
+    return 0;
+  if(*base!=NULL){
+    symbol *tstbase=NULL;
+    if(!find_abs_base(tree->right,&tstbase))
+      return 0;
+    if(tstbase!=NULL){
+      *base=NULL;
+      return 1;
+    }
+  }else{
+    if(!find_abs_base(tree->right,base))
+      return 0;
+  }
+  return 1;
+}
+
+static int _find_base(expr *p,symbol **base,section *sec,taddr pc)
 {
-  symbol *sym;
   if(p->type==SYM){
     if(p->c.sym==cpc&&sec!=NULL){
       cpc->sec=sec;
       cpc->pc=pc;
     }
     if(p->c.sym->type==EXPRESSION)
-      return find_base(p->c.sym->expr,sec,pc);
-    else
-      return p->c.sym;
+      return _find_base(p->c.sym->expr,base,sec,pc);
+    else{
+      if(base)
+        *base=p->c.sym;
+      return BASE_OK;
+    }
   }
   if(p->type==ADD){
     taddr val;
-    if(eval_expr(p->left,&val,sec,pc)&&(sym=find_base(p->right,sec,pc)))
-      return sym;
-    if(eval_expr(p->right,&val,sec,pc)&&(sym=find_base(p->left,sec,pc)))
-      return sym;
+    if(eval_expr(p->left,&val,sec,pc)&&
+       _find_base(p->right,base,sec,pc)==BASE_OK)
+      return BASE_OK;
+    if(eval_expr(p->right,&val,sec,pc)&&
+       _find_base(p->left,base,sec,pc)==BASE_OK)
+      return BASE_OK;
   }
   if(p->type==SUB){
     taddr val;
-    if(eval_expr(p->right,&val,sec,pc)&&(sym=find_base(p->left,sec,pc)))
-      return sym;
+    symbol *pcsym;
+    if(eval_expr(p->right,&val,sec,pc)&&
+       _find_base(p->left,base,sec,pc)==BASE_OK)
+      return BASE_OK;
+    if(_find_base(p->left,base,sec,pc)==BASE_OK&&
+       _find_base(p->right,&pcsym,sec,pc)==BASE_OK) {
+      if(LOCREF(pcsym)&&pcsym->sec==sec&&(LOCREF(*base)||EXTREF(*base)))
+        return BASE_PCREL;
+    }
   }
+  return BASE_ILLEGAL;
+}
+
+/* Tests, if an expression is based only on one non-absolute
+   symbol plus constants. Returns that symbol or zero.
+   Note: Does not find all possible solutions. */
+int find_base(expr *p,symbol **base,section *sec,taddr pc)
+{
 #ifdef EXT_FIND_BASE
-  return EXT_FIND_BASE(p,sec,pc);
-#else
-  return 0;
+  int ret;
+  if(ret=EXT_FIND_BASE(base,p,sec,pc))
+    return ret;
 #endif
+  if(base){
+    *base=NULL;
+    if(find_abs_base(p,base)){
+        /* a base label from an absolute ORG section */
+      if(*base!=NULL)
+        return EXTREF(*base)?BASE_ILLEGAL:BASE_OK;
+      return BASE_NONE;
+    }
+  }
+  return _find_base(p,base,sec,pc);
 }
 
 expr *number_expr(taddr val)
@@ -758,6 +1379,22 @@ expr *number_expr(taddr val)
   return new;
 }
 
+expr *huge_expr(thuge val)
+{
+  expr *new=new_expr();
+  new->type=HUG;
+  new->c.huge=val;
+  return new;
+}
+
+expr *float_expr(tfloat val)
+{
+  expr *new=new_expr();
+  new->type=FLT;
+  new->c.flt=val;
+  return new;
+}
+
 taddr parse_constexpr(char **s)
 {
   expr *tree;
diff --git a/expr.h b/expr.h
index 37c2703..d074ce9 100644
--- a/expr.h
+++ b/expr.h
@@ -1,11 +1,13 @@
-/* expr.c expression handling for vasm */
-/* (c) in 2002-2010 by Volker Barthelmann */
+/* expr.h expression handling for vasm */
+/* (c) in 2002-2015 by Volker Barthelmann and Frank Wille */
+
+#include "hugeint.h"
 
 enum {
-  ADD,SUB,MUL,DIV,MOD,NEG,CPL,LAND,LOR,BAND,BOR,XOR,NOT,LSH,RSH,
-  LT,GT,LEQ,GEQ,NEQ,EQ,NUM,SYM,CPC
+  ADD,SUB,MUL,DIV,MOD,NEG,CPL,LAND,LOR,BAND,BOR,XOR,NOT,LSH,RSH,RSHU,
+  LT,GT,LEQ,GEQ,NEQ,EQ,NUM,HUG,FLT,SYM
 };
-#define LAST_EXP_TYPE CPC
+#define LAST_EXP_TYPE SYM
 
 struct expr {
   int type;
@@ -13,6 +15,8 @@ struct expr {
   struct expr *right;
   union {
     taddr val;
+    tfloat flt;
+    thuge huge;
     symbol *sym;
   } c;
 };
@@ -28,6 +32,7 @@ struct expr {
 
 /* global variables */
 extern char current_pc_char;
+extern int unsigned_shift;
 
 /* functions */
 expr *new_expr(void);
@@ -36,10 +41,23 @@ expr *copy_tree(expr *);
 expr *curpc_expr(void);
 expr *parse_expr(char **);
 expr *parse_expr_tmplab(char **);
+expr *parse_expr_huge(char **);
+expr *parse_expr_float(char **);
 taddr parse_constexpr(char **);
 expr *number_expr(taddr);
+expr *huge_expr(thuge);
+expr *float_expr(tfloat);
 void free_expr(expr *);
+int type_of_expr(expr *);
 void simplify_expr(expr *);
 int eval_expr(expr *,taddr *,section *,taddr);
+int eval_expr_huge(expr *,thuge *);
+int eval_expr_float(expr *,tfloat *);
 void print_expr(FILE *,expr *);
-symbol *find_base(expr *,section *,taddr);
+int find_base(expr *,symbol **,section *,taddr);
+
+/* find_base return codes */
+#define BASE_ILLEGAL 0
+#define BASE_OK 1
+#define BASE_PCREL 2
+#define BASE_NONE -1  /* no base-symbol assigned, all labels are absolute */
diff --git a/general_errors.h b/general_errors.h
index 8b46470..7213132 100644
--- a/general_errors.h
+++ b/general_errors.h
@@ -6,7 +6,7 @@
   "symbol <%s> redefined",WARNING,                              /*  5 */
   "%c expected",WARNING,
   "cannot resolve section <%s>, maximum number of passes reached",NOLINE|ERROR|FATAL,
-  "division by zero",ERROR,
+  "instruction not supported on selected architecture",ERROR,
   "number or identifier expected",ERROR,
   "could not initialize %s module",NOLINE|ERROR|FATAL,          /* 10 */
   "multiple input files",NOLINE|ERROR,
@@ -17,25 +17,58 @@
   "could not initialize output module <%s>",NOLINE|ERROR|FATAL,
   "out of memory",NOLINE|ERROR|FATAL,
   "symbol <%s> recursively defined",ERROR|FATAL,
-  "fail: %s",ERROR|FATAL,
-  "rorg is lower than current pc",ERROR|FATAL,                  /* 20 */
+  "fail: %s",ERROR,
+  "section offset is lower than current pc",ERROR|FATAL,        /* 20 */
   "character constant too long",ERROR,
   "undefined symbol <%s>",NOLINE|ERROR,
   "trailing garbage after option -%c",NOLINE|WARNING,
-  "undefined macro parameter \'\\%d\'",ERROR,
-  "missing %s directive for macro \"%s\"",ERROR|FATAL,          /* 25 */
+  "missing macro parameters",ERROR,
+  "missing end directive for macro \"%s\"",ERROR|FATAL,         /* 25 */
   "macro definition inside macro \"%s\"",ERROR|FATAL,
   "maximum number of %d macro arguments exceeded",ERROR,
   "option -%c was specified twice",NOLINE|WARNING,
   "read error on <%s>",NOLINE|ERROR|FATAL,
   "expression must be constant",ERROR,                          /* 30 */
   "initialized data in bss",WARNING,
-  "missing %s directive in repeat-block",ERROR|FATAL,
+  "missing end directive in repeat-block",ERROR|FATAL,
   "#%d is not a valid warning message",NOLINE|ERROR,
   "relocation not allowed",ERROR,
   "illegal escape sequence \\%c",WARNING,                       /* 35 */
   "no current macro to exit",ERROR,
   "internal symbol %s redefined by user",FATAL,
   "illegal relocation",ERROR,
-  "macro id stack overflow",ERROR,
-  "macro id pull without matching push",ERROR,			/* 40 */
+  "",ERROR,
+  "",ERROR,                                                     /* 40 */
+  "division by zero",ERROR,
+  "illegal macro argument",ERROR,
+  "reloc org is already set",ERROR|FATAL,
+  "reloc org was not set",ERROR,
+  "",ERROR,                                                     /* 45 */
+  "bad file-offset argument",ERROR,
+  "assertion \"%s\" failed: %s",ERROR,
+  "cannot declare structure within structure",ERROR,
+  "no structure",ERROR,
+  "instruction has been auto-aligned",WARNING,                  /* 50 */
+  "macro name conflicts with mnemonic",WARNING,
+  "macro name conflicts with directive",WARNING,
+  "non-relocatable expression in equate <%s>",NOLINE|ERROR,
+  "line buffer overflow",ERROR|FATAL,
+  "illegal structure recursion",ERROR|FATAL,                    /* 55 */
+  "maximum number of macro recursions (%d) reached",ERROR|FATAL,
+  "data has been auto-aligned",WARNING,
+  "register symbol <%s> redefined",ERROR,
+  "cannot evaluate constant huge integer expression",ERROR,
+  "cannot evaluate floating point expression",ERROR,            /* 60 */
+  "imported symbol <%s> was not referenced",WARNING,
+  "symbol <%s> already defined with %s scope",WARNING,
+  "unexpected \"else\" without \"if\"",ERROR,
+  "unexpected \"endif\" without \"if\"",ERROR,
+  "maximum if-nesting depth exceeded (%d levels)",FATAL|ERROR,  /* 65 */
+  "\"endif\" missing for conditional block started at %s line %d",ERROR,
+  "repeatedly defined symbol <%s>",ERROR,
+  "macro <%s> does not exist",ERROR,
+  "register <%s> does not exist",ERROR,
+  "register symbol <%s> has wrong type",ERROR,                  /* 70 */
+  "cannot mix positional and keyword arguments",ERROR,
+  "undefined macro argument name",ERROR,
+  "required macro argument %d was left out",ERROR,
diff --git a/history b/history
index 77ec3e4..f65df53 100644
--- a/history
+++ b/history
@@ -1,6 +1,452 @@
 vasm history
 =============
 
+- 1.7c (15.05.15)
+o Complete redesign of the internal macro handling, which gives each
+  syntax module more possibilities for individual macro features.
+o New syntax module: madmac, which tries to be compatible to the Atari
+  Madmac assembler syntax, used for 6502, 68000 and Jaguar RISC targets.
+o New CPU backend for the virtual Trillek TR3200 CPU (known from 0x10c).
+o Allow arithmetic operations with more than one label from absolute ORG
+  sections (like label1|label2). Support also depends on cpu backend and
+  should work at least in data for most backends now.
+o Stop parsing a file at CP/M EOF character (0x1a), as seen in some sources.
+o No longer allow redefining a symbol, defined by an equ/equiv directive,
+  with a set-directive.
+o Fixed problems with escape character sequences in strings inside a
+  macro definition, when syntax module supports escape characters.
+o m68k: In MULx.L Dn,Dl the Dh bits (bit 0-2, 2nd word) are undefined. Most
+  assemblers set Dh=Dl, similar to Dr=Dq in DIVx.L. So should we.
+o m68k: New option -regsymredef allows redefinition of register symbols
+  while parsing the source.
+o m68k: Fixed "OPT 0" in PhxAss compatibility mode (broken since V1.7),
+  which made all branches 16-bit size.
+o m68k: Register lists defined by REG, EQURL, FREQ, FEQURL must not be
+  redefinable.
+o PPC: Support for floating point data constants.
+o jagrisc: Added absolute and relative 5 bit source operand relocations.
+  Fixed relative JR relocations.
+o jagrisc: Fixed (R14+Rn) addressing mode.
+o jagrisc: New JRISC specific directives: GPU, DSP, REGEQU, EQUR, REGUNDEF,
+  EQURUNDEF, CCDEF, CCUNDEF (madmac/smac compatible).
+o z80: Fixed RST (again), when referencing labels from an absolute section.
+o mot-syntax: New option -allmp makes all 36 macro arguments available, also
+  in standard vasm mode (no PhxAss or Devpac compatibility required).
+o mot-syntax: New option -warncomm to warn about blanks in the operand
+  field, which may start an unwanted comment.
+o mot-syntax: CNOP fills the padding words with NOP instructions in an
+  M68k code section.
+o mot-syntax: The optional third argument of the SECTION directive may be
+  written as a numerical constant to define any memory attributes (hunk
+  format only).
+o mot-syntax: New directive WEAK, to declare a symbol having weak binding,
+  for those output formats which support it.
+o mot-syntax: New directive COMMON, to create a common symbol.
+o mot-syntax: Made PRINTT and PRINTV directives more compatible to AsmOne.
+o mot-syntax: Fixed RS.x without operand (same as RS.x 0).
+o std-syntax: The standard GNU-as macro syntax, with named arguments,
+  default values and qualifiers, is supported now. Macro names became
+  case-insensitive.
+o std-syntax: Directives are case-insensitive.
+o std-syntax: New optional, non-standard, third argument for the .section
+  directive defines target specific memory attributes (currently hunk
+  format only).
+o std-syntax: .b/.w/.l extensions do not belong to an identifier, when
+  the CPU is M68k.
+o std-syntax: Directives to define floating point constants in data:
+  .float, .single and .double.
+o std-syntax: .equiv directive. Works like .set and .equ, but cannot be
+  redefined.
+o aout-output: Absolute ORG sections are appended to a .text section.
+  Support for Jaguar, which uses MID 0.
+o bin-output: Sort sections by their start address before writing them.
+o hunk-output: Align M68k code sections with NOP instructions.
+o hunk-output: Supports any memory attributes in objects and executables.
+o hunk-output: Warn about unsupported weak symbols.
+o hunk-output: Fixed illegal memory access with unreferenced common symbols.
+o hunk-output: Automatically generate short relocation hunks (HUNK_DREL32)
+  in executables, when possible and not forbidden by a -kick1hunks option.
+o hunk-output: Support for 32-bit PC-relative relocations in executables
+  (available since AmigaOS3.0).
+o tos-ouput: Warn about unsupported weak symbols.
+o elf-output: Add support for jagrisc (EM_JAGRISC = 0x9004). This is an
+  unofficial definition done by the Jaguar scene.
+o aout-output: For M68k use the SUN010 or SUN020 MID, depending on the
+  highest cpu type being used in the source.
+
+- 1.7b (28.12.14)
+o Fixed stack overflow and crash when using recursively defined symbols.
+  Bug was present since introducing new 128-bit and float expressions in 1.7.
+o Issue a warning when a symbol was declared as external, but nowhere
+  referenced in the source.
+o m68k: Do not optimize MOVEM to MOVEA or MOVE when predecrement or
+  postincrement addressing mode is used with a register from the list.
+o m68k: The Devpac directive OPT X (xdebug) works now as expected for
+  hunk-format object files and for TOS executables.
+o m68k: In Devpac-compatibility mode (-devpac) the __LK symbol is predefined
+  and reflects the output file type: 0 = Atari executable, 3 = Amiga object,
+  4 = Amiga executable, 99 = all others which are unknown to Devpac.
+o m68k: MOVEM #list,-(An) must not reverse the bit mask automatically, but
+  expect an already reversed one.
+o m68k: BTST #n,#m is illegal.
+o m68k: LEA (d32,An),Am translation to MOVE.L/ADD.L stopped working with
+  V1.6c. Fixed again.
+o ARM: TEQP, TSTP, CMNP and CMPP were missing for AA2.
+o ARM: Fixed recognition of addressing mode and condition codes with
+  instructions written in upper case.
+o 6502: New option -c02 to enable 65C02 instructions.
+o mot-syntax: In PhxAss- and Devpac-compatibility mode only the directives
+  which are known by the emulated assembler are supported.
+o mot-syntax: RS, SO and FO offset directives use an aligned offset in
+  Devpac-compatibility mode or when the -align option is given.
+o std-syntax: The optional third argument of .balign/.p2align/.align is now
+  really supported and defines a maximum number of padding bytes.
+o std-syntax: New directives: .balignw, .balignl, .p2alignw, .p2alignl,
+  .zero, .swbeg.
+o std-syntax: .word should rather define 16-bit than 32-bit constants.
+o std-syntax: .local followed by .comm should be the same as .lcomm.
+o oldstyle-syntax: Fixed recognizion of .equ/.eq/.set/.mac/.macro with
+  -dotdir option.
+o hunk-output: New option -linedebug automatically generates a LINE DEBUG
+  hunk for the input source.
+o aout-output: Always generate an external reference to a weak symbol,
+  even when the symbol is defined.
+o elf-output: Always generate an external reference to a weak symbol,
+  even when the symbol is defined.
+
+- 1.7a (25.08.14)
+o Addend for "external_label-current_section_label" PC-relative relocation
+  was not calculated correctly.
+o Do not generate relocations with absolute ORG sections. External
+  references from such a section are illegal.
+o Fixed PC-relative references between absolute ORG sections.
+o Defining a macro with the same name as a directive or mnemonic no longer
+  causes and error, but a warning. Like most other assemblers vasm will
+  ignore this macro definition.
+o New option -unsshift to make right-shift operations unsigned (logical),
+  depending on the CPU's target address type.
+o Fixed some problems caused by signed sizes and section offsets.
+o Fixed -x option again. It only printed the first undefined symbol.
+o When specifying a listing file with -L <name> the source was not
+  included. The default is now to include it. Can still be controlled
+  by list/nolist directives.
+o Allow printing of multiple optimization messages for a single source
+  line (-showopt).
+o Fixed infinite loop with huge octal and binary values, which got a decimal
+  point or exponent.
+o Automatically rearrange nodes from "const-symbol-symbol", so that
+  "symbol-symbol" is evaluated first, as it may yield a constant.
+o Fix compiling with pre MSVC 2013 versions (missing strtold()).
+o m68k: -opt-fconst, which is enabled in vasm-default mode since 1.6a,
+  was broken for double to single precision conversions, as it moved
+  following labels by 4 bytes.
+o m68k: -devpac compatibility includes unsigned right-shifts.
+o m68k: NEAR CODE from PhxAss is supported and translates all absolute
+  JMP/JSR with an external symbol into 16-bit PC-relative addressing mode.
+o m68k: New option -sc to set small code mode (same as NEAR CODE directive).
+o mot-syntax: SECTION with a single argument defaults to a code section,
+  except when the name is "data" or "bss".
+o hunk-output: New option -kick1hunks to use only those hunk types and
+  external reference types which have been valid at the time of Kickstart
+  1.x for compatibility with old assembler sources and old linkers.
+o tos-output: A 16-bit aligned section size must also show up in the header.
+o tos-output: New option -monst for writing Devpac MonST-compatible
+  symbols.
+
+- 1.7 (02.07.14)
+o Labels in an absolute ORG section have no longer any restrictions
+  regarding arithmetic and logical operations on them.
+o New expression evaluation module. Now also supports floating point and
+  huge integer (128-bit) expressions in all backends.
+o New CPU backend for the Jaguar GPU and DSP RISC processors.
+o The path to the input source file is automatically added to the list
+  of include paths to search.
+o Fixed a serious bug with offset sections. Labels from those sections
+  were still treated as real labels, instead of expressions (offsets),
+  until the final pass.
+o The value of the repetition symbol (REPTN) was reset to -1 when
+  recursively calling a macro or entering an include file inside a repetition.
+o The number of 50 fast optimization passes may not be enough in some
+  cases. So this phase will be extended by another pass whenever a pass
+  included no modifications which made the code larger.
+o Exit immediately when the maximum number of errors has been reached and
+  not before printing an additional error.
+o Escape code handling in string constants is no longer the default. It
+  has to be explicitely enabled using the -esc option. Although, it is
+  still the default in the std syntax module.
+o 6800: Added some missing 6800 instructions (addb, dec).
+o 6800: Labels are always addressed in extended mode. Use the < prefix
+  to override that.
+o 6800: Accept lda and ldb as an alias for ldaa and ldab.
+o z80: Data definitions in parentheses, although unnecessary, should be
+  allowed.
+o m68k: Never try to optimize JMP/JSR (label,PC).
+o m68k: Allow bad instruction aliases, like movea when the destination is
+  not An, but warn about it.
+o m68k: New option -guess-ext makes the assembler accept a bad size extension,
+  as long as the instruction is unsized or there is just a single size
+  possible. This is the default setting for PhxAss- and Devpac-mode.
+o m68k: The size extension of branch instructions is completely ignored,
+  also when illegal, if -guess-ext and -opt-allbra are specified (-phxass).
+o m68k: The PhxAss OPT directive must not reset the -opt-allbra flag. It is
+  always enabled in PhxAss compatibility mode.
+o ARM: Supports 64-bit data.
+o mot-syntax: New directives import (same as xref) and export (same as xdef)
+  for Atari PureC/AHCC compatibility.
+o mot-syntax: FAIL is no longer fatal and displays a normal user error
+  in the final pass.
+o mot-syntax: Labels terminated by a colon must not start on the first
+  column of a line.
+o mot-syntax: FEQU directive to assign floating point expressions to a symbol.
+o mot-syntax: EQU.<size> and =.<size> to assign floating point expressions
+  in PhxAss compatibility mode.
+o std-syntax: .comm and .lcomm will now use the default alignments from
+  the current CPU backend.
+o std-syntax: .err is no longer fatal and displays a normal user error in
+  the final pass.
+o std-syntax: .abort is no longer a fatal error, but terminates assembly
+  at that point with a normal error.
+o oldstyle-syntax: FAIL is no longer fatal and displays a normal user error
+  in the final pass.
+o oldstyle-syntax: Supports intel-style constant suffixes (like 'h' to
+  indicate hexadecimal).
+o oldstyle-syntax: A terminating colon on a label is also allowed before
+  an equate, set or macro directive.
+o oldstyle-syntax: Added IFD and IFND (same as IFDEF and IFNDEF).
+o tos-output: Fixed a potential problem allocating 0 bytes, when there are
+  no reloctions in a file.
+
+- 1.6c (09.02.14)
+o New resolver strategies to prevent infinite oscillating optimizations.
+  After 50 passes the resolver switches into a safe mode, where only a
+  single instruction per pass is optimized. When there are still
+  instructions left, which alternate between different sizes, then optimization
+  will be disabled for them. This was mainly a problem with aggressive M68k
+  branch optimizations.
+o New CPU backend for the 6800 family, contributed by Esben Norby.
+  Currently the 6800 and the 68HC11 models are supported.
+o Quit with a fatal error when the internal line buffer (4096 bytes)
+  overflows, before overwriting innocent memory.
+o Forbid structure recursion with a fatal error. Otherwise all available
+  memory will be allocated.
+o Limit the maximum number of macro recursion levels to 1000. Can be
+  adjusted by specifying the new -maxmacrecurs=<n> option.
+o Always converts path separators for the assembler's host OS, defined by
+  AMIGA, ATARI or MSDOS in the Makefile. Default is Unix.
+o Expression parser: binary And, Or, Xor operators have now higher priority
+  than multiply and divide (same as Devpac).
+o Also warn about auto-aligned data.
+o m68k: Range check with unsigned operands didn't work when the value
+  is negative (for example ADDQ #-10,D0).
+o m68k: Allow outer displacement as first expression in front of the
+  brackets for Devpac compatibility: (od,[bd,An,Xn])
+o m68k: Warn about bad displacement positioning when not in Devpac
+  compatibility mode.
+o m68k: OPT X (xdebug) is ignored now, as it has very different meaning
+  in Devpac-Atari and Devpac-Amiga.
+o m68k: Allow a wrong size extension in Devpac mode, as long as the correct
+  size can be guessed (e.g. moveq.w -> moveq.l).
+o m68k: Support OPTC directive and __OPTC symbol in PhxAss-compatibility mode.
+o m68k: BASEREG may be reused for the same register without ENDB in PhxAss-
+  compatibility mode.
+o m68k: ENDB doesn't not need to specify a register in PhxAss-compatibility
+  mode, as long as it is unambigious.
+o m68k: An equate symbol used as displacement in a BASEREG operand, which
+  is defined later in the source, no longer generates an error.
+o m68k: Removed useless optimization for LINK An,#0 into PEA/MOVE.
+o m68k: Optimizing ASL #2,Dn into two ADDs is only allowed with -opt-lsl,
+  because it modifies the V-flag.
+o m68k: Generally all optimizations which result in multiple instructions
+  need an additional -opt-speed option from now on.
+o mot-syntax: Allow blanks in the operand and within expressions, when
+  -phxass mode is enabled.
+o mot-syntax: In -phxass mode '*' comments can be used everywhere, but
+  have to be preceded by a space-character (blanks, tabs, etc.).
+o mot-syntax: For compatibility with other assemblers (PhxAss, Barfly, etc.)
+  the SO directive will also manipulate the RS-counter (and the __RS symbol)
+  and vice versa.
+o mot-syntax: -phxass mode defines the symbol _PHXASS_ with value 2, so it
+  is possible to differentiate it from the original (value 1).
+o mot-syntax: When no output name is given in PhxAss mode, a default name
+  is constructed from the input name (name or name.o).
+o oldstyle-syntax: Some new directives, used in 68HC11 sources: bsz, rmb, zmb,
+  fcb, fcc, fdb.
+o bin-output: Fixed misdetection of overlapping sections, caused by signed
+  section origins (e.g. >= 0x8000 on 6502).
+
+- 1.6b (01.05.13)
+o Display a warning when instructions are automatically aligned. This might
+  help to find missing align directives and avoid bugs.
+o Display an error when a macro name conflicts with a mnemonic or directive.
+o Expression symbols (equates) which are based on label are exported as
+  an offseted label from the same section as the base.
+o m68k: Fixed gas-compatible mnemonics: JB<cc> -> J<cc>.
+o m68k: Fixed ColdFire ISA-B optimization "AND.L #$ff/#$ffff,Dn ->
+  MVZ.B/W Dn,Dn", which always used a D0 source register.
+o m68k: Scale factor 8 is allowed for ColdFire chips with an FPU.
+o PPC: Fixed relocations, which had been broken since 1.6a.
+o x86: Fixed data relocations, which had been broken since 1.6a.
+o mot-syntax: A comma in the comment field of an operand-less instruction
+  had been misinterpreted as an operand separator.
+o mot-syntax: Allow labels on the same line as an ENDC/ENDIF directive.
+o mot-syntax: Print the source and line number of the corresponding IF
+  directive, when the ENDC/ENDIF directive is missing.
+o std-syntax: Allow labels on the same line as an .endif directive.
+o std-syntax: When # is used as the first non-blank character on a line,
+  then it can still start a comment, even for architectures which define
+  a different comment character (e.g. ARM, M68k).
+o tos-output: Fixed uninitialized relocation pointer, which could lead to
+  illegal memory accesses.
+
+- 1.6a (02.04.13)
+o The vasm core supports structure definitions. A structure name can
+  either be used as a directive to initialize data, or in expressions
+  as the structure's size. Its fields are available as local labels to
+  the global structure name, defining the field offsets.
+  (Originally contributed by Romain Giot, modified by Frank Wille.)
+o The vasm core supports the creation of offsets sections. The contents
+  of such a section is not included in the output file and their labels
+  can be referenced as absolute offset symbols.
+o Fixed -x option, which didn't display undefined symbols when there had
+  been other errors in the source.
+o m68k: Division optimization (-opt-div, directive opt od) must not try
+  to optimize signed divisions, except with 1/-1. DIVS rounds towards
+  zero, while ASR rounds downwards.
+o m68k: Fixed immediate extended precision operands, which load "0.0" or
+  "-0.0".
+o m68k: -opt-fconst is enabled by default, except in Devpac and PhxAss mode.
+  Fixed a bug which prevented optimization of extended precision 0.0 to
+  single precision.
+o PPC: Register symbols are no longer exported into most object formats.
+o z80: Forbid operations between different index registers, like ix/iy
+  pairs and ld ixl,(ix+0) (fixed by Romain Giot).
+o z80: Improved detection of indirect operands in parentheses (fixed by
+  Romain Giot).
+o oldstyle-syntax: STRUCT and ENDSTRUCT directives for supporting
+  structures.
+o mot-syntax: Devpac-compatible CARGS directive.
+o mot-syntax: New directive OFFSET. Devpac-compatible, but additionally to
+  Devpac it allows any directive or instruction within such a section.
+o vobj-output: Output was broken since 1.6, when relocations based on
+  the current-pc symbol had been used.
+
+- 1.6 (29.12.12)
+o New instruction/operand parser. Can handle instruction availability,
+  depending on selected cpu-type, and optional operands in common code.
+o Now using the faster djb2 hash table algorithm. Tuned hash table sizes
+  for PPC, M68k and x86. Bigger symbol and macro hash tables.
+o Symbol distances from two different sections are supported, when the
+  second symbol comes from the current section, by using a pc-relative
+  relocation with an appropriate addend.
+o The vasm core supports named arguments of the form "\identifier". It
+  can be enabled by syntax modules on demand.
+o "\@?" can be used in a macro to push the current id below the top item
+  on the stack.
+o "\()" can be used to separate a macro name from the subsequent context.
+o Macro and repeat directives in comments could have caused some confusion.
+o Support for relocated origin blocks (RORG-blocks) in absolute output,
+  which assign all labels in this block to a different base address,
+  although the code is still physically placed at the original address.
+o Only produce a listing file when -L option is given. A nolist directive at
+  the end of the source will not prevent writing of a listing file anymore.
+o Do not include internal assembler symbols in the object file.
+o m68k: B<cc> *+$80 is now optimized to B<cc>.B as well, because the
+  instruction will be 2 bytes smaller after that. Fall back to *+$7e
+  optimization, when we need too many passes due to oscillating instruction
+  sizes. Usually caused by an alignment directive before the destination label.
+o m68k: Optimize CMP.W #0,An to TST.L An (TST.W An was wrong!).
+o m68k: New optimization: DIVU/DIVS.L #x,Dn can be optimized into LSR/ASR
+  when x is a power of 2 and between 2 and 256. Negative values are handled
+  by appending a NEG.L. DIVU/DIVS.W #1 is supported for ColdFire ISA_B/C by
+  MVZ.W. DIVS.W #-1 by using NEG.W first. The new option is called -opt-div.
+o m68k: New optimization: ANDI.? #-1,<ea> is optimized to TST.? <ea>.
+  ANDI.L #$ff/$ffff,Dn is optimized to MVZ.B/W Dn,Dn for ColdFire ISA_B/C.
+o m68k: New optimizations: ORI #0,<ea> and EORI #0,<ea> are optimized to
+  TST <ea>. AND #0,<ea> is optimized to CLR <ea>, when allowed.
+o m68k: New optimization: LEA 0,An is optimized to SUBA.L An,An.
+o PPC: Reworked cpu selection.
+o PPC: Reworked operand parser and evaluater. mfdec is now recognized.
+o z80: Fixed crashes and internal errors when an expression creates an
+  illegal relocation.
+o z80: Operands in parentheses were not allowed for defining data.
+o z80: A '#' prefix selects hexadecimal radix, as used in some assemblers.
+o z80: Fixed a bug with using invalid register-pairs in some addressing modes.
+o z80: Added the hidden instruction OUT (C),0 (contributed by Romain Giot).
+o 6502: Improved detection of indirect addressing modes. (expr)+(expr) and
+  (expr)+expr are no longer indirect.
+o mot-syntax: PhxAss-compatibility mode allows blanks in operands.
+o mot-syntax: Ignore AsmOne AUTO directive.
+o mot-syntax: Although ignored, load, jumpptr and jumperr should accept
+  non-constant expressions.
+o mot-syntax: Internal symbol REPTN can be used as iteration counter in
+  the inner repeat loop.
+o mot-syntax: New directives: IFB and IFNB to check whether a macro argument
+  is blank or non-blank.
+o oldstyle-syntax: Enabled support for named macro arguments.
+o oldstyle-syntax: Fixed detection of endmac, endmacro, endrep and endrepeat.
+o oldstyle-syntax: Conditional directives also allow non-constant expressions,
+  like label-differences. But the expression has to evaluate in the first
+  assembler pass.
+o oldstyle-syntax: assert directive, displays an error message when the
+  expression is false.
+o oldstyle-syntax: Allow access to any local symbol in the source by using
+  the syntax "global_name.local_name". The '.' is otherwise forbidden in
+  the middle of a label now.
+o oldstyle-syntax: New directives rorg, rend, phase, dephase for a relocated
+  label origin.
+o oldstyle-syntax: print a warning when alignment is too big.
+o oldstyle-syntax: LIST and NOLIST directives to control listing file output.
+o oldstyle-syntax: INCBIN got two optional arguments to skip bytes at the
+  beginning of a file and to restrict the size of the included data
+  (contributed by Romain Giot).
+o oldstyle-syntax: New directive abyte, which adds a constant offset to
+  each byte written (contributed by Romain Giot).
+o oldstyle-syntax: New directive ifused (contributed by Romain Giot).
+o std-syntax: Implemented .abort, .err and .fail directives.
+o std-syntax: Allow non-constant expressions for conditional directives,
+  with the same restrictions as in the other syntax modules.
+o std-syntax: print a warning when alignment is too big.
+o std-syntax: .list and .nolist directives to control listing file output.
+o std-syntax: Enabled support for named macro arguments.
+o std-syntax: New directives: .ifb and .ifnb to check whether a macro
+  argument is blank or non-blank.
+
+- 1.5c (10.12.11)
+o Define a __VASM symbol to identify the assembler.
+o Reworked sources to use typedefs from stdint.h where appropriate.
+o Fixed vobjdump to regard all information from an object as unsigned,
+  except symbol values and reloc addends and masks.
+o m68k: Assign the current cpu/fpu/mmu type to the __VASM symbol.
+o m68k: Define the __G2 symbol in Devpac compatibility mode.
+o ARM: Fixed U-bit handling and sign in load/store addressing modes
+  dealing with labels (which are translated into PC-relative).
+o ARM: The I-bit in halfword transfers must be flipped.
+o z80: Fixed error message when 8-bit data is out of range (-128 .. 255).
+o z80: Allow the offset to be an external symbol in ld (ix+offset).
+o z80: Accept JP HL besides JP (HL), as most (?) assemblers do for
+  convenience.
+o std-syntax: Section ".text","acrwx" is default when no .section or
+  .org directive is present.
+o oldstyle-syntax: Section ".text","acrwx" is default when no SECTION or
+  ORG directive is present.
+o oldstyle-syntax: A section directive without attribute defaults to
+  "acrwx".
+o oldstyle-syntax: New option -autoexp to automatically export all
+  non-local symbols.
+
+- 1.5b (05.08.11)
+o m68k: Fixed -no-opt option.
+o m68k: Fixed the (hopefully) last possibility for oscillating branch
+  optimizations. Example: bra lab; bra lab; lab:
+o x86: Enabled experimental 64-bit support. The new option -m64 allows the
+  usage of 64-bit instructions. New directive .code64.
+o 6502: Fixed ASL, ROR and ROL with addressing mode ABS,X (by Mauricio
+  M. Lucero).
+o 6502,z80: Support /256 %256 and &255 operations with labels and generate
+  the appropriate relocations (Dominic Morris).
+o z80: Bad relocations are now flagged by the correct error message.
+o elf-output: Support for ELF64 and x86_64 relocations.
+
 - 1.5a (01.04.11)
 o Fixed -nocase option to make it no longer modify external symbol names,
   which then broke linking.
@@ -28,7 +474,7 @@ o mot-syntax: When OUTPUT is used with ".name" then it is not only appended
   (Devpac compatibility).
 o mot-syntax: Option -localu makes local symbols start with an underscore
   instead of a dot (from Devpac).
-o output-vobj: A file without sections no longer causes an internal error.
+o vobj-output: A file without sections no longer causes an internal error.
 
 - 1.5 (01.12.10)
 o A "\\" inside a macro has to be replaced by "\" when the assembler is
@@ -169,7 +615,7 @@ o mot-syntax: Conditional directives also allow non-constant expressions,
   assembler pass.
 o mot-syntax: Predefines offsets symbols __RS, __SO and __FO with value 0
   in -devpac mode.
-o output-tos: Section alignment must be 16 bits, not 32. With another two
+o tos-output: Section alignment must be 16 bits, not 32. With another two
   zero-bytes for 32-bit alignment the OS couldn't see any relocations.
 
 - 1.4c (05.11.09)
@@ -192,7 +638,7 @@ o m68k: Fixed several "displacement out of range" errors.
 o mot-syntax: With -phxass option, macro names are case-insensitive.
 o hunk-output: Report undefined symbols in hunkexe-mode as such, instead of
   just printing "unsupported reloc".
-o output-vobj: vasm-internal symbols must not be ignored in the output as
+o vobj-output: vasm-internal symbols must not be ignored in the output as
   relocations refering to the current-pc-symbol depend on them.
 
 - 1.4b (14.10.09)
@@ -375,6 +821,7 @@ o std-syntax: Support for local symbols of the form ".nnn", where nnn stands
 o vobj-output: New option -nosym, to discard local symbols.
 o vobj-output: Fixed bug with bss section. All sections after a bss appeared
   as corrupted.
+o aout
 
 - 1.3b (23.10.08)
 o New relocations, from vlink 0.12+, to keep the VOBJ format compatible.
diff --git a/hugeint.c b/hugeint.c
new file mode 100644
index 0000000..78ac985
--- /dev/null
+++ b/hugeint.c
@@ -0,0 +1,535 @@
+  /* hugeint.c implements huge integer operations at 128 bits */
+/* (c) in 2014 by Frank Wille */
+
+#include <stdint.h>
+#include <stddef.h>
+#include "hugeint.h"
+#include "error.h"
+
+#define HALF_BITS 32
+#define HIHALF(x) ((uint64_t)(x) >> HALF_BITS)
+#define LOHALF(x) ((uint64_t)(x) & ((1LL << HALF_BITS) - 1))
+#define BASE (1LL << HALF_BITS)
+#define COMBINE(a,b) (((uint64_t)(a) << HALF_BITS) | (b))
+
+typedef uint32_t digit;
+
+
+thuge huge_zero(void)
+{
+  thuge r;
+
+  r.hi = r.lo = 0;
+  return r;
+}
+
+
+thuge huge_from_int(int64_t i)
+{
+  thuge r;
+
+  r.hi = i<0 ? ~0 : 0;
+  r.lo = (uint64_t)i;
+  return r;
+}
+
+
+int64_t huge_to_int(thuge h)
+{
+  return (int64_t)h.lo;
+}
+
+
+thuge huge_from_float(tfloat f)
+{
+  thuge r;
+  tfloat pf = f<0.0 ? -f : f;
+
+  r.hi = pf / MAX_UINT64_FLOAT;
+  r.lo = pf - (tfloat)r.hi * MAX_UINT64_FLOAT;
+  if (f < 0.0) {
+    r.hi = r.lo!=0 ? (-(int64_t)r.hi)-1 : -(int64_t)r.hi;
+    r.lo = -(int64_t)r.lo;
+  }
+  return r;
+}
+
+
+tfloat huge_to_float(thuge h)
+{
+  if (HUGESIGN(h))
+    return (tfloat)-(int64_t)h.lo - MAX_UINT64_FLOAT *
+           (tfloat)(h.lo!=0 ? h.hi-1 : h.hi);
+  return (tfloat)h.hi * MAX_UINT64_FLOAT + (tfloat)h.lo;
+}
+
+
+thuge huge_from_mem(int be,void *src,size_t size)
+{
+  uint8_t *s = src;
+  thuge r;
+
+  if (size > HUGEBITS/8)
+    ierror(0);
+  if (be) {
+    if ((int8_t)*s < 0)
+      r.hi = r.lo = ~0;
+    else
+      r.hi = r.lo = 0;
+    while (size--) {
+      r = hshl(r,8);
+      r.lo |= *s++;
+    }
+  }
+  else {
+    s += size;
+    if ((int8_t)*(s-1) < 0)
+      r.hi = r.lo = ~0;
+    else
+      r.hi = r.lo = 0;
+    while (size--) {
+      r = hshl(r,8);
+      r.lo |= *(--s);
+    }
+  }
+  return r;
+}
+
+
+void *huge_to_mem(int be,void *dest,size_t size,thuge h)
+{
+  uint8_t *d = dest;
+
+  if (size > HUGEBITS/8)
+    ierror(0);
+  if (be) {
+    d += size;
+    dest = d;
+    while (size--) {
+      *(--d) = (uint8_t)h.lo;
+      h = hshr(h,8);
+    }
+  }
+  else {
+    while (size--) {
+      *d++ = (uint8_t)h.lo;
+      h = hshr(h,8);
+    }
+    dest = d;
+  }
+  return dest;
+}
+
+
+/* check if huge-int can be represented by bits, signed or unsigned */
+int huge_chkrange(thuge h,int bits)
+{
+  uint64_t v,mask;
+  int b;
+
+  if (bits & 7)
+    ierror(0);
+
+  if (bits >= HUGEBITS)
+    return 1;
+
+  if (bits >= HUGEBITS/2) {
+    mask = ~0LL << (bits - HUGEBITS/2);
+    v = h.hi & mask;
+    return (v & (1LL << (bits - HUGEBITS/2))) ? (v ^ mask) == 0 : v == 0;
+  }    
+
+  mask = ~0LL << bits;
+  v = h.lo & mask;
+  if (v & (1LL << bits))
+    return h.hi == ~0 && (v ^ mask) == 0;
+  return h.hi == 0 && v == 0;
+}
+
+
+thuge hneg(thuge a)
+{
+  thuge r;
+
+  r.hi = a.lo!=0 ? (-(int64_t)a.hi)-1 : -(int64_t)a.hi;
+  r.lo = -(int64_t)a.lo;
+  return r;
+}
+
+
+thuge hcpl(thuge a)
+{
+  thuge r;
+
+  r.hi = ~a.hi;
+  r.lo = ~a.lo;
+  return r;
+}
+
+
+thuge hnot(thuge a)
+{
+  thuge r;
+
+  r.hi = 0;
+  r.lo = (a.hi == 0 && a.lo == 0) ? 1 : 0;
+  return r;
+}
+
+
+thuge hand(thuge a,thuge b)
+{
+  thuge r;
+
+  r.hi = a.hi & b.hi;
+  r.lo = a.lo & b.lo;
+  return r;
+}
+
+
+thuge hor(thuge a,thuge b)
+{
+  thuge r;
+
+  r.hi = a.hi | b.hi;
+  r.lo = a.lo | b.lo;
+  return r;
+}
+
+
+thuge hxor(thuge a,thuge b)
+{
+  thuge r;
+
+  r.hi = a.hi ^ b.hi;
+  r.lo = a.lo ^ b.lo;
+  return r;
+}
+
+
+thuge haddi(thuge a,int64_t b)
+{
+  thuge r;
+
+  r.lo = a.lo + (uint64_t)b;
+  if (b < 0)
+    r.hi = (r.lo>a.lo) ? a.hi-1 : a.hi;
+  else
+    r.hi = (r.lo<a.lo) ? a.hi+1 : a.hi;
+  return r;
+}
+
+
+thuge hadd(thuge a,thuge b)
+{
+  thuge r;
+
+  r.lo = a.lo + b.lo;
+  if (HUGESIGN(b))
+    r.hi = (r.lo>a.lo) ? a.hi + b.hi - 1 : a.hi + b.hi;
+  else
+    r.hi = (r.lo<a.lo) ? a.hi + b.hi + 1 : a.hi + b.hi;
+  return r;
+}
+
+
+thuge hsub(thuge a,thuge b)
+{
+  thuge r;
+
+  r.lo = a.lo - b.lo;
+  if (HUGESIGN(b))
+    r.hi = (r.lo<a.lo) ? a.hi - b.hi + 1 : a.hi - b.hi;
+  else
+    r.hi = (r.lo>a.lo) ? a.hi - b.hi - 1 : a.hi - b.hi;
+  return r;
+}
+
+
+int hcmp(thuge a,thuge b)
+{
+  thuge c = hsub(a,b);
+
+  if (c.hi == 0 && c.lo == 0)
+    return 0;
+  return HUGESIGN(c) ? -1 : 1;
+}
+
+
+thuge hshra(thuge a,int b)
+{
+  thuge r;
+
+  if (b >= HUGEBITS/2) {
+    r.hi = HUGESIGN(a) ? ~0 : 0;
+    r.lo = (int64_t)a.hi >> (b - HUGEBITS/2);
+  }
+  else if (b == 0) {
+    r.hi = a.hi;
+    r.lo = a.lo;
+  }
+  else {
+    r.hi = (int64_t)a.hi >> b;
+    r.lo = (a.hi << (HUGEBITS/2 - b)) | (a.lo >> b);
+  }
+  return r;
+}
+
+
+thuge hshr(thuge a,int b)
+{
+  thuge r;
+
+  if (b >= HUGEBITS/2) {
+    r.hi = 0;
+    r.lo = a.hi >> (b - HUGEBITS/2);
+  }
+  else if (b == 0) {
+    r.hi = a.hi;
+    r.lo = a.lo;
+  }
+  else {
+    r.hi = a.hi >> b;
+    r.lo = (a.hi << (HUGEBITS/2 - b)) | (a.lo >> b);
+  }
+  return r;
+}
+
+
+thuge hshl(thuge a,int b)
+{
+  thuge r;
+
+  if (b >= HUGEBITS/2) {
+    r.hi = a.lo << (b - HUGEBITS/2);
+    r.lo = 0;
+  }
+  else if (b == 0) {
+    r.hi = a.hi;
+    r.lo = a.lo;
+  }
+  else {
+    r.hi = (a.lo >> (HUGEBITS/2 - b)) | (a.hi << b);
+    r.lo = a.lo << b;
+  }
+  return r;
+}
+
+
+thuge hmuli(thuge a,int64_t b)
+{
+  uint64_t tmp1,tmp2,carry,ub;
+  thuge r;
+
+  ub = (uint64_t)b;
+  r.lo = a.lo * ub;
+  r.hi = a.hi * ub;
+  tmp1 = HIHALF(a.lo) * LOHALF(ub);
+  carry = tmp1 + LOHALF(a.lo) * HIHALF(ub);
+  if (carry < tmp1)
+    r.hi += BASE;
+  r.hi += HIHALF(carry);
+  tmp1 = HIHALF(a.lo) * HIHALF(ub);
+  r.hi += tmp1;
+  if (tmp1 + (carry << HALF_BITS) < tmp1)
+    r.hi++;
+  return r;
+}
+
+
+thuge hmul(thuge a,thuge b)
+{
+  uint64_t tmp1,tmp2,carry;
+  thuge r;
+
+  r.lo = a.lo * b.lo;
+  r.hi = a.hi * b.lo + b.hi * a.lo;
+  tmp1 = HIHALF(a.lo) * LOHALF(b.lo);
+  carry = tmp1 + LOHALF(a.lo) * HIHALF(b.lo);
+  if (carry < tmp1)
+    r.hi += BASE;
+  r.hi += HIHALF(carry);
+  tmp1 = HIHALF(a.lo) * HIHALF(b.lo);
+  r.hi += tmp1;
+  if (tmp1 + (carry << HALF_BITS) < tmp1)
+    r.hi++;
+  return r;
+}
+
+
+static void shift_digits(digit *p,int len,int sh)
+{
+  int i;
+
+  for (i=0; i<len; i++) {
+    p[i] = (digit)(LOHALF((uint64_t)p[i] << sh) |
+                   ((uint64_t)p[i + 1] >> (HALF_BITS - sh)));
+  }
+  p[i] = (digit)(LOHALF((uint64_t)p[i] << sh));
+}
+
+
+static thuge divmod(thuge a,thuge b,thuge *modptr)
+{
+  digit uspace[5],vspace[5],qspace[5];
+  digit *u=uspace,*v=vspace,*q=qspace;
+  digit v1,v2;
+  uint64_t qhat,rhat,t;
+  int m,n,d,j,i;
+  thuge r;
+
+  if (b.hi == 0 && b.lo == 0)
+    ierror(0);  /* division by zero */
+
+  if (a.hi<b.hi || (a.hi==b.hi && a.lo<b.lo)) {
+    if (modptr) {
+      modptr->hi = a.hi;
+      modptr->lo = a.lo;
+    }
+    r.hi = r.lo = 0;
+    return r;
+  }
+
+  u[0] = 0;
+  u[1] = (digit)HIHALF(a.hi);
+  u[2] = (digit)LOHALF(a.hi);
+  u[3] = (digit)HIHALF(a.lo);
+  u[4] = (digit)LOHALF(a.lo);
+  v[1] = (digit)HIHALF(b.hi);
+  v[2] = (digit)LOHALF(b.hi);
+  v[3] = (digit)HIHALF(b.lo);
+  v[4] = (digit)LOHALF(b.lo);
+
+  for (n=4; v[1]==0; v++) {
+    if (--n == 1) {
+      uint64_t rbj;
+      digit q1,q2,q3,q4;
+
+      t = v[2];
+      q1 = (digit)(u[1] / t);
+      rbj = COMBINE(u[1] % t,u[2]);
+      q2 = (digit)(rbj / t);
+      rbj = COMBINE(rbj % t,u[3]);
+      q3 = (digit)(rbj / t);
+      rbj = COMBINE(rbj % t,u[4]);
+      q4 = (digit)(rbj / t);
+      if (modptr) {
+        modptr->hi = 0;
+        modptr->lo = rbj % t;
+      }
+      r.hi = COMBINE(q1,q2);
+      r.lo = COMBINE(q3,q4);
+      return r;
+    }
+  }
+
+  for (m=4-n; u[1]==0; u++)
+    m--;
+  for (i=4-m; --i>=0;)
+    q[i] = 0;
+  q += 4 - m;
+
+  d = 0;
+  for (t=v[1]; t<BASE/2; t<<=1)
+    d++;
+  if (d > 0) {
+    shift_digits(&u[0],m+n,d);
+    shift_digits(&v[1],n-1,d);
+  }
+  j = 0;
+  v1 = v[1];
+  v2 = v[2];
+
+  do {
+    digit uj0, uj1, uj2;
+
+    uj0 = u[j+0];
+    uj1 = u[j+1];
+    uj2 = u[j+2];
+    if (uj0 == v1) {
+      qhat = BASE;
+      rhat = uj1;
+      goto qhat_too_big;
+    }
+    else {
+      uint64_t nn = COMBINE(uj0,uj1);
+      qhat = nn / v1;
+      rhat = nn % v1;
+    }
+    while (v2 * qhat > COMBINE(rhat,uj2)) {
+qhat_too_big:
+      qhat--;
+      if ((rhat += v1) >= BASE)
+        break;
+    }
+    for (t=0,i=n; i>0; i--) {
+      t = u[i+j] - v[i] * qhat - t;
+      u[i+j] = (digit)LOHALF(t);
+      t = (BASE - HIHALF(t)) & (BASE - 1);
+    }
+    t = u[j] - t;
+    u[j] = (digit)LOHALF(t);
+    if (HIHALF(t)) {
+      qhat--;
+      for (t=0, i=n; i>0; i--) {
+        t += u[i+j] + v[i];
+        u[i+j] = (digit)LOHALF(t);
+        t = HIHALF(t);
+      }
+      u[j] = (digit)LOHALF(u[j] + t);
+    }
+    q[j] = (digit)qhat;
+  } while (++j <= m);
+
+  if (modptr) {
+    if (d) {
+      for (i=m+n; i>m; --i) {
+        u[i] = (digit)(((uint64_t)u[i] >> d) |
+                       LOHALF((uint64_t)u[i-1] << (HALF_BITS - d)));
+      }
+      u[i] = 0;
+    }
+    modptr->hi = COMBINE(uspace[1],uspace[2]);
+    modptr->lo = COMBINE(uspace[3],uspace[4]);
+  }
+
+  r.hi = COMBINE(qspace[1],qspace[2]);
+  r.lo = COMBINE(qspace[3],qspace[4]);
+  return r;
+}
+
+
+thuge hdiv(thuge a,thuge b)
+{
+  int neg = 0;
+  thuge r;
+
+  if (HUGESIGN(a)) {
+    neg ^= 1;
+    a = hneg(a);
+  }
+  if (HUGESIGN(b)) {
+    neg ^= 1;
+    b = hneg(b);
+  }
+  r = divmod(a,b,NULL);
+  return neg ? hneg(r) : r;
+}
+
+
+thuge hmod(thuge a,thuge b)
+{
+  int neg = 0;
+  thuge r;
+
+  if (HUGESIGN(a)) {
+    neg ^= 1;
+    a = hneg(a);
+  }
+  if (HUGESIGN(b)) {
+    neg ^= 1;
+    b = hneg(b);
+  }
+  (void)divmod(a,b,&r);
+  return neg ? hneg(r) : r;
+}
diff --git a/hugeint.h b/hugeint.h
new file mode 100644
index 0000000..ef7714a
--- /dev/null
+++ b/hugeint.h
@@ -0,0 +1,45 @@
+/* hugeint.h implements huge integer operations at 128 bits */
+/* (c) in 2014 by Frank Wille */
+
+#ifndef HUGEINT_H
+#define HUGEINT_H
+
+#include "tfloat.h"
+
+typedef struct thuge {
+  uint64_t hi,lo;
+} thuge;
+
+#define HUGEBITS 128
+#define HUGESIGN(h) ((h.hi & 0x8000000000000000LL) != 0)
+#define MAX_UINT64_FLOAT 1.8446744073709551616e+19
+
+
+thuge huge_zero(void);
+thuge huge_from_int(int64_t);
+int64_t huge_to_int(thuge);
+thuge huge_from_float(tfloat);
+tfloat huge_to_float(thuge);
+thuge huge_from_mem(int,void *,size_t);
+void *huge_to_mem(int,void *,size_t,thuge);
+int huge_chkrange(thuge,int);
+
+thuge hneg(thuge);
+thuge hcpl(thuge);
+thuge hnot(thuge);
+thuge hand(thuge,thuge);
+thuge hor(thuge,thuge);
+thuge hxor(thuge,thuge);
+thuge haddi(thuge,int64_t);
+thuge hadd(thuge,thuge);
+thuge hsub(thuge,thuge);
+int hcmp(thuge,thuge);
+thuge hshra(thuge,int);
+thuge hshr(thuge,int);
+thuge hshl(thuge,int);
+thuge hmuli(thuge,int64_t);
+thuge hmul(thuge,thuge);
+thuge hdiv(thuge,thuge);
+thuge hmod(thuge,thuge);
+
+#endif
diff --git a/make.rules b/make.rules
index 9fe8896..4a63c1f 100644
--- a/make.rules
+++ b/make.rules
@@ -1,11 +1,11 @@
 PRE = obj$(TARGET)/$(CPU)_$(SYNTAX)_
 
-OBJS = $(PRE)vasm.o $(PRE)atom.o $(PRE)expr.o $(PRE)symtab.o $(PRE)error.o \
-	$(PRE)parse.o $(PRE)reloc.o $(PRE)vmath.o $(PRE)supp.o \
-	$(PRE)cpu.o $(PRE)syntax.o \
-	$(PRE)output_test.o $(PRE)output_elf.o $(PRE)output_bin.o \
-	$(PRE)output_vobj.o $(PRE)output_hunk.o $(PRE)output_aout.o \
-        $(PRE)output_tos.o
+OBJS = $(PRE)vasm.o $(PRE)atom.o $(PRE)expr.o $(PRE)symtab.o $(PRE)symbol.o \
+       $(PRE)error.o $(PRE)parse.o $(PRE)reloc.o $(PRE)hugeint.o \
+       $(PRE)cond.o $(PRE)supp.o $(PRE)cpu.o $(PRE)syntax.o \
+       $(PRE)output_test.o $(PRE)output_elf.o $(PRE)output_bin.o \
+       $(PRE)output_vobj.o $(PRE)output_hunk.o $(PRE)output_aout.o \
+       $(PRE)output_tos.o
 
 VODOBJS = obj$(TARGET)/vobjdump.o
 
@@ -33,58 +33,67 @@ allclean:
 	$(RM) obj$(TARGET)/*
 
 
-$(PRE)vasm.o: vasm.c vasm.h expr.h error.h supp.h atom.h syntax/$(SYNTAX)/syntax.h
+$(PRE)vasm.o: vasm.c vasm.h symbol.h expr.h error.h supp.h atom.h cpus/$(CPU)/cpu.h syntax/$(SYNTAX)/syntax.h
 	$(CC) $(INCLUDES) $(COPTS) vasm.c $(CCOUT)$(PRE)vasm.o
 
-$(PRE)atom.o: atom.c vasm.h expr.h error.h supp.h reloc.h syntax/$(SYNTAX)/syntax.h
+$(PRE)atom.o: atom.c vasm.h symbol.h expr.h error.h supp.h reloc.h cpus/$(CPU)/cpu.h syntax/$(SYNTAX)/syntax.h
 	$(CC) $(INCLUDES) $(COPTS) atom.c $(CCOUT)$(PRE)atom.o
 
-$(PRE)expr.o: expr.c vasm.h expr.h error.h supp.h syntax/$(SYNTAX)/syntax.h
+$(PRE)expr.o: expr.c vasm.h symbol.h expr.h error.h supp.h syntax/$(SYNTAX)/syntax.h hugeint.h tfloat.h
 	$(CC) $(INCLUDES) $(COPTS) expr.c $(CCOUT)$(PRE)expr.o
 
+$(PRE)cond.o: cond.c vasm.h error.h cond.h syntax/$(SYNTAX)/syntax.h
+	$(CC) $(INCLUDES) $(COPTS) cond.c $(CCOUT)$(PRE)cond.o
+
 $(PRE)symtab.o: symtab.c vasm.h error.h supp.h
 	$(CC) $(INCLUDES) $(COPTS) symtab.c $(CCOUT)$(PRE)symtab.o
 
+$(PRE)symbol.o: symbol.c vasm.h symbol.h symtab.h error.h supp.h cpus/$(CPU)/cpu.h
+	$(CC) $(INCLUDES) $(COPTS) symbol.c $(CCOUT)$(PRE)symbol.o
+
 $(PRE)error.o: error.c vasm.h error.h general_errors.h output_errors.h cpus/$(CPU)/cpu_errors.h syntax/$(SYNTAX)/syntax_errors.h
 	$(CC) $(INCLUDES) $(COPTS) error.c $(CCOUT)$(PRE)error.o
 
-$(PRE)reloc.o: reloc.c vasm.h expr.h error.h supp.h reloc.h
+$(PRE)reloc.o: reloc.c vasm.h symbol.h expr.h error.h supp.h reloc.h
 	$(CC) $(INCLUDES) $(COPTS) reloc.c $(CCOUT)$(PRE)reloc.o
 
-$(PRE)parse.o: parse.c vasm.h parse.h atom.h syntax/$(SYNTAX)/syntax.h
+$(PRE)parse.o: parse.c vasm.h symbol.h parse.h atom.h syntax/$(SYNTAX)/syntax.h
 	$(CC) $(INCLUDES) $(COPTS) parse.c $(CCOUT)$(PRE)parse.o
 
-$(PRE)vmath.o: vmath.c vasm.h error.h supp.h vmath.h
-	$(CC) $(INCLUDES) $(COPTS) vmath.c $(CCOUT)$(PRE)vmath.o
+$(PRE)hugeint.o: hugeint.c hugeint.h tfloat.h error.h
+	$(CC) $(INCLUDES) $(COPTS) hugeint.c $(CCOUT)$(PRE)hugeint.o
 
-$(PRE)supp.o: supp.c vasm.h expr.h error.h supp.h atom.h
+$(PRE)supp.o: supp.c vasm.h symbol.h expr.h error.h supp.h atom.h tfloat.h
 	$(CC) $(INCLUDES) $(COPTS) supp.c $(CCOUT)$(PRE)supp.o
 
-$(PRE)output_test.o: output_test.c vasm.h error.h supp.h atom.h
+$(PRE)output_test.o: output_test.c vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_test.c $(CCOUT)$(PRE)output_test.o
 
-$(PRE)output_elf.o: output_elf.c vasm.h error.h supp.h atom.h output_elf.h elf_reloc_ppc.h elf_reloc_68k.h
+$(PRE)output_elf.o: output_elf.c vasm.h symbol.h error.h supp.h atom.h \
+                    output_elf.h elf_reloc_ppc.h elf_reloc_68k.h \
+                    elf_reloc_386.h elf_reloc_arm.h elf_reloc_x86_64.h \
+                    elf_reloc_jag.h
 	$(CC) $(INCLUDES) $(COPTS) output_elf.c $(CCOUT)$(PRE)output_elf.o
 
-$(PRE)output_bin.o: output_bin.c vasm.h error.h supp.h atom.h
+$(PRE)output_bin.o: output_bin.c vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_bin.c $(CCOUT)$(PRE)output_bin.o
 
-$(PRE)output_vobj.o: output_vobj.c vasm.h error.h supp.h atom.h
+$(PRE)output_vobj.o: output_vobj.c vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_vobj.c $(CCOUT)$(PRE)output_vobj.o
 
-$(PRE)output_hunk.o: output_hunk.c output_hunk.h vasm.h error.h supp.h atom.h
+$(PRE)output_hunk.o: output_hunk.c output_hunk.h vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_hunk.c $(CCOUT)$(PRE)output_hunk.o
 
-$(PRE)output_aout.o: output_aout.c output_aout.h vasm.h error.h supp.h atom.h
+$(PRE)output_aout.o: output_aout.c output_aout.h vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_aout.c $(CCOUT)$(PRE)output_aout.o
 
-$(PRE)output_tos.o: output_tos.c output_tos.h vasm.h error.h supp.h atom.h
+$(PRE)output_tos.o: output_tos.c output_tos.h vasm.h symbol.h error.h supp.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) output_tos.c $(CCOUT)$(PRE)output_tos.o
 
-$(PRE)cpu.o: cpus/$(CPU)/cpu.c cpus/$(CPU)/cpu.h syntax/$(SYNTAX)/syntax.h vasm.h expr.h error.h supp.h reloc.h vmath.h parse.h atom.h
+$(PRE)cpu.o: cpus/$(CPU)/cpu.c cpus/$(CPU)/cpu.h syntax/$(SYNTAX)/syntax.h vasm.h symbol.h expr.h error.h supp.h reloc.h hugeint.h tfloat.h parse.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) cpus/$(CPU)/cpu.c $(CCOUT)$(PRE)cpu.o
 
-$(PRE)syntax.o: syntax/$(SYNTAX)/syntax.c syntax/$(SYNTAX)/syntax.h vasm.h expr.h error.h supp.h parse.h atom.h
+$(PRE)syntax.o: syntax/$(SYNTAX)/syntax.c syntax/$(SYNTAX)/syntax.h cpus/$(CPU)/cpu.h vasm.h symbol.h expr.h error.h supp.h parse.h atom.h
 	$(CC) $(INCLUDES) $(COPTS) syntax/$(SYNTAX)/syntax.c $(CCOUT)$(PRE)syntax.o
 
 obj$(TARGET)/vobjdump.o: vobjdump.c vobjdump.h
diff --git a/output_aout.c b/output_aout.c
index d81dfe6..20ed1bd 100644
--- a/output_aout.c
+++ b/output_aout.c
@@ -1,16 +1,14 @@
 /* output_aout.c a.out output driver for vasm */
-/* (c) in 2008-2010 by Frank Wille */
+/* (c) in 2008-2015 by Frank Wille */
 
 #include "vasm.h"
 #include "output_aout.h"
-#if MID
-static char *copyright="vasm a.out output module 0.4 (c) 2008-2010 Frank Wille";
-
-static int mid = MID;
+#ifdef MID
+static char *copyright="vasm a.out output module 0.6 (c) 2008-2015 Frank Wille";
 
 static section *sections[3];
-static taddr secsize[3];
-static taddr secoffs[3];
+static utaddr secsize[3];
+static utaddr secoffs[3];
 static int sectype[] = { N_TEXT, N_DATA, N_BSS };
 static int secweak[] = { N_WEAKT, N_WEAKD, N_WEAKB };
 
@@ -19,16 +17,21 @@ static struct StrTabList aoutstrlist;
 static struct list treloclist;
 static struct list dreloclist;
 
+static int mid = -1;
 static int isPIC = 1;
 
 #define SECT_ALIGN 4  /* .text and .data are aligned to 32 bits */
 
 
-static unsigned int get_sec_type(section *s)
-/* scan section attributes for type, 0=text, 1=data, 2=bss */
+static int get_sec_type(section *s)
+/* scan section attributes for type, 0=text, 1=data, 2=bss,
+   -1: ORG-section at an absolute address */
 {
   char *a = s->attr;
 
+  if (s->flags & ABSOLUTE)
+    return -1;
+
   while (*a) {
     switch (*a++) {
       case 'c':
@@ -83,12 +86,13 @@ static int aout_getbind(symbol *sym)
 }
 
 
-static unsigned long aoutstd_getrinfo(rlist *rl,int xtern,char *sname,int be)
-/* convert vasm relocation type in standard a.out relocations, */
-/* as used by M68k and x86 targets */
+static uint32_t aoutstd_getrinfo(rlist *rl,int xtern,char *sname,int be)
+/* Convert vasm relocation type into standard a.out relocations, */
+/* as used by M68k and x86 targets. */
+/* For xtern=-1, return true when this relocation requires a base symbol. */
 {
   nreloc *nr;
-  unsigned long r=0,s=4;
+  uint32_t r=0,s=4;
   int b=0;
 
   if (nr = (nreloc *)rl->reloc) {
@@ -97,6 +101,8 @@ static unsigned long aoutstd_getrinfo(rlist *rl,int xtern,char *sname,int be)
       case REL_PC: b=RSTDB_pcrel; break;
       case REL_SD: b=RSTDB_baserel; break;
     }
+    if (xtern == -1)  /* just query symbol-based relocation */
+      return b==RSTDB_baserel || b==RSTDB_jmptable;
 
     if ((nr->offset&7)==0 &&
         (nr->mask & MAKEMASK(nr->size)) == MAKEMASK(nr->size)) {
@@ -121,8 +127,13 @@ static unsigned long aoutstd_getrinfo(rlist *rl,int xtern,char *sname,int be)
 }
 
 
-static void aout_initwrite(section *sec)
+static void aout_initwrite(section *firstsec)
 {
+  section *sec;
+
+  if (mid == -1)
+    mid = MID;
+
   initlist(&aoutstrlist.l);
   aoutstrlist.hashtab = mycalloc(STRHTABSIZE*sizeof(struct StrTabNode *));
   aoutstrlist.nextoffset = 4;  /* first string is always at offset 4 */
@@ -136,13 +147,15 @@ static void aout_initwrite(section *sec)
   sections[_TEXT] = sections[_DATA] = sections[_BSS] = NULL;
   secsize[_TEXT] = secsize[_DATA] = secsize[_BSS] = 0;
 
-  for (; sec; sec=sec->next) {
+  for (sec=firstsec; sec; sec=sec->next) {
     int i;
 
     /* section size is assumed to be in in (sec->pc - sec->org), otherwise
        we would have to calculate it from the atoms and store it there */
-    if ((sec->pc - sec->org) > 0 || (sec->flags & HAS_SYMBOLS)) {
+    if (get_sec_size(sec) > 0 || (sec->flags & HAS_SYMBOLS)) {
       i = get_sec_type(sec);
+      if (i < 0)
+        continue;  /* ignore ORG sections for later */
       if (!sections[i]) {
         sections[i] = sec;
         secsize[i] = get_sec_size(sec);
@@ -153,6 +166,12 @@ static void aout_initwrite(section *sec)
     }
   }
 
+  /* now scan for absolute ORG-sections and add their aligned size to .text */
+  for (sec=firstsec; sec; sec=sec->next) {
+    if (sec->flags & ABSOLUTE)
+      secsize[_TEXT] += balign(secsize[_TEXT],sec->align) + get_sec_size(sec);
+  }
+
   secoffs[_TEXT] = 0;
   secoffs[_DATA] = secsize[_TEXT] + balign(secsize[_TEXT],SECT_ALIGN);
   secoffs[_BSS] = secoffs[_DATA] + secsize[_DATA] +
@@ -160,7 +179,7 @@ static void aout_initwrite(section *sec)
 }
 
 
-static unsigned long aout_addstr(char *s)
+static uint32_t aout_addstr(char *s)
 /* add a new symbol name to the string table and return its offset */
 {
   struct StrTabNode **chain = &aoutstrlist.hashtab[hashcode(s)%STRHTABSIZE];
@@ -187,7 +206,7 @@ static unsigned long aout_addstr(char *s)
 }
 
 
-static unsigned long aout_addsym(char *name,taddr value,int bind,
+static uint32_t aout_addsym(char *name,taddr value,int bind,
                                  int info,int type,int desc,int be)
 /* add a new symbol, return its symbol table index */
 {
@@ -264,8 +283,12 @@ static void aout_symconvert(symbol *sym,int symbind,int syminfo,int be)
     }
     else if (sym->sec) {
       /* address symbol */
-      type = sectype[sym->sec->idx] | ext;
-      val += secoffs[sym->sec->idx];  /* a.out requires to add sec. offset */
+      if (!(sym->flags & ABSLABEL)) {
+        type = sectype[sym->sec->idx] | ext;
+        val += secoffs[sym->sec->idx];  /* a.out requires to add sec. offset */
+      }
+      else  /* absolute ORG section: convert labels to ABS symbols */
+        type = N_ABS | ext;
     }
     else if (sym->type==EXPRESSION) {
       if (sym->flags & EXPORT) {
@@ -298,7 +321,7 @@ static void aout_addsymlist(symbol *sym,int bind,int type,int be)
   for (; sym; sym=sym->next) {
     /* ignore symbols preceded by a '.' and internal symbols */
     if ((sym->type!=IMPORT || (sym->flags&WEAK))
-        && *sym->name != '.' && *sym->name!=' ') {
+        && *sym->name != '.' && *sym->name!=' ' && !(sym->flags&VASMINTERN)) {
       int syminfo = aout_getinfo(sym);
       int symbind = aout_getbind(sym);
 
@@ -310,8 +333,8 @@ static void aout_addsymlist(symbol *sym,int bind,int type,int be)
 }
 
 
-static void aout_addreloclist(struct list *rlst,unsigned long raddr,
-                              unsigned long rindex,unsigned long rinfo,int be)
+static void aout_addreloclist(struct list *rlst,uint32_t raddr,
+                              uint32_t rindex,uint32_t rinfo,int be)
 /* add new relocation_info to .text or .data reloc-list */
 {
   struct RelocNode *rn = mymalloc(sizeof(struct RelocNode));
@@ -329,12 +352,12 @@ static void aout_addreloclist(struct list *rlst,unsigned long raddr,
 }
 
 
-static unsigned long aout_convert_rlist(int be,atom *a,int secid,
-                                        struct list *rlst,taddr pc,
-                          unsigned long (*getrinfo)(rlist *,int,char *,int))
+static uint32_t aout_convert_rlist(int be,atom *a,int secid,
+                                   struct list *rlst,taddr pc,
+                                   uint32_t (*getrinfo)(rlist *,int,char *,int))
 /* convert all of an atom's relocs into a.out relocations */
 {
-  unsigned long rsize = 0;
+  uint32_t rsize = 0;
   rlist *rl;
 
   if (a->type == DATA)
@@ -352,18 +375,24 @@ static unsigned long aout_convert_rlist(int be,atom *a,int secid,
     symbol *refsym = r->sym;
     taddr val = get_sym_value(refsym);
     taddr add = nreloc_real_addend(r);
+#if SDAHACK
+    int based = getrinfo(rl,-1,sections[secid]->name,be) != 0;
+#endif
 
-    if (refsym->type == LABSYM) {
+    if (LOCREF(refsym)) {
       /* this is a local relocation */
       int rsecid = refsym->sec->idx;
 
       aout_addreloclist(rlst,pc+(r->offset>>3),sectype[rsecid],
                         getrinfo(rl,0,sections[secid]->name,be),
                         be);
-      val += secoffs[rsecid];
+#if SDAHACK
+      if (!based)  /* @@@ 'based' does not really happen under Unix */
+#endif
+        val += secoffs[rsecid];
       rsize += sizeof(struct relocation_info);
     }
-    else if (refsym->type == IMPORT) {
+    else if (EXTREF(refsym)) {
       /* this is an external symbol reference */
       int symidx;
 
@@ -393,20 +422,18 @@ static unsigned long aout_convert_rlist(int be,atom *a,int secid,
 }
 
 
-static unsigned long aout_addrelocs(int be,int secid,struct list *rlst,
-                        unsigned long (*getrinfo)(rlist *,int,char *,int))
+static uint32_t aout_addrelocs(int be,int secid,struct list *rlst,
+                               uint32_t (*getrinfo)(rlist *,int,char *,int))
 /* creates a.out relocations for a single section (.text or .data) */
 {
-  unsigned long rtabsize=0;
+  uint32_t rtabsize=0;
 
   if (sections[secid]) {
     atom *a;
     taddr pc=0,npc;
 
     for (a=sections[secid]->first; a; a=a->next) {
-      int align = a->align;
-
-      npc = ((pc + align-1) / align) * align;
+      npc = pcalign(a,pc);
       rtabsize += aout_convert_rlist(be,a,secid,rlst,npc,getrinfo);
       pc = npc + atom_size(a,sections[secid],npc);
     }
@@ -415,11 +442,10 @@ static unsigned long aout_addrelocs(int be,int secid,struct list *rlst,
 }
 
 
-static void aout_header(FILE *f,unsigned long mag,unsigned long flag,
-                        unsigned long tsize,unsigned long dsize,
-                        unsigned long bsize,unsigned long syms,
-                        unsigned long entry,unsigned long trsize,
-                        unsigned long drsize,int be)
+static void aout_header(FILE *f,uint32_t mag,uint32_t flag,
+                        uint32_t tsize,uint32_t dsize,uint32_t bsize,
+                        uint32_t syms,uint32_t entry,
+                        uint32_t trsize,uint32_t drsize,int be)
 /* write an a.out header */
 {
   struct aout_hdr h;
@@ -441,13 +467,9 @@ static void aout_writesection(FILE *f,section *sec,taddr sec_align)
   if (sec) {
     atom *a;
     taddr pc=0,npc;
-    int align,i;
 
     for (a=sec->first; a; a=a->next) {
-      align = a->align;
-      npc = ((pc + align-1) / align) * align;
-      for (i=pc; i<npc; i++)
-        fw8(f,0);
+      npc = fwpcalign(f,a,sec,pc);
       if (a->type == DATA)
         fwdata(f,a->content.db->data,a->content.db->size);
       else if (a->type == SPACE)
@@ -459,6 +481,30 @@ static void aout_writesection(FILE *f,section *sec,taddr sec_align)
 }
 
 
+static void aout_writeorg(FILE *f,section *sec,taddr sec_align)
+/* write all absolute ORG-sections appended to .text */
+{
+  taddr pc = get_sec_size(sections[_TEXT]);
+  taddr npc;
+  atom *a;
+
+  for (; sec; sec=sec->next) {
+    if (sec->flags & ABSOLUTE) {
+      fwalign(f,pc,sec->align);
+      for (a=sec->first; a; a=a->next) {
+        npc = fwpcalign(f,a,sec,pc);
+        if (a->type == DATA)
+          fwdata(f,a->content.db->data,a->content.db->size);
+        else if (a->type == SPACE)
+          fwsblock(f,a->content.sb);
+        pc = npc + atom_size(a,sec,npc);
+      }
+    }
+  }
+  fwalign(f,pc,sec_align);
+}
+
+
 void aout_writerelocs(FILE *f,struct list *l)
 {
   struct RelocNode *rn;
@@ -492,7 +538,7 @@ void aout_writestrings(FILE *f,int be)
 static void write_output(FILE *f,section *sec,symbol *sym)
 {
   int be = BIGENDIAN;
-  unsigned long trsize,drsize;
+  uint32_t trsize,drsize;
 
   aout_initwrite(sec);
   aout_addsymlist(sym,BIND_GLOBAL,0,be);
@@ -510,7 +556,8 @@ static void write_output(FILE *f,section *sec,symbol *sym)
               secsize[_BSS],
               aoutsymlist.nextindex * sizeof(struct nlist32),
               0,trsize,drsize,be);
-  aout_writesection(f,sections[_TEXT],SECT_ALIGN);
+  aout_writesection(f,sections[_TEXT],0);
+  aout_writeorg(f,sec,SECT_ALIGN);
   aout_writesection(f,sections[_DATA],SECT_ALIGN);
   aout_writerelocs(f,&treloclist);
   aout_writerelocs(f,&dreloclist);
diff --git a/output_aout.h b/output_aout.h
index e0e555f..ec2ee64 100644
--- a/output_aout.h
+++ b/output_aout.h
@@ -3,14 +3,14 @@
 
 /* a.out header */
 struct aout_hdr {
-  unsigned char a_midmag[4];
-  unsigned char a_text[4];
-  unsigned char a_data[4];
-  unsigned char a_bss[4];
-  unsigned char a_syms[4];
-  unsigned char a_entry[4];
-  unsigned char a_trsize[4];
-  unsigned char a_drsize[4];
+  uint8_t a_midmag[4];
+  uint8_t a_text[4];
+  uint8_t a_data[4];
+  uint8_t a_bss[4];
+  uint8_t a_syms[4];
+  uint8_t a_entry[4];
+  uint8_t a_trsize[4];
+  uint8_t a_drsize[4];
 };
 
 /* a_magic */
@@ -54,8 +54,8 @@ struct aout_hdr {
 
 /* Relocation info structures */
 struct relocation_info {
-  unsigned char r_address[4];
-  unsigned char r_info[4];
+  uint8_t r_address[4];
+  uint8_t r_info[4];
 };
 
 #define RELB_symbolnum 0            /* ordinal number of add symbol */
@@ -82,11 +82,11 @@ struct relocation_info {
 
 /* Symbol table entry format */
 struct nlist32 {
-  unsigned char n_strx[4];  /* string table offset */
-  unsigned char n_type;     /* type defines */
-  signed char n_other;      /* spare */
-  unsigned char n_desc[2];  /* used by stab entries */
-  unsigned char n_value[4]; /* address/value of the symbol */
+  uint8_t n_strx[4];        /* string table offset */
+  uint8_t n_type;           /* type defines */
+  int8_t  n_other;          /* spare */
+  uint8_t n_desc[2];        /* used by stab entries */
+  uint8_t n_value[4];       /* address/value of the symbol */
 };
 
 #define N_EXT   0x01        /* external (global) bit, OR'ed in */
@@ -167,13 +167,13 @@ struct StrTabNode {
   struct node n;
   struct StrTabNode *hashchain;
   char *str;
-  unsigned long offset;
+  uint32_t offset;
 };
 
 struct StrTabList {
   struct list l;
   struct StrTabNode **hashtab;
-  unsigned long nextoffset;
+  uint32_t nextoffset;
 };
 
 struct SymbolNode {
@@ -181,13 +181,13 @@ struct SymbolNode {
   struct SymbolNode *hashchain;
   char *name;
   struct nlist32 s;
-  unsigned long index;
+  uint32_t index;
 };
 
 struct SymTabList {
   struct list l;
   struct SymbolNode **hashtab;
-  unsigned long nextindex;
+  uint32_t nextindex;
 };
 
 struct RelocNode {
@@ -197,13 +197,13 @@ struct RelocNode {
 
 
 #if defined(VASM_CPU_M68K)
-#define MID MID_SUN020
+/* MID defined in cpus/m68k/cpu.h */
 #elif defined(VASM_CPU_PPC)
 #define MID MID_POWERPC
 #elif defined(VASM_CPU_ARM)
 #define MID MID_ARM6
 #elif defined(VASM_CPU_X86)
 #define MID MID_PC386
-#else
+#elif defined(VASM_CPU_JAGRISC)
 #define MID (0)
 #endif
diff --git a/output_bin.c b/output_bin.c
index fd6abd7..28dd81d 100644
--- a/output_bin.c
+++ b/output_bin.c
@@ -1,20 +1,33 @@
 /* output_bin.c binary output driver for vasm */
-/* (c) in 2002-2009 by Volker Barthelmann */
+/* (c) in 2002-2009,2013,2015 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
-static char *copyright="vasm binary output module 1.6 (c) 2002-2009 Volker Barthelmann";
+static char *copyright="vasm binary output module 1.8 (c) 2002-2009,2013,2015 Volker Barthelmann";
 
 #define BINFMT_RAW      0
 #define BINFMT_CBMPRG   1   /* Commodore VIC-20/C-64 PRG format */
 static int binfmt = BINFMT_RAW;
 
 
+static int orgcmp(const void *sec1,const void *sec2)
+{
+  if ((utaddr)(*(section **)sec1)->org > (utaddr)(*(section **)sec2)->org)
+    return 1;
+  if ((utaddr)(*(section **)sec1)->org < (utaddr)(*(section **)sec2)->org)
+    return -1;
+
+  output_error(0);
+  return 0;
+}
+
+
 static void write_output(FILE *f,section *sec,symbol *sym)
 {
-  section *s,*s2;
+  section *s,*s2,**seclist,**slp;
   atom *p;
-  taddr pc,npc,i;
+  size_t nsecs;
+  unsigned long long pc,npc,i;
 
   if (!sec)
     return;
@@ -25,17 +38,26 @@ static void write_output(FILE *f,section *sec,symbol *sym)
   }
 
   /* we don't support overlapping sections */
-  for (s=sec; s; s=s->next) {
-    for (s2=sec; s2; s2=s2->next) {
-      if (s2!=s &&
-          ((s2->org >= s->org && s2->org < s->pc) ||
-           (s2->pc > s->org && s2->pc <= s->pc)))
+  for (s=sec,nsecs=0; s!=NULL; s=s->next) {
+    for (s2=s->next; s2; s2=s2->next) {
+      if (((ULLTADDR(s2->org) >= ULLTADDR(s->org) &&
+            ULLTADDR(s2->org) < ULLTADDR(s->pc)) ||
+           (ULLTADDR(s2->pc) > ULLTADDR(s->org) &&
+            ULLTADDR(s2->pc) <= ULLTADDR(s->pc))))
         output_error(0);
     }
+    nsecs++;
   }
 
+  /* make an array of section pointers, sorted by their start address */
+  seclist = (section **)mymalloc(nsecs * sizeof(section *));
+  for (s=sec,slp=seclist; s!=NULL; s=s->next)
+    *slp++ = s;
+  if (nsecs > 1)
+    qsort(seclist,nsecs,sizeof(section *),orgcmp);
+
   if (binfmt == BINFMT_CBMPRG) {
-    /* Commodore PRG header:
+    /* Commodore 6502 PRG header:
      * 00: LSB of load address
      * 01: MSB of load address
      */
@@ -43,20 +65,18 @@ static void write_output(FILE *f,section *sec,symbol *sym)
     fw8(f,(sec->org>>8)&0xff);
   }
 
-  for (s=sec; s; s=s->next) {
-    if (s!=sec && s->org>pc) {
+  for (slp=seclist; nsecs>0; nsecs--) {
+    s = *slp++;
+    if (s!=seclist[0] && ULLTADDR(s->org)>pc) {
       /* fill gap between sections with zeros */
-      for (; pc<s->org; pc++)
+      for (; pc<ULLTADDR(s->org); pc++)
         fw8(f,0);
     }
     else
-      pc = s->org;
+      pc = ULLTADDR(s->org);
 
     for (p=s->first; p; p=p->next) {
-      npc = (pc + p->align - 1) / p->align * p->align;
-      for (i=0; i<npc-pc; i++)
-        fw8(f,0);
-
+      npc = fwpcalign(f,p,s,pc);
       if (p->type == DATA) {
         for (i=0; i<p->content.db->size; i++)
           fw8(f,(unsigned char)p->content.db->data[i]);
@@ -67,6 +87,7 @@ static void write_output(FILE *f,section *sec,symbol *sym)
       pc = npc + atom_size(p,s,npc);
     }
   }
+  free(seclist);
 }
 
 
diff --git a/output_elf.c b/output_elf.c
index df265d6..f430413 100644
--- a/output_elf.c
+++ b/output_elf.c
@@ -1,15 +1,20 @@
 /* output_elf.c ELF output driver for vasm */
-/* (c) in 2002-2010 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 #include "vasm.h"
 #include "output_elf.h"
 #if ELFCPU
-static char *copyright="vasm ELF output module 1.5 (c)2002-2010 Frank Wille";
-const int cpu = ELFCPU;
+static char *copyright="vasm ELF output module 2.2 (c) 2002-2015 Frank Wille";
+static int be,cpu;
+static unsigned elfrelsize,shtreloc;
 
 static struct list shdrlist,symlist,relalist;
 static struct StrTabList shstrlist,strlist;
-static unsigned symindex;
+
+static unsigned symtabidx,strtabidx,shstrtabidx;
+static unsigned symindex,shdrindex;
+static unsigned stabidx,stabstridx;
+static utaddr stabsize,stabstrsize;
 
 
 static unsigned addString(struct StrTabList *sl,char *s)
@@ -24,25 +29,42 @@ static unsigned addString(struct StrTabList *sl,char *s)
 }
 
 
-static struct Shdr32Node *addShdr32(struct list *l)
+static void init_lists(void)
+{
+  initlist(&shdrlist);
+  initlist(&symlist);
+  initlist(&relalist);
+  shstrlist.index = strlist.index = 0;
+  initlist(&shstrlist.l);
+  initlist(&strlist.l);
+  symindex = shdrindex = stabidx = stabstridx = 0;
+  addString(&shstrlist,"");  /* first string is always "" */
+  symtabidx = addString(&shstrlist,".symtab");
+  strtabidx = addString(&shstrlist,".strtab");
+  shstrtabidx = addString(&shstrlist,".shstrtab");
+  addString(&strlist,"");
+}
+
+
+static struct Shdr32Node *addShdr32(void)
 {
   struct Shdr32Node *s = mycalloc(sizeof(struct Shdr32Node));
 
-  addtail(l,&(s->n));
+  addtail(&shdrlist,&(s->n));
   return s;
 }
 
 
-static struct Shdr64Node *addShdr64(struct list *l)
+static struct Shdr64Node *addShdr64(void)
 {
   struct Shdr64Node *s = mycalloc(sizeof(struct Shdr64Node));
 
-  addtail(l,&(s->n));
+  addtail(&shdrlist,&(s->n));
   return s;
 }
 
 
-static struct Symbol32Node *addSymbol32(int be,char *name)
+static struct Symbol32Node *addSymbol32(char *name)
 {
   struct Symbol32Node *sn = mycalloc(sizeof(struct Symbol32Node));
 
@@ -56,7 +78,7 @@ static struct Symbol32Node *addSymbol32(int be,char *name)
 }
 
 
-static struct Symbol64Node *addSymbol64(int be,char *name)
+static struct Symbol64Node *addSymbol64(char *name)
 {
   struct Symbol64Node *sn = mycalloc(sizeof(struct Symbol64Node));
 
@@ -70,40 +92,76 @@ static struct Symbol64Node *addSymbol64(int be,char *name)
 }
 
 
-static void addRel32(int be,taddr o,taddr a,taddr i)
+static void newSym32(char *name,elfull value,elfull size,uint8_t bind,
+                     uint8_t type,unsigned shndx)
 {
-  struct RelocNode *rn = mymalloc(sizeof(struct RelocNode));
+  struct Symbol32Node *elfsym = addSymbol32(name);
 
-  setval(be,rn->r.r_offset,4,o);
-#if RELA
-  setval(be,rn->r.r_addend,4,a);
-#endif
-  setval(be,rn->r.r_info,4,i);
-  addtail(&relalist,&(rn->n));
+  setval(be,elfsym->s.st_value,4,value);
+  setval(be,elfsym->s.st_size,4,size);
+  elfsym->s.st_info[0] = ELF32_ST_INFO(bind,type);
+  setval(be,elfsym->s.st_shndx,2,shndx);
 }
 
 
-static void addRel64(int be,taddr o,taddr a,taddr i)
+static void newSym64(char *name,elfull value,elfull size,uint8_t bind,
+                     uint8_t type,unsigned shndx)
 {
-  struct RelocNode *rn = mymalloc(sizeof(struct RelocNode));
+  struct Symbol64Node *elfsym = addSymbol64(name);
 
-  setval(be,rn->r.r_offset,8,o);
-#if RELA
-  setval(be,rn->r.r_addend,8,a);
-#endif
-  setval(be,rn->r.r_info,8,i);
-  addtail(&relalist,&(rn->n));
+  setval(be,elfsym->s.st_value,8,value);
+  setval(be,elfsym->s.st_size,8,size);
+  elfsym->s.st_info[0] = ELF64_ST_INFO(bind,type);
+  setval(be,elfsym->s.st_shndx,2,shndx);
+}
+
+
+static void addRel32(elfull o,elfull a,elfull i,elfull r)
+{
+  if (RELA) {
+    struct Rela32Node *rn = mymalloc(sizeof(struct Rela32Node));
+
+    setval(be,rn->r.r_offset,4,o);
+    setval(be,rn->r.r_addend,4,a);
+    setval(be,rn->r.r_info,4,ELF32_R_INFO(i,r));
+    addtail(&relalist,&(rn->n));
+  }
+  else {
+    struct Rel32Node *rn = mymalloc(sizeof(struct Rel32Node));
+
+    setval(be,rn->r.r_offset,4,o);
+    setval(be,rn->r.r_info,4,ELF32_R_INFO(i,r));
+    addtail(&relalist,&(rn->n));
+  }
+}
+
+
+static void addRel64(elfull o,elfull a,elfull i,elfull r)
+{
+  if (RELA) {
+    struct Rela64Node *rn = mymalloc(sizeof(struct Rela64Node));
+
+    setval(be,rn->r.r_offset,8,o);
+    setval(be,rn->r.r_addend,8,a);
+    setval(be,rn->r.r_info,8,ELF64_R_INFO(i,r));
+    addtail(&relalist,&(rn->n));
+  }
+  else {
+    struct Rel64Node *rn = mymalloc(sizeof(struct Rel64Node));
+
+    setval(be,rn->r.r_offset,8,o);
+    setval(be,rn->r.r_info,8,ELF64_R_INFO(i,r));
+    addtail(&relalist,&(rn->n));
+  }
 }
 
 
-static struct Shdr32Node *makeShdr32(int be,struct list *shlst,
-                                     taddr name,taddr type, taddr flags,
-                                     taddr offset,taddr size,taddr info,
-                                     taddr align,taddr entsize)
+static void *makeShdr32(elfull name,elfull type,elfull flags,elfull offset,
+                        elfull size,elfull info,elfull align,elfull entsize)
 {
   struct Shdr32Node *shn;
 
-  shn = addShdr32(shlst);
+  shn = addShdr32();
   setval(be,shn->s.sh_name,4,name);
   setval(be,shn->s.sh_type,4,type);
   setval(be,shn->s.sh_flags,4,flags);
@@ -117,14 +175,12 @@ static struct Shdr32Node *makeShdr32(int be,struct list *shlst,
 }
 
 
-static struct Shdr64Node *makeShdr64(int be,struct list *shlst,
-                                     taddr name,taddr type, taddr flags,
-                                     taddr offset,taddr size,taddr info,
-                                     taddr align,taddr entsize)
+static void *makeShdr64(elfull name,elfull type,elfull flags,elfull offset,
+                        elfull size,elfull info,elfull align,elfull entsize)
 {
   struct Shdr64Node *shn;
 
-  shn = addShdr64(shlst);
+  shn = addShdr64();
   setval(be,shn->s.sh_name,4,name);
   setval(be,shn->s.sh_type,4,type);
   setval(be,shn->s.sh_flags,8,flags);
@@ -141,7 +197,7 @@ static struct Shdr64Node *makeShdr64(int be,struct list *shlst,
 static unsigned findelfsymbol(char *name)
 /* find symbol with given name in symlist, return its index */
 {
-  /* works for Symbol64Node too! */
+  /* also works for lists with Symbol64Node! */
   struct Symbol32Node *nextsym,*sym = (struct Symbol32Node *)symlist.first;
   unsigned sidx = 0;
 
@@ -156,26 +212,27 @@ static unsigned findelfsymbol(char *name)
 }
 
 
-static void init_ident(unsigned char *id,unsigned char class,
-                       unsigned char endian)
+static void init_ident(unsigned char *id,uint8_t class)
 {
   static char elfid[4] = { 0x7f,'E','L','F' };
 
   memcpy(&id[EI_MAG0],elfid,4);
   id[EI_CLASS] = class;
-  id[EI_DATA] = endian;
+  id[EI_DATA] = be ? ELFDATA2MSB : ELFDATA2LSB;
   id[EI_VERSION] = EV_CURRENT;
   memset(&id[EI_PAD],0,EI_NIDENT-EI_PAD);
 }
 
 
-static unsigned long get_sec_type(section *s)
+static uint32_t get_sec_type(section *s)
 /* scan section attributes for type */
 {
   char *a = s->attr;
 
   if (!strncmp(s->name,".note",5))
     return SHT_NOTE;
+  else if (!strcmp(s->name,".stabstr"))
+    return SHT_STRTAB;
 
   while (*a) {
     switch (*a++) {
@@ -195,10 +252,10 @@ static unsigned long get_sec_type(section *s)
 }
 
 
-static taddr get_sec_flags(char *a)
+static utaddr get_sec_flags(char *a)
 /* scan section attributes for flags (read, write, alloc, execute) */
 {
-  taddr f = 0;
+  utaddr f = 0;
 
   while (*a) {
     switch (*a++) {
@@ -217,7 +274,7 @@ static taddr get_sec_flags(char *a)
 }
 
 
-static unsigned char get_sym_info(symbol *s)
+static uint8_t get_sym_info(symbol *s)
 /* determine symbol-info: function, object, section, etc. */
 {
   switch (TYPE(s)) {
@@ -246,13 +303,13 @@ static unsigned get_sym_index(symbol *s)
 }
 
 
-static taddr get_reloc_type(rlist **rl,
-                            taddr *roffset,taddr *addend,symbol **refsym)
+static utaddr get_reloc_type(rlist **rl,
+                             utaddr *roffset,taddr *addend,symbol **refsym)
 {
   rlist *rl2;
-  taddr mask,offset;
+  utaddr mask,offset;
   int size;
-  taddr t = 0;
+  utaddr t = 0;
 
   *roffset = 0;
   *addend = 0;
@@ -271,7 +328,16 @@ static taddr get_reloc_type(rlist **rl,
 #endif
 
 #ifdef VASM_CPU_X86
+  if (bytespertaddr == 8) {
+#include "elf_reloc_x86_64.h"
+  }
+  else {
 #include "elf_reloc_386.h"
+  }
+#endif
+
+#ifdef VASM_CPU_JAGRISC
+#include "elf_reloc_jag.h"
 #endif
 
   if (t)
@@ -283,36 +349,38 @@ static taddr get_reloc_type(rlist **rl,
 }
 
 
-static taddr make_relocs32(int be,rlist *rl,taddr pc)
-/* convert all of an atom's relocs into ELF32 relocs */
+static utaddr make_relocs(rlist *rl,utaddr pc,
+                          void (*newsym)(char *,elfull,elfull,uint8_t,
+                                         uint8_t,unsigned),
+                          void (*addrel)(elfull,elfull,elfull,elfull))
+/* convert all of an atom's relocations into ELF32/ELF64 relocs */
 {
-  taddr ro = 0;
+  utaddr ro = 0;
 
   if (rl) {
     do {
-      taddr rtype,offset,addend;
+      utaddr rtype,offset;
+      taddr addend;
       symbol *refsym;
 
       if (rtype = get_reloc_type(&rl,&offset,&addend,&refsym)) {
-        if (refsym->type == LABSYM) {
+
+        if (LOCREF(refsym)) {
           /* this is a local relocation */
-          addRel32(be,pc+offset,addend,ELF32_R_INFO(refsym->sec->idx,rtype));
-          ro += sizeof(struct ElfReloc);
+          addrel(pc+offset,addend,refsym->sec->idx,rtype);
+          ro += elfrelsize;
         }
-        else if (refsym->type == IMPORT) {
+        else if (EXTREF(refsym)) {
           /* this is an external symbol reference */
           unsigned idx = findelfsymbol(refsym->name);
 
           if (idx == 0) {
             /* create a new symbol, which can be referenced */
-            struct Symbol32Node *elfsym;;
-
             idx = symindex;
-            elfsym = addSymbol32(be,refsym->name);
-            elfsym->s.st_info[0] = ELF32_ST_INFO(STB_GLOBAL,STT_NOTYPE);
+            newsym(refsym->name,0,0,STB_GLOBAL,STT_NOTYPE,0);
           }
-          addRel32(be,pc+offset,addend,ELF32_R_INFO(idx,rtype));
-          ro += sizeof(struct ElfReloc);
+          addrel(pc+offset,addend,idx,rtype);
+          ro += elfrelsize;
         }
         else
           ierror(0);
@@ -320,79 +388,30 @@ static taddr make_relocs32(int be,rlist *rl,taddr pc)
     }
     while (rl = rl->next);
   }
-  return ro;
-}
-
 
-static void write_ELF64(FILE *f,section *sec,symbol *sym)
-{
-  int be = BIGENDIAN;   /* true for big endian */
-
-  ierror(0);  /* FIXME */
+  return ro;
 }
 
 
-static void write_ELF32(FILE *f,section *sec,symbol *sym)
+static utaddr prog_sec_hdrs(section *sec,utaddr soffset,
+                            void *(*makeshdr)(elfull,elfull,elfull,elfull,
+                                              elfull,elfull,elfull,elfull),
+                            void (*newsym)(char *,elfull,elfull,
+                                           uint8_t,uint8_t,
+                                           unsigned))
 {
-  struct Elf32_Ehdr header;
-  int be = BIGENDIAN;   /* true for big endian */
-  int shdr_size = sizeof(struct Elf32_Shdr);
-  unsigned symtabidx,strtabidx,shstrtabidx;
-  unsigned shdrindex=0,firstglobal;
-  unsigned stabidx=0,stabstridx=0;
-  taddr stabsize,stabstrsize;
-  taddr roffset=0,soffset=sizeof(struct Elf32_Ehdr),align1,align2;
-  int i;
   section *secp;
-  symbol *symp;
-  struct Shdr32Node *shn;
-  struct Symbol32Node *elfsym;
-  struct StrTabNode *stn;
-  struct RelocNode *rn;
-
-  /* initialize ELF header */
-  memset(&header,0,sizeof(struct Elf32_Ehdr));
-  init_ident(header.e_ident,ELFCLASS32,be ? ELFDATA2MSB : ELFDATA2LSB);
-  setval(be,header.e_type,2,ET_REL);
-  setval(be,header.e_machine,2,cpu);
-  setval(be,header.e_version,4,EV_CURRENT);
-#ifdef VASM_CPU_ARM
-  setval(be,header.e_flags,4,0x04000000);  /* EABI version 4 */
-#endif
-  setval(be,header.e_ehsize,2,sizeof(struct Elf32_Ehdr));
-  setval(be,header.e_shentsize,2,shdr_size);
-
-  /* init lists */
-  initlist(&shdrlist);
-  initlist(&symlist);
-  initlist(&relalist);
-  shstrlist.index = strlist.index = 0;
-  initlist(&shstrlist.l);
-  initlist(&strlist.l);
-  addString(&shstrlist,"");  /* first string is always "" */
-  symtabidx = addString(&shstrlist,".symtab");
-  strtabidx = addString(&shstrlist,".strtab");
-  shstrtabidx = addString(&shstrlist,".shstrtab");
-  addShdr32(&shdrlist);  /* first section header is always zero */
-  addString(&strlist,"");
-  symindex = 0;
-  addSymbol32(be,NULL);  /* first symbol is empty */
+  void *shn;
 
   /* generate section headers for program sections */
   for (secp=sec; secp; secp=secp->next) {
-    if (get_sec_size(secp)>0 || (secp->flags & HAS_SYMBOLS)) {
-      unsigned long type = get_sec_type(secp);
+    if (get_sec_size(secp)!=0 || (secp->flags & HAS_SYMBOLS)) {
+      uint32_t type = get_sec_type(secp);
 
-      shn = makeShdr32(be,&shdrlist,addString(&shstrlist,secp->name),
-                       type,get_sec_flags(secp->attr),soffset,
-                       get_sec_size(secp),0,secp->align,0);
       secp->idx = ++shdrindex;
-      if (type != SHT_NOBITS)
-        soffset += get_sec_size(secp);
 
       if (!strcmp(secp->name,".stabstr")) {
         stabstridx = shdrindex;
-        setval(be,shn->s.sh_type,4,SHT_STRTAB);
         stabstrsize = get_sec_size(secp);
       }
       else if (!strcmp(secp->name,".stab")) {
@@ -400,142 +419,125 @@ static void write_ELF32(FILE *f,section *sec,symbol *sym)
         stabsize = (get_sec_size(secp) / 12) - 1;  /* 12: sizeof(nlist32) */
       }
 
+      shn = makeshdr(addString(&shstrlist,secp->name),
+                     type,get_sec_flags(secp->attr),soffset,
+                     get_sec_size(secp),0,secp->align,0);
+
+      if (type != SHT_NOBITS)
+        soffset += get_sec_size(secp);
+
       /* add section base symbol */
-      elfsym = addSymbol32(be,NULL);
-      elfsym->s.st_info[0] = ELF32_ST_INFO(STB_LOCAL,STT_SECTION);
-      setval(be,elfsym->s.st_shndx,2,shdrindex);
+      newsym(NULL,0,0,STB_LOCAL,STT_SECTION,shdrindex);
     }
     else
       secp->idx = 0;
   }
 
-  /* file name symbol */
-  if (filename) {
-    elfsym = addSymbol32(be,filename);
-    elfsym->s.st_info[0] = ELF32_ST_INFO(STB_LOCAL,STT_FILE);
-    setval(be,elfsym->s.st_shndx,2,SHN_ABS);
-  }
+  return soffset;
+}
+
+
+static unsigned build_symbol_table(symbol *first,
+                                   void (*newsym)(char *,elfull,elfull,
+                                                  uint8_t,uint8_t,
+                                                  unsigned))
+{
+  symbol *symp;
+  unsigned firstglobal;
+
+  /* file name symbol, when defined */
+  if (filename)
+    newsym(filename,0,0,STB_LOCAL,STT_FILE,SHN_ABS);
+
+  if (!no_symbols)  /* symbols with local binding first */
+    for (symp=first; symp; symp=symp->next)
+      if (*symp->name!='.' && *symp->name!=' ' && !(symp->flags&VASMINTERN))
+        if (symp->type!=IMPORT && !(symp->flags & (EXPORT|WEAK)))
+          newsym(symp->name,get_sym_value(symp),get_sym_size(symp),
+                 STB_LOCAL,get_sym_info(symp),get_sym_index(symp));
 
-  /* build symbol table */
-  if (!no_symbols) {
-    for (symp=sym; symp; symp=symp->next) {  /* local binding first */
-      /* ignore symbols preceded by '.' and ' ' (local/internal symbols) */
-      if (*symp->name!='.' && *symp->name!=' ') {
-        if (symp->type!=IMPORT && !(symp->flags & (EXPORT|WEAK))) {
-          elfsym = addSymbol32(be,symp->name);
-          setval(be,elfsym->s.st_value,4,get_sym_value(symp));
-          setval(be,elfsym->s.st_size,4,get_sym_size(symp));
-          elfsym->s.st_info[0] = ELF32_ST_INFO(STB_LOCAL,get_sym_info(symp));
-          setval(be,elfsym->s.st_shndx,2,get_sym_index(symp));
-        }
-      }
-    }
-  }
   firstglobal = symindex;  /* now the global and weak symbols */
-  for (symp=sym; symp; symp=symp->next) {
-    if (*symp->name != '.') {  /* ignore symbols preceded by a '.' */
+
+  for (symp=first; symp; symp=symp->next)
+    if (*symp->name != '.'  && !(symp->flags&VASMINTERN))
       if ((symp->type!=IMPORT && (symp->flags & (EXPORT|WEAK))) ||
-          (symp->type==IMPORT && (symp->flags & (COMMON|WEAK)))) {
-        elfsym = addSymbol32(be,symp->name);
-        setval(be,elfsym->s.st_value,4,get_sym_value(symp));
-        setval(be,elfsym->s.st_size,4,get_sym_size(symp));
-        elfsym->s.st_info[0] = ELF32_ST_INFO(symp->flags & WEAK ?
-                                             STB_WEAK : STB_GLOBAL,
-                                             get_sym_info(symp));
-        setval(be,elfsym->s.st_shndx,2,get_sym_index(symp));
-      }
-    }
-  }
+          (symp->type==IMPORT && (symp->flags & (COMMON|WEAK))))
+        newsym(symp->name,get_sym_value(symp),get_sym_size(symp),
+               (symp->flags & WEAK) ? STB_WEAK : STB_GLOBAL,
+               get_sym_info(symp),get_sym_index(symp));
+
+  return firstglobal;
+}
+
+
+static void make_reloc_sections(section *sec,
+                                void (*newsym)(char *,elfull,elfull,
+                                               uint8_t,uint8_t,
+                                               unsigned),
+                                void (*addrel)(elfull,elfull,elfull,elfull),
+                                void *(*makeshdr)(elfull,elfull,elfull,elfull,
+                                                  elfull,elfull,elfull,elfull))
+{
+  utaddr roffset = 0;
+  section *secp;
 
   /* ".rela.xxx" or ".rel.xxx" relocation sections */
   for (secp=sec; secp; secp=secp->next) {
     if (secp->idx) {
       atom *a;
-      taddr pc=0,npc,basero=roffset;
+      utaddr pc=0,npc,basero=roffset;
 
       for (a=secp->first; a; a=a->next) {
-        int align = a->align;
-
-        npc = ((pc + align-1) / align) * align;
+        npc = pcalign(a,pc);
         if (a->type == DATA)
-          roffset += make_relocs32(be,a->content.db->relocs,npc);
+          roffset += make_relocs(a->content.db->relocs,npc,newsym,addrel);
         if (a->type == SPACE)
-          roffset += make_relocs32(be,a->content.sb->relocs,npc);
+          roffset += make_relocs(a->content.sb->relocs,npc,newsym,addrel);
         pc = npc + atom_size(a,secp,npc);
       }
+
       if (basero != roffset) {  /* were there any relocations? */
         /* create .relaXX section header */
         char *sname = mymalloc(strlen(secp->name) + 6);
 
-#if RELA
-        sprintf(sname,".rela%s",secp->name);
-#else
-        sprintf(sname,".rel%s",secp->name);
-#endif
-        makeShdr32(be,&shdrlist,addString(&shstrlist,sname),SHT_RELOC,0,
-                   basero, /* relative offset - will be corrected later! */
-                   roffset-basero,secp->idx,4,sizeof(struct ElfReloc));
+        if (RELA)
+          sprintf(sname,".rela%s",secp->name);
+        else
+          sprintf(sname,".rel%s",secp->name);
+
+        makeshdr(addString(&shstrlist,sname),shtreloc,0,
+                 basero, /* relative offset - will be fixed later! */
+                 roffset-basero,secp->idx,bytespertaddr,elfrelsize);
         ++shdrindex;
       }
     }
   }
-
-  /* ".shstrtab" section header string table */
-  ++shdrindex;
-  makeShdr32(be,&shdrlist,shstrtabidx,SHT_STRTAB,0,
-             soffset,shstrlist.index,0,1,0);
-  soffset += shstrlist.index;
-  align1 = ((soffset + 3) & ~3) - soffset;
-  soffset += align1;
-
-  /* set last values in ELF header */
-  setval(be,header.e_shoff,4,soffset);  /* remember offset of Shdr table */
-  soffset += (shdrindex+3)*sizeof(struct Elf32_Shdr);
-  setval(be,header.e_shstrndx,2,shdrindex);
-  setval(be,header.e_shnum,2,shdrindex+3);
-
-  /* ".symtab" symbol table */
-  ++shdrindex;
-  shn = makeShdr32(be,&shdrlist,symtabidx,SHT_SYMTAB,0,soffset,
-                   symindex*sizeof(struct Elf32_Sym),
-                   firstglobal,4,sizeof(struct Elf32_Sym));
-  setval(be,shn->s.sh_link,4,shdrindex+1);  /* associated .strtab section */
-  soffset += symindex * sizeof(struct Elf32_Sym);
-
-  /* ".strtab" string table */
-  makeShdr32(be,&shdrlist,strtabidx,SHT_STRTAB,0,
-             soffset,strlist.index,0,1,0);
-  soffset += strlist.index;
-  align2 = ((soffset + 3) & ~3) - soffset;
-  soffset += align2;  /* offset for first Reloc-entry */
+}
 
 
-  /* write ELF header */
-  fwdata(f,&header,sizeof(struct Elf32_Ehdr));
+static void write_section_data(FILE *f,section *sec)
+{
+  section *secp;
 
-  /* write initialized section contents */
   for (secp=sec; secp; secp=secp->next) {
     if (secp->idx && get_sec_type(secp)!=SHT_NOBITS) {
       atom *a;
-      taddr pc=0,npc;
-      int align;
+      utaddr pc=0,npc;
 
       if (secp->idx == stabidx) {
         /* patch compilation unit header */
         a = secp->first;
         if (a->content.db->size == 12) {
-          unsigned char *p = a->content.db->data;
+          uint8_t *p = a->content.db->data;
 
           setval(be,p,4,1);  /* refers to first string from .stabstr */
           setval(be,p+4,4,stabsize);
           setval(be,p+8,4,stabstrsize);
         }
       }
+
       for (a=secp->first; a; a=a->next) {
-        align = a->align;
-        npc = ((pc + align-1) / align) * align;
-        for (i=pc; i<npc; i++)
-          fw8(f,0);
+        npc = fwpcalign(f,a,secp,pc);
 
         if (a->type == DATA) {
           fwdata(f,a->content.db->data,a->content.db->size);
@@ -548,10 +550,193 @@ static void write_ELF32(FILE *f,section *sec,symbol *sym)
       }
     }
   }
+}
 
-  /* write .shstrtab string table */
-  while (stn = (struct StrTabNode *)remhead(&shstrlist.l))
+
+static void write_strtab(FILE *f,struct StrTabList *strl)
+{
+  struct StrTabNode *stn;
+
+  while (stn = (struct StrTabNode *)remhead(&(strl->l)))
     fwdata(f,stn->str,strlen(stn->str)+1);
+}
+
+
+static void write_ELF64(FILE *f,section *sec,symbol *sym)
+{
+  struct Elf64_Ehdr header;
+  unsigned firstglobal,align1,align2,i;
+  utaddr soffset=sizeof(struct Elf64_Ehdr);
+  struct Shdr64Node *shn;
+  struct Symbol64Node *elfsym;
+
+  elfrelsize = RELA ? sizeof(struct Elf64_Rela) : sizeof(struct Elf64_Rel);
+
+  /* initialize ELF header */
+  memset(&header,0,sizeof(struct Elf64_Ehdr));
+  init_ident(header.e_ident,ELFCLASS64);
+  setval(be,header.e_type,2,ET_REL);
+  setval(be,header.e_machine,2,cpu);
+  setval(be,header.e_version,4,EV_CURRENT);
+  setval(be,header.e_ehsize,2,sizeof(struct Elf64_Ehdr));
+  setval(be,header.e_shentsize,2,sizeof(struct Elf64_Shdr));
+
+  init_lists();
+  addShdr64();        /* first section header is always zero */
+  addSymbol64(NULL);  /* first symbol is empty */
+
+  /* make program section headers, symbols and relocations */
+  soffset = prog_sec_hdrs(sec,soffset,makeShdr64,newSym64);
+  firstglobal = build_symbol_table(sym,newSym64);
+  make_reloc_sections(sec,newSym64,addRel64,makeShdr64);
+
+  /* ".shstrtab" section header string table */
+  ++shdrindex;
+  makeShdr64(shstrtabidx,SHT_STRTAB,0,
+             soffset,shstrlist.index,0,1,0);
+  soffset += shstrlist.index;
+  align1 = ((soffset + 3) & ~3) - soffset;
+  soffset += align1;
+
+  /* set last values in ELF header */
+  setval(be,header.e_shoff,8,soffset);  /* remember offset of Shdr table */
+  soffset += (shdrindex+3)*sizeof(struct Elf64_Shdr);
+  setval(be,header.e_shstrndx,2,shdrindex);
+  setval(be,header.e_shnum,2,shdrindex+3);
+
+  /* ".symtab" symbol table */
+  ++shdrindex;
+  shn = makeShdr64(symtabidx,SHT_SYMTAB,0,soffset,
+                   symindex*sizeof(struct Elf64_Sym),
+                   firstglobal,8,sizeof(struct Elf64_Sym));
+  setval(be,shn->s.sh_link,4,shdrindex+1);  /* associated .strtab section */
+  soffset += symindex * sizeof(struct Elf64_Sym);
+
+  /* ".strtab" string table */
+  makeShdr64(strtabidx,SHT_STRTAB,0,soffset,strlist.index,0,1,0);
+  soffset += strlist.index;
+  align2 = ((soffset + 3) & ~3) - soffset;
+  soffset += align2;  /* offset for first Reloc-entry */
+
+  /* write ELF header */
+  fwdata(f,&header,sizeof(struct Elf64_Ehdr));
+
+  /* write initialized section contents */
+  write_section_data(f,sec);
+
+  /* write .shstrtab string table */
+  write_strtab(f,&shstrlist);
+
+  /* write section headers */
+  for (i=0; i<align1; i++)
+    fw8(f,0);
+  i = 0;
+  while (shn = (struct Shdr64Node *)remhead(&shdrlist)) {
+    if (i == stabidx) {
+      /* set link to stabstr table for .stab section */
+      setval(be,shn->s.sh_link,4,stabstridx);
+    }
+    if (readval(be,shn->s.sh_type,4) == shtreloc) {
+      /* set correct offset and link to symtab */
+      setval(be,shn->s.sh_offset,8,readval(be,shn->s.sh_offset,8)+soffset);
+      setval(be,shn->s.sh_link,4,shdrindex); /* index of associated symtab */
+    }
+    fwdata(f,&(shn->s),sizeof(struct Elf64_Shdr));
+    i++;
+  }
+
+  /* write symbol table */
+  while (elfsym = (struct Symbol64Node *)remhead(&symlist))
+    fwdata(f,&(elfsym->s),sizeof(struct Elf64_Sym));
+
+  /* write .strtab string table */
+  write_strtab(f,&strlist);
+
+  /* write relocations */
+  for (i=0; i<align2; i++)
+    fw8(f,0);
+  if (RELA) {
+    struct Rela64Node *rn;
+
+    while (rn = (struct Rela64Node *)remhead(&relalist))
+      fwdata(f,&(rn->r),sizeof(struct Elf64_Rela));
+  }
+  else {
+    struct Rel64Node *rn;
+
+    while (rn = (struct Rel64Node *)remhead(&relalist))
+      fwdata(f,&(rn->r),sizeof(struct Elf64_Rel));
+  }
+}
+
+
+static void write_ELF32(FILE *f,section *sec,symbol *sym)
+{
+  struct Elf32_Ehdr header;
+  unsigned firstglobal,align1,align2,i;
+  utaddr soffset=sizeof(struct Elf32_Ehdr);
+  struct Shdr32Node *shn;
+  struct Symbol32Node *elfsym;
+
+  elfrelsize = RELA ? sizeof(struct Elf32_Rela) : sizeof(struct Elf32_Rel);
+
+  /* initialize ELF header */
+  memset(&header,0,sizeof(struct Elf32_Ehdr));
+  init_ident(header.e_ident,ELFCLASS32);
+  setval(be,header.e_type,2,ET_REL);
+  setval(be,header.e_machine,2,cpu);
+  setval(be,header.e_version,4,EV_CURRENT);
+#ifdef VASM_CPU_ARM
+  setval(be,header.e_flags,4,0x04000000);  /* EABI version 4 */
+#endif
+  setval(be,header.e_ehsize,2,sizeof(struct Elf32_Ehdr));
+  setval(be,header.e_shentsize,2,sizeof(struct Elf32_Shdr));
+
+  init_lists();
+  addShdr32();        /* first section header is always zero */
+  addSymbol32(NULL);  /* first symbol is empty */
+
+  /* make program section headers, symbols and relocations */
+  soffset = prog_sec_hdrs(sec,soffset,makeShdr32,newSym32);
+  firstglobal = build_symbol_table(sym,newSym32);
+  make_reloc_sections(sec,newSym32,addRel32,makeShdr32);
+
+  /* ".shstrtab" section header string table */
+  ++shdrindex;
+  makeShdr32(shstrtabidx,SHT_STRTAB,0,
+             soffset,shstrlist.index,0,1,0);
+  soffset += shstrlist.index;
+  align1 = ((soffset + 3) & ~3) - soffset;
+  soffset += align1;
+
+  /* set last values in ELF header */
+  setval(be,header.e_shoff,4,soffset);  /* remember offset of Shdr table */
+  soffset += (shdrindex+3)*sizeof(struct Elf32_Shdr);
+  setval(be,header.e_shstrndx,2,shdrindex);
+  setval(be,header.e_shnum,2,shdrindex+3);
+
+  /* ".symtab" symbol table */
+  ++shdrindex;
+  shn = makeShdr32(symtabidx,SHT_SYMTAB,0,soffset,
+                   symindex*sizeof(struct Elf32_Sym),
+                   firstglobal,4,sizeof(struct Elf32_Sym));
+  setval(be,shn->s.sh_link,4,shdrindex+1);  /* associated .strtab section */
+  soffset += symindex * sizeof(struct Elf32_Sym);
+
+  /* ".strtab" string table */
+  makeShdr32(strtabidx,SHT_STRTAB,0,soffset,strlist.index,0,1,0);
+  soffset += strlist.index;
+  align2 = ((soffset + 3) & ~3) - soffset;
+  soffset += align2;  /* offset for first Reloc-entry */
+
+  /* write ELF header */
+  fwdata(f,&header,sizeof(struct Elf32_Ehdr));
+
+  /* write initialized section contents */
+  write_section_data(f,sec);
+
+  /* write .shstrtab string table */
+  write_strtab(f,&shstrlist);
 
   /* write section headers */
   for (i=0; i<align1; i++)
@@ -562,7 +747,7 @@ static void write_ELF32(FILE *f,section *sec,symbol *sym)
       /* set link to stabstr table for .stab section */
       setval(be,shn->s.sh_link,4,stabstridx);
     }
-    if (readval(be,shn->s.sh_type,4) == SHT_RELOC) {
+    if (readval(be,shn->s.sh_type,4) == shtreloc) {
       /* set correct offset and link to symtab */
       setval(be,shn->s.sh_offset,4,readval(be,shn->s.sh_offset,4)+soffset);
       setval(be,shn->s.sh_link,4,shdrindex); /* index of associated symtab */
@@ -576,20 +761,34 @@ static void write_ELF32(FILE *f,section *sec,symbol *sym)
     fwdata(f,&(elfsym->s),sizeof(struct Elf32_Sym));
 
   /* write .strtab string table */
-  while (stn = (struct StrTabNode *)remhead(&strlist.l))
-    fwdata(f,stn->str,strlen(stn->str)+1);
+  write_strtab(f,&strlist);
 
   /* write relocations */
   for (i=0; i<align2; i++)
     fw8(f,0);
-  while (rn = (struct RelocNode *)remhead(&relalist))
-    fwdata(f,&(rn->r),sizeof(struct ElfReloc));
+  if (RELA) {
+    struct Rela32Node *rn;
+
+    while (rn = (struct Rela32Node *)remhead(&relalist))
+      fwdata(f,&(rn->r),sizeof(struct Elf32_Rela));
+  }
+  else {
+    struct Rel32Node *rn;
+
+    while (rn = (struct Rel32Node *)remhead(&relalist))
+      fwdata(f,&(rn->r),sizeof(struct Elf32_Rel));
+  }
 }
 
 
 static void write_output(FILE *f,section *sec,symbol *sym)
 {
-  int bits = bytespertaddr * bitsperbyte;
+  int bits;
+
+  cpu = ELFCPU;    /* cpu ID */
+  be = BIGENDIAN;  /* true for big endian */
+  bits = bytespertaddr * bitsperbyte;
+  shtreloc = RELA ? SHT_RELA : SHT_REL;
 
   if (bits==32 && cpu!=EM_NONE)
     write_ELF32(f,sec,sym);
diff --git a/output_elf.h b/output_elf.h
index 087a774..5031706 100644
--- a/output_elf.h
+++ b/output_elf.h
@@ -1,5 +1,5 @@
 /* output_elf.h header file for ELF objects */
-/* (c) in 2002-2008 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 /* e_indent indexes */
 #define EI_NIDENT  16
@@ -51,6 +51,8 @@
 #define EM_SPARC32PLUS    18
 #define EM_PPC            20
 #define EM_ARM            40
+#define EM_X86_64         62
+#define EM_JAGRISC        0x9004
 #define EM_CYGNUS_POWERPC 0x9025
 #define EM_ALPHA          0x9026
 
@@ -103,42 +105,42 @@
 /* 32-bit ELF */
 
 struct Elf32_Ehdr {
-  unsigned char	e_ident[EI_NIDENT]; /* ELF "magic number" */
-  unsigned char	e_type[2];          /* Identifies object file type */
-  unsigned char	e_machine[2];       /* Specifies required architecture */
-  unsigned char	e_version[4];       /* Identifies object file version */
-  unsigned char	e_entry[4];         /* Entry point virtual address */
-  unsigned char	e_phoff[4];         /* Program header table file offset */
-  unsigned char	e_shoff[4];         /* Section header table file offset */
-  unsigned char	e_flags[4];         /* Processor-specific flags */
-  unsigned char	e_ehsize[2];        /* ELF header size in bytes */
-  unsigned char	e_phentsize[2];     /* Program header table entry size */
-  unsigned char	e_phnum[2];         /* Program header table entry count */
-  unsigned char	e_shentsize[2];     /* Section header table entry size */
-  unsigned char	e_shnum[2];         /* Section header table entry count */
-  unsigned char	e_shstrndx[2];      /* Section header string table index */
+  uint8_t	e_ident[EI_NIDENT]; /* ELF "magic number" */
+  uint8_t	e_type[2];          /* Identifies object file type */
+  uint8_t	e_machine[2];       /* Specifies required architecture */
+  uint8_t	e_version[4];       /* Identifies object file version */
+  uint8_t	e_entry[4];         /* Entry point virtual address */
+  uint8_t	e_phoff[4];         /* Program header table file offset */
+  uint8_t	e_shoff[4];         /* Section header table file offset */
+  uint8_t	e_flags[4];         /* Processor-specific flags */
+  uint8_t	e_ehsize[2];        /* ELF header size in bytes */
+  uint8_t	e_phentsize[2];     /* Program header table entry size */
+  uint8_t	e_phnum[2];         /* Program header table entry count */
+  uint8_t	e_shentsize[2];     /* Section header table entry size */
+  uint8_t	e_shnum[2];         /* Section header table entry count */
+  uint8_t	e_shstrndx[2];      /* Section header string table index */
 };
 
 struct Elf32_Shdr {
-  unsigned char sh_name[4];         /* Section name, index in string tbl */
-  unsigned char sh_type[4];         /* Type of section */
-  unsigned char sh_flags[4];        /* Miscellaneous section attributes */
-  unsigned char sh_addr[4];         /* Section virtual addr at execution */
-  unsigned char sh_offset[4];       /* Section file offset */
-  unsigned char sh_size[4];         /* Size of section in bytes */
-  unsigned char sh_link[4];         /* Index of another section */
-  unsigned char sh_info[4];         /* Additional section information */
-  unsigned char sh_addralign[4];    /* Section alignment */
-  unsigned char sh_entsize[4];      /* Entry size if section holds table */
+  uint8_t	sh_name[4];         /* Section name, index in string tbl */
+  uint8_t	sh_type[4];         /* Type of section */
+  uint8_t	sh_flags[4];        /* Miscellaneous section attributes */
+  uint8_t	sh_addr[4];         /* Section virtual addr at execution */
+  uint8_t	sh_offset[4];       /* Section file offset */
+  uint8_t	sh_size[4];         /* Size of section in bytes */
+  uint8_t	sh_link[4];         /* Index of another section */
+  uint8_t	sh_info[4];         /* Additional section information */
+  uint8_t	sh_addralign[4];    /* Section alignment */
+  uint8_t	sh_entsize[4];      /* Entry size if section holds table */
 };
 
 struct Elf32_Sym {
-  unsigned char st_name[4];         /* Symbol name, index in string tbl */
-  unsigned char st_value[4];        /* Value of the symbol */
-  unsigned char st_size[4];         /* Associated symbol size */
-  unsigned char st_info[1];         /* Type and binding attributes */
-  unsigned char st_other[1];        /* No defined meaning, 0 */
-  unsigned char st_shndx[2];        /* Associated section index */
+  uint8_t	st_name[4];         /* Symbol name, index in string tbl */
+  uint8_t	st_value[4];        /* Value of the symbol */
+  uint8_t	st_size[4];         /* Associated symbol size */
+  uint8_t	st_info[1];         /* Type and binding attributes */
+  uint8_t	st_other[1];        /* No defined meaning, 0 */
+  uint8_t	st_shndx[2];        /* Associated section index */
 };
 /* st_info */
 #define ELF32_ST_BIND(i) ((i)>>4)
@@ -146,89 +148,89 @@ struct Elf32_Sym {
 #define ELF32_ST_INFO(b,t) (((b)<<4)+((t)&0xf))
 
 struct Elf32_Note {
-  unsigned char namesz[4];          /* Size of entry's owner string */
-  unsigned char descsz[4];          /* Size of the note descriptor */
-  unsigned char type[4];            /* Interpretation of the descriptor */
-  char          name[1];            /* Start of the name+desc data */
+  uint8_t	namesz[4];          /* Size of entry's owner string */
+  uint8_t	descsz[4];          /* Size of the note descriptor */
+  uint8_t	type[4];            /* Interpretation of the descriptor */
+  char		name[1];            /* Start of the name+desc data */
 };
 
 struct Elf32_Rel {
-  unsigned char r_offset[4];    /* Location at which to apply the action */
-  unsigned char r_info[4];      /* index and type of relocation */
+  uint8_t	r_offset[4];        /* Location at which to apply the action */
+  uint8_t	r_info[4];          /* index and type of relocation */
 };
 
 struct Elf32_Rela {
-  unsigned char r_offset[4];    /* Location at which to apply the action */
-  unsigned char r_info[4];      /* index and type of relocation */
-  unsigned char r_addend[4];    /* Constant addend used to compute value */
+  uint8_t	r_offset[4];        /* Location at which to apply the action */
+  uint8_t	r_info[4];          /* index and type of relocation */
+  uint8_t	r_addend[4];        /* Constant addend used to compute value */
 };
 
 /* r_info */
 #define ELF32_R_SYM(i) ((i)>>8)
-#define ELF32_R_TYPE(i) ((unsigned char)(i))
-#define ELF32_R_INFO(s,t) (((s)<<8)+(unsigned char)(t))
+#define ELF32_R_TYPE(i) ((uint8_t)(i))
+#define ELF32_R_INFO(s,t) (((s)<<8)+(uint8_t)(t))
 
 
 /* 64-bit ELF */
 
 struct Elf64_Ehdr {
-  unsigned char	e_ident[EI_NIDENT];	/* ELF "magic number" */
-  unsigned char	e_type[2];          /* Identifies object file type */
-  unsigned char	e_machine[2];       /* Specifies required architecture */
-  unsigned char	e_version[4];       /* Identifies object file version */
-  unsigned char	e_entry[8];         /* Entry point virtual address */
-  unsigned char	e_phoff[8];         /* Program header table file offset */
-  unsigned char	e_shoff[8];         /* Section header table file offset */
-  unsigned char	e_flags[4];         /* Processor-specific flags */
-  unsigned char	e_ehsize[2];        /* ELF header size in bytes */
-  unsigned char	e_phentsize[2];     /* Program header table entry size */
-  unsigned char	e_phnum[2];         /* Program header table entry count */
-  unsigned char	e_shentsize[2];     /* Section header table entry size */
-  unsigned char	e_shnum[2];         /* Section header table entry count */
-  unsigned char	e_shstrndx[2];      /* Section header string table index */
+  uint8_t	e_ident[EI_NIDENT]; /* ELF "magic number" */
+  uint8_t	e_type[2];          /* Identifies object file type */
+  uint8_t	e_machine[2];       /* Specifies required architecture */
+  uint8_t	e_version[4];       /* Identifies object file version */
+  uint8_t	e_entry[8];         /* Entry point virtual address */
+  uint8_t	e_phoff[8];         /* Program header table file offset */
+  uint8_t	e_shoff[8];         /* Section header table file offset */
+  uint8_t	e_flags[4];         /* Processor-specific flags */
+  uint8_t	e_ehsize[2];        /* ELF header size in bytes */
+  uint8_t	e_phentsize[2];     /* Program header table entry size */
+  uint8_t	e_phnum[2];         /* Program header table entry count */
+  uint8_t	e_shentsize[2];     /* Section header table entry size */
+  uint8_t	e_shnum[2];         /* Section header table entry count */
+  uint8_t	e_shstrndx[2];      /* Section header string table index */
 };
 
 struct Elf64_Shdr {
-  unsigned char sh_name[4];         /* Section name, index in string tbl */
-  unsigned char sh_type[4];         /* Type of section */
-  unsigned char sh_flags[8];        /* Miscellaneous section attributes */
-  unsigned char sh_addr[8];         /* Section virtual addr at execution */
-  unsigned char sh_offset[8];       /* Section file offset */
-  unsigned char sh_size[8];         /* Size of section in bytes */
-  unsigned char sh_link[4];         /* Index of another section */
-  unsigned char sh_info[4];         /* Additional section information */
-  unsigned char sh_addralign[8];    /* Section alignment */
-  unsigned char sh_entsize[8];      /* Entry size if section holds table */
+  uint8_t	sh_name[4];         /* Section name, index in string tbl */
+  uint8_t	sh_type[4];         /* Type of section */
+  uint8_t	sh_flags[8];        /* Miscellaneous section attributes */
+  uint8_t	sh_addr[8];         /* Section virtual addr at execution */
+  uint8_t	sh_offset[8];       /* Section file offset */
+  uint8_t	sh_size[8];         /* Size of section in bytes */
+  uint8_t	sh_link[4];         /* Index of another section */
+  uint8_t	sh_info[4];         /* Additional section information */
+  uint8_t	sh_addralign[8];    /* Section alignment */
+  uint8_t	sh_entsize[8];      /* Entry size if section holds table */
 };
 
 struct Elf64_Sym {
-  unsigned char st_name[4];         /* Symbol name, index in string tbl */
-  unsigned char st_info[1];         /* Type and binding attributes */
-  unsigned char st_other[1];        /* No defined meaning, 0 */
-  unsigned char st_shndx[2];        /* Associated section index */
-  unsigned char st_value[8];        /* Value of the symbol */
-  unsigned char st_size[8];         /* Associated symbol size */
+  uint8_t	st_name[4];         /* Symbol name, index in string tbl */
+  uint8_t	st_info[1];         /* Type and binding attributes */
+  uint8_t	st_other[1];        /* No defined meaning, 0 */
+  uint8_t	st_shndx[2];        /* Associated section index */
+  uint8_t	st_value[8];        /* Value of the symbol */
+  uint8_t	st_size[8];         /* Associated symbol size */
 };
 #define ELF64_ST_BIND(i) ((i)>>4)
 #define ELF64_ST_TYPE(i) ((i)&0xf)
 #define ELF64_ST_INFO(b,t) (((b)<<4)+((t)&0xf))
 
 struct Elf64_Note {
-  unsigned char namesz[4];          /* Size of entry's owner string */
-  unsigned char descsz[4];          /* Size of the note descriptor */
-  unsigned char type[4];            /* Interpretation of the descriptor */
-  char          name[1];            /* Start of the name+desc data */
+  uint8_t	namesz[4];          /* Size of entry's owner string */
+  uint8_t	descsz[4];          /* Size of the note descriptor */
+  uint8_t	type[4];            /* Interpretation of the descriptor */
+  char		name[1];            /* Start of the name+desc data */
 };
 
 struct Elf64_Rel {
-  unsigned char r_offset[8];    /* Location at which to apply the action */
-  unsigned char r_info[8];      /* index and type of relocation */
+  uint8_t	r_offset[8];        /* Location at which to apply the action */
+  uint8_t	r_info[8];          /* index and type of relocation */
 };
 
 struct Elf64_Rela {
-  unsigned char r_offset[8];    /* Location at which to apply the action */
-  unsigned char r_info[8];      /* index and type of relocation */
-  unsigned char r_addend[8];    /* Constant addend used to compute value */
+  uint8_t	r_offset[8];        /* Location at which to apply the action */
+  uint8_t	r_info[8];          /* index and type of relocation */
+  uint8_t	r_addend[8];        /* Constant addend used to compute value */
 };
 
 #define ELF64_R_SYM(i) ((i) >> 32)
@@ -238,6 +240,8 @@ struct Elf64_Rela {
 
 /* vasm-specific extensions */
 
+typedef uint64_t elfull;
+
 struct StrTabList {
   struct list l;
   unsigned index;
@@ -301,18 +305,11 @@ struct Rel64Node {
 #define RELA 0
 #define ELFCPU EM_ARM
 #elif defined(VASM_CPU_X86)
-#define RELA 0
-#define ELFCPU EM_386
+#define RELA (bytespertaddr == 8)
+#define ELFCPU (bytespertaddr == 8 ? EM_X86_64 : EM_386)
+#elif defined(VASM_CPU_JAGRISC)
+#define RELA 1
+#define ELFCPU EM_JAGRISC
 #else
 #define ELFCPU 0
 #endif
-
-#if RELA
-#define RelocNode Rela32Node
-#define ElfReloc Elf32_Rela
-#define SHT_RELOC SHT_RELA
-#else
-#define RelocNode Rel32Node
-#define ElfReloc Elf32_Rel
-#define SHT_RELOC SHT_REL
-#endif
diff --git a/output_errors.h b/output_errors.h
index 62792bb..5dac3d5 100644
--- a/output_errors.h
+++ b/output_errors.h
@@ -2,8 +2,10 @@
   "output module doesn't support cpu %s",ERROR|NOLINE,
   "write error",FATAL|ERROR|NOLINE,
   "section attributes <%s> not suppported",ERROR|NOLINE,
-  "reloc type %d, size %d, mask 0x%lx (symbol %s + 0x%lx) not supported",ERROR|NOLINE,
+  "reloc type %d, size %u, mask 0x%lx (symbol %s + 0x%lx) not supported",ERROR|NOLINE,
   "reloc type %d not supported",ERROR|NOLINE,                       /* 05 */
   "undefined symbol <%s>",ERROR|NOLINE,
   "output module doesn't allow multiple sections of the same type (%s)",FATAL|ERROR|NOLINE,
   "undefined symbol <%s> at %s+0x%lx, reloc type %d",ERROR|NOLINE,
+  "section <%s>: alignment padding (%lu) not a multiple of %lu at 0x%llx",WARNING|NOLINE,
+  "weak symbol <%s> not supported by output format, treating as global",WARNING|NOLINE, /* 10 */
diff --git a/output_hunk.c b/output_hunk.c
index 0373ce4..14f201f 100644
--- a/output_hunk.c
+++ b/output_hunk.c
@@ -1,16 +1,20 @@
 /* output_hunk.c AmigaOS hunk format output driver for vasm */
-/* (c) in 2002-2010 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 #include "vasm.h"
 #include "output_hunk.h"
 #if defined(VASM_CPU_M68K) || defined(VASM_CPU_PPC)
-static char *copyright="vasm hunk format output module 2.2 (c) 2002-2010 Frank Wille";
+static char *copyright="vasm hunk format output module 2.7 (c) 2002-2015 Frank Wille";
+int hunk_onlyglobal;
 
-static int databss = 0;
+static int databss;
+static int kick1;
 static int exthunk;
+static int genlinedebug;
+static uint32_t sec_cnt;
 
 
-static unsigned long strlen32(char *s)
+static uint32_t strlen32(char *s)
 /* calculate number of 32 bit words required for
    a string without terminator */
 {
@@ -27,16 +31,50 @@ static void fwname(FILE *f,char *name)
 }
 
 
+static void fwmemflags(FILE *f,section *s,uint32_t data)
+/* write memory attributes with data (section size or type) */
+{
+  uint32_t mem = s->memattr;
+
+  if ((mem & ~MEMF_PUBLIC) == 0) {
+    fw32(f,data,1);
+  }
+  else if ((mem & ~MEMF_PUBLIC) == MEMF_CHIP) {
+    fw32(f,HUNKF_CHIP|data,1);
+  }
+  else if ((mem & ~MEMF_PUBLIC) == MEMF_FAST) {
+    fw32(f,HUNKF_FAST|data,1);
+  }
+  else {
+    fw32(f,HUNKF_MEMTYPE|data,1);
+    fw32(f,mem,1);
+  }
+}
+
+
+static void fwnopalign(FILE *f,taddr n)
+/* align a 68k code section with NOP instructions */
+{
+  taddr i;
+
+  n = balign(n,4);
+  if (n & 1)
+    ierror(0);
+  for (i=0; i<n; i+=2)
+    fw16(f,0x4e71,1);
+}
+
+
 static section *dummy_section(void)
 {
   return new_section(".text","acrx3",8);
 }
 
 
-static unsigned long scan_attr(section *sec)
+static uint32_t scan_attr(section *sec)
 /* extract hunk-type from section attributes */
 {
-  unsigned long type = 0;
+  uint32_t type = 0;
   char *p = sec->attr;
 
   if (*p != '\0') {
@@ -49,8 +87,6 @@ static unsigned long scan_attr(section *sec)
 #endif
         case 'd': type = HUNK_DATA; break;
         case 'u': type = HUNK_BSS; break;
-        case 'C': type |= HUNKF_CHIP; break;
-        case 'F': type |= HUNKF_FAST; break;
       }
     }
   }
@@ -73,7 +109,7 @@ static section *check_symbols(section *first_sec,symbol *sym)
   int abs_detect = 0;  /* any absolute symbol definitions present? */
 
   for (sec=first_sec; sec; sec=sec->next) {
-    if ((scan_attr(sec) & ~HUNKF_MEMTYPE) != HUNK_BSS)
+    if (scan_attr(sec) != HUNK_BSS)
       first_nonbss = sec;
 
     /* remember all common-symbol references */
@@ -96,7 +132,7 @@ static section *check_symbols(section *first_sec,symbol *sym)
   /* check common symbols */
   for (; sym; sym=sym->next) {
     if (*sym->name == ' ')  /* internal symbol - will be ignored */
-      sym->flags |= INTERNAL_SYM;
+      sym->flags |= VASMINTERN;
     else if ((sym->flags & COMMON) && !(sym->flags & COMM_REFERENCED)) {
       /* create a dummy reference for each unreferenced common symbol */
       dblock *db = new_dblock();
@@ -118,6 +154,12 @@ static section *check_symbols(section *first_sec,symbol *sym)
       }
       add_atom(first_nonbss,new_data_atom(db,4));
     }
+    else if (sym->flags & WEAK) {
+      /* weak symbols are not supported, make it global */
+      sym->flags &= ~WEAK;
+      sym->flags |= EXPORT;
+      output_error(10,sym->name);
+    }
     else if (sym->type==EXPRESSION && (sym->flags & EXPORT))
       abs_detect = 1;
   }
@@ -133,35 +175,31 @@ static section *check_symbols(section *first_sec,symbol *sym)
 }
 
 
-static size_t prepare_sections(section *sec)
+static void prepare_sections(section *sec)
 /* assign an index to each section, delete empty ones,
-   returns number of sections present */
+   set sec_cnt to number of sections present */
 {
-  size_t cnt = 0;
-
-  for (; sec; sec=sec->next) {
-    if (get_sec_size(sec) > 0 || (sec->flags & HAS_SYMBOLS))
-      sec->idx = cnt++;
+  for (sec_cnt=0; sec!=NULL; sec=sec->next) {
+    if (get_sec_size(sec)!=0 || (sec->flags & HAS_SYMBOLS))
+      sec->idx = sec_cnt++;
     else
       sec->flags |= SEC_DELETED;
   }
-  return cnt;
 }
 
 
-static taddr file_size(section *sec)
+static utaddr file_size(section *sec)
 /* determine a section's initialized data size, which occupies space in
    the executable file */
 {
-  taddr pc=0,zpc=0,npc;
+  utaddr pc=0,zpc=0,npc;
   atom *a;
 
   for (a=sec->first; a; a=a->next) {
-    int align = a->align;
     int zerodata = 1;
     char *d;
 
-    npc = ((pc + align-1) / align) * align;
+    npc = pcalign(a,pc);
     if (a->type == DATA) {
       /* do we have relocations or non-zero data in this atom? */
       if (a->content.db->relocs) {
@@ -200,7 +238,7 @@ static taddr file_size(section *sec)
 }
 
 
-static struct hunkreloc *convert_reloc(rlist *rl,taddr pc)
+static struct hunkreloc *convert_reloc(rlist *rl,utaddr pc)
 {
   nreloc *r = (nreloc *)rl->reloc;
 
@@ -209,10 +247,10 @@ static struct hunkreloc *convert_reloc(rlist *rl,taddr pc)
       || rl->type==REL_PPCEABI_SDA2
 #endif
      ) {
-    if (r->sym->type == LABSYM) {
+    if (LOCREF(r->sym)) {
       struct hunkreloc *hr;
-      unsigned long type;
-      unsigned long offs = pc + (r->offset >> 3);
+      uint32_t type;
+      uint32_t offs = pc + (r->offset >> 3);
 
       switch (rl->type) {
         case REL_ABS:
@@ -246,7 +284,7 @@ static struct hunkreloc *convert_reloc(rlist *rl,taddr pc)
               break;
 #endif
             case 32:
-              if ((r->offset&7) || r->mask!=-1)
+              if (kick1 || (r->offset&7) || r->mask!=-1)
                 return NULL;
               type = HUNK_RELRELOC32;
               break;
@@ -257,7 +295,7 @@ static struct hunkreloc *convert_reloc(rlist *rl,taddr pc)
         case REL_PPCEABI_SDA2: /* treat as REL_SD for WarpOS/EHF */
 #endif
         case REL_SD:
-          if (r->size!=16 || (r->offset&7) || r->mask!=-1)
+          if (kick1 || r->size!=16 || (r->offset&7) || r->mask!=-1)
             return NULL;
           type = HUNK_DREL16;
           break;
@@ -278,7 +316,7 @@ static struct hunkreloc *convert_reloc(rlist *rl,taddr pc)
 }
 
 
-static struct hunkxref *convert_xref(rlist *rl,taddr pc)
+static struct hunkxref *convert_xref(rlist *rl,utaddr pc)
 {
   nreloc *r = (nreloc *)rl->reloc;
 
@@ -287,10 +325,10 @@ static struct hunkxref *convert_xref(rlist *rl,taddr pc)
       || rl->type==REL_PPCEABI_SDA2
 #endif
      ) {
-    if (r->sym->type == IMPORT) {
+    if (EXTREF(r->sym)) {
       struct hunkxref *xref;
-      unsigned long type,size=0;
-      unsigned long offs = pc + (r->offset >> 3);
+      uint32_t type,size=0;
+      uint32_t offs = pc + (r->offset >> 3);
       int com = (r->sym->flags & COMMON) != 0;
 
       switch (rl->type) {
@@ -299,10 +337,10 @@ static struct hunkxref *convert_xref(rlist *rl,taddr pc)
             return NULL;
           switch (r->size) {
             case 8:
-              type = EXT_ABSREF8;
+              type = kick1 ? EXT_RELREF8 : EXT_ABSREF8;
               break;
             case 16:
-              type = EXT_ABSREF16;
+              type = kick1 ? EXT_RELREF16 : EXT_ABSREF16;
               break;
             case 32:
               if (com) {
@@ -340,7 +378,7 @@ static struct hunkxref *convert_xref(rlist *rl,taddr pc)
               break;
 #endif
             case 32:
-              if ((r->offset&7) || r->mask!=-1)
+              if (kick1 || (r->offset&7) || r->mask!=-1)
                 return NULL;
               if (com) {
                 type = EXT_RELCOMMON;
@@ -356,7 +394,7 @@ static struct hunkxref *convert_xref(rlist *rl,taddr pc)
         case REL_PPCEABI_SDA2: /* treat as REL_SD for WarpOS/EHF */
 #endif
         case REL_SD:
-          if (r->size!=16 || (r->offset&7) || r->mask!=-1)
+          if (kick1 || r->size!=16 || (r->offset&7) || r->mask!=-1)
             return NULL;
           type = EXT_DEXT16;
           break;
@@ -379,7 +417,7 @@ static struct hunkxref *convert_xref(rlist *rl,taddr pc)
 
 
 static void process_relocs(rlist *rl,struct list *reloclist,
-                           struct list *xreflist,section *sec,taddr pc)
+                           struct list *xreflist,section *sec,utaddr pc)
 /* convert an atom's rlist into relocations and xrefs */
 {
   if (rl == NULL)
@@ -388,7 +426,8 @@ static void process_relocs(rlist *rl,struct list *reloclist,
   do {
     struct hunkreloc *hr = convert_reloc(rl,pc);
 
-    if (hr!=NULL && (xreflist!=NULL || hr->hunk_id==HUNK_ABSRELOC32)) {
+    if (hr!=NULL && (xreflist!=NULL || hr->hunk_id==HUNK_ABSRELOC32 ||
+                     hr->hunk_id==HUNK_RELRELOC32)) {
       addtail(reloclist,&hr->n);       /* add new relocation */
     }
     else {
@@ -408,47 +447,81 @@ static void process_relocs(rlist *rl,struct list *reloclist,
 }
 
 
-static void reloc_hunk(FILE *f,unsigned long type,struct list *reloclist)
+static void reloc_hunk(FILE *f,uint32_t type,int shrt,struct list *reloclist)
 /* write all section-offsets for one relocation type */
 {
-  int headerflag = 0;
+  int bytes = 0;
+  uint32_t idx;
 
-  for (;;) {
+  for (idx=0; idx<sec_cnt; idx++) {
     struct hunkreloc *r,*next;
-    int idx;
-    unsigned long n;
+    uint32_t n;
+    int off16;
 
-    for (r=(struct hunkreloc *)reloclist->first,idx=-1,n=0;
+    for (r=(struct hunkreloc *)reloclist->first,n=0,off16=1;
          r->n.next; r=(struct hunkreloc *)r->n.next) {
-      if (r->hunk_id == type) {
-        if (idx < 0)
-          idx = r->hunk_index;
-        if (r->hunk_index == idx)
-          n++;
+      if (r->hunk_id==type && r->hunk_index==idx) {
+        n++;
+        if (r->hunk_offset >= 0x10000)
+          off16 = 0;
       }
     }
+    if (shrt && (n>=0x10000 || off16==0))
+      continue;  /* relocs for this hunk don't fit into 16-bit entries */
     if (n > 0) {
-      if (!headerflag) {
-        fw32(f,type,1);
-        headerflag = 1;
+      if (bytes == 0) {
+        if (shrt && type==HUNK_ABSRELOC32)
+          fw32(f,HUNK_DREL32,1);  /* RELOC32SHORT is DREL32 for OS2.0 */
+        else
+          fw32(f,type,1);
+        bytes = 4;
+      }
+      if (shrt) {
+        fw16(f,n,1);
+        fw16(f,idx,1);
+        bytes += 4;
+      }
+      else {
+        fw32(f,n,1);
+        fw32(f,idx,1);
+        bytes += 8;
       }
-      fw32(f,n,1);
-      fw32(f,(unsigned long)idx,1);
       r = (struct hunkreloc *)reloclist->first;
       while (next = (struct hunkreloc *)r->n.next) {
         if (r->hunk_id==type && r->hunk_index==idx) {
-          fw32(f,r->hunk_offset,1);
+          if (shrt) {
+            fw16(f,r->hunk_offset,1);
+            bytes += 2;
+          }
+          else {
+            fw32(f,r->hunk_offset,1);
+            bytes += 4;
+          }
           remnode(&r->n);
           myfree(r);
         }
         r = next;
       }
     }
+  }
+  if (bytes) {
+    if (shrt) {
+      fw16(f,0,1);
+      fwalign(f,bytes+2,4);
+    }
     else
-      break;  /* no more relocations for this type found */
+      fw32(f,0,1);
   }
-  if (headerflag)
-    fw32(f,0,1);
+}
+
+
+static void add_linedebug(struct list *ldblist,uint32_t line,uint32_t off)
+{
+  struct hunkline *ldebug = mymalloc(sizeof(struct hunkline));
+
+  ldebug->line = line;
+  ldebug->offset = off;
+  addtail(ldblist,&ldebug->n);
 }
 
 
@@ -456,7 +529,7 @@ static void linedebug_hunk(FILE *f,struct list *ldblist,int num)
 {
   if (num > 0) {
     struct hunkline *hl;
-    unsigned long srcname_len = strlen32(getdebugname());
+    uint32_t srcname_len = strlen32(getdebugname());
 
     fw32(f,HUNK_DEBUG,1);
     fw32(f,srcname_len + num*2 + 3,1);
@@ -495,7 +568,7 @@ static void ext_refs(FILE *f,struct list *xreflist)
 {
   while (xreflist->first->next) {
     struct hunkxref *x,*next;
-    unsigned long n,type,size;
+    uint32_t n,type,size;
     char *name;
 
     extheader(f);
@@ -529,12 +602,12 @@ static void ext_refs(FILE *f,struct list *xreflist)
 
 
 static void ext_defs(FILE *f,symbol *sym,int symtype,int global,
-                     size_t idx,unsigned long xtype)
+                     size_t idx,uint32_t xtype)
 {
   int header = 0;
 
   for (; sym; sym=sym->next) {
-    if (!(sym->flags & INTERNAL_SYM)) {
+    if (!(sym->flags & VASMINTERN)) {
       if (sym->type==symtype && (sym->flags&global)==global &&
           (symtype==EXPRESSION ? 1 : sym->sec->idx==idx)) {
         if (!header) {
@@ -546,7 +619,7 @@ static void ext_defs(FILE *f,symbol *sym,int symtype,int global,
         }
         fw32(f,(xtype<<24) | strlen32(sym->name),1);
         fwname(f,sym->name);
-        fw32(f,(unsigned long)get_sym_value(sym),1);
+        fw32(f,(uint32_t)get_sym_value(sym),1);
       }
     }
   }
@@ -570,7 +643,7 @@ static void write_object(FILE *f,section *sec,symbol *sym)
   if (sec) {
     for (; sec; sec=sec->next) {
       if (!(sec->flags & SEC_DELETED)) {
-        unsigned long type;
+        uint32_t type;
         atom *a;
         struct list reloclist,xreflist,linedblist;
         int num_linedb = 0;
@@ -592,22 +665,22 @@ static void write_object(FILE *f,section *sec,symbol *sym)
           output_error(3,sec->attr);  /* section attributes not suppported */
           type = HUNK_DATA;  /* default */
         }
-        fw32(f,type,1);
+        fwmemflags(f,sec,type);
         fw32(f,(get_sec_size(sec)+3)>>2,1);  /* size */
 
-        if ((type & ~HUNKF_MEMTYPE) != HUNK_BSS) {
+        if (type != HUNK_BSS) {
           /* write contents */
-          taddr pc=0,npc;
-          int i;
+          utaddr pc=0,npc,i;
 
           for (a=sec->first; a; a=a->next) {
-            int align = a->align;
             rlist *rl;
 
-            npc = ((pc + align-1) / align) * align;
-            for (i=pc; i<npc; i++)
-              fw8(f,0);
+            npc = fwpcalign(f,a,sec,pc);
 
+            if (genlinedebug && (a->type==DATA || a->type==SPACE)) {
+              add_linedebug(&linedblist,(uint32_t)a->line,npc);
+              ++num_linedb;
+            }
             if (a->type == DATA) {
               fwdata(f,a->content.db->data,a->content.db->size);
               process_relocs(a->content.db->relocs,
@@ -618,27 +691,26 @@ static void write_object(FILE *f,section *sec,symbol *sym)
               process_relocs(a->content.sb->relocs,
                              &reloclist,&xreflist,sec,npc);
             }
-            else if (a->type == LINE) {
-              struct hunkline *ldebug = mymalloc(sizeof(struct hunkline));
-
-              ldebug->line = (unsigned long)a->content.srcline;
-              ldebug->offset = (unsigned long)npc;
-              addtail(&linedblist,&ldebug->n);
+            else if (a->type == LINE && !genlinedebug) {
+              add_linedebug(&linedblist,(uint32_t)a->content.srcline,npc);
               ++num_linedb;
             }
 
             pc = npc + atom_size(a,sec,npc);
           }
-          fwalign(f,pc,4);
+          if (type == HUNK_CODE && (pc&1) == 0)
+            fwnopalign(f,pc);
+          else
+            fwalign(f,pc,4);
         }
 
         /* relocation hunks */
-        reloc_hunk(f,HUNK_ABSRELOC32,&reloclist);
-        reloc_hunk(f,HUNK_RELRELOC8,&reloclist);
-        reloc_hunk(f,HUNK_RELRELOC16,&reloclist);
-        reloc_hunk(f,HUNK_RELRELOC26,&reloclist);
-        reloc_hunk(f,HUNK_RELRELOC32,&reloclist);
-        reloc_hunk(f,HUNK_DREL16,&reloclist);
+        reloc_hunk(f,HUNK_ABSRELOC32,0,&reloclist);
+        reloc_hunk(f,HUNK_RELRELOC8,0,&reloclist);
+        reloc_hunk(f,HUNK_RELRELOC16,0,&reloclist);
+        reloc_hunk(f,HUNK_RELRELOC26,0,&reloclist);
+        reloc_hunk(f,HUNK_RELRELOC32,0,&reloclist);
+        reloc_hunk(f,HUNK_DREL16,0,&reloclist);
 
         /* external references and global definitions */
         exthunk = 0;
@@ -650,7 +722,8 @@ static void write_object(FILE *f,section *sec,symbol *sym)
 
         if (!no_symbols) {
           /* symbol table */
-          ext_defs(f,sym,LABSYM,0,sec->idx,EXT_SYMB);
+          if (!hunk_onlyglobal)
+            ext_defs(f,sym,LABSYM,0,sec->idx,EXT_SYMB);
           /* line-debug */
           linedebug_hunk(f,&linedblist,num_linedb);
         }
@@ -673,11 +746,10 @@ static void write_object(FILE *f,section *sec,symbol *sym)
 
 static void write_exec(FILE *f,section *sec,symbol *sym)
 {
-  size_t sec_cnt;
   section *s;
 
   sec = check_symbols(sec,sym);
-  sec_cnt = prepare_sections(sec);
+  prepare_sections(sec);
 
   /* write header */
   fw32(f,HUNK_HEADER,1);
@@ -691,13 +763,13 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
     /* write section sizes and memory flags */
     for (s=sec; s; s=s->next) {
       if (!(s->flags & SEC_DELETED))
-      	fw32(f,(scan_attr(s)&HUNKF_MEMTYPE)|((get_sec_size(s)+3)>>2),1);
+        fwmemflags(f,s,(get_sec_size(s)+3)>>2);
     }
 
     /* section hunk loop */
     for (; sec; sec=sec->next) {
       if (!(sec->flags & SEC_DELETED)) {
-      	unsigned long type;
+      	uint32_t type;
         atom *a;
         struct list reloclist,linedblist;
         int num_linedb = 0;
@@ -706,7 +778,7 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
         initlist(&linedblist);
 
         /* write hunk-type and size */
-        if (!(type = scan_attr(sec) & ~HUNKF_MEMTYPE)) {
+        if (!(type = scan_attr(sec))) {
           output_error(3,sec->attr);  /* section attributes not suppported */
           type = HUNK_DATA;  /* default */
         }
@@ -714,19 +786,19 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
 
         if (type != HUNK_BSS) {
           /* write contents */
-          taddr pc,npc,size;
-          int i;
+          utaddr pc,npc,size,i;
 
           size = databss ? file_size(sec) : get_sec_size(sec);
           fw32(f,(size+3)>>2,1);
           for (a=sec->first,pc=0; a!=NULL&&pc<size; a=a->next) {
-            int align = a->align;
             rlist *rl;
 
-            npc = ((pc + align-1) / align) * align;
-            for (i=pc; i<npc; i++)
-              fw8(f,0);
+            npc = fwpcalign(f,a,sec,pc);
 
+            if (genlinedebug && (a->type==DATA || a->type==SPACE)) {
+              add_linedebug(&linedblist,(uint32_t)a->line,npc);
+              ++num_linedb;
+            }
             if (a->type == DATA) {
               fwdata(f,a->content.db->data,a->content.db->size);
               process_relocs(a->content.db->relocs,&reloclist,NULL,sec,npc);
@@ -735,23 +807,25 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
               fwsblock(f,a->content.sb);
               process_relocs(a->content.sb->relocs,&reloclist,NULL,sec,npc);
             }
-            else if (a->type == LINE) {
-              struct hunkline *ldebug = mymalloc(sizeof(struct hunkline));
-
-              ldebug->line = (unsigned long)a->content.srcline;
-              ldebug->offset = (unsigned long)npc;
-              addtail(&linedblist,&ldebug->n);
+            else if (a->type == LINE && !genlinedebug) {
+              add_linedebug(&linedblist,(uint32_t)a->content.srcline,npc);
               ++num_linedb;
             }
 
             pc = npc + atom_size(a,sec,npc);
           }
-          fwalign(f,pc,4);
+          if (type == HUNK_CODE && (pc&1) == 0)
+            fwnopalign(f,pc);
+          else
+            fwalign(f,pc,4);
         }
         else /* HUNK_BSS */
           fw32(f,(get_sec_size(sec)+3)>>2,1);
 
-        reloc_hunk(f,HUNK_ABSRELOC32,&reloclist);
+        if (!kick1)
+          reloc_hunk(f,HUNK_ABSRELOC32,1,&reloclist);
+        reloc_hunk(f,HUNK_ABSRELOC32,0,&reloclist);
+        reloc_hunk(f,HUNK_RELRELOC32,1,&reloclist);
 
         if (!no_symbols) {
           /* symbol table */
@@ -766,9 +840,9 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
   else {
     /* no sections: create single code hunk with size 0 */
     fw32(f,1,1);
-    fw32(f,1,0);
-    fw32(f,1,0);
-    fw32(f,1,0);
+    fw32(f,0,1);
+    fw32(f,0,1);
+    fw32(f,0,1);
     fw32(f,HUNK_CODE,1);
     fw32(f,0,1);
     fw32(f,HUNK_END,1);
@@ -776,19 +850,35 @@ static void write_exec(FILE *f,section *sec,symbol *sym)
 }
 
 
-static int object_args(char *p)
+static int common_args(char *p)
 {
+#if defined(VASM_CPU_M68K)
+  if (!strcmp(p,"-kick1hunks")) {
+    kick1 = 1;
+    return 1;
+  }
+#endif
+  if (!strcmp(p,"-linedebug")) {
+    genlinedebug = 1;
+    return 1;
+  }
   return 0;
 }
 
 
+static int object_args(char *p)
+{
+  return common_args(p);
+}
+
+
 static int exec_args(char *p)
 {
   if (!strcmp(p,"-databss")) {
     databss = 1;
     return 1;
   }
-  return 0;
+  return common_args(p);
 }
 
 
diff --git a/output_hunk.h b/output_hunk.h
index c319015..17be989 100644
--- a/output_hunk.h
+++ b/output_hunk.h
@@ -1,35 +1,37 @@
 /* output_hunk.h header file for AmigaOS hunk format */
-/* (c) in 2002-2009 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 /* hunk-format relocs */
 struct hunkreloc {
   struct node n;
-  unsigned long hunk_id;
-  int hunk_index;
-  unsigned long hunk_offset;
+  uint32_t hunk_id;
+  uint32_t hunk_index;
+  uint32_t hunk_offset;
 };
 
 /* hunk-format external reference */
 struct hunkxref {
   struct node n;
   char *name;
-  unsigned long type;
-  unsigned long size;
-  unsigned long offset;
+  uint32_t type;
+  uint32_t size;
+  uint32_t offset;
 };
 
 /* line debug hunk */
 struct hunkline {
   struct node n;
-  unsigned long line;
-  unsigned long offset;
+  uint32_t line;
+
+  uint32_t offset;
 };
 
 
 /* additional symbol flags */
 #define COMM_REFERENCED (RSRVD_O<<0)  /* common symbol was referenced */
-#define SEC_DELETED     (RSRVD_O<<1)  /* this section can be deleted */
-#define INTERNAL_SYM    (RSRVD_O<<2)  /* internal symbol to be ignored */
+
+/* additional section flags */
+#define SEC_DELETED     (SECRSRVD<<1) /* this section can be deleted */
 
 
 /* Amiga DOS Hunks */
@@ -58,11 +60,16 @@ struct hunkline {
 
 /* memory type */
 #define HUNKB_CHIP      30
-#define HUNKB_FAST	    31
-#define HUNKF_CHIP	    (1L<<30)
-#define HUNKF_FAST	    (1L<<31)
+#define HUNKB_FAST      31
+#define HUNKF_CHIP      (1L<<30)
+#define HUNKF_FAST      (1L<<31)
 #define HUNKF_MEMTYPE   (HUNKF_CHIP|HUNKF_FAST)
 
+/* AmigaOS memory flags */
+#define MEMF_PUBLIC     (1L<<0)
+#define MEMF_CHIP       (1L<<1)
+#define MEMF_FAST       (1L<<2)
+
 /* hunk_ext sub-types */
 #define EXT_SYMB 0
 #define EXT_DEF	1
diff --git a/output_tos.c b/output_tos.c
index 206726b..0a8be32 100644
--- a/output_tos.c
+++ b/output_tos.c
@@ -1,22 +1,23 @@
 /* output_tos.c Atari TOS executable output driver for vasm */
-/* (c) in 2009-2010 by Frank Wille */
+/* (c) in 2009-2014 by Frank Wille */
 
 #include "vasm.h"
 #include "output_tos.h"
 #if defined(VASM_CPU_M68K)
-static char *copyright="vasm tos output module 0.6 (c) 2009-2010 Frank Wille";
+static char *copyright="vasm tos output module 0.9a (c) 2009-2014 Frank Wille";
+int tos_hisoft_dri = 1;
 
-static int tosflags = 0;
+static int tosflags,textbasedsyms;
 static int max_relocs_per_atom;
 static section *sections[3];
-static taddr secsize[3];
-static taddr secoffs[3];
-static taddr sdabase,lastoffs;
+static utaddr secsize[3];
+static utaddr secoffs[3];
+static utaddr sdabase,lastoffs;
 
 #define SECT_ALIGN 2  /* TOS sections have to be aligned to 16 bits */
 
 
-static unsigned int get_sec_type(section *s)
+static int get_sec_type(section *s)
 /* scan section attributes for type, 0=text, 1=data, 2=bss */
 {
   char *a = s->attr;
@@ -52,7 +53,8 @@ static int tos_initwrite(section *sec,symbol *sym)
       i = get_sec_type(sec);
       if (!sections[i]) {
         sections[i] = sec;
-        secsize[i] = get_sec_size(sec);
+        secsize[i] = (get_sec_size(sec) + SECT_ALIGN - 1) /
+                     SECT_ALIGN * SECT_ALIGN;
         sec->idx = i;  /* section index 0:text, 1:data, 2:bss */
       }
       else
@@ -60,7 +62,7 @@ static int tos_initwrite(section *sec,symbol *sym)
     }
   }
 
-  max_relocs_per_atom = 0;
+  max_relocs_per_atom = 1;
   secoffs[_TEXT] = 0;
   secoffs[_DATA] = secsize[_TEXT] + balign(secsize[_TEXT],SECT_ALIGN);
   secoffs[_BSS] = secoffs[_DATA] + secsize[_DATA] +
@@ -72,16 +74,18 @@ static int tos_initwrite(section *sec,symbol *sym)
   for (; sym; sym=sym->next) {
     /* ignore symbols preceded by a '.' and internal symbols */
     if (*sym->name!='.' && *sym->name!=' ') {
-      nsyms++;
-      if (strlen(sym->name) > DRI_NAMELEN)
-        nsyms++;  /* extra symbol for long name */
+      if (!(sym->flags & (VASMINTERN|COMMON)) && sym->type == LABSYM) {
+        nsyms++;
+        if ((strlen(sym->name) > DRI_NAMELEN) && tos_hisoft_dri)
+          nsyms++;  /* extra symbol for long name */
+      }
     }
     else {
       if (!strcmp(sym->name," TOSFLAGS")) {
         if (tosflags == 0)  /* not defined by command line? */
           tosflags = (int)get_sym_value(sym);
       }
-      sym->flags |= IGNORE_SYM;
+      sym->flags |= VASMINTERN;
     }
   }
   return no_symbols ? 0 : nsyms;
@@ -113,15 +117,14 @@ static void checkdefined(symbol *sym)
 }
 
 
-static taddr tos_sym_value(symbol *sym)
+static taddr tos_sym_value(symbol *sym,int textbased)
 {
   taddr val = get_sym_value(sym);
 
   /* all sections form a contiguous block, so add section offset */
-  if (sym->type == LABSYM)
+  if (textbased && sym->type==LABSYM && sym->sec!=NULL)
     val += secoffs[sym->sec->idx];
 
-  checkdefined(sym);
   return val;
 }
 
@@ -158,12 +161,15 @@ static void do_relocs(taddr pc,atom *a)
   while (rl) {
     switch (rl->type) {
       case REL_SD:
+        checkdefined(((nreloc *)rl->reloc)->sym);
         write_reloc68k(a,rl->reloc,
-                       (tos_sym_value(((nreloc *)rl->reloc)->sym)
+                       (tos_sym_value(((nreloc *)rl->reloc)->sym,1)
                         + nreloc_real_addend(rl->reloc)) - sdabase);
+        break;
       case REL_PC:
+        checkdefined(((nreloc *)rl->reloc)->sym);
         write_reloc68k(a,rl->reloc,
-                       (tos_sym_value(((nreloc *)rl->reloc)->sym)
+                       (tos_sym_value(((nreloc *)rl->reloc)->sym,1)
                         + nreloc_real_addend(rl->reloc)) -
                        (pc + (((nreloc *)rl->reloc)->offset>>3)));
         break;
@@ -192,16 +198,12 @@ static void do_relocs(taddr pc,atom *a)
 static void tos_writesection(FILE *f,section *sec,taddr sec_align)
 {
   if (sec) {
-    taddr pc = secoffs[sec->idx];
-    taddr npc;
-    int align,i;
+    utaddr pc = secoffs[sec->idx];
+    utaddr npc;
     atom *a;
 
     for (a=sec->first; a; a=a->next) {
-      align = a->align;
-      npc = ((pc + align-1) / align) * align;
-      for (i=pc; i<npc; i++)
-        fw8(f,0);
+      npc = fwpcalign(f,a,sec,pc);
       do_relocs(npc,a);
       if (a->type == DATA)
         fwdata(f,a->content.db->data,a->content.db->size);
@@ -217,7 +219,7 @@ static void tos_writesection(FILE *f,section *sec,taddr sec_align)
 static void write_dri_sym(FILE *f,char *name,int type,taddr value)
 {
   struct DRIsym stab;
-  int longname = strlen(name) > DRI_NAMELEN;
+  int longname = (strlen(name) > DRI_NAMELEN) && tos_hisoft_dri;
 
   strncpy(stab.name,name,DRI_NAMELEN);
   setval(1,stab.type,sizeof(stab.type),longname?(type|STYP_LONGNAME):type);
@@ -240,17 +242,13 @@ static void tos_symboltable(FILE *f,symbol *sym)
   int t;
 
   for (; sym; sym=sym->next) {
-    if (!(sym->flags & IGNORE_SYM)) {
-      if (sym->type == EXPRESSION)
-        t = STYP_EQUATED | STYP_DEFINED;
-      else if (sym->type == LABSYM)
-        t = labtype[sym->sec->idx] | STYP_DEFINED;
-      else if (sym->type != IMPORT)
-        ierror(0);
-
-      if (sym->flags & EXPORT)
-        t |= STYP_GLOBAL;
-      write_dri_sym(f,sym->name,t,get_sym_value(sym));
+    /* The Devpac DRI symbol table in executables contains all labels,
+       no matter if global or local. But no equates or other types. */
+    if (!(sym->flags & (VASMINTERN|COMMON)) && sym->type == LABSYM) {
+      if (sym->flags & WEAK)
+        output_error(10,sym->name);  /* weak symbol not supported */
+      t = labtype[sym->sec->idx] | STYP_DEFINED | STYP_GLOBAL;
+      write_dri_sym(f,sym->name,t,tos_sym_value(sym,textbasedsyms));
     }
   }
 }
@@ -268,22 +266,22 @@ static int tos_writerelocs(FILE *f,section *sec)
   int *sortoffs = mymalloc(max_relocs_per_atom*sizeof(int));
 
   if (sec) {
-    taddr pc = secoffs[sec->idx];
-    taddr npc;
-    int align;
+    utaddr pc = secoffs[sec->idx];
+    utaddr npc;
     atom *a;
     rlist *rl;
 
     for (a=sec->first; a; a=a->next) {
-      int offs,nrel=0;
+      int nrel=0;
 
-      align = a->align;
-      npc = ((pc + align-1) / align) * align;
+      npc = pcalign(a,pc);
 
       if (a->type == DATA)
         rl = a->content.db->relocs;
       else if (a->type == SPACE)
         rl = a->content.sb->relocs;
+      else
+        rl = NULL;
 
       while (rl) {
         if (rl->type==REL_ABS && ((nreloc *)rl->reloc)->size==32)
@@ -301,11 +299,11 @@ static int tos_writerelocs(FILE *f,section *sec)
         /* write differences between them */
         n += nrel;
         for (i=0; i<nrel; i++) {
-          taddr newoffs = npc + (taddr)(sortoffs[i]>>3);
+          utaddr newoffs = npc + (utaddr)(sortoffs[i]>>3);
 
           if (lastoffs) {
             /* determine 8bit difference to next relocation */
-            long diff = newoffs - lastoffs;
+            taddr diff = newoffs - lastoffs;
 
             if (diff < 0)
               ierror(0);
@@ -313,7 +311,7 @@ static int tos_writerelocs(FILE *f,section *sec)
               fw8(f,1);
               diff -= 254;
             }
-            fw8(f,(unsigned char)diff);
+            fw8(f,(uint8_t)diff);
           }
           else  /* first entry is a 32 bits offset */
             fw32(f,newoffs,1);
@@ -351,10 +349,14 @@ static void write_output(FILE *f,section *sec,symbol *sym)
 
 static int output_args(char *p)
 {
-  if (!strncmp(p,"-tos-flags=",5)) {
+  if (!strncmp(p,"-tos-flags=",11)) {
     tosflags = atoi(p+11);
     return 1;
   }
+  else if (!strcmp(p,"-monst")) {
+    textbasedsyms = 1;
+    return 1;
+  }
   return 0;
 }
 
diff --git a/output_tos.h b/output_tos.h
index 5d8f06a..5a0909d 100644
--- a/output_tos.h
+++ b/output_tos.h
@@ -1,8 +1,5 @@
 /* output_tos.h header file for Atari TOS format */
-/* (c) in 2009 by Frank Wille */
-
-/* symbol flags */
-#define IGNORE_SYM (RSRVD_O<<2)  /* internal symbol to be ignored */
+/* (c) in 2009,2012 by Frank Wille */
 
 /* section index */
 #define _TEXT 0
@@ -13,14 +10,14 @@
 /* TOS program header */
 typedef struct
 {
-  char ph_branch[2];  /* branch to start of program (0x601a) */
-  char ph_tlen[4];    /* .text length */
-  char ph_dlen[4];    /* .data length */
-  char ph_blen[4];    /* .bss length */
-  char ph_slen[4];    /* length of symbol table */
-  char ph_magic[4];
-  char ph_flags[4];   /* Atari special flags */
-  char ph_abs[2];     /* has to be 0, otherwise no relocation takes place */
+  uint8_t ph_branch[2];  /* branch to start of program (0x601a) */
+  uint8_t ph_tlen[4];    /* .text length */
+  uint8_t ph_dlen[4];    /* .data length */
+  uint8_t ph_blen[4];    /* .bss length */
+  uint8_t ph_slen[4];    /* length of symbol table */
+  uint8_t ph_magic[4];
+  uint8_t ph_flags[4];   /* Atari special flags */
+  uint8_t ph_abs[2];     /* has to be 0, otherwise no relocation takes place */
 } PH;
 
 
@@ -30,8 +27,8 @@ typedef struct
 struct DRIsym
 {
   char name[DRI_NAMELEN];
-  char type[2];
-  char value[4];
+  uint8_t type[2];
+  uint8_t value[4];
 };
 
 #define STYP_UNDEF 0
diff --git a/output_vobj.c b/output_vobj.c
index 691e3dc..088350c 100644
--- a/output_vobj.c
+++ b/output_vobj.c
@@ -1,9 +1,9 @@
 /* output_vasm.c vobj format output driver for vasm */
-/* (c) in 2002-2011 by Volker Barthelmann */
+/* (c) in 2002-2014 by Volker Barthelmann */
 
 #include "vasm.h"
 
-static char *copyright="vasm vobj output module 0.7a (c) 2002-2011 Volker Barthelmann";
+static char *copyright="vasm vobj output module 0.7c (c) 2002-2014 Volker Barthelmann";
 
 /*
   Format (WILL CHANGE!):
@@ -90,13 +90,18 @@ static void write_string(FILE *f,char *p)
 
 static int sym_valid(symbol *symp)
 {
-/* To ignore internal symbols is dangerous, as some relocations depend on
+/* To ignore tmp-symbols is dangerous, as some relocations depend on
    them (e.g. when using the * (current-pc) symbol, a *tmpNNNNNN* symbol
    will be generated). */
 #if 0
   if(*symp->name==' ')
-    return 0;  /* ignore vasm-internal symbols */
+    return 0;  /* ignore internal/temporary symbols */
 #endif
+  if (symp->flags & VASMINTERN) {
+    /* do not ignore current-pc symbol, which is needed for some relocs */
+    if (strcmp(symp->name," *current pc dummy*") != 0)
+      return 0;  /* ignore vasm-internal symbols */
+  }
   return 1;
 }
 
@@ -122,7 +127,7 @@ static void get_section_sizes(section *sec,taddr *rsize,taddr *rdata,taddr *rnre
 
   sec->pc=0;
   for(p=sec->first;p;p=p->next){
-    sec->pc=(sec->pc+p->align-1)/p->align*p->align;
+    sec->pc=pcalign(p,sec->pc);
     sec->pc+=atom_size(p,sec,sec->pc);
     if(p->type==DATA){
       data=sec->pc;
@@ -149,12 +154,9 @@ static void write_data(FILE *f,section *sec,taddr data)
   atom *p;
   sec->pc=0;
   for(p=sec->first;p;p=p->next){
-    int old=sec->pc;
-    sec->pc=(sec->pc+p->align-1)/p->align*p->align;
     if(sec->pc>=data)
       return;
-    for(;old<sec->pc;old++)
-      fw8(f,0);
+    sec->pc=fwpcalign(f,p,sec,sec->pc);
     sec->pc+=atom_size(p,sec,sec->pc);
     if(p->type==DATA)
       fwdata(f,p->content.db->data,p->content.db->size);
@@ -185,7 +187,7 @@ static void write_relocs(FILE *f,section *sec)
   rlist *rl;
   sec->pc=0;
   for(p=sec->first;p;p=p->next){
-    sec->pc=(sec->pc+p->align-1)/p->align*p->align;
+    sec->pc=pcalign(p,sec->pc);
     if(p->type==DATA)
       write_rlist(f,sec,p->content.db->relocs);
     else if(p->type==SPACE)
diff --git a/parse.c b/parse.c
index b5367a2..d4f69b1 100644
--- a/parse.c
+++ b/parse.c
@@ -1,37 +1,42 @@
 /* parse.c - global parser support functions */
-/* (c) in 2009-2011 by Volker Barthelmann and Frank Wille */
+/* (c) in 2009-2015 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
-int esc_sequences = 1;  /* handle escape sequences */
+int esc_sequences = 0;  /* do not handle escape sequences by default */
 int nocase_macros = 0;  /* macro names are case-insensitive */
-int maxmacparams = 10;  /* 10: \0..\9, 36: \0..\9+\a..\z */
+int maxmacparams = MAXMACPARAMS;
+int maxmacrecurs = MAXMACRECURS;
 
 #ifndef MACROHTABSIZE
-#define MACROHTABSIZE 0x200
+#define MACROHTABSIZE 0x800
 #endif
 static hashtable *macrohash;
 
-static macro *first_macro = NULL;
-static macro *cur_macro = NULL;
-static char *end_name = NULL;
-static size_t end_len;
-static int rept_cnt = -1;
-static char *rept_name = NULL;
-static char *rept_start = NULL;
-#ifdef CARGSYM
-static expr *carg1;
+#ifndef STRUCTHTABSIZE
+#define STRUCTHTABSIZE 0x800
 #endif
+static hashtable *structhash;
 
-#define IDSTACKSIZE 100
-static unsigned long id_stack[IDSTACKSIZE];
-static int id_stack_index = 0;
+static macro *first_macro;
+static macro *cur_macro;
+static struct namelen *enddir_list;
+static size_t enddir_minlen;
+static struct namelen *reptdir_list;
+static int rept_cnt = -1;
+static char *rept_start;
+static section *cur_struct;
+static section *struct_prevsect;
 
 
 char *escape(char *s,char *code)
 {
+  char dummy;
+
   if (*s++ != '\\')
     ierror(0);
+  if (code == NULL)
+    code = &dummy;
 
   if (!esc_sequences) {
     *code='\\';
@@ -95,6 +100,14 @@ char *escape(char *s,char *code)
 }
 
 
+char *cut_trail_blanks(char *s)
+{
+  while (isspace((unsigned char)*(s-1)))  /* cut trailing blanks */
+    s--;
+  return s;
+}
+
+
 char *parse_name(char **start)
 /* parses a quoted or unquoted name-string and returns a pointer to it */
 {
@@ -123,7 +136,7 @@ char *parse_name(char **start)
 #endif
   else {
     name = s;
-    while (*s && !isspace((unsigned char)*s) && *s!=',' && *s!=commentchar)
+    while (!ISEOL(s) && !isspace((unsigned char)*s) && *s!=',')
       s++;
     if (s != name) {
       name = cnvstr(name,s-name);
@@ -137,6 +150,22 @@ char *parse_name(char **start)
 }
 
 
+static char *skip_eol(char *s,char *e)
+{
+  while (s<e && *s!='\0' && *s!='\n' && *s!='\r')
+    s++;
+  return s;
+}
+
+
+char *skip_line(char *s)
+{
+  while (*s!='\0')
+    s++;
+  return s;
+}
+
+
 char *skip_identifier(char *s)
 {
   char *name = s;
@@ -156,7 +185,7 @@ char *parse_identifier(char **s)
   char *name = *s;
   char *endname;
 
-  if (endname = skip_identifier(*s)) {
+  if (endname = skip_identifier(name)) {
     *s = endname;
     return cnvstr(name,endname-name);
   }
@@ -164,11 +193,10 @@ char *parse_identifier(char **s)
 }
 
 
-char *skip_string(char *s,char delim,taddr *size)
+char *skip_string(char *s,char delim,size_t *size)
 /* skip a string, optionally store the size in bytes in size, when not NULL */
 {
-  taddr n = 0;
-  char c;
+  size_t n = 0;
 
   if (*s != delim)
     general_error(6,delim);  /* " expected */
@@ -177,7 +205,7 @@ char *skip_string(char *s,char delim,taddr *size)
 
   while (*s) {
     if (*s == '\\') {
-      s = escape(s,&c);
+      s = escape(s,NULL);
     }
     else {
       if (*s++ == delim) {
@@ -198,30 +226,19 @@ char *skip_string(char *s,char delim,taddr *size)
 }
 
 
-dblock *parse_string(char **str,char delim,int width)
+char *read_string(char *p,char *s,char delim,int width)
+/* read string contents with width bits for each character into a buffer p,
+   optionally starting with a delim-character, excluding the terminating
+   character */
 {
-  taddr size;
-  dblock *db;
-  char *p,c;
-  char *s = *str;
+  char c;
 
   if (width & 7)
     ierror(0);
   width >>= 3;
 
-  /* how many bytes do we need for the string? */
-  skip_string(s,delim,&size);
-  if (size == 1)
-    return NULL; /* it's just one char, so use eval_expr() on it */
-
-  db = new_dblock();
-  db->size = size * width;
-  db->data = db->size ? mymalloc(db->size) : NULL;
-
-  /* now copy the string for real into the dblock */
   if (*s == delim)
     s++;
-  p = db->data;
 
   while (*s) {
     if (*s == '\\') {
@@ -239,13 +256,107 @@ dblock *parse_string(char **str,char delim,int width)
     setval(BIGENDIAN,p,width,(unsigned char)c);
     p += width;
   }
+  return s;
+}
 
+
+dblock *parse_string(char **str,char delim,int width)
+{
+  size_t size;
+  dblock *db;
+  char *p,c;
+  char *s = *str;
+
+  if (width & 7)
+    ierror(0);
+
+  /* how many bytes do we need for the string? */
+  skip_string(s,delim,&size);
+  if (size == 1)
+    return NULL; /* it's just one char, so use eval_expr() on it */
+
+  db = new_dblock();
+  db->size = size * (size_t)(width>>3);
+  db->data = db->size ? mymalloc(db->size) : NULL;
+
+  /* now copy the string for real into the dblock */
+  s = read_string(db->data,s,delim,width);
   *str = s;
   return db;
 }
 
 
-void include_binary_file(char *inname)
+char *parse_symbol(char **s)
+/* return pointer to an allocated local/global symbol string, or NULL */
+{
+  char *name;
+
+  name = get_local_label(s);
+  if (name == NULL)
+    name = parse_identifier(s);
+  return name;
+}
+
+
+char *parse_labeldef(char **line,int needcolon)
+/* Parse a global or local label definition at the beginning of a line.
+   Return pointer to its allocate buffer, when valid.
+   A trailing colon may be required or optional, but becomes mandatory
+   when label is not starting at first column. */
+{
+  char *s = *line;
+  char *labname;
+
+  if (isspace((unsigned char )*s)) {
+    s = skip(s);
+    needcolon = 1;  /* colon required, when label doesn't start at 1st column */
+  }
+
+  if (labname = parse_symbol(&s)) {
+    s = skip(s);
+    if (*s == ':') {
+      s++;
+      needcolon = 0;
+    }
+    if (needcolon) {
+      myfree(labname);
+      labname = NULL;
+    }
+    else
+      *line = s;
+  }
+  return labname;
+}
+
+
+
+int check_indir(char *p,char *q)
+/* returns true when the whole sequence between p and q starts and ends with */
+/* parentheses and there are no unbalanced parentheses within */
+{
+  char c;
+  int n;
+
+  p = skip(p);
+  if (*p++ != '(')
+    return 0;
+
+  n = 1;
+  while (n>0 && p<q) {
+    c = *p++;
+    if (c == '(')
+      n++;
+    else if (c == ')')
+      n--;
+  }
+  if (p < q)
+    p = skip(p);
+
+  return n==0 && p>=q;
+}
+
+
+void include_binary_file(char *inname,long nbskip,unsigned long nbkeep)
 /* locate a binary file and convert into a data atom */
 {
   char *filename;
@@ -253,15 +364,26 @@ void include_binary_file(char *inname)
 
   filename = convert_path(inname);
   if (f = locate_file(filename,"rb")) {
-    taddr size = filesize(f);
+    size_t size = filesize(f);
 
     if (size > 0) {
-      dblock *db = new_dblock();
+      if (nbskip>=0 && nbskip<=size) {
+        dblock *db = new_dblock();
+
+        if (nbkeep > (unsigned long)(size - nbskip) || nbkeep==0)
+          db->size = size - (size_t)nbskip;
+        else
+          db->size = nbkeep;
+
+        db->data = mymalloc(size);
+        if (nbskip > 0)
+          fseek(f,nbskip,SEEK_SET);
 
-      db->size = size;
-      db->data = mymalloc(size);
-      fread(db->data,1,size,f);
-      add_atom(0,new_data_atom(db,1));
+        fread(db->data,1,db->size,f);
+        add_atom(0,new_data_atom(db,1));
+      }
+      else
+        general_error(46);  /* bad file-offset argument */
     }
     fclose(f);
   }
@@ -269,12 +391,43 @@ void include_binary_file(char *inname)
 }
 
 
-void new_repeat(int rcnt,char *rstr,char *endrstr)
+static struct namelen *dirlist_match(char *s,char *e,struct namelen *list)
+/* check if a directive from the list matches the current source location */
 {
-  if (cur_macro==NULL && cur_src!=NULL && end_name==NULL) {
-    end_name = endrstr;
-    end_len = strlen(endrstr);
-    rept_name = rstr;
+  size_t len;
+  size_t maxlen = e - s;
+
+  while (len = list->len) {
+    if (len <= maxlen) {
+      if (!strnicmp(s,list->name,len) && isspace((unsigned char)*(s + len)))
+        return list;
+    }
+    list++;
+  }
+  return NULL;
+}
+
+
+static size_t dirlist_minlen(struct namelen *list)
+{
+  size_t minlen;
+
+  if (list == NULL)
+    ierror(0);
+  for (minlen=list->len; list->len; list++) {
+    if (list->len < minlen)
+      minlen = list->len;
+  }
+  return minlen;
+}
+
+
+void new_repeat(int rcnt,struct namelen *reptlist,struct namelen *endrlist)
+{
+  if (cur_macro==NULL && cur_src!=NULL && enddir_list==NULL) {
+    enddir_list = endrlist;
+    enddir_minlen = dirlist_minlen(endrlist);
+    reptdir_list = reptlist;
     rept_cnt = rcnt;
     rept_start = cur_src->srcptr;
   }
@@ -283,21 +436,112 @@ void new_repeat(int rcnt,char *rstr,char *endrstr)
 }
 
 
-macro *new_macro(char *name,char *endmstr)
+int find_macarg_name(source *src,char *name,size_t len)
 {
+  struct macarg *ma;
+  int idx;
+
+  for (idx=0,ma=src->argnames; ma!=NULL && idx<maxmacparams;
+       idx++,ma=ma->argnext) {
+    /* @@@ case-sensitive comparison? */
+    if (ma->arglen==len && strncmp(ma->argname,name,len)==0)
+      return idx;
+  }
+  return -1;
+}
+
+
+/* append a macarg object at the end of the given list */
+struct macarg *addmacarg(struct macarg **list,char *start,char *end)
+{
+  struct macarg *lastarg,*newarg;
+  int len = end-start;
+
+  /* count arguments */
+  if (lastarg = *list) {
+    while (lastarg->argnext)
+      lastarg = lastarg->argnext;
+  }
+
+  newarg = mymalloc(sizeof(struct macarg) + len);
+  newarg->argnext = NULL;
+  if (start != NULL) {
+    memcpy(newarg->argname,start,len);
+    newarg->argname[len] = '\0';
+    newarg->arglen = len;
+  }
+  else
+    newarg->arglen = MACARG_REQUIRED;
+  if (lastarg)
+    lastarg->argnext = newarg;
+  else
+    *list = newarg;
+
+  return newarg;
+}
+
+
+macro *new_macro(char *name,struct namelen *endmlist,char *args)
+{
+  hashdata data;
   macro *m = NULL;
 
-  if (cur_macro==NULL && cur_src!=NULL && end_name==NULL) {
+  if (cur_macro==NULL && cur_src!=NULL && enddir_list==NULL) {
     m = mymalloc(sizeof(macro));
     m->name = mystrdup(name);
     if (nocase_macros)
       strtolower(m->name);
-    m->text = cur_src->srcptr;
+    m->num_argnames = -1;
+    m->argnames = m->defaults = NULL;
+    m->recursions = 0;
+    m->vararg = -1;
+
+    if (find_name_nc(mnemohash,name,&data)) {
+      m->text = NULL;
+      general_error(51);  /* name conflicts with mnemonic */
+    }
+    else if (find_name_nc(dirhash,name,&data)) {
+      m->text = NULL;
+      general_error(52);  /* name conflicts with directive */
+    }
+    else
+      m->text = cur_src->srcptr;
+
     cur_macro = m;
-    end_name = endmstr;
-    end_len = strlen(endmstr);
+    enddir_list = endmlist;
+    enddir_minlen = dirlist_minlen(endmlist);
     rept_cnt = -1;
     rept_start = NULL;
+
+    if (args) {
+      /* named arguments have been given */
+      struct macarg *ma;
+      char *end;
+      int n = 0;
+
+      m->num_argnames = 0;
+      args = skip(args);
+      while (args!=NULL && !ISEOL(args)) {
+        end = SKIP_MACRO_ARGNAME(args);
+
+        if (end!=NULL && end-args!=0 && m->vararg<0) {
+          /* add another argument name */
+          ma = addmacarg(&m->argnames,args,end);
+          m->num_argnames++;
+          args = skip(end);
+          if (end = MACRO_ARG_OPTS(m,n,ma->argname,args))
+            args = skip(end);  /* got defaults and qualifiers */
+          else
+            addmacarg(&m->defaults,args,args);  /* default is empty */
+          n++;
+        }
+        else {
+          general_error(42);  /* illegal macro argument */
+          break;
+        }
+        args = MACRO_ARG_SEP(args);  /* check for separator between names */
+      }
+    }
   }
   else
     ierror(0);
@@ -306,125 +550,151 @@ macro *new_macro(char *name,char *endmstr)
 }
 
 
+static macro *find_macro(char *name,int name_len)
+{
+  hashdata data;
+
+  if (nocase_macros) {
+    if (!find_namelen_nc(macrohash,name,name_len,&data))
+      return NULL;
+  }
+  else {
+    if (!find_namelen(macrohash,name,name_len,&data))
+      return NULL;
+  }
+  return data.ptr;
+}
+
+
 /* check if 'name' is a known macro, then execute macro context */
 int execute_macro(char *name,int name_len,char **q,int *q_len,int nq,
-                  char *s,int clev)
+                  char *s)
 {
-  hashdata data;
   macro *m;
   source *src;
+  struct macarg *ma;
   int n;
-#ifdef CARGSYM
-  symbol *carg;
-#endif
+  struct namelen param,arg;
 #if MAX_QUALIFIERS>0
   char *defq[MAX_QUALIFIERS];
   int defq_len[MAX_QUALIFIERS];
 #endif
 
-  if (nocase_macros) {
-    if (!find_namelen_nc(macrohash,name,name_len,&data))
-      return 0;
-  }
-  else {
-    if (!find_namelen(macrohash,name,name_len,&data))
-      return 0;
-  }
+  if (!(m = find_macro(name,name_len)))
+    return 0;
 
   /* it's a macro: read arguments and execute it */
-  m = data.ptr;
+  if (m->recursions >= maxmacrecurs) {
+    general_error(56,maxmacrecurs);  /* maximum macro recursions reached */
+    return 0;
+  }
+  m->recursions++;
   src = new_source(m->name,m->text,m->size);
+  src->argnames = m->argnames;
 
 #if MAX_QUALIFIERS>0
-  /* put first qualifier into argument \0 */
-  /* FIXME: what about multiple qualifiers? */
-  if (nq) {
-    src->param[0] = q[0];
-    src->param_len[0] = q_len[0];
+  /* remember given qualifiers, or use the cpu's default qualifiers */
+  for (n=0; n<nq; n++) {
+    src->qual[n] = q[n];
+    src->qual_len[n] = q_len[n];
   }
-  else if (nq = set_default_qualifiers(defq,defq_len)) {
-    src->param[0] = defq[0];
-    src->param_len[0] = defq_len[0];
+  nq = set_default_qualifiers(defq,defq_len);
+  for (; n<nq; n++) {
+    src->qual[n] = defq[n];
+    src->qual_len[n] = defq_len[n];
   }
+  src->num_quals = nq;
 #endif
+
+  /* fill in the defaults first */
+  for (n=0,ma=m->defaults; n<maxmacparams; n++) {
+    if (ma != NULL) {
+      src->param[n] = ma->arglen==MACARG_REQUIRED ? NULL : ma->argname;
+      src->param_len[n] = ma->arglen==MACARG_REQUIRED ? 0 : ma->arglen;
+      ma = ma->argnext;
+    }
+    else {
+      src->param[n] = emptystr;
+      src->param_len[n] = 0;
+    }
+  }
     
   /* read macro arguments from operand field */
-  for (n=0,s=skip(s); *s!='\0' && *s!=commentchar && n<maxmacparams; ) {
-    n++;
-
-    if (*s=='\"' || *s=='\'') {
-      /* macro argument in quotes */
-      char dummy,c;
-
-      src->param[n] = s;
-      c = *s++;
-      while (*s != '\0') {
-        if (*s=='\\' && *(s+1)!='\0') {
-          s = escape(s,&dummy);
-        }
-        else {
-          if (*s++ == c) {
-            if (*s == c)
-              s++;  /* allow """" to be recognized as " */
-            else
-              break;
-          }
-        }
+  s = skip(s);
+  n = 0;
+  while (!ISEOL(s) && n<maxmacparams) {
+    if (n>=0 && m->vararg==n) {
+      /* Varargs: take rest of line as argument */
+      char *start = s;
+      char *end = s;
+
+      while (!ISEOL(s)) {
+        s++;
+        if (!isspace((unsigned char)*s))
+          end = s;  /* remember last non-blank character */
       }
-      src->param_len[n] = s - src->param[n];
+      src->param[n] = start;
+      src->param_len[n] = end - start;
+      n++;
+      break;
     }
-
-    else if (*s == '<') {
-      /* macro argument enclosed in < ... > */
-      src->param[n] = ++s;
-      while (*s != '\0') {
-        if (*s =='>') {
-          if (*(s+1) == '>') {
-            /* convert ">>" into a single ">" */
-            char *p;
-
-            for (p=s+1; *p!='\0'; p++)
-              *(p-1) = *p;
-            *(p-1) = '\0';
+    else if ((s = parse_macro_arg(m,s,&param,&arg)) != NULL) {
+      if (arg.len) {
+        /* argument selected by keyword */
+        if (n <= 0) {
+          n = find_macarg_name(src,arg.name,arg.len);
+          if (n >= 0) {
+            src->param[n] = param.name;
+            src->param_len[n] = param.len;
           }
           else
-            break;
+            general_error(72);  /* undefined macro argument name */
+          n = -1;
         }
-        s++;
+        else
+          general_error(71);  /* cannot mix positional and keyword arguments */
+      }
+      else {
+        /* argument selected by position n */
+        if (n >= 0) {
+          if (param.len > 0) {
+            src->param[n] = param.name;
+            src->param_len[n] = param.len;
+          }
+          n++;
+        }
+        else
+          general_error(71);  /* cannot mix positional and keyword arguments */
       }
-      src->param_len[n] = s - src->param[n];
-      if (*s == '>')
-        s++;
-    }
-
-    else {
-      src->param[n] = s;
-      s = skip_operand(s);
-      while (isspace((unsigned char)*(s-1)))  /* cut trailing blanks */
-        s--;
-      src->param_len[n] = s - src->param[n];
     }
+    else
+      break;
 
     s = skip(s);
-    if (*s != ',')
+    if (!(s = MACRO_PARAM_SEP(s)))  /* check for separator between params. */
       break;
-    else
-      s = skip(s+1);
   }
 
-#ifdef CARGSYM
-  /* reset the CARG symbol to 1, selecting the first macro parameter */
-  carg = internal_abs(CARGSYM);
-  cur_src->cargexp = carg->expr;  /* remember last CARG expression */
-  carg->expr = carg1;
-#endif
-  eol(s);
-  if (n >= maxmacparams) {
-    general_error(27,maxmacparams-1);  /* number of args exceeded */
-    n = maxmacparams - 1;
+  if (n < 0)
+    n = m->num_argnames>=0 ? m->num_argnames : 0;
+  if (n > maxmacparams) {
+    general_error(27,maxmacparams);  /* number of args exceeded */
+    n = maxmacparams;
   }
+
+  src->macro = m;
   src->num_params = n;      /* >=0 indicates macro source */
-  src->cond_level = clev;   /* remember level of conditional nesting */
+
+  while (n--) {
+    if (src->param[n] == NULL) {
+      /* required, but missing */
+      src->param[n] = emptystr;
+      src->param_len[n] = 0;
+      general_error(73,n+1);  /* required macro argument was left out */
+    }
+  }
+
+  EXEC_MACRO(src);          /* syntax-module dependant initializations */
   cur_src = src;            /* execute! */
   return 1;
 }
@@ -432,23 +702,34 @@ int execute_macro(char *name,int name_len,char **q,int *q_len,int nq,
 
 int leave_macro(void)
 {
-  if (cur_src->num_params >= 0) {
-    /* move srcptr to end of macro-source, effectively leaving the macro */
-    cur_src->srcptr = cur_src->text + cur_src->size;
-    return cur_src->cond_level;
+  if (cur_src->macro != NULL) {
+    end_source(cur_src);
+    return 0;  /* ok */
   }
   general_error(36);  /* no current macro to exit */
   return -1;
 }
 
 
+/* remove an already defined macro from the hash table */
+int undef_macro(char *name)
+{
+  if (find_macro(name,strlen(name))) {
+    rem_hashentry(macrohash,name,nocase_macros);
+    return 1;
+  }
+  general_error(68);  /* macro does not exist */
+  return 0;
+}
+
+
 static void start_repeat(char *rept_end)
 {
   char buf[MAXPATHLEN];
   source *src;
   int i;
 
-  rept_name = NULL;
+  reptdir_list = NULL;
   if (rept_cnt<0 || cur_src==NULL || strlen(cur_src->name) + 24 >= MAXPATHLEN)
     ierror(0);
 
@@ -456,15 +737,28 @@ static void start_repeat(char *rept_end)
     sprintf(buf,"REPEAT:%s:line %d",cur_src->name,cur_src->line);
     src = new_source(mystrdup(buf),rept_start,rept_end-rept_start);
     src->repeat = (unsigned long)rept_cnt;
+#ifdef REPTNSYM
+    src->reptn = 0;
+    set_internal_abs(REPTNSYM,0);
+#endif
 
-    if (cur_src->num_params > 0) {
+    if (cur_src->num_params >= 0) {
       /* repetition in a macro: get parameters */
       src->num_params = cur_src->num_params;
-      for (i=0; i<=src->num_params; i++) {
+      for (i=0; i<src->num_params; i++) {
         src->param[i] = cur_src->param[i];
         src->param_len[i] = cur_src->param_len[i];
       }
+#if MAX_QUALIFIERS > 0
+      src->num_quals = cur_src->num_quals;
+      for (i=0; i<src->num_quals; i++) {
+        src->qual[i] = cur_src->qual[i];
+        src->qual_len[i] = cur_src->qual_len[i];
+      }
+#endif
+      src->argnames = cur_src->argnames;
     }
+
     cur_src = src;  /* repeat it */
   }
 }
@@ -473,13 +767,15 @@ static void start_repeat(char *rept_end)
 static void add_macro(void)
 {
   if (cur_macro!=NULL && cur_src!=NULL) {
-    hashdata data;
-
-    cur_macro->size = cur_src->srcptr - cur_macro->text;
-    cur_macro->next = first_macro;
-    first_macro = cur_macro;
-    data.ptr = cur_macro;
-    add_hashentry(macrohash,cur_macro->name,data);
+    if (cur_macro->text != NULL) {
+      hashdata data;
+
+      cur_macro->size = cur_src->srcptr - cur_macro->text;
+      cur_macro->next = first_macro;
+      first_macro = cur_macro;
+      data.ptr = cur_macro;
+      add_hashentry(macrohash,cur_macro->name,data);
+    }
     cur_macro = NULL;
   }
   else
@@ -487,52 +783,87 @@ static void add_macro(void)
 }
 
 
-static int copy_macro_param(int n,char *d,int len)
 /* copy macro parameter n to line buffer */
+int copy_macro_param(source *src,int n,char *d,int len)
 {
   int i = 0;
 
-  if (n<=cur_src->num_params && n<maxmacparams) {
-    for (; i<cur_src->param_len[n] && len>0; i++,len--)
-      *d++ = cur_src->param[n][i];
+  if (n<src->num_params && n<maxmacparams) {
+    for (; i<src->param_len[n] && len>0; i++,len--)
+      *d++ = src->param[n][i];
   }
   return i;
 }
 
 
-#ifdef CARGSYM
-static int copy_macro_carg(int inc,char *d,int len)
-/* copy macro parameter #CARG to line buffer, increment or decrement CARG */
+/* copy nth macro qualifier to line buffer */
+int copy_macro_qual(source *src,int n,char *d,int len)
 {
-  symbol *carg = internal_abs(CARGSYM);
-  int nc;
+#if MAX_QUALIFIERS > 0
+  int i = 0;
 
-  if (carg->type != EXPRESSION)
-    return 0;
-  simplify_expr(carg->expr);
-  if (carg->expr->type != NUM) {
-    general_error(30);  /* expression must be a constant */
+  if (n < src->num_quals) {
+    for (; i<src->qual_len[n] && len>0; i++,len--)
+      *d++ = src->qual[n][i];
+  }
+  return i;
+#else
+  return 0;
+#endif
+}
+
+/* Switch to a named offset section which defines the structure. */
+int new_structure(char *name)
+{
+  hashdata data;
+
+  if (cur_struct) {
+    general_error(48);  /* cannot declare structure within structure */
     return 0;
   }
-  nc = copy_macro_param(carg->expr->c.val,d,len);
 
-  if (inc) {
-    expr *new = make_expr(inc>0?ADD:SUB,copy_tree(carg->expr),number_expr(1));
+  struct_prevsect = current_section;
+  switch_offset_section(name,-1);
+  data.ptr = cur_struct = current_section;
+  add_hashentry(structhash,cur_struct->name,data);
+  return 1;
+}
 
-    simplify_expr(new);
-    carg->expr = new;
+/* Finish the structure definition and return the previous section. */
+int end_structure(section **prev)
+{
+  if (cur_struct) {
+    *prev = struct_prevsect;
+    cur_struct = struct_prevsect = NULL;
+    return 1;
   }
-  return nc;
+  general_error(49);  /* no structure */
+  return 0;
+}
+
+
+section *find_structure(char *name,int name_len)
+{
+  hashdata data;
+  section *s;
+
+  if (cur_struct!=NULL && !strcmp(cur_struct->name,name))
+    general_error(55);  /* illegal structure recursion */
+
+  if (find_namelen(structhash,name,name_len,&data))
+    s = data.ptr;
+  else
+    s = NULL;
+  return s;
 }
-#endif
 
 
-char *read_next_line(void)
 /* reads the next input line */
+char *read_next_line(void)
 {
-  char *s,*srcend,*d;
+  char *s,*srcend,*d,*lbufend;
   int nparam;
-  int len = MAXLINELENGTH-1;
+  int len = MAXLINELENGTH-2;
   char *rept_end = NULL;
 
   /* check if end of source is reached */
@@ -542,8 +873,15 @@ char *read_next_line(void)
       if (--cur_src->repeat > 0) {
         cur_src->srcptr = cur_src->text;  /* back to start */
         cur_src->line = 0;
+#ifdef REPTNSYM
+        set_internal_abs(REPTNSYM,++cur_src->reptn);
+#endif
       }
       else {
+        if (cur_src->macro != NULL) {
+          if (--cur_src->macro->recursions < 0)
+            ierror(0);
+        }
         myfree(cur_src->linebuf);  /* linebuf is no longer needed, saves memory */
         cur_src->linebuf = NULL;
         if (cur_src->parent == NULL)
@@ -554,6 +892,9 @@ char *read_next_line(void)
           symbol *carg = internal_abs(CARGSYM);
           carg->expr = cur_src->cargexp;  /* restore parent CARG */
         }
+#endif
+#ifdef REPTNSYM
+        set_internal_abs(REPTNSYM,cur_src->reptn);  /* restore parent REPTN */
 #endif
       }
     }
@@ -564,49 +905,56 @@ char *read_next_line(void)
   cur_src->line++;
   s = cur_src->srcptr;
   d = cur_src->linebuf;
+  lbufend = d + MAXLINELENGTH - 256;
   nparam = cur_src->num_params;
 
-  if (end_name!=NULL && (srcend-s)>end_len) {
+  /* line buffer starts with 0, to allow checks for left-hand character */
+  *d++ = 0;
+
+  if (enddir_list!=NULL && (srcend-s)>enddir_minlen) {
     /* reading a definition, like a macro or a repeat-block, until an
        end directive is found */
-    int rept_len = rept_name ? strlen(rept_name) : 0;
+    struct namelen *dir;
     int rept_nest = 1;
 
     if (nparam>=0 && cur_macro!=NULL)
         general_error(26,cur_src->name);  /* macro definition inside macro */
 
-    while (s <= (srcend-end_len)) {
-      if (!strnicmp(s,end_name,end_len) &&
-          isspace((unsigned char)*(s + end_len))) {
+    while (s <= (srcend-enddir_minlen)) {
+      if (dir = dirlist_match(s,srcend,enddir_list)) {
         if (cur_macro != NULL) {
           add_macro();  /* link macro-definition into hash-table */
-          s += end_len;
-          end_name = NULL;
+          s += dir->len;
+          enddir_list = NULL;
           break;
         }
         else if (--rept_nest == 0) {
           rept_end = s;
-          s += end_len;
-          end_name = NULL;
+          s += dir->len;
+          enddir_list = NULL;
           break;
         }
       }
-      else if (cur_macro==NULL && rept_len && !strnicmp(s,rept_name,rept_len)
-               && isspace((unsigned char)*(s + rept_len))) {
-        s += rept_len;
+      else if (cur_macro==NULL && reptdir_list!=NULL &&
+               (dir = dirlist_match(s,srcend,reptdir_list)) != NULL) {
+        s += dir->len;
         rept_nest++;
       }
 
       if (*s=='\"' || *s=='\'') {
         char c = *s++;
 
-        while (s<=(srcend-end_len) && *s!=c && *s!='\n' && *s!='\r') {
-          if (*s == '\\')
+        while (s<=(srcend-enddir_minlen) && *s!=c && *s!='\n' && *s!='\r') {
+          if (*s=='\\' && (*(s+1)=='\"' || *(s+1)=='\''))
+            s = escape(s,NULL);
+          else
             s++;
-          s++;
         }
       }
 
+      if (ISEOL(s))
+        s = skip_eol(s,srcend);
+
       if (*s == '\n') {
         cur_src->srcptr = s + 1;
         cur_src->line++;
@@ -618,116 +966,34 @@ char *read_next_line(void)
       s++;
     }
 
-    if (end_name) {
+    if (enddir_list) {
       if (cur_macro)
-        general_error(25,end_name,cur_macro->name);  /* missing ENDM directive */
+        general_error(25,cur_macro->name);  /* missing ENDM directive */
       else
-        general_error(32,end_name);  /* missing ENDR directive */
+        general_error(32);  /* missing ENDR directive */
     }
 
     /* ignore rest of line, treat as comment */
-    while (s<srcend && *s!='\0' && *s!='\n' && *s!='\r')
-      s++;
+    s = skip_eol(s,srcend);
   }
 
   /* copy next line to linebuf */
   while (s<srcend && *s!='\0' && *s!='\n') {
+    int nc;
 
-    if (nparam>=0 && *s=='\\') {
-      /* insert macro parameters */
-      int nc = -1;
+    if (d >= lbufend)
+      general_error(54);  /* line buffer overflow */
 
-      if (*(s+1) == '\\') {
-      	*d++ = '\\';
-        nc = 1;
-        if (esc_sequences) {
-        	*d++ = '\\';
-          nc = 2;
-        }
-      	s += 2;
-      }     
-      else if (*(s+1) == '@') {
-        /* \@ : insert a unique id "_nnnnnn" */
-        if (len >= 7) {
-          unsigned long unique_id = cur_src->id;
-
-          *d++ = '_';
-          len--;
-          s += 2;
-          if (*s == '!') {
-            /* push id onto stack */
-            if(id_stack_index >= IDSTACKSIZE)
-              general_error(39);  /* id stack overflow */
-            else
-              id_stack[id_stack_index++] = unique_id;
-            ++s;              
-          }
-          else if(*s == '@') {
-            /* pull id from stack */
-            if (id_stack_index <= 0)
-              general_error(40);  /* id pull without matching push */
-            else
-              unique_id = id_stack[--id_stack_index];
-            ++s;
-          }
-          nc = sprintf(d, "%06lu", unique_id);
-        }
-      }
-      else if (*(s+1) == '#') {
-        /* \# : insert number of parameters */
-        if (len >= 2) {
-          nc = sprintf(d,"%d",cur_src->num_params);
-          s += 2;
-        }
-      }
-      else if (*(s+1)=='?' && isdigit((unsigned char)*(s+2))) {
-        /* \?n : insert parameter n length */
-        if (len >= 3) {
-          nc = sprintf(d,"%d",cur_src->param_len[*(s+2)-'0']);
-          s += 3;
-        }
-      }
-      else if (isdigit((unsigned char)*(s+1))) {
-        /* \0..\9 : insert macro parameter 0..9 */
-        nc = copy_macro_param(*(s+1)-'0',d,len);
-        s += 2;
-      }
-      else if (maxmacparams>10 && tolower((unsigned char)*(s+1))>='a' &&
-               tolower((unsigned char)*(s+1))<('a'+maxmacparams-10)) {
-        /* \a..\z : insert macro parameter 10..36 */
-        nc = copy_macro_param(tolower((unsigned char)*(s+1))-'a'+10,d,len);
-        s += 2;
-      }
-#ifdef CARGSYM
-      else if (*(s+1) == '.') {
-        /* \. : insert parameter #CARG */
-        nc = copy_macro_carg(0,d,len);
-        s += 2;
-      }
-      else if (*(s+1) == '+') {
-        /* \+ : insert parameter #CARG and increment CARG */
-        nc = copy_macro_carg(1,d,len);
-        s += 2;
-      }
-      else if (*(s+1) == '-') {
-        /* \- : insert parameter #CARG and decrement CARG */
-        nc = copy_macro_carg(-1,d,len);
-        s += 2;
-      }
-#endif
-      if (nc >= 0) {
-        len -= nc;
-        d += nc;
-        continue;
-      }
+    if (nparam>=0 && (nc=expand_macro(cur_src,&s,d,len))>=0) {
+      /* expanded macro parameters */
+      len -= nc;
+      d += nc;
     }
-
     else if (*s == '\r') {
       if ((s>cur_src->srcptr && *(s-1)=='\n') ||
           (s<(srcend-1) && *(s+1)=='\n')) {
         /* ignore \r in \r\n and \n\r combinations */
         s++;
-        continue;
       }
       else {
         /* treat a single \r as \n */
@@ -735,8 +1001,7 @@ char *read_next_line(void)
         break;
       }
     }
-
-    if (len > 0) {
+    else if (len > 0) {
       *d++ = *s++;
       len--;
     }
@@ -749,7 +1014,7 @@ char *read_next_line(void)
     s++;
   cur_src->srcptr = s;
 
-  if (produce_listing) {
+  if (listena) {
     listing *new = mymalloc(sizeof(*new));
 
     new->next = 0;
@@ -759,7 +1024,7 @@ char *read_next_line(void)
     new->sec = 0;
     new->pc = 0;
     new->src = cur_src;
-    strncpy(new->txt,cur_src->linebuf,MAXLISTSRC);
+    strncpy(new->txt,cur_src->linebuf+1,MAXLISTSRC);
     if (first_listing) {
       last_listing->next = new;
       last_listing = new;
@@ -770,7 +1035,7 @@ char *read_next_line(void)
     cur_listing = new;
   }
 
-  s = cur_src->linebuf;
+  s = cur_src->linebuf+1;
   if (rept_end)
     start_repeat(rept_end);
   return s;
@@ -780,8 +1045,6 @@ char *read_next_line(void)
 int init_parse(void)
 {
   macrohash = new_hashtable(MACROHTABSIZE);
-#ifdef CARGSYM
-  carg1 = number_expr(1);
-#endif
+  structhash = new_hashtable(STRUCTHTABSIZE);
   return 1;
 }
diff --git a/parse.h b/parse.h
index 6e347e3..6ac1712 100644
--- a/parse.h
+++ b/parse.h
@@ -1,36 +1,91 @@
 /* parse.h - global parser support functions */
-/* (c) in 2009-2010 by Volker Barthelmann and Frank Wille */
+/* (c) in 2009-2015 by Volker Barthelmann and Frank Wille */
 
 #ifndef PARSE_H
 #define PARSE_H 
 
 /* defines */
 #define MAXLINELENGTH 4096
-#define MAXMACPARAMS 36
+#ifndef MAXMACPARAMS
+#define MAXMACPARAMS 9
+#endif
+#ifndef MAXMACRECURS
+#define MAXMACRECURS 1000
+#endif
+
+
+struct macarg {
+  struct macarg *argnext;
+  size_t arglen;
+  char argname[1];  /* extended to real argument length + '\0' */
+};
+#define MACARG_REQUIRED 0xffff  /* arglen: indicates there is no default */
 
 struct macro {
   struct macro *next;
   char *name;
   char *text;
   size_t size;
+  int num_argnames;		/* -1 for no named arguments used */
+  struct macarg *argnames;
+  struct macarg *defaults;
+  int vararg;
+  int recursions;
+};
+
+struct namelen {
+  size_t len;
+  char *name;
 };
 
 /* global variables */
-extern int esc_sequences,nocase_macros,maxmacparams;
+extern int esc_sequences,nocase_macros;
+extern int maxmacparams,maxmacrecurs;
 
 /* functions */
 char *escape(char *,char *);
+char *cut_trail_blanks(char *);
 char *parse_name(char **);
+char *skip_line(char *);
 char *skip_identifier(char *);
 char *parse_identifier(char **);
-char *skip_string(char *,char,taddr *);
+char *skip_string(char *,char,size_t *);
+char *read_string(char *,char *,char,int);
 dblock *parse_string(char **,char,int);
-void include_binary_file(char *);
-void new_repeat(int,char *,char *);
-macro *new_macro(char *,char *);
-int execute_macro(char *,int,char **,int *,int,char *,int);
+char *parse_symbol(char **);
+char *parse_labeldef(char **,int);
+int check_indir(char *,char *);
+void include_binary_file(char *,long,unsigned long);
+void new_repeat(int,struct namelen *,struct namelen *);
+int find_macarg_name(source *,char *,size_t);
+struct macarg *addmacarg(struct macarg **,char *,char *);
+macro *new_macro(char *,struct namelen *,char *);
+int execute_macro(char *,int,char **,int *,int,char *);
 int leave_macro(void);
+int undef_macro(char *);
+int copy_macro_param(source *,int,char *,int);
+int copy_macro_qual(source *,int,char *,int);
+int new_structure(char *);
+int end_structure(section **);
+section *find_structure(char *,int);
 char *read_next_line(void);
 int init_parse(void);
 
+/* macros which may be overwritten by the syntax module */
+#ifndef SKIP_MACRO_ARGNAME
+#define SKIP_MACRO_ARGNAME(p) skip_identifier(p)
+#endif
+#ifndef MACRO_ARG_OPTS
+#define MACRO_ARG_OPTS(m,n,a,p) NULL
+#endif
+#ifndef MACRO_ARG_SEP
+#define MACRO_ARG_SEP(p) (*p==',' ? skip(p+1) : NULL)
+#endif
+#ifndef MACRO_PARAM_SEP
+#define MACRO_PARAM_SEP(p) (*p==',' ? skip(p+1) : NULL)
+#endif
+#ifndef EXEC_MACRO
+#define EXEC_MACRO(s)
+#endif
+
 #endif /* PARSE_H */
diff --git a/reloc.c b/reloc.c
index 2fef600..9357e27 100644
--- a/reloc.c
+++ b/reloc.c
@@ -1,5 +1,5 @@
 /* reloc.c - relocation support functions */
-/* (c) in 2010 by Volker Barthelmann and Frank Wille */
+/* (c) in 2010-2015 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
@@ -15,24 +15,62 @@ nreloc *new_nreloc(void)
 }
 
 
-rlist *add_reloc(rlist **relocs,symbol *sym,taddr addend,
-                 int type,int size,int offs)
+rlist *add_nreloc(rlist **relocs,symbol *sym,taddr addend,
+                  int type,size_t size,size_t offs)
 {
-  nreloc *r = new_nreloc();
-  rlist *rl = mymalloc(sizeof(rlist));
+  rlist *rl;
+  nreloc *r;
 
+  if (sym->flags & ABSLABEL)
+    return NULL;  /* no relocation, when symbol is from an ORG-section */
+
+  /* mark symbol as referenced, so we can find unreferenced imported symbols */
+  sym->flags |= REFERENCED;
+
+  r = new_nreloc();
   r->size = size;
   r->offset = offs;
   r->sym = sym;
   r->addend = addend;
+  rl = mymalloc(sizeof(rlist));
   rl->type = type;
   rl->reloc = r;
   rl->next = *relocs;
   *relocs = rl;
+
   return rl;
 }
 
 
+rlist *add_nreloc_masked(rlist **relocs,symbol *sym,taddr addend,
+                         int type,size_t size,size_t offs,taddr mask)
+{
+  rlist *rl;
+  nreloc *r;
+
+  if (rl = add_nreloc(relocs,sym,addend,type,size,offs)) {
+    r = rl->reloc;
+    r->mask = mask;
+  }
+  return rl;
+}
+
+
+int is_pc_reloc(symbol *sym,section *cur_sec)
+/* Returns true when the symbol needs a REL_PC relocation to reference it
+   pc-relative. This is the case when it is externally defined or a label
+   from a different section (so the linker has to resolve the distance). */
+{
+  if (EXTREF(sym))
+    return 1;
+  else if (LOCREF(sym))
+    return (sym->sec!=cur_sec &&
+            (!(sym->flags & ABSLABEL) || !(cur_sec->flags & ABSOLUTE)));
+  ierror(0);
+  return 0;
+}
+
+
 void do_pic_check(rlist *r)
 /* generate an error on a non-PC-relative relocation */
 {
@@ -46,6 +84,29 @@ void do_pic_check(rlist *r)
   }
 }
 
+
+taddr nreloc_real_addend(nreloc *nrel)
+{
+  /* In vasm the addend includes the symbol's section offset for LABSYMs */
+  if (nrel->sym->type == LABSYM)
+    return nrel->addend - nrel->sym->pc;
+  return nrel->addend;
+}
+
+
+void unsupp_reloc_error(rlist *rl)
+{
+  if (rl->type <= LAST_STANDARD_RELOC) {
+    nreloc *r = (nreloc *)rl->reloc;
+
+    output_error(4,rl->type,r->size,(unsigned long)r->mask,
+                 r->sym->name);  /* reloc type not supported */
+  }
+  else
+    output_error(5,rl->type);
+}
+
+
 void print_reloc(FILE *f,int type,nreloc *p)
 {
   if (type<=LAST_STANDARD_RELOC){
@@ -53,18 +114,19 @@ void print_reloc(FILE *f,int type,nreloc *p)
       "none","abs","pc","got","gotrel","gotoff","globdat","plt","pltrel",
       "pltoff","sd","uabs","localpc","loadrel","copy","jmpslot","secoff"
     };
-    fprintf(f,"r%s(%d,%d,0x%llx,0x%llx,",rname[type],p->offset,p->size,
-            ((unsigned long long)p->mask)&taddrmask,
-            ((unsigned long long)p->addend)&taddrmask);
+    fprintf(f,"r%s(%lu,%lu,0x%llx,0x%llx,",rname[type],
+            (unsigned long)p->offset,(unsigned long)p->size,
+            ULLTADDR(p->mask),ULLTADDR(p->addend));
   }
 #ifdef VASM_CPU_PPC
   else if (type<=LAST_PPC_RELOC){
     static const char *rname[] = {
       "sd2","sd21","sdi16","drel","brel"
     };
-    fprintf(f,"r%s(%d,%d,0x%llx,0x%llx,",rname[type-(LAST_STANDARD_RELOC+1)],
-            p->offset,p->size,((unsigned long long)p->mask)&taddrmask,
-            ((unsigned long long)p->addend)&taddrmask);
+    fprintf(f,"r%s(%lu,%lu,0x%llx,0x%llx,",
+            rname[type-(LAST_STANDARD_RELOC+1)],
+            (unsigned long)p->offset,(unsigned long)p->size,
+            ULLTADDR(p->mask),ULLTADDR(p->addend));
   }
 #endif
   else
diff --git a/reloc.h b/reloc.h
index 286392a..9606e80 100644
--- a/reloc.h
+++ b/reloc.h
@@ -1,5 +1,5 @@
 /* reloc.h  reloc header file for vasm */
-/* (c) in 2002,2005-2008,2010 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002,2005-2008,2010,2011 by Volker Barthelmann and Frank Wille */
 
 #ifndef RELOC_H
 #define RELOC_H
@@ -31,8 +31,8 @@
 
 /* standard reloc struct */
 typedef struct nreloc {
-  int offset;     /* offset to beginning of data atom in bits */
-  int size;       /* size of relocation in bits */
+  size_t offset;  /* offset to beginning of data atom in bits */
+  size_t size;    /* size of relocation in bits */
   taddr mask;     /* mask value */
   taddr addend;   /* addend */
   symbol *sym;
@@ -48,8 +48,12 @@ typedef struct rlist {
 
 
 nreloc *new_nreloc(void);
-rlist *add_reloc(rlist **,symbol *,taddr,int,int,int);
+rlist *add_nreloc(rlist **,symbol *,taddr,int,size_t,size_t);
+rlist *add_nreloc_masked(rlist **,symbol *,taddr,int,size_t,size_t,taddr);
+int is_pc_reloc(symbol *,section *);
 void do_pic_check(rlist *);
+taddr nreloc_real_addend(nreloc *);
+void unsupp_reloc_error(rlist *);
 void print_reloc(FILE *,int,nreloc *);
 
 #endif
diff --git a/supp.c b/supp.c
index 72dc1e6..e9ec5f6 100644
--- a/supp.c
+++ b/supp.c
@@ -1,5 +1,5 @@
 /* supp.c miscellaneous support routines */
-/* (c) in 2008-2010 by Frank Wille */
+/* (c) in 2008-2015 by Frank Wille */
 
 #include "vasm.h"
 #include "supp.h"
@@ -51,18 +51,29 @@ struct node *remhead(struct list *l)
 
 void *mymalloc(size_t sz)
 {
-#if DEBUG
-  size_t *p = malloc(sz+2*sizeof(size_t));
-  if (!p)
-    general_error(17);
-  p++;
-  *p++ = sz;
-  memset(p,0xdd,sz);  /* make it crash, when using uninitialized memory */
-#else
-  void *p = malloc(sz);
-  if(!p)
-    general_error(17);
-#endif
+  size_t *p;
+
+  /* workaround for Electric Fence on 64-bit RISC */
+  if (sz)
+    sz = (sz + sizeof(size_t) - 1) & ~(sizeof(size_t) - 1);
+
+  if (debug) {
+    if (sz == 0) {
+      printf("Warning! Allocating 0 bytes. Adjusted to 1 byte.\n");
+      sz = 1;
+    }
+    p = malloc(sz+2*sizeof(size_t));
+    if (!p)
+      general_error(17);
+    p++;
+    *p++ = sz;
+    memset(p,0xdd,sz);  /* make it crash, when using uninitialized memory */
+  }
+  else {
+    p = malloc(sz?sz:1);
+    if(!p)
+      general_error(17);
+  }
   return p;
 }
 
@@ -78,17 +89,20 @@ void *mycalloc(size_t sz)
 
 void *myrealloc(void *old,size_t sz)
 {
-#if DEBUG
-  size_t *p = realloc(old?((size_t *)old)-2:0,sz+2*sizeof(size_t));
-  if (!p)
-    general_error(17);
-  p++;
-  *p++ = sz;
-#else
-  void *p = realloc(old,sz);
-  if (!p)
-    general_error(17);
-#endif
+  size_t *p;
+
+  if (debug) {
+    p = realloc(old?((size_t *)old)-2:0,sz+2*sizeof(size_t));
+    if (!p)
+      general_error(17);
+    p++;
+    *p++ = sz;
+  }
+  else {
+    p = realloc(old,sz);
+    if (!p)
+      general_error(17);
+  }
   return p;
 }
 
@@ -96,62 +110,61 @@ void *myrealloc(void *old,size_t sz)
 void myfree(void *p)
 {
   if (p) {
-#if DEBUG
-    size_t *myp = (size_t *)p;
-    size_t sz = *(--myp);
-    memset(p,0xff,sz);  /* make it crash, when reusing deallocated memory */
-    free(--myp);
-#else
-    free(p);
-#endif
+    if (debug) {
+      size_t *myp = (size_t *)p;
+      size_t sz = *(--myp);
+      memset(p,0xff,sz);  /* make it crash, when reusing deallocated memory */
+      free(--myp);
+    }
+    else
+      free(p);
   }
 }
 
 
-unsigned long long readval(int be,void *src,int size)
+uint64_t readval(int be,void *src,size_t size)
 /* read value with given endianess */
 {
   unsigned char *s = src;
-  unsigned long long val = 0;
+  uint64_t val = 0;
 
-  if (size > sizeof(unsigned long long))
+  if (size > sizeof(uint64_t))
     ierror(0);
   if (be) {
     while (size--) {
       val <<= 8;
-      val += (unsigned long long)*s++;
+      val += (uint64_t)*s++;
     }
   }
   else {
     s += size;
     while (size--) {
       val <<= 8;
-      val += (unsigned long long)*(--s);
+      val += (uint64_t)*(--s);
     }
   }
   return val;
 }
 
 
-void *setval(int be,void *dest,int size,unsigned long long val)
+void *setval(int be,void *dest,size_t size,uint64_t val)
 /* write value to destination with desired endianess */
 {
-  unsigned char *d = dest;
+  uint8_t *d = dest;
 
-  if (size > sizeof(unsigned long long))
+  if (size > sizeof(uint64_t))
     ierror(0);
   if (be) {
     d += size;
     dest = d;
     while (size--) {
-      *(--d) = (unsigned char)val;
+      *(--d) = (uint8_t)val;
       val >>= 8;
     }
-    d += size;
   }
   else {
     while (size--) {
-      *d++ = (unsigned char)val;
+      *d++ = (uint8_t)val;
       val >>= 8;
     }
     dest = d;
@@ -160,13 +173,41 @@ void *setval(int be,void *dest,int size,unsigned long long val)
 }
 
 
-unsigned long long readbits(int be,void *p,unsigned bfsize,
-                            unsigned offset,unsigned size)
+void *setval_signext(int be,void *dest,size_t extsz,size_t valsz,int64_t val)
+/* write a sign-extended value to destination with desired endianess */
+{
+  uint8_t *d = dest;
+  int sign = val<0 ? 0xff : 0;
+
+  if (valsz > sizeof(uint64_t))
+    ierror(0);
+  if (be) {
+    memset(d,sign,extsz);
+    d += extsz + valsz;
+    dest = d;
+    while (valsz--) {
+      *(--d) = (uint8_t)val;
+      val >>= 8;
+    }
+  }
+  else {
+    while (valsz--) {
+      *d++ = (uint8_t)val;
+      val >>= 8;
+    }
+    memset(d,sign,extsz);
+    dest = d + extsz;
+  }
+  return dest;
+}
+
+
+uint64_t readbits(int be,void *p,unsigned bfsize,unsigned offset,unsigned size)
 /* read value from a bitfield (max. 64 bits) */
 {
   if ((bfsize&7)==0 && offset+size<=bfsize) {
-    unsigned long long mask = (1 << size) - 1;
-    unsigned long long val = readval(be,p,bfsize>>3);
+    uint64_t mask = (1 << size) - 1;
+    uint64_t val = readval(be,p,bfsize>>3);
 
     return be ? ((val >> (bfsize-(offset+size))) & mask)
               : ((val >> offset) & mask);
@@ -177,12 +218,12 @@ unsigned long long readbits(int be,void *p,unsigned bfsize,
 
 
 void setbits(int be,void *p,unsigned bfsize,unsigned offset,unsigned size,
-             unsigned long long d)
+             uint64_t d)
 /* write value to a bitfield (max. 64 bits) */
 {
   if ((bfsize&7)==0 && offset+size<=bfsize) {
-    unsigned long long mask = MAKEMASK(size);
-    unsigned long long val = readval(be,p,bfsize>>3);
+    uint64_t mask = MAKEMASK(size);
+    uint64_t val = readval(be,p,bfsize>>3);
     int s = be ? bfsize - (offset + size) : offset;
 
     setval(be,p,bfsize>>3,(val & ~(mask<<s)) | ((d & mask) << s));
@@ -192,35 +233,143 @@ void setbits(int be,void *p,unsigned bfsize,unsigned offset,unsigned size,
 }
 
 
+int countbits(taddr val)
+/* count number of bits in val */
+{
+  int cnt = 0;
+  int len = sizeof(taddr) << 3;
+
+  while (len--) {
+    if (val & 1)
+      cnt++;
+    val >>= 1;
+  }
+
+  return cnt;
+}
+
+
 void copy_cpu_taddr(void *dest,taddr val,size_t bytes)
 /* copy 'bytes' low-order bytes from val to dest in cpu's endianess */
 {
-  unsigned char *d = dest;
+  uint8_t *d = dest;
   int i;
 
   if (bytes > sizeof(taddr))
     ierror(0);
   if (BIGENDIAN) {
     for (i=bytes-1; i>=0; i--,val>>=8)
-      d[i] = (unsigned char)val;
+      d[i] = (uint8_t)val;
   }
   else if (LITTLEENDIAN) {
     for (i=0; i<(int)bytes; i++,val>>=8)
-      d[i] = (unsigned char)val;
+      d[i] = (uint8_t)val;
   }
   else
     ierror(0);
 }
 
 
-void fw8(FILE *f,unsigned char x)
+void conv2ieee32(int be,uint8_t *buf,tfloat f)
+/* single precision */
+{
+  union {
+    float sp;
+    uint32_t x;
+  } conv;
+
+  conv.sp = (float)f;
+  setval(be,buf,4,conv.x);
+}
+
+
+void conv2ieee64(int be,uint8_t *buf,tfloat f)
+/* double precision */
+{
+  union {
+    double dp;
+    uint64_t x;
+  } conv;
+
+  conv.dp = (double)f;
+  setval(be,buf,8,conv.x);
+}
+
+
+void conv2ieee80(int be,uint8_t *buf,tfloat f)
+/* extended precision */
+/* @@@ Warning: precision is lost! Converting to double precision. */
+{
+  uint64_t man;
+  uint32_t exp;
+  union {
+    double dp;
+    uint64_t x;
+  } conv;
+
+  conv.dp = (double)f;
+  if (conv.x == 0) {
+    memset(buf,0,12);  /* 0.0 */
+  }
+  else if (conv.x == 0x8000000000000000LL) {
+    if (be) {
+      buf[0] = 0x80;
+      memset(buf+1,0,11);  /* -0.0 */
+    }
+    else {
+      buf[11] = 0x80;
+      memset(buf,0,11);  /* -0.0 */
+    }
+  }
+  else {
+    man = ((conv.x & 0xfffffffffffffLL) << 11) | 0x8000000000000000LL;
+    exp = ((conv.x >> 52) & 0x7ff) - 0x3ff + 0x3fff;
+    if (be) {
+      buf[0] = ((conv.x >> 56) & 0x80) | (exp >> 8);
+      buf[1] = exp & 0xff;
+      buf[2] = 0;
+      buf[3] = 0;
+      setval(1,buf+4,8,man);
+    }
+    else {
+      buf[11] = ((conv.x >> 56) & 0x80) | (exp >> 8);
+      buf[10] = exp & 0xff;
+      buf[9] = 0;
+      buf[8] = 0;
+      setval(0,buf,8,man);
+    }
+  }
+}
+
+
+void conv2ieee128(int be,uint8_t *buf,tfloat f)
+/* quadrupel precision */
+{
+  /* @@@@ FIXME - Doesn't exist in hardware? */
+}
+
+
+void fw8(FILE *f,uint8_t x)
 {
   if (fputc(x,f) == EOF)
     output_error(2);  /* write error */
 }
 
 
-void fw32(FILE *f,unsigned long x,int be)
+void fw16(FILE *f,uint16_t x,int be)
+{
+  if (be) {
+    fw8(f,(x>>8) & 0xff);
+    fw8(f,x & 0xff);
+  }
+  else {
+    fw8(f,x & 0xff);
+    fw8(f,(x>>8) & 0xff);
+  }
+}
+
+
+void fw32(FILE *f,uint32_t x,int be)
 {
   if (be) {
     fw8(f,(x>>24) & 0xff);
@@ -246,6 +395,17 @@ void fwdata(FILE *f,void *d,size_t n)
 }
 
 
+void fwsblock(FILE *f,sblock *sb)
+{
+  size_t i;
+
+  for (i=0; i<sb->space; i++) {
+    if (!fwrite(sb->fill,sb->size,1,f))
+      output_error(2);  /* write error */
+  }
+}
+
+
 void fwalign(FILE *f,taddr n,taddr align)
 {
   taddr i;
@@ -255,15 +415,56 @@ void fwalign(FILE *f,taddr n,taddr align)
 }
 
 
-int fwsblock(FILE *f,sblock *sb)
+taddr fwpcalign(FILE *f,atom *a,section *sec,taddr pc)
 {
-  taddr i;
+  int align_warning = 0;
+  taddr n = balign(pc,a->align);
+  taddr patlen;
+  uint8_t *pat;
+
+  if (n == 0)
+    return pc;
+
+  if (a->type==SPACE && a->content.sb->space==0) {  /* space align atom */
+    if (a->content.sb->maxalignbytes!=0 &&  n>a->content.sb->maxalignbytes)
+      return pc;
+    pat = a->content.sb->fill;
+    patlen = a->content.sb->size;
+  }
+  else {
+    pat = sec->pad;
+    patlen = sec->padbytes;
+  }
+
+  pc += n;
+
+  while (n % patlen) {
+    if (!align_warning) {
+      align_warning = 1;
+      /*output_error(9,sec->name,(unsigned long)n,(unsigned long)patlen,
+                   ULLTADDR(pc));*/
+    }
+    fw8(f,0);
+    n--;
+  }
+
+  /* write alignment pattern */
+  while (n >= patlen) {
+    if (!fwrite(pat,patlen,1,f))
+      output_error(2);  /* write error */
+    n -= patlen;
+  }
 
-  for(i=0;i<sb->space;i++){
-    if(!fwrite(sb->fill,sb->size,1,f))
-      return 0;
+  while (n--) {
+    if (!align_warning) {
+      align_warning = 1;
+      /*output_error(9,sec->name,(unsigned long)n,(unsigned long)patlen,
+                   ULLTADDR(pc));*/
+    }
+    fw8(f,0);
   }
-  return 1;
+
+  return pc;
 }
 
 
@@ -294,18 +495,24 @@ char *convert_path(char *path)
         path++;
         continue;
       }
-      else if (*(path+1)=='/') {
+      else if (*(path+1)=='/' || *(path+1)=='\\') {
         path += 2;
         continue;
       }
-      else if (*(path+1)=='.' && *(path+2)=='/')
+      else if (*(path+1)=='.' &&
+               (*(path+2)=='/' || *(path+2)=='\\'))
         path += 2;
     }
-    *p++ = *path++;
+    if (*path == '\\') {
+      *p++ = '/';
+      path++;
+    }
+    else
+      *p++ = *path++;
   }
   *p = '\0';
 
-#elif defined(MSDOS) || defined(_WIN32)
+#elif defined(MSDOS) || defined(ATARI) || defined(_WIN32)
   char *p;
 
   newpath = mystrdup(path);
@@ -314,8 +521,14 @@ char *convert_path(char *path)
       *p = '\\';
   }
 
-#else
+#else /* Unixish */
+  char *p;
+
   newpath = mystrdup(path);
+  for (p=newpath; *p; p++) {
+    if (*p == '\\')
+      *p = '/';
+  }
 #endif
 
   return newpath;
@@ -375,7 +588,7 @@ char *strtolower(char *s)
 taddr balign(taddr addr,taddr a)
 /* return number of bytes required to achieve alignment */
 {
-  return (((addr+a-1)&~(a-1)) - addr);
+  return a ? (((addr+a-1)&~(a-1)) - addr) : 0;
 }
 
 
@@ -386,6 +599,17 @@ taddr palign(taddr addr,taddr a)
 }
 
 
+taddr pcalign(atom *a,taddr pc)
+{
+  taddr n = balign(pc,a->align);
+
+  if (a->type==SPACE && a->content.sb->maxalignbytes!=0)
+    if (n > a->content.sb->maxalignbytes)
+      n = 0;
+  return pc + n;
+}
+
+
 taddr get_sym_value(symbol *s)
 /* determine symbol's value, returns alignment for common symbols */
 {
@@ -422,31 +646,9 @@ taddr get_sym_size(symbol *s)
 }
 
 
-taddr get_sec_size(section *sec)
+utaddr get_sec_size(section *sec)
 {
   /* section size is assumed to be in in (sec->pc - sec->org), otherwise
      we would have to calculate it from the atoms and store it there */
-  return sec ? sec->pc - sec->org : 0;
-}
-
-
-taddr nreloc_real_addend(nreloc *nrel)
-{
-  /* In vasm the addend includes the symbol's section offset for LABSYMs */
-  if (nrel->sym->type == LABSYM)
-    return nrel->addend - nrel->sym->pc;
-  return nrel->addend;
-}
-
-
-void unsupp_reloc_error(rlist *rl)
-{
-  if (rl->type <= LAST_STANDARD_RELOC) {
-    nreloc *r = (nreloc *)rl->reloc;
-
-    output_error(4,rl->type,r->size,(unsigned long)r->mask,
-                 r->sym->name);  /* reloc type not supported */
-  }
-  else
-    output_error(5,rl->type);
+  return sec ? (utaddr)sec->pc - (utaddr)sec->org : 0;
 }
diff --git a/supp.h b/supp.h
index 6f7fa9f..4f2085a 100644
--- a/supp.h
+++ b/supp.h
@@ -1,5 +1,5 @@
 /* supp.h miscellaneous support routines */
-/* (c) in 2008-2010 by Frank Wille */
+/* (c) in 2008-2015 by Frank Wille */
 
 #ifndef SUPP_H
 #define SUPP_H
@@ -25,17 +25,26 @@ void *mycalloc(size_t);
 void *myrealloc(void *,size_t);
 void myfree(void *);
 
-unsigned long long readval(int,void *,int);
-void *setval(int,void *,int,unsigned long long);
-unsigned long long readbits(int,void *,unsigned,unsigned,unsigned);
-void setbits(int,void *,unsigned,unsigned,unsigned,unsigned long long);
+uint64_t readval(int,void *,size_t);
+void *setval(int,void *,size_t,uint64_t);
+void *setval_signext(int,void *,size_t,size_t,int64_t);
+uint64_t readbits(int,void *,unsigned,unsigned,unsigned);
+void setbits(int,void *,unsigned,unsigned,unsigned,uint64_t);
+int countbits(taddr);
 void copy_cpu_taddr(void *,taddr,size_t);
 
-void fw8(FILE *,unsigned char);
-void fw32(FILE *,unsigned long,int);
+void conv2ieee32(int,uint8_t *,tfloat);
+void conv2ieee64(int,uint8_t *,tfloat);
+void conv2ieee80(int,uint8_t *,tfloat);
+void conv2ieee128(int,uint8_t *,tfloat);
+
+void fw8(FILE *,uint8_t);
+void fw16(FILE *,uint16_t,int);
+void fw32(FILE *,uint32_t,int);
 void fwdata(FILE *,void *,size_t);
+void fwsblock(FILE *,sblock *);
 void fwalign(FILE *,taddr,taddr);
-int fwsblock(FILE *,sblock *);
+taddr fwpcalign(FILE *,atom *,section *,taddr);
 size_t filesize(FILE *);
 char *convert_path(char *);
 
@@ -47,11 +56,10 @@ char *strtolower(char *);
 
 taddr balign(taddr,taddr);
 taddr palign(taddr,taddr);
+taddr pcalign(atom *,taddr);
 
 taddr get_sym_value(symbol *);
 taddr get_sym_size(symbol *);
-taddr get_sec_size(section *);
-taddr nreloc_real_addend(nreloc *);
-void unsupp_reloc_error(rlist *);
+utaddr get_sec_size(section *);
 
 #endif
diff --git a/symbol.c b/symbol.c
new file mode 100644
index 0000000..8def368
--- /dev/null
+++ b/symbol.c
@@ -0,0 +1,453 @@
+/* symbol.c - manage all kinds of symbols */
+/* (c) in 2014-2015 by Volker Barthelmann and Frank Wille */
+
+#include "vasm.h"
+
+
+symbol *first_symbol=NULL;
+static symbol *saved_symbol=NULL;
+
+static char *last_global_label=emptystr;
+
+#ifndef SYMHTABSIZE
+#define SYMHTABSIZE 0x10000
+#endif
+static hashtable *symhash;
+static hashtable *regsymhash;
+
+
+static void print_type(FILE *f,symbol *p)
+{
+  static const char *typename[] = {"???","obj","func","sect","file"};
+
+  if (p == NULL)
+    ierror(0);
+  fprintf(f,"type=%s ",typename[TYPE(p)]);
+}
+
+
+void print_symbol(FILE *f,symbol *p)
+{
+  if (p==NULL)
+    ierror(0);	/* this is usually an error in a cpu-backend, don't crash! */
+
+  fprintf(f,"%s ",p->name);
+
+  if (p->type==LABSYM)
+    fprintf(f,"LAB (0x%llx) ",ULLTADDR(p->pc));
+  if (p->type==IMPORT)
+    fprintf(f,"IMP ");
+  if (p->type==EXPRESSION){
+    fprintf(f,"EXPR(");
+    print_expr(f,p->expr);
+    fprintf(f,") ");
+  }
+  if (p->flags&VASMINTERN)
+    fprintf(f,"INTERNAL ");
+  if (p->flags&EXPORT)
+    fprintf(f,"EXPORT ");
+  if (p->flags&COMMON)
+    fprintf(f,"COMMON ");
+  if (p->flags&WEAK)
+    fprintf(f,"WEAK ");
+  if (p->flags&ABSLABEL)
+    fprintf(f,"ABS ");
+  if (TYPE(p))
+    print_type(f,p);
+  if (p->size){
+    fprintf(f,"size=");
+    print_expr(f,p->size);
+    fprintf(f," ");
+  }
+  if (p->align)
+    fprintf(f,"align=%lu ",(unsigned long)p->align);
+  if (p->sec)
+    fprintf(f,"sec=%s ",p->sec->name);
+}
+
+
+char *get_bind_name(symbol *p)
+{
+  if (p->flags&EXPORT)
+    return "global";
+  else if (p->flags&WEAK)
+    return "weak";
+  else if (p->flags&LOCAL)
+    return "local";
+  return "unknown";
+}
+
+
+void add_symbol(symbol *p)
+{
+  hashdata data;
+
+  p->next = first_symbol;
+  first_symbol = p;
+  data.ptr = p;
+  add_hashentry(symhash,p->name,data);
+}
+
+
+symbol *find_symbol(char *name)
+{
+  hashdata data;
+  if (!find_name(symhash,name,&data))
+    return 0;
+  return data.ptr;
+}
+
+
+void refer_symbol(symbol *sym,char *refname)
+/* refer to an existing symbol with an additional name */
+{
+  hashdata data;
+  data.ptr=sym;
+  add_hashentry(symhash,refname,data);
+}
+
+
+void save_symbols(void)
+/* remember current list of symbols to be restored later */
+{
+  saved_symbol = first_symbol;
+}
+
+
+void restore_symbols(void)
+/* restore to a previously saved symbol list */
+{
+  symbol *firstprot=NULL, *lastprot=NULL;
+  symbol *symp;
+
+  if (saved_symbol) {
+    while (first_symbol != saved_symbol) {
+      symp = first_symbol;
+      first_symbol = symp->next;
+      if (symp->flags & PROTECTED) {
+        /* keep this symbol */
+        symp->next = firstprot;
+        firstprot = symp;
+        if (!lastprot)
+          lastprot = symp;
+      }
+      else {
+        rem_hashentry(symhash,symp->name,nocase);
+        /* myfree(symp->name);  could be dangerous? */
+        myfree(symp);
+      }
+    }
+    if (firstprot) {
+      /* add protected symbols to the list again */
+      lastprot->next = first_symbol;
+      first_symbol = firstprot;
+    }
+    saved_symbol = NULL;
+  }
+}
+
+
+int check_symbol(char *name)
+/* issue an error when symbol is already defined in the current source */
+{
+  symbol *sym;
+
+  if (sym = find_symbol(name)) {
+    if (sym->type != IMPORT) {
+      general_error(67,name);  /* repeatedly defined symbol */
+      return 1;
+    }
+  }
+  return 0;
+}
+
+
+int is_local_label(char *name)
+/* returns true when name belong to a label with local scope */
+{
+  return *name == ' ';
+}
+
+
+char *make_local_label(char *glob,int glen,char *loc,int llen)
+/* construct a local label of the form:
+   " " + global_label_name + " " + local_label_name */
+{
+  char *name,*p;
+
+  if (glen == 0) {
+    /* use the last defined global label */
+    glob = last_global_label;
+    glen = strlen(last_global_label);
+  }
+  p = name = mymalloc(llen+glen+3);
+  *p++ = ' ';
+  if (glen) {
+    memcpy(p,glob,glen);
+    p += glen;
+  }
+  *p++ = ' ';
+  memcpy(p,loc,llen);
+  *(p + llen) = '\0';
+  return name;
+}
+
+
+symbol *new_abs(char *name,expr *tree)
+{
+  symbol *new = find_symbol(name);
+  int add;
+
+  if (new) {
+    if (new->flags&EQUATE)
+      general_error(67,name); /* repeatedly defined symbol (error) */
+    if (new->type!=IMPORT && new->type!=EXPRESSION)
+      general_error(5,name);  /* symbol redefined (warning) */
+    add=0;
+  }
+  else {
+    new = mymalloc(sizeof(*new));
+    new->name = mystrdup(name);
+    add = 1;
+  }
+
+  new->type = EXPRESSION;
+  new->sec = 0;
+  new->expr = tree;
+
+  if (add) {
+    add_symbol(new);
+    new->flags = 0;
+    new->size = 0;
+    new->align = 0;
+  }
+  return new;
+}
+
+
+symbol *new_equate(char *name,expr *tree)
+{
+  symbol *sym;
+
+  check_symbol(name);
+  sym = new_abs(name,tree);
+  sym->flags |= EQUATE;  /* not allowed to change this absolute symbol */
+  return sym;
+}
+
+
+symbol *new_import(char *name)
+{
+  symbol *new = find_symbol(name);
+
+  if (new)
+    return new;
+
+  new = mymalloc(sizeof(*new));
+  new->type = IMPORT;
+  new->flags = 0;
+  new->name = mystrdup(name);
+  new->sec = 0;
+  new->pc = 0;
+  new->size = 0;
+  new->align = 0;
+  add_symbol(new);
+  return new;
+}
+
+
+symbol *new_labsym(section *sec,char *name)
+{
+  symbol *new;
+  int add;
+
+  if (!sec) {
+    sec = default_section();
+    if (!sec) {
+      general_error(3);
+      return new_import(name);
+    }
+  }
+
+  sec->flags |= HAS_SYMBOLS;
+
+  if (sec->flags&LABELS_ARE_LOCAL)
+    name = make_local_label(sec->name,strlen(sec->name),name,strlen(name));
+
+  if (new = find_symbol(name)) {
+    if (new->type!=IMPORT) {
+      symbol *old = new;
+
+      new = mymalloc(sizeof(*new));
+      *new = *old;
+      general_error(5,name);
+    }
+    add = 0;
+  }
+  else {
+    new = mymalloc(sizeof(*new));
+    if (sec->flags&LABELS_ARE_LOCAL)
+      new->name = name;
+    else
+      new->name = mystrdup(name);
+    add = 1;
+  }
+
+  new->type = LABSYM;
+  new->sec = sec;
+  new->pc = sec->pc;
+
+  if (add) {
+    add_symbol(new);
+    new->flags = 0;
+    new->size = 0;
+    new->align = 0;
+  }
+
+  if (*name != ' ')
+    last_global_label = new->name;
+
+  if (sec->flags & ABSOLUTE)
+    new->flags |= ABSLABEL;
+  else
+    new->flags &= ~ABSLABEL;
+
+  return new;
+}
+
+
+symbol *new_tmplabel(section *sec)
+{
+  static unsigned long tmplabcnt = 0;
+  char tmpnam[16];
+
+  sprintf(tmpnam," *tmp%09lu*",tmplabcnt++);
+  return new_labsym(sec,tmpnam);
+}
+
+
+symbol *internal_abs(char *name)
+{
+  symbol *new = find_symbol(name);
+
+  if (new) {
+    if (new->type!=EXPRESSION || (new->flags&(EXPORT|COMMON|WEAK)))
+      general_error(37,name);  /* internal symbol redefined by user */
+  }
+  else {
+    new = new_abs(name,number_expr(0));
+    new->flags |= VASMINTERN;
+  }
+  return new;
+}
+
+
+expr *set_internal_abs(char *name,taddr newval)
+{
+  symbol *sym = internal_abs(name);
+  expr *oldexpr = sym->expr;
+  taddr oldval;
+
+  if (oldexpr == NULL)
+    ierror(0);
+  eval_expr(oldexpr,&oldval,NULL,0);
+  if (newval != oldval)
+    sym->expr = number_expr(newval);
+  return oldexpr;
+}
+
+
+#ifdef HAVE_REGSYMS
+void add_regsym(regsym *rsym)
+{
+  hashdata data;
+
+  data.ptr = rsym;
+  add_hashentry(regsymhash,rsym->reg_name,data);
+}
+
+
+regsym *find_regsym(char *name,int len)
+{
+  hashdata data;
+
+  if (find_namelen(regsymhash,name,len,&data))
+    return data.ptr;
+  return NULL;
+}
+
+
+regsym *find_regsym_nc(char *name,int len)
+{
+  hashdata data;
+
+  if (find_namelen_nc(regsymhash,name,len,&data))
+    return data.ptr;
+  return NULL;
+}
+
+
+regsym *new_regsym(int redef,int no_case,char *name,int type,
+                   unsigned int flags,unsigned int num)
+{
+  int len = strlen(name);
+  regsym *rsym;
+
+  /* check if register symbol already exists */
+  rsym = no_case!=0 ? find_regsym_nc(name,len) : find_regsym(name,len);
+  if (rsym!=NULL && !redef) {
+    general_error(58,name);  /* register symbol redefined */
+    return rsym;
+  }
+
+  if (rsym == NULL) {
+    rsym = mymalloc(sizeof(regsym));
+    rsym->reg_name = mystrdup(name);
+    rsym->reg_type = type;
+    rsym->reg_flags = flags;
+    rsym->reg_num = num;
+    add_regsym(rsym);
+  }
+  else {
+    /* just update */
+    rsym->reg_type = type;
+    rsym->reg_flags = flags;
+    rsym->reg_num = num;
+  }
+
+  return rsym;
+}
+
+
+/* remove an already defined register symbol from the hash table */
+int undef_regsym(char *name,int no_case,int type)
+{
+  regsym *rsym = no_case!=0 ?
+                 find_regsym_nc(name,strlen(name)) :
+                 find_regsym(name,strlen(name));
+
+  if (rsym != NULL) {
+    if (rsym->reg_type == type) {
+      rem_hashentry(regsymhash,name,no_case);
+      return 1;
+    }
+    else
+      general_error(70);  /* register symbol has wrong type */
+  }
+  else
+    general_error(69);  /* register does not exist */
+
+  return 0;
+}
+
+#endif /* HAVE_REGSYMS */
+
+
+int init_symbol(void)
+{
+  symhash = new_hashtable(SYMHTABSIZE);
+#ifdef HAVE_REGSYMS
+  regsymhash = new_hashtable(REGSYMHTSIZE);
+#endif
+  return 1;
+}
diff --git a/symbol.h b/symbol.h
new file mode 100644
index 0000000..f187eaf
--- /dev/null
+++ b/symbol.h
@@ -0,0 +1,93 @@
+/* symbol.h - manage all kinds of symbols */
+/* (c) in 2014-2015 by Volker Barthelmann and Frank Wille */
+
+#ifndef SYMBOL_H
+#define SYMBOL_H
+
+/* symbol types */
+#define LABSYM 1
+#define IMPORT 2
+#define EXPRESSION 3
+
+/* symbol flags */
+#define TYPE(sym) ((sym)->flags&7)
+#define TYPE_UNKNOWN  0
+#define TYPE_OBJECT   1
+#define TYPE_FUNCTION 2
+#define TYPE_SECTION  3
+#define TYPE_FILE     4
+
+#define EXPORT (1<<3)
+#define INEVAL (1<<4)
+#define COMMON (1<<5)
+#define WEAK (1<<6)
+#define LOCAL (1<<7)        /* only informational */
+#define VASMINTERN (1<<8)
+#define PROTECTED (1<<9)
+#define REFERENCED (1<<10)
+#define ABSLABEL (1<<11)
+#define EQUATE (1<<12)
+#define RSRVD_S (1L<<24)    /* bits 24..27 are reserved for syntax modules */
+#define RSRVD_O (1L<<28)    /* bits 28..31 are reserved for output modules */
+
+struct symbol {
+  struct symbol *next;
+  int type;
+  uint32_t flags;
+  char *name;
+  expr *expr;
+  expr *size;
+  section *sec;
+  taddr pc;
+  taddr align;
+  uint32_t idx; /* usable by output module */
+};
+
+/* type of symbol references */
+#define LOCREF(symp) ((symp)->type==LABSYM&&!((symp)->flags&WEAK))
+#define EXTREF(symp) ((symp)->type==IMPORT||((symp)->flags&WEAK))
+
+
+#ifdef HAVE_REGSYMS
+/* register symbols */
+struct regsym {
+  char *reg_name;
+  int reg_type;
+  unsigned int reg_flags;
+  unsigned int reg_num;
+};
+#endif /* HAVE_REGSYMS */
+
+
+extern symbol *first_symbol;
+
+void print_symbol(FILE *,symbol *);
+char *get_bind_name(symbol *);
+void add_symbol(symbol *);
+symbol *find_symbol(char *);
+void refer_symbol(symbol *,char *);
+void save_symbols(void);
+void restore_symbols(void);
+
+int check_symbol(char *);
+int is_local_label(char *);
+char *make_local_label(char *,int,char *,int);
+symbol *new_abs(char *,expr *);
+symbol *new_equate(char *,expr *);
+symbol *new_import(char *);
+symbol *new_labsym(section *,char *);
+symbol *new_tmplabel(section *);
+symbol *internal_abs(char *);
+expr *set_internal_abs(char *,taddr);
+
+#ifdef HAVE_REGSYMS
+void add_regsym(regsym *);
+regsym *find_regsym(char *,int);
+regsym *find_regsym_nc(char *,int);
+regsym *new_regsym(int,int,char *,int,unsigned int,unsigned int);
+int undef_regsym(char *,int,int);
+#endif /* HAVE_REGSYMS */
+
+int init_symbol(void);
+
+#endif
diff --git a/symtab.c b/symtab.c
index b4263d4..57db510 100644
--- a/symtab.c
+++ b/symtab.c
@@ -1,70 +1,54 @@
 /* symtab.c  hashtable file for vasm */
-/* (c) in 2002-2004,2008,2011 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002-2004,2008,2011,2014 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
 hashtable *new_hashtable(size_t size)
 {
-  size_t i;
-  hashtable *new=mymalloc(sizeof(*new));
-  new->size=size;
-  new->collisions=0;
-  new->entries=mymalloc(size*sizeof(*new->entries));
-  for(i=0;i<size;i++)
-    new->entries[i]=0;
+  hashtable *new = mymalloc(sizeof(*new));
+
+  new->size = size;
+  new->collisions = 0;
+  new->entries = mycalloc(size*sizeof(*new->entries));
   return new;
 }
 
 size_t hashcode(char *name)
 {
-  size_t h=0,g;
+  size_t h = 5381;
+  int c;
 
-  while (*name) {
-    h = (h << 4) + (unsigned char)*name++;
-    if (g = h & 0xf0000000)
-      h ^= g >> 24;
-    h &= ~g;
-  }
-  return (h);
+  while (c = (unsigned char)*name++)
+    h = ((h << 5) + h) + c;
+  return h;
 }
 
 size_t hashcodelen(char *name,int len)
 {
-  size_t h=0,g;
-  
-  while (len--) {
-    h = (h << 4) + (unsigned char)*name++;
-    if (g = h & 0xf0000000)
-      h ^= g >> 24;
-    h &= ~g;
-  }
-  return (h);
+  size_t h = 5381;
+
+  while (len--)
+    h = ((h << 5) + h) + (unsigned char)*name++;
+  return h;
 }
 
 size_t hashcode_nc(char *name)
 {
-  size_t h=0,g;
+  size_t h = 5381;
+  int c;
 
-  while (*name) {
-    h = (h << 4) + tolower((unsigned char)*name++);
-    if (g = h & 0xf0000000)
-      h ^= g >> 24;
-    h &= ~g;
-  }
-  return (h);
+  while (c = (unsigned char)*name++)
+    h = ((h << 5) + h) + tolower(c);
+  return h;
 }
 
 size_t hashcodelen_nc(char *name,int len)
 {
-  size_t h=0,g;
-  
-  while (len--) {
-    h = (h << 4) + tolower((unsigned char)*name++);
-    if (g = h & 0xf0000000)
-      h ^= g >> 24;
-    h &= ~g;
-  }
-  return (h);
+  size_t h = 5381;
+
+  while (len--)
+    h = ((h << 5) + h) + tolower((unsigned char)*name++);
+  return h;
 }
 
 /* add to hashtable; name must be unique */
@@ -74,7 +58,7 @@ void add_hashentry(hashtable *ht,char *name,hashdata data)
   hashentry *new=mymalloc(sizeof(*new));
   new->name=name;
   new->data=data;
-  if(DEBUG){
+  if(debug){
     if(ht->entries[i])
       ht->collisions++;
   }
@@ -82,6 +66,26 @@ void add_hashentry(hashtable *ht,char *name,hashdata data)
   ht->entries[i]=new;
 }
 
+/* remove from hashtable; name must be unique */
+void rem_hashentry(hashtable *ht,char *name,int no_case)
+{
+  size_t i=no_case?(hashcode_nc(name)%ht->size):(hashcode(name)%ht->size);
+  hashentry *p,*last;
+
+  for(p=ht->entries[i],last=NULL;p;p=p->next){
+    if((no_case&&!stricmp(name,p->name))||(!no_case&&!strcmp(name,p->name))){
+      if(last==NULL)
+        ht->entries[i]=p->next;
+      else
+        last->next=p->next;
+      myfree(p);
+      return;
+    }
+    last=p;
+  }
+  ierror(0);
+}
+
 /* finds unique entry in hashtable */
 int find_name(hashtable *ht,char *name,hashdata *result)
 {
diff --git a/symtab.h b/symtab.h
index 51278e6..abb27f8 100644
--- a/symtab.h
+++ b/symtab.h
@@ -1,11 +1,11 @@
 /* symtab.h  hashtable header file for vasm */
-/* (c) in 2002-2004,2008 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002-2004,2008,2014 by Volker Barthelmann and Frank Wille */
 
 #include <stdlib.h>
 
 typedef union hashdata {
   void *ptr;
-  size_t idx;
+  uint32_t idx;
 } hashdata;
 
 typedef struct hashentry {
@@ -26,6 +26,7 @@ size_t hashcodelen(char *,int);
 size_t hashcode_nc(char *);
 size_t hashcodelen_nc(char *,int);
 void add_hashentry(hashtable *,char *,hashdata);
+void rem_hashentry(hashtable *,char *,int);
 int find_name(hashtable *,char *,hashdata *);
 int find_namelen(hashtable *,char *,int,hashdata *);
 int find_name_nc(hashtable *,char *,hashdata *);
diff --git a/syntax/madmac/syntax.c b/syntax/madmac/syntax.c
new file mode 100644
index 0000000..70ada4b
--- /dev/null
+++ b/syntax/madmac/syntax.c
@@ -0,0 +1,1074 @@
+/* syntax.c  syntax module for vasm */
+/* (c) in 2015 by Frank Wille */
+
+#include "vasm.h"
+
+/* The syntax module parses the input (read_next_line), handles
+   assembly-directives (section, data-storage etc.) and parses
+   mnemonics. Assembly instructions are split up in mnemonic name,
+   qualifiers and operands. new_inst returns a matching instruction,
+   if one exists.
+   Routines for creating sections and adding atoms to sections will
+   be provided by the main module.
+*/
+
+char *syntax_copyright="vasm madmac syntax module 0.3 (c) 2015 Frank Wille";
+hashtable *dirhash;
+char commentchar = ';';
+
+/* flags */
+static int rorgmode;
+
+static char text_name[] = ".text";
+static char data_name[] = ".data";
+static char bss_name[] = ".bss";
+static char text_type[] = "acrx";
+static char data_type[] = "adrw";
+static char bss_type[] = "aurw";
+char *defsectname = text_name;
+char *defsecttype = text_type;
+
+static char macroname[] = ".macro";
+static char endmname[] = ".endm";
+static char reptname[] = ".rept";
+static char endrname[] = ".endr";
+static struct namelen macro_dirlist[] = {
+  { 6,&macroname[0] }, { 5,&macroname[1] }, { 0,0 }
+};
+static struct namelen endm_dirlist[] = {
+  { 5,&endmname[0] }, { 4,&endmname[1] }, { 0,0 }
+};
+static struct namelen rept_dirlist[] = {
+  { 5,&reptname[0] }, { 4,&reptname[1] }, { 0,0 }
+};
+static struct namelen endr_dirlist[] = {
+  { 5,&endrname[0] }, { 4,&endrname[1] }, { 0,0 }
+};
+
+static char *labname;  /* current label field for assignment directives */
+
+
+char *skip(char *s)
+{
+  while (isspace((unsigned char )*s))
+    s++;
+  return s;
+}
+
+
+void eol(char *s)
+{
+  s = skip(s);
+  if (!ISEOL(s))
+    syntax_error(6);
+}
+
+
+char *skip_operand(char *s)
+{
+  int par_cnt = 0;
+  char c;
+
+  for (;;) {
+    c = *s;
+
+    if (START_PARENTH(c)) {
+      par_cnt++;
+    }
+    else if (END_PARENTH(c)) {
+      if (par_cnt > 0)
+        par_cnt--;
+      else
+        syntax_error(3);  /* too many closing parentheses */
+    }
+    else if (c=='\'' || c=='\"')
+      s = skip_string(s,c,NULL) - 1;
+    else if (!c || (par_cnt==0 && (c==',' || c==commentchar)))
+      break;
+
+    s++;
+  }
+
+  if (par_cnt != 0)
+    syntax_error(4);  /* missing closing parentheses */
+  return s;
+}
+
+
+char *const_prefix(char *s,int *base)
+{
+  if (isdigit((unsigned char)*s)) {
+    *base = 10;
+    return s;
+  }
+  if (*s == '$' && isxdigit((unsigned char)*(s+1))) {
+    *base = 16;
+    return s+1;
+  }
+  if (*s=='@' && isdigit((unsigned char)*(s+1))) {
+    *base = 8;
+    return s+1;
+  }
+  if (*s == '%') {
+    *base = 2;
+    return s+1;
+  }
+  *base = 0;
+  return s;
+}
+
+
+char *const_suffix(char *start,char *end)
+{
+  return end;
+}
+
+
+char *get_local_label(char **start)
+/* local labels start with '.' */
+{
+  char *name = *start;
+  char *end;
+
+  if (*name == '.') {
+    end = skip_identifier(name+1);
+    if (end != NULL) {
+      *start = skip(end);
+      return make_local_label(NULL,0,name,end-name);
+    }
+  }
+  return NULL;
+}
+
+
+/* Directives */
+
+static void handle_equ(char *s)
+{
+  int exp;
+  symbol *sym;
+
+  if (*s=='=' && *(s-1)=='=') {
+    s = skip(s+1);
+    exp = 1;  /* == automatically exports a symbol */
+  }
+  else
+    exp = 0;
+
+  sym = new_equate(labname,parse_expr_tmplab(&s));
+  if (exp) {
+    if (is_local_label(labname))
+      syntax_error(1);  /* cannot export local symbol */
+    sym->flags |= EXPORT;
+  }
+  eol(s);
+}
+
+
+static void handle_set(char *s)
+{
+  new_abs(labname,parse_expr_tmplab(&s));
+  eol(s);
+}
+
+
+static int do_cond(char **s)
+{
+  expr *condexp = parse_expr_tmplab(s);
+  taddr val;
+
+  if (!eval_expr(condexp,&val,NULL,0)) {
+    general_error(30);  /* expression must be constant */
+    val = 0;
+  }
+  free_expr(condexp);
+  return val != 0;
+}
+
+
+static void handle_if(char *s)
+{
+  cond_if(do_cond(&s));
+  eol(s);
+}
+
+
+static void handle_else(char *s)
+{
+  cond_skipelse();
+  eol(s);
+}
+
+
+static void handle_endif(char *s)
+{
+  cond_endif();
+  eol(s);
+}
+
+
+static void try_leave_rorg(void)
+{
+  if (rorgmode && current_section!=NULL && (current_section->flags&IN_RORG))
+    end_rorg();
+}
+
+
+static void do_section(char *s,char *name,char *type)
+{
+  try_leave_rorg();  /* works like ending the last RORG-block */
+  set_section(new_section(name,type,1));
+  eol(s);
+}
+
+
+static void handle_text(char *s)
+{
+  do_section(s,text_name,text_type);
+}
+
+
+static void handle_data(char *s)
+{
+  do_section(s,data_name,data_type);
+}
+
+
+static void handle_bss(char *s)
+{
+  do_section(s,bss_name,bss_type);
+}
+
+
+static void handle_org(char *s)
+{
+  taddr addr = parse_constexpr(&s);
+
+  if (rorgmode)
+    start_rorg(addr);
+  else
+    set_section(new_org(addr));
+  eol(s);
+}
+
+
+#ifdef VASM_CPU_JAGRISC
+static void handle_68000(char *s)
+{
+  try_leave_rorg();  /* works like ending the last RORG-block */
+  eol(s);
+}
+#endif
+
+
+static void handle_globl(char *s)
+{
+  char *name;
+  symbol *sym;
+
+  for (;;) {
+    if (!(name = parse_identifier(&s))) {
+      syntax_error(10);  /* identifier expected */
+      return;
+    }
+    sym = new_import(name);
+    myfree(name);
+
+    if (sym->flags & EXPORT)
+      general_error(62,sym->name,get_bind_name(sym)); /* binding already set */
+    sym->flags |= EXPORT;
+
+    s = skip(s);
+    if (*s == ',')
+      s = skip(s+1);
+    else
+      break;
+  }
+
+  eol(s);
+}
+
+
+static void handle_assert(char *s)
+{
+  char *expstr = s;
+  expr *aexp = NULL;
+
+  do {
+    s = skip(s);
+    if (aexp)  /* concat. expressions with log. AND */
+      aexp = make_expr(LAND,aexp,parse_expr(&s));
+    else
+      aexp = parse_expr(&s);
+    simplify_expr(aexp);
+    s = skip(s);
+  }
+  while (*s++ == ',');  /* another assertion, separated by comma? */
+
+  s--;
+  add_atom(0,new_assert_atom(aexp,cnvstr(expstr,s-expstr),NULL));
+  eol(s);
+}
+
+
+static void handle_datadef(char *s,int sz)
+{
+  for (;;) {
+    char *opstart = s;
+    operand *op;
+    dblock *db = NULL;
+
+    if (OPSZ_BITS(sz)==8 && (*s=='\"' || *s=='\'')) {
+      if (db = parse_string(&opstart,*s,8)) {
+        add_atom(0,new_data_atom(db,1));
+        s = opstart;
+      }
+    }
+    if (!db) {
+      op = new_operand();
+      s = skip_operand(s);
+      if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(sz)))
+        add_atom(0,new_datadef_atom(OPSZ_BITS(sz),op));
+      else
+        syntax_error(8);  /* invalid data operand */
+    }
+
+    s = skip(s);
+    if (*s == ',')
+      s = skip(s+1);
+    else
+      break;
+  }
+}
+
+
+static void handle_d8(char *s)
+{
+  handle_datadef(s,8);
+}
+
+
+static void handle_d16(char *s)
+{
+  handle_datadef(s,16);
+}
+
+
+static void handle_d32(char *s)
+{
+  handle_datadef(s,32);
+}
+
+
+static void handle_i32(char *s)
+{
+  handle_datadef(s,OPSZ_SWAP|32);
+}
+
+
+static void do_space(int size,expr *cnt,expr *fill)
+{
+  atom *a;
+
+  a = new_space_atom(cnt,size>>3,fill);
+  a->align = DATA_ALIGN(size);
+  add_atom(0,a);
+}
+
+
+static void handle_space(char *s,int size)
+{
+  do_space(size,parse_expr_tmplab(&s),0);
+  eol(s);
+}
+
+
+static void handle_spc8(char *s)
+{
+  handle_space(s,8);
+}
+
+
+static void handle_spc16(char *s)
+{
+  handle_space(s,16);
+}
+
+
+static void handle_spc32(char *s)
+{
+  handle_space(s,32);
+}
+
+
+static void handle_block(char *s,int size)
+{
+  expr *cnt,*fill=0;
+
+  cnt = parse_expr_tmplab(&s);
+  s = skip(s);
+  if (*s == ',') {
+    s = skip(s+1);
+    fill = parse_expr_tmplab(&s);
+  }
+  do_space(size,cnt,fill);
+  eol(s);
+}
+
+
+static void handle_blk8(char *s)
+{
+  handle_block(s,8);
+}
+
+
+static void handle_blk16(char *s)
+{
+  handle_block(s,16);
+}
+
+
+static void handle_blk32(char *s)
+{
+  handle_block(s,32);
+}
+
+
+static void handle_end(char *s)
+{
+  end_source(cur_src);
+  eol(s);
+}
+
+
+static void do_alignment(taddr align,expr *offset,size_t pad,expr *fill)
+{
+  atom *a = new_space_atom(offset,pad,fill);
+
+  a->align = align;
+  add_atom(0,a);
+}
+
+
+static void handle_even(char *s)
+{
+  do_alignment(2,number_expr(0),1,NULL);
+  eol(s);
+}
+
+
+static void handle_long(char *s)
+{
+  do_alignment(4,number_expr(0),1,NULL);
+  eol(s);
+}
+
+
+static void handle_phrase(char *s)
+{
+  do_alignment(8,number_expr(0),1,NULL);
+  eol(s);
+}
+
+
+static void handle_dphrase(char *s)
+{
+  do_alignment(16,number_expr(0),1,NULL);
+  eol(s);
+}
+
+
+static void handle_qphrase(char *s)
+{
+  do_alignment(32,number_expr(0),1,NULL);
+  eol(s);
+}
+
+
+static void handle_include(char *s)
+{
+  char *name;
+
+  if (name = parse_name(&s)) {
+    eol(s);
+    include_source(name);
+  }
+}
+
+
+static void handle_incbin(char *s)
+{
+  char *name;
+
+  if (name = parse_name(&s))
+    include_binary_file(name,0,0);
+  eol(s);
+}
+
+
+static void handle_rept(char *s)
+{
+  new_repeat((int)parse_constexpr(&s),rept_dirlist,endr_dirlist);
+  eol(s);
+}
+
+
+static void handle_endr(char *s)
+{
+  syntax_error(12,endrname,reptname);  /* unexpected endr without rept */
+}
+
+
+static void handle_list(char *s)
+{
+  set_listing(1);
+  eol(s);
+}
+
+
+static void handle_nlist(char *s)
+{
+  set_listing(0);
+  eol(s);
+}
+
+
+static void handle_macro(char *s)
+{
+  char *name;
+
+  if (name = parse_identifier(&s)) {
+    s = skip(s);
+    if (ISEOL(s))
+      s = NULL;  /* no named arguments */
+    new_macro(name,endm_dirlist,s);
+    myfree(name);
+  }
+  else
+    syntax_error(10);  /* identifier expected */
+}
+
+
+static void handle_macundef(char *s)
+{
+  char *name;
+
+  while (name = parse_identifier(&s)) {
+    undef_macro(name);
+    myfree(name);
+    s = skip(s);
+    if (*s != ',')
+      break;
+    s = skip(s+1);
+  }
+  eol(s);
+}
+
+
+static void handle_endm(char *s)
+{
+  syntax_error(12,endmname,macroname);  /* unexpected endm without macro */
+}
+
+
+static void handle_exitm(char *s)
+{
+  leave_macro();
+  eol(s);
+}
+
+
+static void handle_print(char *s)
+{
+  while (!ISEOL(s)) {
+    if (*s == '\"') {
+      size_t len;
+      char *txt;
+
+      skip_string(s,'\"',&len);
+      if (len > 0) {
+        txt = mymalloc(len+1);
+        s = read_string(txt,s,'\"',8);
+        txt[len] = '\0';
+        add_atom(0,new_text_atom(txt));
+      }
+    }
+    else {
+      int type = PEXP_HEX;
+      int size = 16;
+
+      while (*s == '/') {
+        /* format character */
+        char f;
+
+        s = skip(s+1);
+        f = tolower((unsigned char)*s);
+        if (s = skip_identifier(s)) {
+          switch (f) {
+            case 'x':
+              type = PEXP_HEX;
+              break;
+            case 'd':
+              type = PEXP_SDEC;
+              break;
+            case 'u':
+              type = PEXP_UDEC;
+              break;
+            case 'w':
+              size = 16;
+              break;
+            case 'l':
+              size = 32;
+              break;
+            default:
+              syntax_error(7,f);  /* unknown print format flag */
+              break;
+          }
+        }
+        else {
+          syntax_error(9);  /* print format corrupted */
+          break;
+        }
+        s = skip(s);
+      }
+      add_atom(0,new_expr_atom(parse_expr(&s),type,size));
+    }
+    s = skip(s);
+    if (*s != ',')
+      break;
+    s = skip(s+1);
+  }
+  add_atom(0,new_text_atom(NULL));  /* new line */
+  eol(s);
+}
+
+
+struct {
+  char *name;
+  void (*func)(char *);
+} directives[] = {
+  "equ",handle_equ,
+  "=",handle_equ,
+  "set",handle_set,
+  "if",handle_if,
+  "else",handle_else,
+  "endif",handle_endif,
+  "rept",handle_rept,
+  "endr",handle_endr,
+  "macro",handle_macro,
+  "endm",handle_endm,
+  "exitm",handle_exitm,
+  "macundef",handle_macundef,
+  "text",handle_text,
+  "data",handle_data,
+  "bss",handle_bss,
+  "org",handle_org,
+#ifdef VASM_CPU_JAGRISC
+  "68000",handle_68000,
+#endif
+  "globl",handle_globl,
+  "extern",handle_globl,
+  "assert",handle_assert,
+  "dc",handle_d16,
+  "dc.b",handle_d8,
+  "dc.w",handle_d16,
+  "dc.l",handle_d32,
+  "dc.i",handle_i32,
+  "dcb",handle_blk16,
+  "dcb.b",handle_blk8,
+  "dcb.w",handle_blk16,
+  "dcb.l",handle_blk32,
+  "ds",handle_spc16,
+  "ds.b",handle_spc8,
+  "ds.w",handle_spc16,
+  "ds.l",handle_spc32,
+  "end",handle_end,
+  "even",handle_even,
+  "long",handle_even,
+  "phrase",handle_phrase,
+  "dphrase",handle_dphrase,
+  "qphrase",handle_qphrase,
+  "include",handle_include,
+  "incbin",handle_incbin,
+  "list",handle_list,
+  "nlist",handle_nlist,
+  "nolist",handle_nlist,
+  "print",handle_print
+};
+
+int dir_cnt = sizeof(directives) / sizeof(directives[0]);
+
+
+/* checks for a valid directive, and return index when found, -1 otherwise */
+static int check_directive(char **line)
+{
+  char *s,*name;
+  hashdata data;
+
+  s = skip(*line);
+  if (!ISIDSTART(*s) && *s!='=')
+    return -1;
+  name = s++;
+  while (ISIDCHAR(*s) || *s=='.')
+    s++;
+  if (*name=='.')  /* leading dot is optional for all directives */
+    name++;
+  if (!find_namelen_nc(dirhash,name,s-name,&data))
+    return -1;
+  *line = s;
+  return data.idx;
+}
+
+
+/* Handles assembly directives; returns non-zero if the line
+   was a directive. */
+static int handle_directive(char *line)
+{
+  int idx = check_directive(&line);
+
+  if (idx >= 0) {
+    directives[idx].func(skip(line));
+    return 1;
+  }
+  return 0;
+}
+
+
+static int oplen(char *e,char *s)
+{
+  while (s!=e && isspace((unsigned char)e[-1]))
+    e--;
+  return e-s;
+}
+
+
+void parse(void)
+{
+  char *s,*line,*inst;
+  char *ext[MAX_QUALIFIERS?MAX_QUALIFIERS:1];
+  char *op[MAX_OPERANDS];
+  int ext_len[MAX_QUALIFIERS?MAX_QUALIFIERS:1];
+  int op_len[MAX_OPERANDS];
+  int ext_cnt,op_cnt,inst_len;
+  instruction *ip;
+
+  while (line = read_next_line()) {
+
+    if (!cond_state()) {
+      /* skip source until ELSE or ENDIF */
+      int idx = -1;
+
+      s = skip(line);
+      if (labname = parse_labeldef(&s,1)) {
+        if (*s == ':')
+          s++;  /* skip double-colon */
+        myfree(labname);
+        s = skip(s);
+      }
+      else {
+        if (inst = skip_identifier(s)) {
+          inst = skip(inst);
+          idx = check_directive(&inst);
+        }
+      }
+      if (idx < 0)
+        idx = check_directive(&s);
+      if (idx >= 0) {
+        if (directives[idx].func == handle_if)
+          cond_skipif();
+        else if (directives[idx].func == handle_else)
+          cond_else();
+        else if (directives[idx].func == handle_endif)
+          cond_endif();
+      }
+      continue;
+    }
+
+    s = skip(line);
+again:
+    if (*s=='\0' || *line=='*' || *s==commentchar)
+      continue;
+
+    if (labname = parse_labeldef(&s,1)) {
+      /* we have found a valid global or local label */
+      symbol *sym = new_labsym(0,labname);
+
+      if (*s == ':') {
+        /* double colon automatically declares label as exported */
+        sym->flags |= EXPORT;
+        s++;
+      }
+      add_atom(0,new_label_atom(sym));
+      myfree(labname);
+      s = skip(s);
+    }
+    else {
+      /* there can still be a sym. in the 1st fld and an assignm. directive */
+      inst = s;
+      labname = parse_symbol(&s);
+      if (labname == NULL) {
+        syntax_error(10);  /* identifier expected */
+        continue;
+      }
+      s = skip(s);
+
+      /* Now we have labname pointing to the first field in the line
+         and s pointing to the second. Find out where the directive is. */
+      if (!ISEOL(s)) {
+#ifdef PARSE_CPU_LABEL
+        if (PARSE_CPU_LABEL(labname,&s)) {
+          myfree(labname);
+          continue;
+        }
+#endif
+        if (handle_directive(s)) {
+          myfree(labname);
+          continue;
+        }
+      }
+
+      /* directive or mnemonic must be in the first field */
+      myfree(labname);
+      s = inst;
+    }
+
+    if (!strnicmp(s,".iif",4) || !(strnicmp(s,"iif",3))) {
+      /* immediate conditional assembly: parse line after ',' when true */
+      s = skip(*s=='.'?s+4:s+3);
+      if (do_cond(&s)) {
+        s = skip(s);
+        if (*s == ',') {
+          s = skip(s+1);
+          goto again;
+        }
+        else
+          syntax_error(0);  /* malformed immediate-if */
+      }
+      continue;
+    }
+
+    /* check for directives */
+    s = parse_cpu_special(s);
+    if (ISEOL(s))
+      continue;
+
+    if (handle_directive(s))
+      continue;
+
+    /* read mnemonic name */
+    inst = s;
+    ext_cnt = 0;
+    if (!ISIDSTART(*s)) {
+      syntax_error(10);  /* identifier expected */
+      continue;
+    }
+#if MAX_QUALIFIERS==0
+    while (*s && !isspace((unsigned char)*s))
+      s++;
+    inst_len = s - inst;
+#else
+    s = parse_instruction(s,&inst_len,ext,ext_len,&ext_cnt);
+#endif
+    if (!isspace((unsigned char)*s) && *s!='\0')
+      syntax_error(2);  /* no space before operands */
+    s = skip(s);
+
+    if (execute_macro(inst,inst_len,ext,ext_len,ext_cnt,s))
+      continue;
+
+    /* read operands, terminated by comma or blank (unless in parentheses) */
+    op_cnt = 0;
+    while (!ISEOL(s) && op_cnt<MAX_OPERANDS) {
+      op[op_cnt] = s;
+      s = skip_operand(s);
+      op_len[op_cnt] = oplen(s,op[op_cnt]);
+#if !ALLOW_EMPTY_OPS
+      if (op_len[op_cnt] <= 0)
+        syntax_error(5);  /* missing operand */
+      else
+#endif
+        op_cnt++;
+      s = skip(s);
+      if (*s != ',')
+        break;
+      else
+        s = skip(s+1);
+    }
+    eol(s);
+
+    ip = new_inst(inst,inst_len,op_cnt,op,op_len);
+
+#if MAX_QUALIFIERS>0
+    if (ip) {
+      int i;
+
+      for (i=0; i<ext_cnt; i++)
+        ip->qualifiers[i] = cnvstr(ext[i],ext_len[i]);
+      for(; i<MAX_QUALIFIERS; i++)
+        ip->qualifiers[i] = NULL;
+    }
+#endif
+
+    if (ip)
+      add_atom(0,new_inst_atom(ip));
+  }
+
+  cond_check();  /* check for open conditional blocks */
+}
+
+
+/* parse next macro argument */
+char *parse_macro_arg(struct macro *m,char *s,
+                      struct namelen *param,struct namelen *arg)
+{
+  arg->len = 0;  /* cannot select specific named arguments */
+  param->name = s;
+
+  if (*s=='\"' || *s=='\'') {
+    s = skip_string(s,*s,NULL);
+    param->len = s - param->name;
+  }
+  else {
+    s = skip_operand(s);
+    param->len = s - param->name;
+  }
+
+  return s;
+}
+
+
+/* write 0 to buffer when macro argument is missing or empty, 1 otherwise */
+static int macro_arg_defined(source *src,char *argstart,char *argend,char *d)
+{
+  int n = find_macarg_name(src,argstart,argend-argstart);
+
+  if (n >= 0) {
+    /* valid argument name */
+    *d++ = (n<src->num_params && n<maxmacparams && src->param_len[n]>0) ?
+           '1' : '0';
+    return 1;
+  }
+  return -1;
+}
+
+
+/* expands arguments and special escape codes into macro context */
+int expand_macro(source *src,char **line,char *d,int dlen)
+{
+  int nc = -1;
+  int n;
+  char *s = *line;
+  char *end;
+
+  if (*s++ == '\\') {
+    /* possible macro expansion detected */
+
+    if (*s == '\\') {
+      *d++ = *s++;
+      if (esc_sequences) {
+        *d++ = '\\';  /* make it a double \ again */
+        nc = 2;
+      }
+      else
+        nc = 1;
+    }
+
+    else if (*s == '~') {
+      /* \~: insert a unique id */
+      char buf[16];
+
+      nc = sprintf(buf,"M%lu",src->id);
+      if (dlen >= nc) {
+        s++;
+        memcpy(d,buf,nc);
+      }
+      else
+        nc = -1;
+    }
+    else if (*s == '#') {
+      /* \# : insert number of parameters */
+      if (dlen >= 2) {
+        nc = sprintf(d,"%d",src->num_params);
+        s++;
+      }
+    }
+    else if (*s == '!') {
+      /* \!: copy qualifier (dot-size) */
+      *d++ = '.';
+      nc = 1 + copy_macro_qual(src,0,d,dlen);
+      s++;
+    }
+    else if (isdigit((unsigned char)*s)) {
+      /* \1..\9,\0 : insert macro parameter 1..9,10 */
+      nc = copy_macro_param(src,*s=='0'?0:*s-'1',d,dlen);
+      s++;
+    }
+    else if (*s=='?' && dlen>0) {
+      if ((end = skip_identifier(s+1)) != NULL) {
+        /* \?argname : 1 when argument defined, 0 when missing or empty */
+        if ((nc = macro_arg_defined(src,s+1,end,d)) >= 0)
+          s = end;
+      }
+      else if (*(s+1)=='{' && (end = skip_identifier(s+2))!=NULL) {
+        if (*end == '}') {
+          /* \?{argname} : 1 when argument defined, 0 when missing or empty */
+          if ((nc = macro_arg_defined(src,s+2,end,d)) >= 0)
+            s = end + 1;
+        }
+      }
+    }
+    else if (*s=='{' && (end = skip_identifier(s+1))!=NULL) {
+      if (*end == '}') {
+        if ((n = find_macarg_name(src,s+1,end-(s+1))) >= 0) {
+          /* \{argname}: insert macro parameter n */
+          nc = copy_macro_param(src,n,d,dlen);
+          s = end + 1;
+        }
+      }
+    }
+    else if ((end = skip_identifier(s)) != NULL) {
+      if ((n = find_macarg_name(src,s,end-s)) >= 0) {
+        /* \argname: insert named macro parameter n */
+        nc = copy_macro_param(src,n,d,dlen);
+        s = end;
+      }
+    }
+
+    if (nc >= 0)
+      *line = s;  /* update line pointer when expansion took place */
+  }
+
+  return nc;  /* number of chars written to line buffer, -1: no expansion */
+}
+
+
+int init_syntax()
+{
+  size_t i;
+  hashdata data;
+
+  dirhash = new_hashtable(0x200);
+  for (i=0; i<dir_cnt; i++) {
+    data.idx = i;
+    add_hashentry(dirhash,directives[i].name,data);
+  }
+  
+  cond_init();
+  current_pc_char = '*';
+  esc_sequences = 1;
+
+  /* assertion errors are only a warning */
+  modify_gen_err(WARNING,47,0);
+
+  return 1;
+}
+
+
+int syntax_args(char *p)
+{
+  if (!strcmp(p,"-rorg")) {
+    rorgmode = 1;
+    return 1;
+  }
+  return 0;
+}
diff --git a/syntax/madmac/syntax.h b/syntax/madmac/syntax.h
new file mode 100644
index 0000000..9dfa6a3
--- /dev/null
+++ b/syntax/madmac/syntax.h
@@ -0,0 +1,13 @@
+/* snytax.h  syntax header file for vasm */
+/* (c) in 2015 by Frank Wille */
+
+/* macros to recognize identifiers */
+#define ISIDSTART(x) ((x)=='.'||(x)=='?'||(x)=='_'||isalpha((unsigned char)(x)))
+#define ISIDCHAR(x) ((x)=='$'||(x)=='?'||(x)=='_'||isalnum((unsigned char)(x)))
+#define ISEOL(x) (*(x)=='\0' || *(x)==commentchar)
+
+/* result of a boolean operation */
+#define BOOLEAN(x) (x)
+
+/* overwrite macro defaults */
+#define MAXMACPARAMS 64
diff --git a/syntax/madmac/syntax_errors.h b/syntax/madmac/syntax_errors.h
new file mode 100644
index 0000000..5f1105e
--- /dev/null
+++ b/syntax/madmac/syntax_errors.h
@@ -0,0 +1,13 @@
+  "malformed immediate-if",ERROR,
+  "cannot export local symbol",ERROR,
+  "no space before operands",WARNING,
+  "too many closing parentheses",WARNING,
+  "missing closing parentheses",WARNING,
+  "missing operand",ERROR,                                           /* 5 */
+  "garbage at end of line",WARNING,
+  "unknown print format flag \'%c\'",WARNING,
+  "invalid data operand",ERROR,
+  "print format corrupted",ERROR,
+  "identifier expected",ERROR,                                       /* 10 */
+  "",WARNING,
+  "unexpected \"%s\" without \"%s\"",ERROR,
diff --git a/syntax/mot/syntax.c b/syntax/mot/syntax.c
index 7b40f72..a37fa4e 100644
--- a/syntax/mot/syntax.c
+++ b/syntax/mot/syntax.c
@@ -1,5 +1,5 @@
 /* syntax.c  syntax module for vasm */
-/* (c) in 2002-2011 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 #include "vasm.h"
 
@@ -12,8 +12,8 @@
    be provided by the main module.
 */
 
-char *syntax_copyright="vasm motorola syntax module 3.3 (c) 2002-2011 Frank Wille";
-
+char *syntax_copyright="vasm motorola syntax module 3.8 (c) 2002-2015 Frank Wille";
+hashtable *dirhash;
 char commentchar = ';';
 
 static char code_name[] = "CODE";
@@ -28,18 +28,33 @@ static char fo_name[] = "__FO";
 char *defsectname = code_name;
 char *defsecttype = code_type;
 
-static int align_data = 0;
-static int phxass_compat = 0;
-static int allow_spaces = 0;
-static int dot_idchar = 0;
+static struct namelen endm_dirlist[] = {
+  { 4,"endm" }, { 0,0 }
+};
+static struct namelen rept_dirlist[] = {
+  { 4,"rept" }, { 0,0 }
+};
+static struct namelen endr_dirlist[] = {
+  { 4,"endr" }, { 0,0 }
+};
+static struct namelen erem_dirlist[] = {
+  { 4,"erem" }, { 0,0 }
+};
+
+static int allmp;
+static int align_data;
+static int phxass_compat;
+static int devpac_compat;
+static int allow_spaces;
+static int check_comm;
+static int dot_idchar;
 static char local_char = '.';
 
-static hashtable *dirhash;
+#define IDSTACKSIZE 100
+static unsigned long id_stack[IDSTACKSIZE];
+static int id_stack_index;
 static int parse_end = 0;
-
-#define MAXCONDLEV 63
-static char cond[MAXCONDLEV+1];
-static int clev,ifnesting;
+static expr *carg1;
 
 
 char *skip(char *s)
@@ -50,16 +65,42 @@ char *skip(char *s)
 }
 
 
+int iscomment(char *s)
+{
+  if (phxass_compat) {
+    /* PhxAss can also introduce comments with * in operands and expressions,
+       provided that is follows a space character. */
+    char *start = s;
+
+    s = skip(start);
+    if (s>start && *s=='*' && isspace((unsigned char )*(s-1)))
+      return 1;
+  }
+  return *s == commentchar;
+}
+
+
+/* issue a warning for comments introduced by blanks in the operand field */
+static void comment_check(char *s)
+{
+  if (isspace((unsigned char)*s)) {
+    s = skip(s + 1);
+    if (!ISEOL(s))
+      syntax_error(18);  /* check comment warning */
+  }
+}
+
+
 /* check for end of line, issue error, if not */
 void eol(char *s)
 {
   if (allow_spaces) {
     s = skip(s);
-    if (*s!='\0' && *s!=commentchar)
+    if (!ISEOL(s))
       syntax_error(6);
   }
   else {
-    if (*s!='\0' && *s!=commentchar && !isspace((unsigned char)*s))
+    if (!ISEOL(s) && !isspace((unsigned char)*s))
       syntax_error(6);
   }
 }
@@ -71,10 +112,13 @@ int isidchar(char c)
     return 1;
   if (dot_idchar && c=='.')
     return 1;
+  if (phxass_compat && (unsigned char)c>=0x80)
+    return 1;
   return 0;
 }
 
 
+#ifdef VASM_CPU_M68K
 char *chkidend(char *start,char *end)
 {
   if (dot_idchar && (end-start)>2 && *(end-2)=='.') {
@@ -85,17 +129,23 @@ char *chkidend(char *start,char *end)
   }
   return end;
 }
+#endif
 
 
 char *exp_skip(char *s)
 {
-  if (allow_spaces && !phxass_compat) {
-    return skip(s);
-  }
-  else {
-    if (isspace((unsigned char)*s))
+  if (allow_spaces) {
+    char *start = s;
+
+    s = skip(start);
+    if (phxass_compat && s>start && *s=='*' && isspace((unsigned char )*(s-1)))
       *s = '\0';  /* rest of operand is ignored */
   }
+  else if (isspace((unsigned char)*s)) {
+    if (check_comm)
+      comment_check(s);
+    *s = '\0';  /* rest of operand is ignored */
+  }
   return s;
 }
 
@@ -120,7 +170,7 @@ char *skip_operand(char *s)
     }
     else if (c=='\'' || c=='\"')
       s = skip_string(s,c,NULL) - 1;
-    else if (!c || (par_cnt==0 && (c==',' || c==commentchar)))
+    else if (!c || (par_cnt==0 && (c==',' || iscomment(s))))
       break;
 
     s++;
@@ -138,32 +188,38 @@ static symbol *new_setoffset_size(char *equname,char *symname,
                                   char **s,int dir,taddr size)
 {
   symbol *sym,*equsym;
-  expr *new;
-
-  if (equname) {
-    if (sym = find_symbol(equname)) {
-      if (sym->type != IMPORT) {
-        syntax_error(14);  /* repeatedly defined symbol */
-        return NULL;
-      }
-    }
-  }
+  expr *new,*old;
 
   /* get current offset symbol expression, then increment or decrement it */
   sym = internal_abs(symname);
-  if (**s!='\0' && **s!=commentchar) {
-    /* make a new expression out of the parsed expression multiplied by size
-       and add to or subtract it from the current symbol's expression */
+
+  if (!ISEOL(*s)) {
+    /* Make a new expression out of the parsed expression multiplied by size
+       and add to or subtract it from the current symbol's expression.
+       Perform even alignment when requested. */
     new = make_expr(MUL,parse_expr_tmplab(s),number_expr(size));
     simplify_expr(new);
-    new = make_expr(dir>0 ? ADD : SUB,sym->expr,new);
+
+    if (align_data && size>1) {
+      /* align the current offset symbol first */
+      utaddr dalign = DATA_ALIGN((int)size*8) - 1;
+
+      old = make_expr(BAND,
+                      make_expr(dir>0?ADD:SUB,sym->expr,number_expr(dalign)),
+                      number_expr(~dalign));
+      simplify_expr(old);
+    }
+    else
+      old = sym->expr;
+
+    new = make_expr(dir>0?ADD:SUB,old,new);
   }
   else
-    new = sym->expr;
+    new = old = sym->expr;
 
   /* assign expression to equ-symbol and change exp. of the offset-symbol */
   if (equname)
-    equsym = new_abs(equname,dir>0 ? copy_tree(sym->expr) : copy_tree(new));
+    equsym = new_equate(equname,dir>0 ? copy_tree(old) : copy_tree(new));
   else
     equsym = NULL;
 
@@ -232,7 +288,7 @@ static void handle_space(char *s,int size)
 }
 
 
-static char *read_sec_attr(char *attr,char *s)
+static char *read_sec_attr(char *attr,char *s,uint32_t *mem)
 {
   char *type = s;
 
@@ -257,10 +313,10 @@ static char *read_sec_attr(char *attr,char *s)
     if (*(s-2) == '_') {
       switch (tolower((unsigned char)*(s-1))) {
         case 'c':
-          strcat(attr,"C");
+          *mem = 2;  /* AmigaDOS MEMF_CHIP */
           break;
         case 'f':
-          strcat(attr,"F");
+          *mem = 4;  /* AmigaDOS MEMF_FAST */
           break;
         case 'p':
           break;
@@ -277,107 +333,150 @@ static char *read_sec_attr(char *attr,char *s)
 
   s = skip(s);
   if (*s == ',') {
-    /* read memory type */
+    /* read optional memory type */
+    taddr mc;
+
     s = skip(s+1);
     type = s;
-    if (!(s = skip_identifier(s))) {
-      syntax_error(10);  /* identifier expected */
-      return NULL;
+
+    /* check for "chip" or "fast" memory type (AmigaDOS) */
+    if (s = skip_identifier(s)) {
+      if (s-type==4 && !strnicmp(type,"chip",4)) {
+        *mem = 2;  /* AmigaDOS MEMF_CHIP */
+        return skip(s);
+      }
+      else if (s-type==4 && !strnicmp(type,"fast",4)) {
+        *mem = 4;  /* AmigaDOS MEMF_FAST */
+        return skip(s);
+      }
     }
-    if (s-type==4 && !strnicmp(type,"chip",4))
-      strcat(attr,"C");
-    else if (s-type==4 && !strnicmp(type,"fast",4))
-      strcat(attr,"F");
+
+    /* try to read a numerical memory type constant */
+    s = type;
+    mc = parse_constexpr(&type);
+    if (type>s && mc!=0)
+      *mem = (uint32_t)mc;
     else
       syntax_error(15);  /* illegal memory type */
-    s = skip(s);
+    s = skip(type);
   }
 
   return s;
 }
 
 
+static void motsection(section *sec,uint32_t mem)
+/* mot-syntax specific section initializations on a new section */
+{
+#if NOT_NEEDED
+  if (phxass_compat!=0 && strchr(sec->attr,'c')!=NULL) {
+    /* CNOP alignments pad with NOP instruction in code sections */
+    sec->padbytes = 2;
+    sec->pad[0] = 0x4e;
+    sec->pad[1] = 0x71;
+  }
+#endif
+  /* set optional memory attributes (e.g. AmigaOS hunk format Chip/Fast) */
+  sec->memattr = mem;
+}
+
+
 static void handle_section(char *s)
 {
   char attr[32];
   char *name;
-
-  strcpy(attr,code_type);
+  uint32_t mem = 0;
 
   /* read section name */
   if (!(name = parse_name(&s)))
     return;
 
   if (*s == ',') {
-    /* read section type */
-    s = read_sec_attr(attr,skip(s+1));
+    /* read section type and memory attributes */
+    s = read_sec_attr(attr,skip(s+1),&mem);
   }
-  else if (!phxass_compat) {
-    /* only name is given - treat name as type */
-    if (!read_sec_attr(attr,name))
-      s = NULL;
+  else {
+    /* only name is given - guess type from name */
+    if (!stricmp(name,"data"))
+      strcpy(attr,data_type);
+    else if (!stricmp(name,"bss"))
+      strcpy(attr,bss_type);
+    else
+      strcpy(attr,code_type);
+    if (devpac_compat && !stricmp(name,"text"))
+      name = code_name;
   }
 
   if (s) {
-    new_section(name,attr,1);
+    motsection(new_section(name,attr,1),mem);
     switch_section(name,attr);
   }
 }
 
 
-static void motsection(char *secname,char *sectype,char addattr)
-/* switch to a section called secname, with attributes sectype+addaddr */
+static void handle_offset(char *s)
 {
-  char attr[8];
+  taddr offs;
+
+  if (!ISEOL(s))
+    offs = parse_constexpr(&s);
+  else
+    offs = -1;  /* use last offset */
 
-  sprintf(attr,"%s%c",sectype,addattr);
-  new_section(secname,attr,1);
-  switch_section(secname,attr);
+  switch_offset_section(NULL,offs);
+}
+
+
+static void nameattrsection(char *secname,char *sectype,uint32_t mem)
+/* switch to a section called secname, with attributes sectype+addattr */
+{
+  motsection(new_section(secname,sectype,1),mem);
+  switch_section(secname,sectype);
 }
 
 static void handle_csec(char *s)
 {
-  motsection(code_name,code_type,0);
+  nameattrsection(code_name,code_type,0);
 }
 
 static void handle_dsec(char *s)
 {
-  motsection(data_name,data_type,0);
+  nameattrsection(data_name,data_type,0);
 }
 
 static void handle_bss(char *s)
 {
-  motsection(bss_name,bss_type,0);
+  nameattrsection(bss_name,bss_type,0);
 }
 
 static void handle_codec(char *s)
 {
-  motsection("CODE_C",code_type,'C');
+  nameattrsection("CODE_C",code_type,2);  /* AmigaDOS MEMF_CHIP */
 }
 
 static void handle_codef(char *s)
 {
-  motsection("CODE_F",code_type,'F');
+  nameattrsection("CODE_F",code_type,4);  /* AmigaDOS MEMF_FAST */
 }
 
 static void handle_datac(char *s)
 {
-  motsection("DATA_C",data_type,'C');
+  nameattrsection("DATA_C",data_type,2);  /* AmigaDOS MEMF_CHIP */
 }
 
 static void handle_dataf(char *s)
 {
-  motsection("DATA_F",data_type,'F');
+  nameattrsection("DATA_F",data_type,4);  /* AmigaDOS MEMF_FAST */
 }
 
 static void handle_bssc(char *s)
 {
-  motsection("BSS_C",bss_type,'C');
+  nameattrsection("BSS_C",bss_type,2);  /* AmigaDOS MEMF_CHIP */
 }
 
 static void handle_bssf(char *s)
 {
-  motsection("BSS_F",bss_type,'F');
+  nameattrsection("BSS_F",bss_type,4);  /* AmigaDOS MEMF_FAST */
 }
 
 
@@ -390,38 +489,80 @@ static void handle_org(char *s)
     else
       syntax_error(7);  /* syntax error */
   }
-  else {
-    new_org(parse_constexpr(&s));
-  }
+  else
+    set_section(new_org(parse_constexpr(&s)));
 }
 
 
 static void handle_rorg(char *s)
 {
-  add_atom(0,new_rorg_atom(parse_expr_tmplab(&s)));
+  add_atom(0,new_roffs_atom(parse_expr_tmplab(&s)));
 }
 
 
-static void handle_global(char *s)
+static void do_bind(char *s,int bind)
 {
   symbol *sym;
   char *name;
 
   do {
     s = skip(s);
-    if (!(name=parse_identifier(&s))) {
+    if (!(name = parse_identifier(&s))) {
       syntax_error(10);  /* identifier expected */
       return;
     }
     sym = new_import(name);
-    sym->flags |= EXPORT;
     myfree(name);
+    if ((sym->flags & (EXPORT|WEAK)) != 0 &&
+        (sym->flags & (EXPORT|WEAK)) != bind)
+      general_error(62,sym->name,get_bind_name(sym)); /* binding already set */
+    else
+      sym->flags |= bind;
     s = skip(s);
   }
   while (*s++ == ',');
 }
 
 
+static void handle_global(char *s)
+{
+  do_bind(s,EXPORT);
+}
+
+
+static void handle_weak(char *s)
+{
+  do_bind(s,WEAK);
+}
+
+
+static void handle_comm(char *s)
+{
+  char *name = parse_identifier(&s);
+  symbol *sym;
+  taddr sz = 4;
+
+  if (name == NULL) {
+    syntax_error(10);  /* identifier expected */
+    return;
+  }
+  sym = new_import(name);
+  sym->flags |= COMMON;
+  myfree(name);
+
+  s = skip(s);
+  if (*s == ',') {
+    s = skip(s+1);
+    sz = parse_constexpr(&s);
+  }
+  else
+    syntax_error(9);  /* , expected */
+
+  sym->size = number_expr(sz);
+  sym->align = 4;
+}
+
+
 static void handle_data(char *s,int size)
 {
   /* size is negative for floating point data! */
@@ -430,7 +571,7 @@ static void handle_data(char *s,int size)
     operand *op;
     dblock *db = NULL;
 
-    if (size==8 && (*s=='\"' || *s=='\'')) {
+    if (OPSZ_BITS(size)==8 && (*s=='\"' || *s=='\'')) {
       if (db = parse_string(&opstart,*s,8)) {
         add_atom(0,new_data_atom(db,1));
         s = opstart;
@@ -442,7 +583,7 @@ static void handle_data(char *s,int size)
       if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(size))) {
         atom *a;
 
-        a = new_datadef_atom(abs(size),op);
+        a = new_datadef_atom(OPSZ_BITS(size),op);
         if (!align_data)
           a->align = 1;
         add_atom(0,a);
@@ -486,25 +627,25 @@ static void handle_d64(char *s)
 
 static void handle_f32(char *s)
 {
-  handle_data(s,-32);
+  handle_data(s,OPSZ_FLOAT|32);
 }
 
 
 static void handle_f64(char *s)
 {
-  handle_data(s,-64);
+  handle_data(s,OPSZ_FLOAT|64);
 }
 
 
 static void handle_f96(char *s)
 {
-  handle_data(s,-96);
+  handle_data(s,OPSZ_FLOAT|96);
 }
 
 
-static void do_alignment(taddr align,expr *offset)
+static void do_alignment(taddr align,expr *offset,size_t pad,expr *fill)
 {
-  atom *a = new_space_atom(offset,1,0);
+  atom *a = new_space_atom(offset,pad,fill);
 
   a->align = align;
   add_atom(0,a);
@@ -525,25 +666,32 @@ static void handle_cnop(char *s)
   else
     syntax_error(9);  /* , expected */
 
-  do_alignment(align,offset);
+#ifdef VASM_CPU_M68K
+  /* align with NOP instructions in an M68k code section */
+  if (!devpac_compat && align>3 &&
+      (current_section==NULL || strchr(current_section->attr,'c')!=NULL))
+    do_alignment(align,offset,2,number_expr(0x4e71));
+  else
+#endif
+    do_alignment(align,offset,1,NULL);
 }
 
 
 static void handle_align(char *s)
 {
-  do_alignment(1<<parse_constexpr(&s),number_expr(0));
+  do_alignment(1<<parse_constexpr(&s),number_expr(0),1,NULL);
 }
 
 
 static void handle_even(char *s)
 {
-  do_alignment(2,number_expr(0));
+  do_alignment(2,number_expr(0),1,NULL);
 }
 
 
 static void handle_odd(char *s)
 {
-  do_alignment(2,number_expr(1));
+  do_alignment(2,number_expr(1),1,NULL);
 }
 
 
@@ -621,6 +769,7 @@ static void handle_blk96(char *s)
 }
 
 
+#ifdef VASM_CPU_M68K
 static void handle_reldata(char *s,int size)
 {
   for (;;) {
@@ -630,7 +779,7 @@ static void handle_reldata(char *s,int size)
     op = new_operand();
     s = skip_operand(s);
     if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(size))) {
-      if (op->exp.value[0]) {
+      if (op->value[0]) {
         expr *tmplab,*new;
         atom *a;
 
@@ -639,10 +788,10 @@ static void handle_reldata(char *s,int size)
         tmplab->c.sym = new_tmplabel(0);
         add_atom(0,new_label_atom(tmplab->c.sym));
         /* subtract the current pc value from all data expressions */
-        new = make_expr(SUB,op->exp.value[0],tmplab);
+        new = make_expr(SUB,op->value[0],tmplab);
         simplify_expr(new);
-        op->exp.value[0] = new;
-        a = new_datadef_atom(abs(size),op);
+        op->value[0] = new;
+        a = new_datadef_atom(OPSZ_BITS(size),op);
         if (!align_data)
           a->align = 1;
         add_atom(0,a);
@@ -677,6 +826,7 @@ static void handle_reldata32(char *s)
 {
   handle_reldata(s,32);
 }
+#endif
 
 
 static void handle_end(char *s)
@@ -687,7 +837,7 @@ static void handle_end(char *s)
 
 static void handle_fail(char *s)   
 { 
-  fail(s);
+  add_atom(0,new_assert_atom(NULL,NULL,mystrdup(s)));
 }
 
 
@@ -702,13 +852,13 @@ static void handle_idnt(char *s)
 
 static void handle_list(char *s)
 {
-  produce_listing = 1;
+  set_listing(1);
 }
 
 
 static void handle_nolist(char *s)
 {
-  produce_listing = 0;
+  set_listing(0);
 }
 
 
@@ -807,22 +957,20 @@ static void handle_incbin(char *s)
   char *name;
 
   if (name = parse_name(&s)) {
-    include_binary_file(name);
+    include_binary_file(name,0,0);
   }
 }
 
 
 static void handle_rept(char *s)
 {
-  taddr cnt = parse_constexpr(&s);
-
-  new_repeat((int)cnt,"rept","endr");
+  new_repeat((int)parse_constexpr(&s),rept_dirlist,endr_dirlist);
 }
 
 
 static void handle_endr(char *s)
 {
-  syntax_error(16,"endr","rept");  /* unexpected endr without rept */
+  syntax_error(12,"endr","rept");  /* unexpected endr without rept */
 }
 
 
@@ -830,40 +978,45 @@ static void handle_macro(char *s)
 {
   char *name;
 
-  if (name = parse_name(&s)) {
-    new_macro(name,"endm");
-  }
+  if (name = parse_name(&s))
+    new_macro(name,endm_dirlist,NULL);
 }
 
 
 static void handle_endm(char *s)
 {
-  syntax_error(16,"endm","macro");  /* unexpected endm without macro */
+  syntax_error(12,"endm","macro");  /* unexpected endm without macro */
 }
 
 
 static void handle_mexit(char *s)
 {
-  int l = leave_macro();
-
-  if (l >= 0) {  /* mexit successful? */
-    clev = l;    /* restore clev from macro-entry */
-  }
+  leave_macro();
 }
 
 
 static void handle_rem(char *s)
 {
-  new_repeat(0,NULL,"erem");
+  new_repeat(0,NULL,erem_dirlist);
 }
 
 
 static void handle_erem(char *s)
 {
-  syntax_error(16,"erem","rem");  /* unexpected erem without rem */
+  syntax_error(12,"erem","rem");  /* unexpected erem without rem */
 }
 
 
+static void handle_ifb(char *s)
+{
+  cond_if(ISEOL(s));
+}
+
+static void handle_ifnb(char *s)
+{
+  cond_if(!ISEOL(s));
+}
+
 static void ifc(char *s,int b)
 {
   char *str1,*str2;
@@ -874,7 +1027,7 @@ static void ifc(char *s,int b)
     s = skip(s+1);
     if (str2 = parse_name(&s)) {
       result = strcmp(str1,str2) == 0;
-      cond[++clev] = result == b;
+      cond_if(result == b);
       return;
     }
   }
@@ -897,18 +1050,16 @@ static void ifdef(char *s,int b)
   symbol *sym;
   int result;
 
-  if (!(name = get_local_label(&s))) {
-    if (!(name = parse_identifier(&s))) {
-      syntax_error(10);  /* identifier expected */
-      return;
-    }
+  if (!(name = parse_symbol(&s))) {
+    syntax_error(10);  /* identifier expected */
+    return;
   }
   if (sym = find_symbol(name))
     result = sym->type != IMPORT;
   else
     result = 0;
   myfree(name);
-  cond[++clev] = result == b;
+  cond_if(result == b);
 }
 
 static void handle_ifd(char *s)
@@ -939,10 +1090,10 @@ static void ifexp(char *s,int c)
     }
   }
   else {
-    syntax_error(12);  /* expression must be constant */
+    general_error(30);  /* expression must be constant */
     b = 0;
   }
-  cond[++clev] = b;
+  cond_if(b);
   free_expr(condexp);
 }
 
@@ -978,18 +1129,12 @@ static void handle_ifle(char *s)
 
 static void handle_else(char *s)
 {
-  if (clev > 0)
-    cond[clev] = 0;
-  else
-    syntax_error(16,"else","if");  /* else without if */
+  cond_skipelse();
 }
 
 static void handle_endif(char *s)
 {
-  if (clev > 0)
-    clev--;
-  else
-    syntax_error(16,"endif","if");  /* unexpected endif without if */
+  cond_endif();
 }
 
 
@@ -1003,16 +1148,6 @@ static void handle_rsset(char *s)
   new_abs(rs_name,number_expr(parse_constexpr(&s)));
 }
 
-static void handle_clrso(char *s)
-{
-  new_abs(so_name,number_expr(0));
-}
-
-static void handle_setso(char *s)
-{
-  new_abs(so_name,number_expr(parse_constexpr(&s)));
-}
-
 static void handle_clrfo(char *s)
 {
   new_abs(fo_name,number_expr(0));
@@ -1048,31 +1183,6 @@ static void handle_rs96(char *s)
   new_setoffset_size(NULL,rs_name,&s,1,12);
 }
 
-static void handle_so8(char *s)
-{
-  new_setoffset_size(NULL,so_name,&s,1,1);
-}
-
-static void handle_so16(char *s)
-{
-  new_setoffset_size(NULL,so_name,&s,1,2);
-}
-
-static void handle_so32(char *s)
-{
-  new_setoffset_size(NULL,so_name,&s,1,4);
-}
-
-static void handle_so64(char *s)
-{
-  new_setoffset_size(NULL,so_name,&s,1,8);
-}
-
-static void handle_so96(char *s)
-{
-  new_setoffset_size(NULL,so_name,&s,1,12);
-}
-
 static void handle_fo8(char *s)
 {
   new_setoffset_size(NULL,fo_name,&s,-1,1);
@@ -1098,14 +1208,115 @@ static void handle_fo96(char *s)
   new_setoffset_size(NULL,fo_name,&s,-1,12);
 }
 
+static void handle_cargs(char *s)
+{
+  char *name;
+  expr *offs;
+  taddr size;
+
+  if (*s == '#') {
+    /* offset given */
+    ++s;
+    offs = parse_expr_tmplab(&s);
+    s = skip(s);
+    if (*s != ',')
+      syntax_error(9);  /* , expected */
+    else
+      s = skip(s+1);
+  }
+  else
+    offs = number_expr(4);  /* default offset */
+
+  for (;;) {
+
+    if (!(name = parse_symbol(&s))) {
+      syntax_error(10);  /* identifier expected */
+      break;
+    }
+
+    if (!check_symbol(name)) {
+      /* define new stack offset symbol */
+      new_abs(name,copy_tree(offs));
+    }
+    myfree(name);
+
+    /* increment offset by given size */
+    if (*s == '.') {
+      ++s;
+      switch (tolower((unsigned char)*s)) {
+        case 'b':
+        case 'w':
+          size = 2;
+          ++s;
+          break;
+        case 'l':
+          size = 4;
+          ++s;
+          break;
+        default:
+          size = 2;
+          syntax_error(1);  /* invalid extension */
+          break;
+      }
+    }
+    else
+      size = 2;
+
+    s = skip(s);
+    if (*s != ',')  /* define another offset symbol? */
+      break;
+
+    offs = make_expr(ADD,offs,number_expr(size));
+    simplify_expr(offs);
+    s = skip(s+1);
+  }
+
+  /* offset expression was copied, so we can free it now */
+  if (offs)
+    free_expr(offs);
+}
+
 static void handle_printt(char *s)
 {
-  add_atom(0,new_text_atom(parse_name(&s)));
+  char *txt;
+
+  while (txt = parse_name(&s)) {
+    add_atom(0,new_text_atom(txt));
+    s = skip(s);
+    if (*s != ',')
+      break;
+    add_atom(0,new_text_atom(NULL));  /* new line */
+    s = skip(s+1);
+  }
+  add_atom(0,new_text_atom(NULL));  /* new line */
 }
 
 static void handle_printv(char *s)
 {
-  add_atom(0,new_expr_atom(parse_expr(&s)));
+  expr *x;
+
+  for (;;) {
+    x = parse_expr(&s);
+    add_atom(0,new_text_atom("$"));
+    add_atom(0,new_expr_atom(x,PEXP_HEX,32));
+    add_atom(0,new_text_atom(" "));
+    add_atom(0,new_expr_atom(x,PEXP_SDEC,32));
+    add_atom(0,new_text_atom(" \""));
+    add_atom(0,new_expr_atom(x,PEXP_ASC,32));
+    add_atom(0,new_text_atom("\" %"));
+    add_atom(0,new_expr_atom(x,PEXP_BIN,32));
+    add_atom(0,new_text_atom(NULL));  /* new line */
+    s = skip(s);
+    if (*s != ',')
+      break;
+    s = skip(s+1);
+  }    
+}
+
+static void handle_dummy_expr(char *s)
+{
+  parse_expr(&s);
+  syntax_error(11);  /* directive has no effect */
 }
 
 static void handle_dummy_cexpr(char *s)
@@ -1114,9 +1325,13 @@ static void handle_dummy_cexpr(char *s)
   syntax_error(11);  /* directive has no effect */
 }
 
+static void handle_noop(char *s)
+{
+  syntax_error(11);  /* directive has no effect */
+}
+
 static void handle_comment(char *s)
 {
-  s = skip(s);
   /* handle Atari-specific "COMMENT HEAD=<expr>" to define the tos-flags */
   if (!strnicmp(s,"HEAD=",5)) {
     s += 5;
@@ -1125,153 +1340,172 @@ static void handle_comment(char *s)
   /* otherwise it's just a comment to be ignored */
 }
 
-
+#define D 1 /* available for DevPac */
+#define P 2 /* available for PhxAss */
 struct {
   char *name;
+  int avail;
   void (*func)(char *);
 } directives[] = {
-  "org",handle_org,
-  "rorg",handle_rorg,
-  "section",handle_section,
-  "code",handle_csec,
-  "cseg",handle_csec,
-  "text",handle_csec,
-  "data",handle_dsec,
-  "dseg",handle_dsec,
-  "bss",handle_bss,
-  "code_c",handle_codec,
-  "code_f",handle_codef,
-  "data_c",handle_datac,
-  "data_f",handle_dataf,
-  "bss_c",handle_bssc,
-  "bss_f",handle_bssf,
-  "public",handle_global,
-  "xdef",handle_global,
-  "xref",handle_global,  
-  "nref",handle_global,
-  "entry",handle_global,
-  "extrn",handle_global,
-  "global",handle_global,
-  "load",handle_dummy_cexpr,
-  "jumperr",handle_dummy_cexpr,
-  "jumpptr",handle_dummy_cexpr,
-  "mask2",eol,
-  "cnop",handle_cnop,
-  "align",handle_align,
-  "even",handle_even,
-  "odd",handle_odd,
-  "dc",handle_d16,
-  "dc.b",handle_d8,
-  "dc.w",handle_d16,
-  "dc.l",handle_d32,
-  "dc.q",handle_d64,
-  "dc.s",handle_f32,
-  "dc.d",handle_f64,
-  "dc.x",handle_f96,
-  "ds",handle_spc16,
-  "ds.b",handle_spc8,
-  "ds.w",handle_spc16,
-  "ds.l",handle_spc32,
-  "ds.q",handle_spc64,
-  "ds.s",handle_spc32,
-  "ds.d",handle_spc64,
-  "ds.x",handle_spc96,
-  "dcb",handle_blk16,
-  "dcb.b",handle_blk8,
-  "dcb.w",handle_blk16,
-  "dcb.l",handle_blk32,
-  "dcb.q",handle_blk64,
-  "dcb.s",handle_blk32,
-  "dcb.d",handle_blk64,
-  "dcb.x",handle_blk96,
-  "blk",handle_blk16,
-  "blk.b",handle_blk8,
-  "blk.w",handle_blk16,
-  "blk.l",handle_blk32,
-  "blk.q",handle_blk64,
-  "blk.s",handle_blk32,
-  "blk.d",handle_blk64,
-  "blk.x",handle_blk96,
-  "dr",handle_reldata16,
-  "dr.b",handle_reldata8,
-  "dr.w",handle_reldata16,
-  "dr.l",handle_reldata32,
-  "end",handle_end,
-  "fail",handle_fail,
-  "idnt",handle_idnt,
-  "ttl",handle_idnt,
-  "list",handle_list,
-  "nolist",handle_nolist,
-  "plen",handle_plen,
-  "llen",handle_dummy_cexpr,
-  "page",handle_page,
-  "nopage",handle_nopage,
-  "spc",handle_dummy_cexpr,
-  "output",handle_output,
-  "symdebug",eol,
-  "dsource",handle_dsource,
-  "debug",handle_debug,
-  "comment",handle_comment,
-  "incdir",handle_incdir,
-  "include",handle_include,
-  "incbin",handle_incbin,
-  "image",handle_incbin,
-  "rept",handle_rept,
-  "endr",handle_endr,
-  "macro",handle_macro,
-  "endm",handle_endm,
-  "mexit",handle_mexit,
-  "rem",handle_rem,
-  "erem",handle_erem,
-  "ifc",handle_ifc,
-  "ifnc",handle_ifnc,
-  "ifd",handle_ifd,
-  "ifnd",handle_ifnd,
-  "ifeq",handle_ifeq,
-  "ifne",handle_ifne,
-  "ifgt",handle_ifgt,
-  "ifge",handle_ifge,
-  "iflt",handle_iflt,
-  "ifle",handle_ifle,
-  "if",handle_ifne,
-  "else",handle_else,
-  "elseif",handle_else,
-  "endif",handle_endif,
-  "endc",handle_endif,
-  "rsreset",handle_rsreset,
-  "rsset",handle_rsset,
-  "clrso",handle_clrso,
-  "setso",handle_setso,
-  "clrfo",handle_clrfo,
-  "setfo",handle_setfo,
-  "rs",handle_rs16,
-  "rs.b",handle_rs8,
-  "rs.w",handle_rs16,
-  "rs.l",handle_rs32,
-  "rs.q",handle_rs64,
-  "rs.s",handle_rs32,
-  "rs.d",handle_rs64,
-  "rs.x",handle_rs96,
-  "rs",handle_rs16,
-  "so.b",handle_so8,
-  "so.w",handle_so16,
-  "so.l",handle_so32,
-  "so.q",handle_so64,
-  "so.s",handle_so32,
-  "so.d",handle_so64,
-  "so.x",handle_so96,
-  "fo",handle_fo16,
-  "fo.b",handle_fo8,
-  "fo.w",handle_fo16,
-  "fo.l",handle_fo32,
-  "fo.q",handle_fo64,
-  "fo.s",handle_fo32,
-  "fo.d",handle_fo64,
-  "fo.x",handle_fo96,
-  "echo",handle_printt,
-  "printt",handle_printt,
-  "printv",handle_printv
+  "org",P|D,handle_org,
+  "rorg",P|D,handle_rorg,
+  "section",P|D,handle_section,
+  "offset",P|D,handle_offset,
+  "code",P|D,handle_csec,
+  "cseg",P,handle_csec,
+  "text",P|D,handle_csec,
+  "data",P|D,handle_dsec,
+  "dseg",P,handle_dsec,
+  "bss",P|D,handle_bss,
+  "code_c",P|D,handle_codec,
+  "code_f",P|D,handle_codef,
+  "data_c",P|D,handle_datac,
+  "data_f",P|D,handle_dataf,
+  "bss_c",P|D,handle_bssc,
+  "bss_f",P|D,handle_bssf,
+  "public",P,handle_global,
+  "xdef",P|D,handle_global,
+  "xref",P|D,handle_global,
+  "xref.l",P|D,handle_global,
+  "nref",P,handle_global,
+  "entry",0,handle_global,
+  "extrn",0,handle_global,
+  "global",0,handle_global,
+  "import",0,handle_global, /* modifictation: pink-rg: handle purec syntax */
+  "export",0,handle_global, /* modifictation: pink-rg: handle purec syntax */
+  "weak",0,handle_weak,
+  "comm",0,handle_comm,
+#ifndef VASM_CPU_JAGRISC    /* conflicts with Jaguar load instruction */
+  "load",P,handle_dummy_expr,
+#endif
+  "jumperr",0,handle_dummy_expr,
+  "jumpptr",0,handle_dummy_expr,
+  "mask2",0,eol,
+  "cnop",P|D,handle_cnop,
+  "align",0,handle_align,
+  "even",P|D,handle_even,
+  "odd",0,handle_odd,
+  "dc",P|D,handle_d16,
+  "dc.b",P|D,handle_d8,
+  "dc.w",P|D,handle_d16,
+  "dc.l",P|D,handle_d32,
+  "dc.q",P,handle_d64,
+  "dc.s",P|D,handle_f32,
+  "dc.d",P|D,handle_f64,
+  "dc.x",P|D,handle_f96,
+  "ds",P|D,handle_spc16,
+  "ds.b",P|D,handle_spc8,
+  "ds.w",P|D,handle_spc16,
+  "ds.l",P|D,handle_spc32,
+  "ds.q",P,handle_spc64,
+  "ds.s",P|D,handle_spc32,
+  "ds.d",P|D,handle_spc64,
+  "ds.x",P|D,handle_spc96,
+  "dcb",P|D,handle_blk16,
+  "dcb.b",P|D,handle_blk8,
+  "dcb.w",P|D,handle_blk16,
+  "dcb.l",P|D,handle_blk32,
+  "dcb.q",P,handle_blk64,
+  "dcb.s",P|D,handle_blk32,
+  "dcb.d",P|D,handle_blk64,
+  "dcb.x",P|D,handle_blk96,
+  "blk",P,handle_blk16,
+  "blk.b",P,handle_blk8,
+  "blk.w",P,handle_blk16,
+  "blk.l",P,handle_blk32,
+  "blk.q",P,handle_blk64,
+  "blk.s",P,handle_blk32,
+  "blk.d",P,handle_blk64,
+  "blk.x",P,handle_blk96,
+#ifdef VASM_CPU_M68K
+  "dr",0,handle_reldata16,
+  "dr.b",0,handle_reldata8,
+  "dr.w",0,handle_reldata16,
+  "dr.l",0,handle_reldata32,
+#endif
+  "end",P|D,handle_end,
+  "fail",P|D,handle_fail,
+  "idnt",P|D,handle_idnt,
+  "ttl",P|D,handle_idnt,
+  "list",P|D,handle_list,
+  "module",P|D,handle_idnt,
+  "nolist",P|D,handle_nolist,
+  "plen",P|D,handle_plen,
+  "llen",P|D,handle_dummy_cexpr,
+  "page",P|D,handle_page,
+  "nopage",P|D,handle_nopage,
+  "spc",P|D,handle_dummy_cexpr,
+  "output",P|D,handle_output,
+  "symdebug",P,eol,
+  "dsource",P,handle_dsource,
+  "debug",P,handle_debug,
+  "comment",P|D,handle_comment,
+  "incdir",P|D,handle_incdir,
+  "include",P|D,handle_include,
+  "incbin",P|D,handle_incbin,
+  "image",0,handle_incbin,
+  "rept",P|D,handle_rept,
+  "endr",P|D,handle_endr,
+  "macro",P|D,handle_macro,
+  "endm",P|D,handle_endm,
+  "mexit",P|D,handle_mexit,
+  "rem",P,handle_rem,
+  "erem",P,handle_erem,
+  "ifb",0,handle_ifb,
+  "ifnb",0,handle_ifnb,
+  "ifc",P|D,handle_ifc,
+  "ifnc",P|D,handle_ifnc,
+  "ifd",P|D,handle_ifd,
+  "ifnd",P|D,handle_ifnd,
+  "ifeq",P|D,handle_ifeq,
+  "ifne",P|D,handle_ifne,
+  "ifgt",P|D,handle_ifgt,
+  "ifge",P|D,handle_ifge,
+  "iflt",P|D,handle_iflt,
+  "ifle",P|D,handle_ifle,
+  "if",P,handle_ifne,
+  "else",P|D,handle_else,
+  "elseif",P|D,handle_else,
+  "endif",P|D,handle_endif,
+  "endc",P|D,handle_endif,
+  "rsreset",P|D,handle_rsreset,
+  "rsset",P|D,handle_rsset,
+  "clrso",P,handle_rsreset,
+  "setso",P,handle_rsset,
+  "clrfo",P,handle_clrfo,
+  "setfo",P,handle_setfo,
+  "rs",P|D,handle_rs16,
+  "rs.b",P|D,handle_rs8,
+  "rs.w",P|D,handle_rs16,
+  "rs.l",P|D,handle_rs32,
+  "rs.q",P,handle_rs64,
+  "rs.s",P|D,handle_rs32,
+  "rs.d",P|D,handle_rs64,
+  "rs.x",P|D,handle_rs96,
+  "so",P,handle_rs16,
+  "so.b",P,handle_rs8,
+  "so.w",P,handle_rs16,
+  "so.l",P,handle_rs32,
+  "so.q",P,handle_rs64,
+  "so.s",P,handle_rs32,
+  "so.d",P,handle_rs64,
+  "so.x",P,handle_rs96,
+  "fo",P,handle_fo16,
+  "fo.b",P,handle_fo8,
+  "fo.w",P,handle_fo16,
+  "fo.l",P,handle_fo32,
+  "fo.q",P,handle_fo64,
+  "fo.s",P,handle_fo32,
+  "fo.d",P,handle_fo64,
+  "fo.x",P,handle_fo96,
+  "cargs",P|D,handle_cargs,
+  "echo",P,handle_printt,
+  "printt",0,handle_printt,
+  "printv",0,handle_printv,
+  "auto",0,handle_noop,
 };
+#undef P
+#undef D
 
 int dir_cnt = sizeof(directives) / sizeof(directives[0]);
 
@@ -1312,11 +1546,63 @@ static int handle_directive(char *line)
 static int offs_directive(char *s,char *name)
 {
   int len = strlen(name);
+  char *d = s + len;
 
   return !strnicmp(s,name,len) &&
-         ((isspace((unsigned char)*(s+len)) ||
-           *(s+len)=='\0' || *(s+len)==commentchar) ||
-          (*(s+len)=='.' && isspace((unsigned char)*(s+len+2))));
+         ((isspace((unsigned char)*d) || ISEOL(d)) ||
+          (*d=='.' && (isspace((unsigned char)*(d+2))||ISEOL(d+2))));
+}
+
+
+static symbol *fequate(char *labname,char **s)
+{
+  char x = tolower((unsigned char)**s);
+
+  if (x=='s' || x=='d' || x=='x' || x=='p') {
+    *s = skip(*s + 1);
+    return new_equate(labname,parse_expr_float(s));
+  }
+  syntax_error(1);  /* illegal extension */
+  return NULL;
+}
+
+
+static char *skip_local(char *p)
+{
+  char *s;
+
+  if (ISIDSTART(*p) || isdigit((unsigned char)*p)) {  /* may start with digit */
+    s = p++;
+    while (ISIDCHAR(*p))
+      p++;
+    p = CHKIDEND(s,p);
+  }
+  else
+    p = NULL;
+
+  return p;
+}
+
+
+static char *parse_local_label(char **start)
+{
+  char *s = *start;
+  char *p = skip_local(s);
+  char *name = NULL;
+
+  if (p > (s+1)) {  /* identifier with at least 2 characters */
+    if (*s == local_char) {
+      /* .label */
+      name = make_local_label(NULL,0,s,p-s);
+      *start = p;
+    }
+    else if (*(p-1) == '$') {
+      /* label$ */
+      name = make_local_label(NULL,0,s,(p-1)-s);
+      *start = p;
+    }
+  }
+  return name;
 }
 
 
@@ -1334,78 +1620,67 @@ void parse(void)
     if (parse_end)
       continue;
     s = line;
-    if (clev >= MAXCONDLEV)
-      syntax_error(19,clev);  /* nesting depth exceeded */
 
-    if (!cond[clev]) {
+    if (!cond_state()) {
       /* skip source until ELSE or ENDIF */
       int idx;
 
+      /* skip label, when present */
+      if (labname = parse_labeldef(&s,0))
+        myfree(labname);
+
+      /* advance to directive */
       s = skip(s);
       idx = check_directive(&s);
       if (idx >= 0) {
-        if (!strncmp(directives[idx].name,"if",2)) {
-          ifnesting++;
-        }
-        else if (ifnesting==0 && !strncmp(directives[idx].name,"else",4)) {
-          cond[clev] = 1;
-        }
-        else if (directives[idx].func == handle_endif) {
-          if (ifnesting == 0) {
-            if (clev > 0)
-              clev--;
-            else
-              syntax_error(16,directives[idx].name,"if"); /*endif without if*/
-          }
-          else
-            ifnesting--;
-        }
+        if (!strncmp(directives[idx].name,"if",2))
+          cond_skipif();
+        else if (directives[idx].func == handle_else)
+          cond_else();
+        else if (directives[idx].func == handle_endif)
+          cond_endif();
       }
       continue;
     }
 
-    labname = get_local_label(&s);          /* local label? */
-
-    if (!labname) {
-      if (labname = parse_identifier(&s))   /* global label? */
-        s = skip(s);
-    }
-
-    if (labname) {
-      /* we have found a global or local label at first column */
-      symbol *label,*labsym;
+    if (labname = parse_labeldef(&s,0)) {
+      /* we have found a global or local label */
+      symbol *label;
       int lablen = strlen(labname);
 
-      if (*s == ':')    /* ':' is optional */
-        s = skip(s+1);
-
+      s = skip(s);
       if (!strnicmp(s,"equ",3) && isspace((unsigned char)*(s+3))) {
-        if (labsym = find_symbol(labname)) {
-          if (labsym->type != IMPORT)
-            syntax_error(14);  /* repeatedly defined symbol */
-        }
         s = skip(s+3);
-        label = new_abs(labname,parse_expr_tmplab(&s));
+        label = new_equate(labname,parse_expr_tmplab(&s));
+      }
+      else if (!strnicmp(s,"fequ.",5) && isspace((unsigned char)*(s+6))) {
+        s += 5;
+        label = fequate(labname,&s);
+      }
+      else if (phxass_compat &&
+               !strnicmp(s,"equ.",4) && isspace((unsigned char)*(s+5))) {
+        s += 4;
+        label = fequate(labname,&s);
       }
       else if (*s=='=') {
-        if (labsym = find_symbol(labname)) {
-          if (labsym->type != IMPORT)
-            syntax_error(14);  /* repeatedly defined symbol */
+        ++s;
+        if (phxass_compat && *s=='.' && isspace((unsigned char)*(s+2))) {
+          ++s;
+          label = fequate(labname,&s);
+        }
+        else {
+          s = skip(s);
+          label = new_equate(labname,parse_expr_tmplab(&s));
         }
-        s = skip(s+1);
-        label = new_abs(labname,parse_expr_tmplab(&s));
       }
       else if (!strnicmp(s,"set",3) && isspace((unsigned char)*(s+3))) {
         /* SET allows redefinitions */
         s = skip(s+3);
         label = new_abs(labname,parse_expr_tmplab(&s));
       }
-      else if (offs_directive(s,"rs")) {
+      else if (offs_directive(s,"rs") || offs_directive(s,"so")) {
         label = new_setoffset(labname,&s,rs_name,1);
       }
-      else if (offs_directive(s,"so")) {
-        label = new_setoffset(labname,&s,so_name,1);
-      }
       else if (offs_directive(s,"fo")) {
         label = new_setoffset(labname,&s,fo_name,-1);
       }
@@ -1420,12 +1695,12 @@ void parse(void)
         myfree(labname);
         if (!(labname = parse_identifier(&s)))
           ierror(0);
-        new_macro(labname,"endm");
+        new_macro(labname,endm_dirlist,NULL);
         myfree(labname);
         continue;
       }
-#ifdef VASM_CPU_M68K
-      else if (!parse_cpu_label(labname,&s)) {
+#ifdef PARSE_CPU_LABEL
+      else if (!PARSE_CPU_LABEL(labname,&s)) {
 #else
       else {
 #endif
@@ -1437,18 +1712,18 @@ void parse(void)
 
     /* check for directives first */
     s = skip(s);
-    if (*s=='*' || *s==commentchar)
+    if (*s=='\0' || *s=='*' || *s==commentchar)
       continue;
 
     s = parse_cpu_special(s);
-    if (*s=='\0' || *s==commentchar)
+    if (ISEOL(s))
       continue;
 
     if (handle_directive(s))
       continue;
 
     s = skip(s);
-    if (*s=='\0' || *s==commentchar)
+    if (ISEOL(s))
       continue;
 
     /* read mnemonic name */
@@ -1469,18 +1744,22 @@ void parse(void)
       syntax_error(2);  /* no space before operands */
     s = skip(s);
 
-    if (execute_macro(inst,inst_len,ext,ext_len,ext_cnt,s,clev))
+    if (execute_macro(inst,inst_len,ext,ext_len,ext_cnt,s))
       continue;
 
     /* read operands, terminated by comma (unless in parentheses)  */
     op_cnt = 0;
-    while (*s && *s!=commentchar && op_cnt<MAX_OPERANDS) {
+    while (!ISEOL(s) && op_cnt<MAX_OPERANDS) {
       op[op_cnt] = s;
       s = skip_operand(s);
       op_len[op_cnt] = s - op[op_cnt];
+#if 0
+      /* This causes problems, when there is a comma in the comment field
+         of an instructions without operands. */
       if (op_len[op_cnt] <= 0)
         syntax_error(5);  /* missing operand */
       else
+#endif
         op_cnt++;
 
       if (allow_spaces) {
@@ -1491,10 +1770,12 @@ void parse(void)
           s = skip(s+1);
       }
       else {
-        if (*s == ',')
-          s++;
-        else
+        if (*s != ',') {
+          if (check_comm)
+            comment_check(s);
           break;
+        }
+        s++;
       }
     }      
     eol(s);
@@ -1514,8 +1795,206 @@ void parse(void)
       add_atom(0,new_inst_atom(ip));
   }
 
-  if (clev > 0)
-    syntax_error(16,"if","endif");  /* if without endif */
+  cond_check();  /* check for open conditional blocks */
+}
+
+
+/* parse next macro argument */
+char *parse_macro_arg(struct macro *m,char *s,
+                      struct namelen *param,struct namelen *arg)
+{
+  arg->len = 0;  /* no argument reference by keyword */
+  param->name = s;
+
+  if (*s == '<') {
+    /* macro argument enclosed in < ... > */
+    param->name++;
+    while (*++s != '\0') {
+      if (*s == '>') {
+        if (*(s+1) == '>') {
+          /* convert ">>" into a single ">" by shifting the whole line buffer */
+          char *p;
+
+          for (p=s+1; *p!='\0'; p++)
+            *(p-1) = *p;
+          *(p-1) = '\0';
+        }
+        else {
+          param->len = s - param->name;
+          s++;
+          break;
+        }
+      }
+    }
+  }
+  else if (*s=='\"' || *s=='\'') {
+    s = skip_string(s,*s,NULL);
+    param->len = s - param->name;
+  }
+  else {
+    s = skip_operand(s);
+    param->len = s - param->name;
+  }
+
+  return s;
+}
+
+
+/* src is the new macro source, cur_src is still the parent source */
+void my_exec_macro(source *src)
+{
+  symbol *carg;
+
+  /* reset the CARG symbol to 1, selecting the first macro parameter */
+  carg = internal_abs(CARGSYM);
+  cur_src->cargexp = carg->expr;  /* remember last CARG expression */
+  carg->expr = carg1;
+}
+
+
+static int copy_macro_carg(source *src,int inc,char *d,int len)
+/* copy macro parameter #CARG to line buffer, increment or decrement CARG */
+{
+  symbol *carg = internal_abs(CARGSYM);
+  int nc;
+
+  if (carg->type != EXPRESSION)
+    return 0;
+  simplify_expr(carg->expr);
+  if (carg->expr->type != NUM) {
+    general_error(30);  /* expression must be a constant */
+    return 0;
+  }
+  nc = copy_macro_param(src,carg->expr->c.val-1,d,len);
+
+  if (inc) {
+    expr *new = make_expr(inc>0?ADD:SUB,copy_tree(carg->expr),number_expr(1));
+
+    simplify_expr(new);
+    carg->expr = new;
+  }
+  return nc;
+}
+
+
+/* expands arguments and special escape codes into macro context */
+int expand_macro(source *src,char **line,char *d,int dlen)
+{
+  int nc = -1;
+  char *s = *line;
+
+  if (*s++ == '\\') {
+    /* possible macro expansion detected */
+
+    if (*s == '\\') {
+      *d++ = *s++;
+      if (esc_sequences) {
+        *d++ = '\\';  /* make it a double \ again */
+        nc = 2;
+      }
+      else
+        nc = 1;
+    }
+
+    else if (*s == '@') {
+      /* \@ : insert a unique id "_nnnnnn" */
+      if (dlen >= 7) {
+        unsigned long unique_id = src->id;
+
+        s++;
+        if (*s == '!') {
+          /* push id onto stack */
+          if (id_stack_index >= IDSTACKSIZE)
+            syntax_error(16);  /* id stack overflow */
+          else
+            id_stack[id_stack_index++] = unique_id;
+          s++;              
+        }
+        else if (*s == '?') {
+          /* push id below the top item on the stack */
+          if (id_stack_index >= IDSTACKSIZE)
+            syntax_error(16);  /* id stack overflow */
+          else if (id_stack_index <= 0)
+            syntax_error(14);  /* insert on empty id stack */
+          else {
+            id_stack[id_stack_index] = id_stack[id_stack_index-1];
+            id_stack[id_stack_index-1] = unique_id;
+            ++id_stack_index;
+          }
+          s++;
+        }
+        else if (*s == '@') {
+          /* pull id from stack */
+          if (id_stack_index <= 0)
+            syntax_error(17);  /* id pull without matching push */
+          else
+            unique_id = id_stack[--id_stack_index];
+          s++;
+        }
+        nc = sprintf(d, "_%06lu", unique_id);
+      }
+    }
+
+    else if (*s == '#') {
+      /* \# : insert number of parameters */
+      if (dlen >= 2) {
+        nc = sprintf(d,"%d",src->num_params);
+        s++;
+      }
+    }
+
+    else if (*s=='?' && isdigit((unsigned char)*(s+1))) {
+      /* \?n : insert parameter n length */
+      if (dlen >= 3) {
+        nc = sprintf(d,"%d",*(s+1)=='0'?
+#if MAX_QUALIFIERS > 0
+                            src->qual_len[0]:
+#else
+                            0:
+#endif
+                            src->param_len[*(s+1)-'1']);
+        s += 2;
+      }
+    }
+
+    else if (*s == '.') {
+      /* \. : insert parameter #CARG */
+      nc = copy_macro_carg(src,0,d,dlen);
+      s++;
+    }
+    else if (*s == '+') {
+      /* \+ : insert parameter #CARG and increment CARG */
+      nc = copy_macro_carg(src,1,d,dlen);
+      s++;
+    }
+    else if (*s == '-') {
+      /* \- : insert parameter #CARG and decrement CARG */
+      nc = copy_macro_carg(src,-1,d,dlen);
+      s++;
+    }
+
+    else if (isdigit((unsigned char)*s)) {
+      /* \0..\9 : insert macro parameter 0..9 */
+      if (*s == '0')
+        nc = copy_macro_qual(src,0,d,dlen);
+      else
+        nc = copy_macro_param(src,*s-'1',d,dlen);
+      s++;
+    }
+
+    else if (maxmacparams>9 &&
+             tolower((unsigned char)*s)>='a' &&
+             tolower((unsigned char)*s)<('a'+maxmacparams-9)) {
+        /* \a..\z : insert macro parameter 10..35 */
+        nc = copy_macro_param(src,tolower((unsigned char)*s)-'a'+9,d,dlen);
+        s++;
+    }
+
+    if (nc >= 0)
+      *line = s;  /* update line pointer when expansion took place */
+  }
+
+  return nc;  /* number of chars written to line buffer, -1: no expansion */
 }
 
 
@@ -1542,20 +2021,9 @@ char *const_prefix(char *s,int *base)
 }
 
 
-static char *skip_local(char *p)
+char *const_suffix(char *start,char *end)
 {
-  char *s;
-
-  if (ISIDSTART(*p) || isdigit((unsigned char)*p)) {  /* may start with digit */
-    s = p++;
-    while (ISIDCHAR(*p))
-      p++;
-    p = CHKIDEND(s,p);
-  }
-  else
-    p = NULL;
-
-  return p;
+  return end;
 }
 
 
@@ -1596,18 +2064,52 @@ char *get_local_label(char **start)
 int init_syntax()
 {
   size_t i;
+  symbol *sym;
   hashdata data;
+  int avail;
+
+  if (devpac_compat) avail = 1;
+  else if (phxass_compat) avail = 2;
+  else avail = 0;
 
   dirhash = new_hashtable(0x200); /* @@@ */
   for (i=0; i<dir_cnt; i++) {
-    data.idx = i;
-    add_hashentry(dirhash,directives[i].name,data);
+    if ((directives[i].avail & avail) == avail) {
+      data.idx = i;
+      add_hashentry(dirhash,directives[i].name,data);
+    }
   }
   
+  cond_init();
   current_pc_char = '*';
-  cond[0] = 1;
-  clev = ifnesting = 0;
   secname_attr = 1; /* attribute is used to differentiate between sections */
+  carg1 = number_expr(1);        /* CARG start value for macro invocations */
+  set_internal_abs(REPTNSYM,-1); /* reserve the REPTN symbol */
+  sym = internal_abs(rs_name);
+  refer_symbol(sym,so_name);     /* SO is only an additional reference to RS */
+  internal_abs(fo_name);
+  maxmacparams = allmp ? 35 : 9; /* 35: allow \a..\z macro parameters */
+
+  if (phxass_compat) {
+    if (!outname) {
+      /* set a default output name in PhxAss mode */
+      char *p;
+      int len;
+
+      if (p = strrchr(inname,'.')) {
+        if (exec_out || tolower((unsigned char)*(p+1)) != 'o') {
+          len = p - inname;
+          outname = mymalloc(len+(exec_out?1:3));
+          memcpy(outname,inname,len);
+          if (exec_out)
+            outname[len] = '\0';
+          else
+            strcpy(outname+len,".o");
+        }
+      }
+    }
+  }
+
   return 1;
 }
 
@@ -1618,21 +2120,25 @@ int syntax_args(char *p)
     align_data = 1;
     return 1;
   }
+  else if (!strcmp(p,"-allmp")) {
+    allmp = 1;
+    return 1;
+  }
   else if (!strcmp(p,"-devpac")) {
+    devpac_compat = 1;
     align_data = 1;
     esc_sequences = 0;
-    maxmacparams = 36;  /* allow \a..\z macro parameters */
+    allmp = 1;
     dot_idchar = 1;
-    internal_abs(rs_name);
-    internal_abs(fo_name);
-    internal_abs(so_name);
     return 1;
   }
   else if (!strcmp(p,"-phxass")) {
-    new_abs("_PHXASS_",number_expr(1));
+    set_internal_abs("_PHXASS_",2);
     phxass_compat = 1;
+    esc_sequences = 1;
     nocase_macros = 1;
-    maxmacparams = 36;  /* allow \a..\z macro parameters */
+    allow_spaces = 1;
+    allmp = 1;
     return 1;
   }
   else if (!strcmp(p,"-spaces")) {
@@ -1647,5 +2153,9 @@ int syntax_args(char *p)
     local_char = '_';
     return 1;
   }
+  else if (!strcmp(p,"-warncomm")) {
+    check_comm = 1;
+    return 1;
+  }
   return 0;
 }
diff --git a/syntax/mot/syntax.h b/syntax/mot/syntax.h
index 484e505..a8cf74e 100644
--- a/syntax/mot/syntax.h
+++ b/syntax/mot/syntax.h
@@ -1,18 +1,19 @@
 /* snytax.h  syntax header file for vasm */
-/* (c) in 2002,2005,2009-2011 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002,2005,2009-2012,2015 by Volker Barthelmann and Frank Wille */
 
 /* macros to recognize identifiers */
 int isidchar(char);
-char *chkidend(char *,char *);
+int iscomment(char *);
 #define ISIDSTART(x) ((x)=='.'||(x)=='@'||(x)=='_'||isalpha((unsigned char)(x)))
 #define ISIDCHAR(x) isidchar(x)
+#define ISEOL(x) (*(x)=='\0'||iscomment(x))
+#ifdef VASM_CPU_M68K
+char *chkidend(char *,char *);
 #define CHKIDEND(s,e) chkidend((s),(e))
+#endif
 
-/* symbol which contains the number of macro arguments */
-#define NARGSYM "NARG"
-
-/* symbol which contains the number of the current macro argument */
-#define CARGSYM "CARG"
+/* result of a boolean operation */
+#define BOOLEAN(x) -(x)
 
 /* we have a special skip() function for expressions, called exp_skip() */
 char *exp_skip(char *);
@@ -20,3 +21,18 @@ char *exp_skip(char *);
 
 /* ignore operand field, when the instruction has no operands */
 #define IGNORE_FIRST_EXTRA_OP 1
+
+/* symbol which contains the number of macro arguments */
+#define NARGSYM "NARG"
+
+/* symbol which contains the number of the current macro argument */
+#define CARGSYM "CARG"
+
+/* symbol which contains the current rept-endr iteration count */
+#define REPTNSYM "REPTN"
+
+/* overwrite macro defaults */
+#define MAXMACPARAMS 35
+#define SKIP_MACRO_ARGNAME(p) (NULL)
+void my_exec_macro(source *);
+#define EXEC_MACRO(s) my_exec_macro(s)
diff --git a/syntax/mot/syntax_errors.h b/syntax/mot/syntax_errors.h
index 58be368..327e21c 100644
--- a/syntax/mot/syntax_errors.h
+++ b/syntax/mot/syntax_errors.h
@@ -10,13 +10,13 @@
   ", expected",WARNING,
   "identifier expected",ERROR,                                       /* 10 */
   "directive has no effect",WARNING,
-  "expression must be a constant",ERROR,
+  "unexpected \"%s\" without \"%s\"",ERROR,
   "illegal section type",ERROR,
-  "repeatedly defined symbol",ERROR,
+  "macro id insert on empty stack",ERROR,
   "illegal memory type",ERROR,                                       /* 15 */
-  "unexpected %s without %s",ERROR,
+  "macro id stack overflow",ERROR,
+  "macro id pull without matching push",ERROR,
+  "check comment",WARNING,
   "",ERROR,
-  "",ERROR,
-  "maximum if-nesting depth exceeded (%d levels)",FATAL|ERROR,
   "",ERROR,                                                          /* 20 */
   "missing %c",WARNING,
diff --git a/syntax/oldstyle/syntax.c b/syntax/oldstyle/syntax.c
index b4edf5d..ef9f6b7 100644
--- a/syntax/oldstyle/syntax.c
+++ b/syntax/oldstyle/syntax.c
@@ -1,5 +1,5 @@
 /* syntax.c  syntax module for vasm */
-/* (c) in 2002-2011 by Frank Wille */
+/* (c) in 2002-2015 by Frank Wille */
 
 #include "vasm.h"
 
@@ -12,27 +12,51 @@
    be provided by the main module.
 */
 
-char *syntax_copyright="vasm oldstyle syntax module 0.8f (c) 2002-2011 Frank Wille";
+char *syntax_copyright="vasm oldstyle syntax module 0.12c (c) 2002-2015 Frank Wille";
+hashtable *dirhash;
+
+static char textname[]=".text",textattr[]="acrx";
+static char dataname[]=".data",dataattr[]="adrw";
+static char rodataname[]=".rodata",rodataattr[]="adr";
+static char bssname[]=".bss",bssattr[]="aurw";
 
 char commentchar=';';
-char *defsectname = NULL;
-char *defsecttype = NULL;
+char *defsectname = textname;
+char *defsecttype = "acrwx";
+
+static char macname[] = ".mac";
+static char macroname[] = ".macro";
+static char eqname[] = ".eq";
+static char equname[] = ".equ";
+static char setname[] = ".set";
+
+static char endmname[] = ".endmacro";
+static char endrname[] = ".endrepeat";
+static char reptname[] = ".rept";
+static char repeatname[] = ".repeat";
+static struct namelen endm_dirlist[] = {
+  { 4,&endmname[1] }, { 6,&endmname[1] }, { 8,&endmname[1] }, { 0,0 }
+};
+static struct namelen rept_dirlist[] = {
+  { 4,&reptname[1] }, { 6,&repeatname[1] }, { 0,0 }
+};
+static struct namelen endr_dirlist[] = {
+  { 4,&endrname[1] }, { 6,&endrname[1] }, { 9,&endrname[1] }, { 0,0 }
+};
+static struct namelen dendm_dirlist[] = {
+  { 5,&endmname[0] }, { 7,&endmname[0] }, { 9,&endmname[0] }, { 0,0 }
+};
+static struct namelen drept_dirlist[] = {
+  { 5,&reptname[0] }, { 7,&repeatname[0] }, { 0,0 }
+};
+static struct namelen dendr_dirlist[] = {
+  { 5,&endrname[0] }, { 7,&endrname[0] }, { 10,&endrname[0] }, { 0,0 }
+};
 
-static int dotdirectives = 0;
-static hashtable *dirhash;
+static int dotdirs = 0;
+static int autoexport = 0;
 static int parse_end = 0;
 
-static char *textname=".text",*textattr="acrx";     
-static char *dataname=".data",*dataattr="adrw";     
-static char *rodataname=".rodata",*rodataattr="adr";
-static char *bssname=".bss",*bssattr="aurw";   
-
-#define MAXCONDLEV 63
-static char cond[MAXCONDLEV+1];
-static int clev,ifnesting;
-
-#define LOCAL (RSRVD_S<<0)      /* symbol flag for local binding */
-
 
 char *skip(char *s)
 {
@@ -51,23 +75,45 @@ void eol(char *s)
 }
 
 
-char *skip_operand(char *s)
+static char *skip_oper(int instoper,char *s)
 {
   int par_cnt = 0;
-  char c;
+  char c = 0;
+#ifdef VASM_CPU_Z80
+  unsigned char lastuc;
+#endif
 
   for (;;) {
+#ifdef VASM_CPU_Z80
+    lastuc = toupper((unsigned char)c);
+#endif
     c = *s;
+
     if (START_PARENTH(c))
       par_cnt++;
-    if (END_PARENTH(c)) {
+    else if (END_PARENTH(c)) {
       if (par_cnt>0)
         par_cnt--;
       else
         syntax_error(3);  /* too many closing parentheses */
     }
-    if(!c || c==commentchar || (c==',' && par_cnt==0))
+#ifdef VASM_CPU_Z80
+    /* For the Z80 ignore ' behind a letter, as it may be a register */
+    else if ((c=='\'' && (lastuc<'A' || lastuc>'Z')) || c=='\"')
+#else
+    else if (c=='\'' || c=='\"')
+#endif
+      s = skip_string(s,c,NULL) - 1;
+    else if(!c || c==commentchar)
+      break;
+    else if (instoper && OPERSEP_COMMA && c==',' && par_cnt==0)
+      break;
+    else if (instoper && OPERSEP_BLANK && isspace((unsigned char)c)
+             && par_cnt==0)
       break;
+    else if (!instoper && c==',' && par_cnt==0)
+      break;
+
     s++;
   }
   if(par_cnt != 0)
@@ -76,7 +122,23 @@ char *skip_operand(char *s)
 }
 
 
-static void handle_data(char *s,int size)
+char *skip_operand(char *s)
+{
+  return skip_oper(1,s);
+}
+
+
+char *my_skip_macro_arg(char *s)
+{
+  if (*s == '\\')
+    s++;  /* leading \ in argument list is optional */
+  return skip_identifier(s);
+}
+
+
+#define handle_data(a,b) handle_data_offset(a,b,0)
+
+static void handle_data_offset(char *s,int size,int offset)
 {
   for (;;) {
     char *opstart = s;
@@ -85,16 +147,28 @@ static void handle_data(char *s,int size)
 
     if (size==8 && (*s=='\"' || *s=='\'')) {
       if (db = parse_string(&opstart,*s,8)) {
+#if defined(VASM_CPU_650X) || defined(VASM_CPU_Z80) || defined(VASM_CPU_6800)
+        if (offset != 0) {
+          int i;
+
+          for (i=0; i<db->size; i++)
+            db->data[i] = db->data[i] + offset;
+        }
+#endif
         add_atom(0,new_data_atom(db,1));
         s = opstart;
       }
     }
     if (!db) {
       op = new_operand();
-      s = skip_operand(s);
+      s = skip_oper(0,s);
       if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(size))) {
         atom *a;
 
+#if defined(VASM_CPU_650X) || defined(VASM_CPU_Z80) || defined(VASM_CPU_6800)
+        if (offset != 0)
+          op->value = make_expr(ADD,number_expr(offset),op->value);
+#endif
         a = new_datadef_atom(abs(size),op);
         a->align = 1;
         add_atom(0,a);
@@ -134,7 +208,7 @@ static void handle_text(char *s)
   }
   if (!db) {
     op = new_operand();
-    s = skip_operand(s);
+    s = skip_oper(0,s);
     if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(8))) {
       atom *a;
 
@@ -173,6 +247,22 @@ static void handle_d32(char *s)
 }
 
 
+#if defined(VASM_CPU_650X) || defined(VASM_CPU_Z80) || defined(VASM_CPU_6800)
+static void handle_d8_offset(char *s)
+{
+  taddr offs = parse_constexpr(&s);
+
+  s = skip(s);
+  if (*s == ',') {
+    s = skip(s+1);
+    handle_data_offset(s,8,offs);
+  }
+  else
+    syntax_error(9);  /* , expected */
+}
+#endif
+
+
 static void do_alignment(taddr align,expr *offset)
 {
   atom *a = new_space_atom(offset,1,0);
@@ -184,7 +274,11 @@ static void do_alignment(taddr align,expr *offset)
 
 static void handle_align(char *s)
 {
-  do_alignment(1<<parse_constexpr(&s),number_expr(0));
+  taddr a = parse_constexpr(&s);
+
+  if (a > 63)
+    syntax_error(21);  /* bad alignment */
+  do_alignment(1LL<<a,number_expr(0));
   eol(s);
 }
 
@@ -271,6 +365,12 @@ static void handle_end(char *s)
 }
 
 
+static void handle_fail(char *s)
+{
+  add_atom(0,new_assert_atom(NULL,NULL,mystrdup(s)));
+}
+
+
 static void handle_org(char *s)
 {
   if (*s == current_pc_char) {
@@ -281,10 +381,24 @@ static void handle_org(char *s)
       return;
     }
   }
-  new_org(parse_constexpr(&s));
+  set_section(new_org(parse_constexpr(&s)));
+  eol(s);
+}
+
+
+static void handle_rorg(char *s)
+{
+  start_rorg(parse_constexpr(&s));
   eol(s);
 }
+  
 
+static void handle_rend(char *s)
+{
+  if (end_rorg())
+    eol(s);
+}
+  
 
 static void handle_section(char *s)
 {
@@ -306,11 +420,11 @@ static void handle_section(char *s)
     s = skip(s+1);
   }
   else {
-    attr = "";
     if (!strcmp(name,textname)) attr = textattr;
     if (!strcmp(name,dataname)) attr = dataattr;
     if (!strcmp(name,rodataname)) attr = rodataattr;
     if (!strcmp(name,bssname)) attr = bssattr;
+    else attr = defsecttype;
   }
 
   new_section(name,attr,1);
@@ -319,18 +433,6 @@ static void handle_section(char *s)
 }
 
 
-static char *get_bind_name(symbol *s)
-{
-  if (s->flags&EXPORT)
-    return "global";
-  else if(s->flags&WEAK)
-    return "weak";
-  else if(s->flags&LOCAL)
-    return "local";
-  return "unknown";
-}
-
-
 static void do_binding(char *s,int bind)
 {
   symbol *sym;
@@ -343,7 +445,7 @@ static void do_binding(char *s,int bind)
     myfree(name);
     if (sym->flags&(EXPORT|WEAK|LOCAL)!=0 &&
         sym->flags&(EXPORT|WEAK|LOCAL)!=bind)
-      syntax_error(20,sym->name,get_bind_name(sym));  /* binding already set */
+      general_error(62,sym->name,get_bind_name(sym)); /* binding already set */
     else
       sym->flags |= bind;
     s = skip(s);
@@ -379,22 +481,60 @@ static void ifdef(char *s,int b)
   symbol *sym;
   int result;
 
-  if (!(name = get_local_label(&s))) {
-    if (!(name = parse_identifier(&s))) {
+  if (!(name = parse_symbol(&s))) {
+    syntax_error(10);  /* identifier expected */
+    return;
+  }
+  if (sym = find_symbol(name))
+    result = sym->type != IMPORT;
+  else
+    result = 0;
+  myfree(name);
+  cond_if(result == b);
+  eol(s);
+}
+
+
+static void ifused(char *s, int b)
+{
+  char *name;
+  symbol *sym;
+  int result;
+
+  if (!(name = parse_identifier(&s))) {
       syntax_error(10);  /* identifier expected */
       return;
+  }
+
+  if (sym = find_symbol(name)) {
+    if (sym->type != IMPORT) {
+      syntax_error(22,name);
+      result = 0;
     }
+    else
+      result = 1;
   }
-  if (sym = find_symbol(name))
-    result = sym->type != IMPORT;
   else
     result = 0;
+
   myfree(name);
-  cond[++clev] = result == b;
+  cond_if(result == b);
   eol(s);
 }
 
 
+static void handle_ifused(char *s)
+{
+  ifused(s,1);
+}
+
+
+static void handle_ifnused(char *s)
+{
+  ifused(s,0);
+}
+
+
 static void handle_ifd(char *s)
 {
   ifdef(s,1);
@@ -407,78 +547,103 @@ static void handle_ifnd(char *s)
 }
 
 
-static void ifexp(char *s,int c)
+static char *ifexp(char *s,int c)
 {
-  taddr val = parse_constexpr(&s);
+  expr *condexp = parse_expr_tmplab(&s);
+  taddr val;
   int b;
 
-  switch (c) {
-    case 0: b = val == 0; break;
-    case 1: b = val != 0; break;
-    case 2: b = val > 0; break;
-    case 3: b = val >= 0; break;
-    case 4: b = val < 0; break;
-    case 5: b = val <= 0; break;
-    default: ierror(0); break;
+  if (eval_expr(condexp,&val,NULL,0)) {
+    switch (c) {
+      case 0: b = val == 0; break;
+      case 1: b = val != 0; break;
+      case 2: b = val > 0; break;
+      case 3: b = val >= 0; break;
+      case 4: b = val < 0; break;
+      case 5: b = val <= 0; break;
+      default: ierror(0); break;
+    }
   }
-  cond[++clev] = b;
-  eol(s);
+  else {
+    general_error(30);  /* expression must be constant */
+    b = 0;
+  }
+  cond_if(b);
+  free_expr(condexp);
+  return s;
 }
 
 
 static void handle_ifeq(char *s)
 {
-  ifexp(s,0);
+  eol(ifexp(s,0));
 }
 
 
 static void handle_ifne(char *s)
 {
-  ifexp(s,1);
+  eol(ifexp(s,1));
 }
 
 
 static void handle_ifgt(char *s)
 {
-  ifexp(s,2);
+  eol(ifexp(s,2));
 }
 
 
 static void handle_ifge(char *s)
 {
-  ifexp(s,3);
+  eol(ifexp(s,3));
 }
 
 
 static void handle_iflt(char *s)
 {
-  ifexp(s,4);
+  eol(ifexp(s,4));
 }
 
 
 static void handle_ifle(char *s)
 {
-  ifexp(s,5);
+  eol(ifexp(s,5));
 }
 
 
 static void handle_else(char *s)
 {
   eol(s);
-  if (clev > 0)
-    cond[clev] = 0;
-  else
-    syntax_error(17);  /* else without if */
+  cond_skipelse();
 }
 
 
 static void handle_endif(char *s)
 {
   eol(s);
-  if (clev > 0)
-    clev--;
+  cond_endif();
+}
+
+
+static void handle_assert(char *s)
+{
+  char *expstr,*msgstr;
+  size_t explen;
+  expr *aexp;
+  atom *a;
+
+  expstr = skip(s);
+  aexp = parse_expr(&s);
+  explen = s - expstr;
+  s = skip(s);
+  if (*s == ',') {
+    s = skip(s+1);
+    msgstr = parse_name(&s);
+  }
   else
-    syntax_error(14);  /* endif without if */
+    msgstr = NULL;
+
+  a = new_assert_atom(aexp,cnvstr(expstr,explen),msgstr);
+  add_atom(0,a);
 }
 
 
@@ -506,10 +671,24 @@ static void handle_include(char *s)
 static void handle_incbin(char *s)
 {
   char *name;
+  long delta = 0;
+  unsigned long nbbytes = 0;
 
   if (name = parse_name(&s)) {
+    s = skip(s);
+    if (*s == ',') {
+      s = skip(s+1);
+      delta = parse_constexpr(&s);
+      if (delta < 0)
+        delta = 0;
+      s = skip(s);
+      if (*s == ',') {
+        s = skip(s+1);
+        nbbytes = parse_constexpr(&s);
+      }
+    }
     eol(s);
-    include_binary_file(name);
+    include_binary_file(name,delta,nbbytes);
   }
 }
 
@@ -519,13 +698,15 @@ static void handle_rept(char *s)
   taddr cnt = parse_constexpr(&s);
 
   eol(s);
-  new_repeat((int)cnt,dotdirectives?".rept":"rept",dotdirectives?".endr":"endr");
+  new_repeat((int)cnt,
+             dotdirs?drept_dirlist:rept_dirlist,
+             dotdirs?dendr_dirlist:endr_dirlist);
 }
 
 
 static void handle_endr(char *s)
 {
-  syntax_error(19);  /* unexpected endr without rept */
+  syntax_error(12,&endrname[1],&repeatname[1]);  /* unexpected endr without rept */
 }
 
 
@@ -534,8 +715,15 @@ static void handle_macro(char *s)
   char *name;
 
   if (name = parse_identifier(&s)) {
-    eol(s);
-    new_macro(name,dotdirectives?".endm":"endm");
+    s = skip(s);
+    if (*s == ',') {  /* named macro arguments are given? */
+      s++;
+    }
+    else {
+      eol(s);
+      s = NULL;
+    }
+    new_macro(name,dotdirs?dendm_dirlist:endm_dirlist,s);
     myfree(name);
   }
   else
@@ -545,7 +733,7 @@ static void handle_macro(char *s)
 
 static void handle_endm(char *s)
 {
-  syntax_error(18);  /* unexpected endm without macro */
+  syntax_error(12,&endmname[1],&macroname[1]);  /* unexpected endm without macro */
 }
 
 
@@ -568,11 +756,60 @@ static void handle_defc(char *s)
 }
 
 
+static void handle_list(char *s)
+{
+  set_listing(1);
+}
+
+
+static void handle_nolist(char *s)
+{
+  set_listing(0);
+}
+
+
+static void handle_struct(char *s)
+{
+  char *name;
+
+  if (name = parse_identifier(&s)) {
+    s = skip(s);
+    eol(s);
+    if (new_structure(name))
+      current_section->flags |= LABELS_ARE_LOCAL;
+    myfree(name);
+  }
+  else
+    syntax_error(10);  /* identifier expected */
+}
+
+
+static void handle_endstruct(char *s)
+{
+  section *prevsec;
+  symbol *szlabel;
+
+  if (end_structure(&prevsec)) {
+    /* create the structure name as label defining the structure size */
+    current_section->flags &= ~LABELS_ARE_LOCAL;
+    szlabel = new_labsym(0,current_section->name);
+    add_atom(0,new_label_atom(szlabel));
+    /* end structure declaration by switching to previous section */
+    set_section(prevsec);
+  }
+  eol(s);
+}
+
+
 struct {
   char *name;
   void (*func)(char *);
 } directives[] = {
   "org",handle_org,
+  "rorg",handle_rorg,
+  "rend",handle_rend,
+  "phase",handle_rorg,
+  "dephase",handle_rend,
   "align",handle_align,
   "even",handle_even,
   "byte",handle_d8,
@@ -589,6 +826,10 @@ struct {
   "dw",handle_d16,
   "dfw",handle_d16,
   "defw",handle_d16,
+  "dd",handle_d32,
+#if defined(VASM_CPU_650X) || defined(VASM_CPU_Z80) || defined(VASM_CPU_6800)
+  "abyte",handle_d8_offset,
+#endif
   "ds",handle_spc8,
   "dsb",handle_spc8,
   "fill",handle_spc8,
@@ -600,19 +841,37 @@ struct {
   "dc",handle_spc8,
   "byt",handle_fixedspc1,
   "wrd",handle_fixedspc2,
+  "assert",handle_assert,
+#if defined(VASM_CPU_TR3200) /* Clash with IFxx instructions of TR3200 cpu */
+  "if_def",handle_ifd,
+  "if_ndef",handle_ifnd,
+  "if_eq",handle_ifeq,
+  "if_ne",handle_ifne,
+  "if_gt",handle_ifgt,
+  "if_ge",handle_ifge,
+  "if_lt",handle_iflt,
+  "if_le",handle_ifle,
+  "if_used",handle_ifused,
+  "if_nused",handle_ifnused,
+#else
   "ifdef",handle_ifd,
   "ifndef",handle_ifnd,
-  "if",handle_ifne,
+  "ifd",handle_ifd,
+  "ifnd",handle_ifnd,
   "ifeq",handle_ifeq,
   "ifne",handle_ifne,
   "ifgt",handle_ifgt,
   "ifge",handle_ifge,
   "iflt",handle_iflt,
   "ifle",handle_ifle,
+  "ifused",handle_ifused,
+  "ifnused",handle_ifnused,
+#endif
+  "if",handle_ifne,
   "else",handle_else,
   "el",handle_else,
   "endif",handle_endif,
-#if !defined(VASM_CPU_Z80)
+#if !defined(VASM_CPU_Z80) && !defined(VASM_CPU_6800)
   "ei",handle_endif,  /* Clashes with z80 opcode */
 #endif
   "incbin",handle_incbin,
@@ -630,6 +889,7 @@ struct {
   "endmac",handle_endm,
   "endmacro",handle_endm,
   "end",handle_end,
+  "fail",handle_fail,
   "section",handle_section,
   "binary",handle_incbin,
   "defs",handle_spc8,
@@ -647,6 +907,18 @@ struct {
   "ascii",handle_string,
   "asciiz",handle_string,
   "string",handle_string,
+  "list",handle_list,
+  "nolist",handle_nolist,
+  "struct",handle_struct,
+  "structure",handle_struct,
+  "endstruct",handle_endstruct,
+  "endstructure",handle_endstruct,
+  "rmb",handle_spc8,
+  "fcc",handle_text,
+  "fcb",handle_d8,
+  "fdb",handle_d16,
+  "bsz",handle_spc8,
+  "zmb",handle_spc8,
 };
 
 int dir_cnt = sizeof(directives) / sizeof(directives[0]);
@@ -664,7 +936,7 @@ static int check_directive(char **line)
   name = s++;
   while (ISIDCHAR(*s))
     s++;
-  if (*name=='.' && dotdirectives)
+  if (*name=='.' && dotdirs)
     name++;
   if (!find_namelen_nc(dirhash,name,s-name,&data))
     return -1;
@@ -695,6 +967,124 @@ static int oplen(char *e,char *s)
 }
 
 
+/* When a structure with this name exists, insert its atoms and either
+   initialize with new values or accept its default values. */
+static int execute_struct(char *name,int name_len,char *s)
+{
+  section *str;
+  atom *p;
+
+  str = find_structure(name,name_len);
+  if (str == NULL)
+    return 0;
+
+  for (p=str->first; p; p=p->next) {
+    atom *new;
+    char *opp;
+    int opl;
+
+    if (p->type==DATA || p->type==SPACE || p->type==DATADEF) {
+      opp = s = skip(s);
+      s = skip_oper(0,s);
+      opl = oplen(s,opp);
+
+      if (opl > 0) {
+        /* initialize this atom with a new expression */
+
+        if (p->type == DATADEF) {
+          /* parse a new data operand of the declared bitsize */
+          operand *op;
+
+          op = new_operand();
+          if (parse_operand(opp,opl,op,
+                            DATA_OPERAND(p->content.defb->bitsize))) {
+            new = new_datadef_atom(p->content.defb->bitsize,op);
+            new->align = p->align;
+            add_atom(0,new);
+          }
+          else
+            syntax_error(8);  /* invalid data operand */
+        }
+        else if (p->type == SPACE) {
+          /* parse the fill expression for this space */
+          new = clone_atom(p);
+          new->content.sb = new_sblock(p->content.sb->space_exp,
+                                       p->content.sb->size,
+                                       parse_expr_tmplab(&opp));
+          new->content.sb->space = p->content.sb->space;
+          add_atom(0,new);
+        }
+        else {
+          /* parse constant data - probably a string, or a single constant */
+          dblock *db;
+
+          db = new_dblock();
+          db->size = p->content.db->size;
+          db->data = db->size ? mycalloc(db->size) : NULL;
+          if (db->data) {
+            if (*opp=='\"' || *opp=='\'') {
+              dblock *strdb;
+
+              strdb = parse_string(&opp,*opp,8);
+              if (strdb->size) {
+                if (strdb->size > db->size)
+                  syntax_error(24,strdb->size-db->size);  /* cut last chars */
+                memcpy(db->data,strdb->data,
+                       strdb->size > db->size ? db->size : strdb->size);
+                myfree(strdb->data);
+              }
+              myfree(strdb);
+            }
+            else {
+              taddr val = parse_constexpr(&opp);
+              void *p;
+
+              if (db->size > sizeof(taddr) && BIGENDIAN)
+                p = db->data + db->size - sizeof(taddr);
+              else
+                p = db->data;
+              setval(BIGENDIAN,p,sizeof(taddr),val);
+            }
+          }
+          add_atom(0,new_data_atom(db,p->align));
+        }
+      }
+      else {
+        /* empty: use default values from original atom */
+        add_atom(0,clone_atom(p));
+      }
+
+      s = skip(s);
+      if (*s == ',')
+        s++;
+    }
+    else if (p->type == INSTRUCTION)
+      syntax_error(23);  /* skipping instruction in struct init */
+
+    /* other atoms are silently ignored */
+  }
+
+  eol(s);
+  return 1;
+}
+
+
+static char *parse_label_or_pc(char **start)
+{
+  char *s,*name;
+
+  name = parse_labeldef(start,0);
+  s = skip(*start);
+  if (name==NULL && *s==current_pc_char && !ISIDCHAR(*(s+1))) {
+    name = cnvstr(s,1);
+    s = skip(s+2);
+  }
+  if (name)
+    *start = s;
+  return name;
+}
+
+
 void parse(void)
 {
   char *s,*line,*inst,*labname;
@@ -708,61 +1098,38 @@ void parse(void)
   while (line = read_next_line()) {
     if (parse_end)
       continue;
-    if (clev >= MAXCONDLEV)
-      syntax_error(16,clev);  /* nesting depth exceeded */
 
-    if (!cond[clev]) {
+    if (!cond_state()) {
       /* skip source until ELSE or ENDIF */
       int idx;
 
       s = line;
+      if (labname = parse_label_or_pc(&s))
+        myfree(labname);
       idx = check_directive(&s);
       if (idx >= 0) {
-        if (!strncmp(directives[idx].name,"if",2)) {
-          ifnesting++;
-        }
-        else if (ifnesting==0 && directives[idx].func == handle_else) {
-          cond[clev] = 1;
-        }
-        else if (directives[idx].func == handle_endif) {
-          if (ifnesting == 0) {
-            if (clev > 0)
-              clev--;
-            else
-              syntax_error(14);  /* endif without if */
-          }
-          else
-            ifnesting--;
-        }
+        if (!strncmp(directives[idx].name,"if",2))
+          cond_skipif();
+        else if (directives[idx].func == handle_else)
+          cond_else();
+        else if (directives[idx].func == handle_endif)
+          cond_endif();
       }
       continue;
     }
 
     s = line;
-
-    labname = get_local_label(&s); /* local label? */
-
-    if (!labname && (ISIDSTART(*s) || *s==current_pc_char)) { /* global l.? */
-      s++;
-      while (ISIDCHAR(*s))
-        s++;
-      if (*line==current_pc_char && s-line!=1) {
-        syntax_error(10);  /* identifier expected */
-        continue;
-      }
-      labname = cnvstr(line,s-line);
-      s = skip(s);
-    }
-
-    if (labname) {
-      /* we have found a global or local label at first column */
+    if (labname = parse_label_or_pc(&s)) {
+      /* we have found a global or local label, or current-pc character */
       symbol *label,*labsym;
       int equlen = 0;
 
-      if (!strnicmp(s,"equ",3) && isspace((unsigned char)*(s+3)))
-        equlen = 3;
-      else if (!strnicmp(s,"eq",2) && isspace((unsigned char)*(s+2)))
-        equlen = 2;
+      if (!strnicmp(s,equname+!dotdirs,3+dotdirs) &&
+          isspace((unsigned char)*(s+3+dotdirs)))
+        equlen = 3+dotdirs;
+      else if (!strnicmp(s,eqname+!dotdirs,2+dotdirs) &&
+               isspace((unsigned char)*(s+2+dotdirs)))
+        equlen = 2+dotdirs;
       else if (*s == '=')
         equlen = 1;
 
@@ -773,24 +1140,37 @@ void parse(void)
           continue;
         }
         else {
-          if (labsym = find_symbol(labname)) {
-            if (labsym->type != IMPORT)
-              syntax_error(13);  /* repeatedly defined symbol */
-          }
           s = skip(s+equlen);
-          label = new_abs(labname,parse_expr_tmplab(&s));
+          label = new_equate(labname,parse_expr_tmplab(&s));
         }
       }
-      else if (!strnicmp(s,"set",3) && isspace((unsigned char)*(s+3))) {
+      else if (!strnicmp(s,setname+!dotdirs,3+dotdirs) &&
+               isspace((unsigned char)*(s+3+dotdirs))) {
         /* SET allows redefinitions */
         if (*labname == current_pc_char) {
           syntax_error(10);  /* identifier expected */
         }
         else {
-          s = skip(s+3);
+          s = skip(s+3+dotdirs);
           label = new_abs(labname,parse_expr_tmplab(&s));
         }
       }
+      else if (!strnicmp(s,macname+!dotdirs,3+dotdirs) &&
+               (isspace((unsigned char)*(s+3+dotdirs)) ||
+                *(s+3+dotdirs)=='\0') ||
+               !strnicmp(s,macroname+!dotdirs,5+dotdirs) &&
+               (isspace((unsigned char)*(s+5+dotdirs)) ||
+                *(s+5+dotdirs)=='\0')) {
+        char *params = skip(s + (*(s+3+dotdirs)=='r'?5+dotdirs:3+dotdirs));
+
+        s = line;
+        myfree(labname);
+        if (!(labname = parse_identifier(&s)))
+          ierror(0);
+        new_macro(labname,dotdirs?dendm_dirlist:endm_dirlist,params);
+        myfree(labname);
+        continue;
+      }
       else {
         /* it's just a label */
         label = new_labsym(0,labname);
@@ -798,6 +1178,9 @@ void parse(void)
         if (*s == ':')	/* optionally terminated by a colon */
           s = skip(s+1);
       }
+
+      if (!is_local_label(labname) && autoexport)
+          label->flags |= EXPORT;
       myfree(labname);
     }
 
@@ -807,7 +1190,7 @@ void parse(void)
       continue;
 
     s = parse_cpu_special(s);
-    if (*s=='\0' || *s==commentchar)
+    if (ISEOL(s))
       continue;
 
     if (*s==current_pc_char && *(s+1)=='=') {   /* "*=" org directive */ 
@@ -818,7 +1201,7 @@ void parse(void)
       continue;
 
     s = skip(s);
-    if (*s=='\0' || *s==commentchar)
+    if (ISEOL(s))
       continue;
 
     /* read mnemonic name */
@@ -839,14 +1222,16 @@ void parse(void)
       syntax_error(2);  /* no space before operands */
     s = skip(s);
 
-    if (execute_macro(inst,inst_len,ext,ext_len,ext_cnt,s,clev))
+    if (execute_macro(inst,inst_len,ext,ext_len,ext_cnt,s))
+      continue;
+    if (execute_struct(inst,inst_len,s))
       continue;
 
-    /* read operands, terminated by comma (unless in parentheses)  */
+    /* read operands, terminated by comma or blank (unless in parentheses) */
     op_cnt = 0;
-    while (*s && *s!=commentchar && op_cnt<MAX_OPERANDS) {
+    while (!ISEOL(s) && op_cnt<MAX_OPERANDS) {
       op[op_cnt] = s;
-      s = skip_operand(s);
+      s = skip_oper(1,s);
       op_len[op_cnt] = oplen(s,op[op_cnt]);
 #if !ALLOW_EMPTY_OPS
       if (op_len[op_cnt] <= 0)
@@ -855,13 +1240,15 @@ void parse(void)
 #endif
         op_cnt++;
       s = skip(s);
-      if (*s != ',')
-        break;
-      else
-        s = skip(s+1);
+      if (OPERSEP_COMMA) {
+        if (*s == ',')
+          s = skip(s+1);
+        else if (!(OPERSEP_BLANK))
+          break;
+      }
     }      
     s = skip(s);
-    if (*s!='\0' && *s!=commentchar)
+    if (!ISEOL(s))
       syntax_error(6);
 
     ip = new_inst(inst,inst_len,op_cnt,op,op_len);
@@ -881,14 +1268,133 @@ void parse(void)
       add_atom(0,new_inst_atom(ip));
   }
 
-  if (clev > 0)
-    syntax_error(15);  /* if without endif */
+  cond_check();
+}
+
+
+/* parse next macro argument */
+char *parse_macro_arg(struct macro *m,char *s,
+                      struct namelen *param,struct namelen *arg)
+{
+  arg->len = 0;  /* cannot select specific named arguments */
+  param->name = s;
+
+  if (*s=='\"' || *s=='\'') {
+    s = skip_string(s,*s,NULL);
+    param->len = s - param->name;
+  }
+  else {
+    s = skip_operand(s);
+    param->len = s - param->name;
+  }
+
+  return s;
+}
+
+
+/* expands arguments and special escape codes into macro context */
+int expand_macro(source *src,char **line,char *d,int dlen)
+{
+  int nc = -1;
+  int n;
+  char *s = *line;
+  char *end;
+
+  if (*s++ == '\\') {
+    /* possible macro expansion detected */
+
+    if (*s == '\\') {
+      *d++ = *s++;
+      if (esc_sequences) {
+        *d++ = '\\';  /* make it a double \ again */
+        nc = 2;
+      }
+      else
+        nc = 1;
+    }
+
+    else if (*s == '@') {
+      /* \@: insert a unique id */
+      char buf[16];
+
+      nc = sprintf(buf,"%lu",src->id);
+      if (dlen >= nc) {
+        s++;
+        memcpy(d,buf,nc);
+      }
+      else
+        nc = -1;
+    }
+    else if (*s=='(' && *(s+1)==')') {
+      /* \() is just skipped, useful to terminate named macro parameters */
+      nc = 0;
+      s += 2;
+    }
+    else if (isdigit((unsigned char)*s)) {
+      /* \1..\9,\0 : insert macro parameter 1..9,10 */
+      nc = copy_macro_param(src,*s=='0'?0:*s-'1',d,dlen);
+      s++;
+    }
+    else if ((end = skip_identifier(s)) != NULL) {
+      if ((n = find_macarg_name(src,s,end-s)) >= 0) {
+        /* \argname: insert named macro parameter n */
+        nc = copy_macro_param(src,n,d,dlen);
+        s = end;
+      }
+    }
+
+    if (nc >= 0)
+      *line = s;  /* update line pointer when expansion took place */
+  }
+
+  return nc;  /* number of chars written to line buffer, -1: no expansion */
+}
+
+
+static int intel_suffix(char *s)
+/* check for constants with h, d, o, q or b suffix */
+{
+  int base,lastbase;
+  char c;
+  
+  base = 2;
+  while (isxdigit((unsigned char)*s)) {
+    lastbase = base;
+    switch (base) {
+      case 2:
+        if (*s <= '1') break;
+        base = 8;
+      case 8:
+        if (*s <= '7') break;
+        base = 10;
+      case 10:
+        if (*s <= '9') break;
+        base = 16;
+    }
+    s++;
+  }
+
+  c = tolower((unsigned char)*s);
+  if (c == 'h')
+    return 16;
+  if ((c=='o' || c=='q') && base<=8)
+    return 8;
+
+  c = tolower((unsigned char)*(s-1));
+  if (c=='d' && lastbase<=10)
+    return 10;
+  if (c=='b' && lastbase<=2)
+    return 2;
+
+  return 0;
 }
 
 
 char *const_prefix(char *s,int *base)
 {
   if (isdigit((unsigned char)*s)) {
+    if (*base = intel_suffix(s))
+      return s;
     if (*s == '0') {
       if (s[1]=='x' || s[1]=='X'){
         *base = 16;
@@ -901,7 +1407,7 @@ char *const_prefix(char *s,int *base)
       *base = 8;
       return s;
     } 
-    else if (*(s+1)=='#' && *s>='2') {
+    else if (s[1]=='#' && *s>='2' && *s<='9') {
       *base = *s & 0xf;
       return s+2;
     }
@@ -910,10 +1416,17 @@ char *const_prefix(char *s,int *base)
       return s;
     }
   }
+
   if (*s=='$' && isxdigit((unsigned char)s[1])) {
     *base = 16;
     return s+1;
   }
+#if defined(VASM_CPU_Z80)
+  if ((*s=='&' || *s=='#') && isxdigit((unsigned char)s[1])) {
+    *base = 16;
+    return s+1;
+  }
+#endif
   if (*s=='@') {
 #if defined(VASM_CPU_Z80)
     *base = 2;
@@ -931,29 +1444,59 @@ char *const_prefix(char *s,int *base)
 }
 
 
+char *const_suffix(char *start,char *end)
+{
+  if (intel_suffix(start))
+    return end+1;
+
+  return end;
+}
+
+
+static char *skip_local(char *p)
+{
+  char *s;
+
+  if (ISIDSTART(*p) || isdigit((unsigned char)*p)) {  /* may start with digit */
+    s = p++;
+    while (ISIDCHAR(*p))
+      p++;
+  }
+  else
+    p = NULL;
+
+  return p;
+}
+
+
 char *get_local_label(char **start)
 /* Local labels start with a '.' or end with '$': "1234$", ".1" */
 {
-  char *s = *start;
-  char *name = NULL;
-
-  if (*s == '.') {
+  char *s,*p,*name;
+
+  name = NULL;
+  s = *start;
+  p = skip_local(s);
+
+  if (p!=NULL && *p=='.' && ISIDCHAR(*(p+1)) &&
+      ISIDSTART(*s) && *s!='.' && *(p-1)!='$') {
+    /* skip local part of global.local label */
+    s = p + 1;
+    p = skip_local(p);
+    name = make_local_label(*start,(s-1)-*start,s,p-s);
+    *start = skip(p);
+  }
+  else if (p!=NULL && p>(s+1) && *s=='.') {  /* .label */
     s++;
-    while (isalnum((unsigned char)*s) || *s=='_')  /* '_' needed for '\@' */
-      s++;
-    if (s > (*start+1)) {
-      name = make_local_label(NULL,0,*start,s-*start);
-      *start = skip(s);
-    }
+    name = make_local_label(NULL,0,s,p-s);
+    *start = skip(p);
   }
-  else {
-    while (isalnum((unsigned char)*s) || *s=='_')  /* '_' needed for '\@' */
-      s++;
-    if (s!=*start && *s=='$') {
-      name = make_local_label(NULL,0,*start,s-*start);
-      *start = skip(++s);
-    }
+  else if (p!=NULL && p>s && *p=='$') { /* label$ */
+    p++;
+    name = make_local_label(NULL,0,s,p-s);
+    *start = skip(p);
   }
+
   return name;
 }
 
@@ -968,10 +1511,8 @@ int init_syntax()
     data.idx = i;
     add_hashentry(dirhash,directives[i].name,data);
   }
-  
+  cond_init();
   current_pc_char = '*';
-  cond[0] = 1;
-  clev = ifnesting = 0;
   return 1;
 }
 
@@ -979,7 +1520,11 @@ int init_syntax()
 int syntax_args(char *p)
 {
   if (!strcmp(p,"-dotdir")) {
-    dotdirectives = 1;
+    dotdirs = 1;
+    return 1;
+  }
+  else if (!strcmp(p,"-autoexp")) {
+    autoexport = 1;
     return 1;
   }
   return 0;
diff --git a/syntax/oldstyle/syntax.h b/syntax/oldstyle/syntax.h
index 97bdf8a..6c24bdd 100644
--- a/syntax/oldstyle/syntax.h
+++ b/syntax/oldstyle/syntax.h
@@ -1,6 +1,23 @@
 /* syntax.h  syntax header file for vasm */
-/* (c) in 2002 by Frank Wille */
+/* (c) in 2002,2012,2014 by Frank Wille */
 
 /* macros to recognize identifiers */
 #define ISIDSTART(x) ((x)=='.'||(x)=='_'||isalpha((unsigned char)(x)))
-#define ISIDCHAR(x) ((x)=='.'||(x)=='_'||isalnum((unsigned char)(x)))
+#define ISIDCHAR(x) ((x)=='_'||isalnum((unsigned char)(x)))
+#define ISEOL(x) (*(x)=='\0' || *(x)==commentchar)
+
+/* result of a boolean operation */
+#define BOOLEAN(x) -(x)
+
+/* operator separation characters */
+#ifndef OPERSEP_COMMA
+#define OPERSEP_COMMA 1
+#endif
+#ifndef OPERSEP_BLANK
+#define OPERSEP_BLANK 0
+#endif
+
+/* overwrite macro defaults */
+#define MAXMACPARAMS 35
+char *my_skip_macro_arg(char *);
+#define SKIP_MACRO_ARGNAME(p) my_skip_macro_arg(p)
diff --git a/syntax/oldstyle/syntax_errors.h b/syntax/oldstyle/syntax_errors.h
index 3ece9d1..ec50543 100644
--- a/syntax/oldstyle/syntax_errors.h
+++ b/syntax/oldstyle/syntax_errors.h
@@ -10,12 +10,16 @@
   ", expected",WARNING,
   "identifier expected",ERROR,                                       /* 10 */
   "",WARNING,
-  "expression must be a constant",ERROR,
-  "repeatedly defined symbol",ERROR,
-  "endif without if",ERROR,
-  "if without endif",ERROR,                                          /* 15 */
-  "maximum if-nesting depth exceeded (%d levels)",FATAL|ERROR,
-  "else without if",ERROR,
-  "unexpected endr without macro",ERROR,
-  "unexpected endr without rept",ERROR,
-  "symbol <%s> already defined with %s scope",WARNING,               /* 20 */
+  "unexpected \"%s\" without \"%s\"",ERROR,
+  "",ERROR,
+  "",ERROR,
+  "",ERROR,                                                          /* 15 */
+  "",ERROR,
+  "",ERROR,
+  "",ERROR,
+  "",ERROR,
+  "",WARNING,                                                        /* 20 */
+  "alignment too big",WARNING,
+  "label <%s> has already been defined",WARNING,
+  "skipping instruction in struct init",WARNING,
+  "last %d bytes of string constant have been cut",WARNING,
diff --git a/syntax/std/syntax.c b/syntax/std/syntax.c
index 094c623..bf91621 100644
--- a/syntax/std/syntax.c
+++ b/syntax/std/syntax.c
@@ -1,5 +1,5 @@
 /* syntax.c  syntax module for vasm */
-/* (c) in 2002-2010 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002-2015 by Volker Barthelmann and Frank Wille */
 
 #include "vasm.h"
 
@@ -12,39 +12,56 @@
    be provided by the main module.
 */
 
-char *syntax_copyright="vasm std syntax module 3.6c (c) 2002-2010 Volker Barthelmann";
-
-static hashtable *dirhash;
-
-#if defined(VASM_CPU_C16X) || defined(VASM_CPU_M68K) || defined(VASM_CPU_650X) || defined(VASM_CPU_ARM) || defined(VASM_CPU_Z80)
+char *syntax_copyright="vasm std syntax module 4.0 (c) 2002-2015 Volker Barthelmann";
+hashtable *dirhash;
+
+static char textname[]=".text",textattr[]="acrx";
+static char dataname[]=".data",dataattr[]="adrw";
+static char sdataname[]=".sdata",sdataattr[]="adrw";
+static char sdata2name[]=".sdata2",sdata2attr[]="adr";
+static char rodataname[]=".rodata",rodataattr[]="adr";
+static char bssname[]=".bss",bssattr[]="aurw";
+static char sbssname[]=".sbss",sbssattr[]="aurw";
+static char tocdname[]=".tocd",tocdattr[]="adrw";
+static char stabname[]=".stab",stabattr[]="dr";
+static char stabstrname[]=".stabstr",stabstrattr[]="dr";
+
+#if defined(VASM_CPU_C16X) || defined(VASM_CPU_M68K) || defined(VASM_CPU_650X) || defined(VASM_CPU_ARM) || defined(VASM_CPU_Z80)|| defined(VASM_CPU_6800) || defined(VASM_CPU_JAGRISC)
 char commentchar=';';
 #else
 char commentchar='#';
 #endif
-char *defsectname = NULL;
-char *defsecttype = NULL;
+char *defsectname = textname;
+char *defsecttype = "acrwx";
+
+static char endmname[] = ".endm";
+static char reptname[] = ".rept";
+static char endrname[] = ".endr";
+static struct namelen dendm_dirlist[] = {
+  { 5,&endmname[0] }, { 0,0 }
+};
+static struct namelen drept_dirlist[] = {
+  { 5,&reptname[0] }, { 0,0 }
+};
+static struct namelen dendr_dirlist[] = {
+  { 5,&endrname[0] }, { 0,0 }
+};
+static struct namelen endm_dirlist[] = {
+  { 4,&endmname[1] }, { 0,0 }
+};
+static struct namelen rept_dirlist[] = {
+  { 4,&reptname[1] }, { 0,0 }
+};
+static struct namelen endr_dirlist[] = {
+  { 4,&endrname[1] }, { 0,0 }
+};
 
+static int parse_end=0;
 static int nodotneeded=0;
 static int alloccommon=0;
+static int noesc=0;
 static taddr sdlimit=-1; /* max size of common data in .sbss section */
 
-static char *textname=".text",*textattr="acrx";
-static char *dataname=".data",*dataattr="adrw";
-static char *sdataname=".sdata",*sdataattr="adrw";
-static char *sdata2name=".sdata2",*sdata2attr="adr";
-static char *rodataname=".rodata",*rodataattr="adr";
-static char *bssname=".bss",*bssattr="aurw";
-static char *sbssname=".sbss",*sbssattr="aurw";
-static char *tocdname=".tocd",*tocdattr="adrw";
-static char *stabname=".stab",*stabattr="dr";
-static char *stabstrname=".stabstr",*stabstrattr="dr";
-
-#define MAXCONDLEV 63
-static char cond[MAXCONDLEV+1];
-static int clev,ifnesting;
-
-#define LOCAL (RSRVD_S<<0)      /* symbol flag for local binding */
-
 
 char *skip(char *s)
 {
@@ -57,10 +74,23 @@ char *skip(char *s)
 void eol(char *s)
 {
   s = skip(s);
-  if (*s!='\0' && *s!=commentchar)
+  if (!ISEOL(s))
     syntax_error(6);
 }
 
+#ifdef VASM_CPU_M68K
+char *chkidend(char *start,char *end)
+{
+  if ((end-start)>2 && *(end-2)=='.') {
+    char c = tolower((unsigned char)*(end-1));
+
+    if (c=='b' || c=='w' || c=='l')
+      return end - 2;  /* .b/.w/.l extension is not part of M68k-identifier */
+  }
+  return end;
+}
+#endif
+
 char *skip_operand(char *s)
 {
   int par_cnt=0;
@@ -75,7 +105,7 @@ char *skip_operand(char *s)
       else
         syntax_error(3);
     }
-    if(!c||c==commentchar||(c==','&&par_cnt==0))
+    if(ISEOL(s)||(c==','&&par_cnt==0))
       break;
     s++;
   }
@@ -84,12 +114,25 @@ char *skip_operand(char *s)
   return s;
 }
 
-static void prident(char *p,int len)
+static char *skip_macroparam(char *s)
 {
-  int olen=len;
-  while(len--)
-    putchar(*p++);
-  printf("(len=%d)",olen);
+  int par_cnt=0;
+  char c;
+
+  while(1){
+    c = *s;
+    if(START_PARENTH(c)) par_cnt++;
+    if(END_PARENTH(c)){
+      if(par_cnt>0)
+        par_cnt--;
+      else
+        return s;
+    }
+    if(ISEOL(s)||((c==','||isspace((unsigned char)c))&&par_cnt==0))
+      break;
+    s++;
+  }
+  return s;
 }
 
 static taddr comma_constexpr(char **s)
@@ -99,7 +142,7 @@ static taddr comma_constexpr(char **s)
     *s = skip(*s + 1);
     return parse_constexpr(s);
   }
-  syntax_error(9);  /* comma expected */
+  general_error(6,',');  /* comma expected */
   return 0;
 }
 
@@ -127,22 +170,28 @@ static void add_const_datadef(section *s,taddr val,int size,int align)
 
 static void handle_section(char *s)
 {
-  char *name,*attr;
+  char *name,*attr,*p;
+  uint32_t mem=0;
+  section *sec;
 
-  if(!(name=parse_name(&s)))
+  if(!(name=parse_name(&s))){
+    syntax_error(20);  /* section name */
     return;
+  }
   if(*s==','){
     s=skip(s+1);
-    attr=s;
-    if(*s!='\"')
-      syntax_error(7);
-    else
-      s++;
-    attr=s;
-    while(*s&&*s!='\"')
-      s++;    
-    attr=cnvstr(attr,s-attr);
-    s=skip(s+1);
+    if(*s!='\"') general_error(6,'\"');  /* quote expected */
+    if(attr=parse_name(&s)){
+      if(*s==','){
+        /* optional memory flags (vasm-specific) */
+        p=s=skip(s+1);
+        mem=parse_constexpr(&s);
+        if(s==p) syntax_error(9);  /* memory flags */
+      }
+    }else{
+      syntax_error(7);  /* section flags */
+      attr="";
+    }
   }else{
     attr="";
     if(!strcmp(name,textname)) attr=textattr;
@@ -155,8 +204,9 @@ static void handle_section(char *s)
     if(!strcmp(name,tocdname)) attr=tocdattr;
   }
 
-  new_section(name,attr,1);
-  switch_section(name,attr);
+  sec=new_section(name,attr,1);
+  sec->memattr=mem;
+  set_section(sec);
   eol(s);
 }
 
@@ -172,9 +222,8 @@ static void handle_org(char *s)
       return;
     }
   }
-  else {
-    new_org(parse_constexpr(&s));
-  }
+  else
+    set_section(new_org(parse_constexpr(&s)));
   eol(s);
 }
 
@@ -182,14 +231,14 @@ static void handle_file(char *s)
 {
   char *name;
   if(*s!='\"'){
-    syntax_error(7);
+    general_error(6,'\"');  /* quote expected */
     return;
   }
   name=++s;
   while(*s&&*s!='\"')
     s++;
   if(*s!='\"')
-    syntax_error(7);
+    general_error(6,'\"');  /* quote expected */
   name=cnvstr(name,s-name);
   setfilename(name);
   eol(++s);
@@ -204,50 +253,46 @@ static int oplen(char *e,char *s)
 
 static void handle_data(char *s,int size,int noalign)
 {
-  for (;;) {
-    char *opstart = s;
+  for (;;){
+    char *opstart=s;
     operand *op;
-    dblock *db = NULL;
+    dblock *db=NULL;
 
-    if ((size==8 || size==16) && *s=='\"') {
-      if (db = parse_string(&opstart,*s,size)) {
+    if((OPSZ_BITS(size)==8 || OPSZ_BITS(size)==16) && *s=='\"'){
+      if(db=parse_string(&opstart,*s,OPSZ_BITS(size))){
         add_atom(0,new_data_atom(db,1));
-        s = opstart;
+        s=opstart;
       }
     }
-    if (!db) {
-      op = new_operand();
-      s = skip_operand(s);
-      if (parse_operand(opstart,s-opstart,op,DATA_OPERAND(size))) {
+    if(!db){
+      op=new_operand();
+      s=skip_operand(s);
+      if(parse_operand(opstart,s-opstart,op,DATA_OPERAND(size))) {
         atom *a;
 
-        a = new_datadef_atom(size,op);
-        if (noalign)
+        a=new_datadef_atom(OPSZ_BITS(size),op);
+        if(noalign)
           a->align=1;
         add_atom(0,a);
-      }
-      else
+      }else
         syntax_error(8);  /* invalid data operand */
     }
 
-    s = skip(s);
-    if (*s == ',') {
-      s = skip(s+1);
-    }
-    else if (*s==commentchar)
+    s=skip(s);
+    if(*s==',') {
+      s=skip(s+1);
+    }else if(ISEOL(s)){
       break;
-    else if (*s) {
-      syntax_error(9);  /* , expected */
+    }else{
+      general_error(6,',');  /* comma expected */
       return;
     }
-    else
-      break;
   }
 
   eol(s);
 }
 
-static void handle_equ(char *s)
+static void do_equ(char *s,int equiv)
 {
   char *labname;
   symbol *label;
@@ -258,23 +303,23 @@ static void handle_equ(char *s)
   }
   s=skip(s);
   if(*s!=',')
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   else
     s=skip(s+1);
+  if(equiv) check_symbol(labname);
   label=new_abs(labname,parse_expr_tmplab(&s));
   myfree(labname);
   eol(s);
 }
 
-static char *get_bind_name(symbol *s)
+static void handle_set(char *s)
 {
-  if(s->flags&EXPORT)
-    return "global";
-  else if(s->flags&WEAK)
-    return "weak";
-  else if(s->flags&LOCAL)
-    return "local";
-  return "unknown";
+  do_equ(s,0);
+}
+
+static void handle_equiv(char *s)
+{
+  do_equ(s,1);
 }
 
 static void do_binding(char *s,int bind)
@@ -289,9 +334,10 @@ static void do_binding(char *s,int bind)
     }
     sym=new_import(name);
     myfree(name);
-    if(sym->flags&(EXPORT|WEAK|LOCAL)!=0 &&
-       sym->flags&(EXPORT|WEAK|LOCAL)!=bind)
-      syntax_error(20,sym->name,get_bind_name(sym));  /* binding already set */
+    if(((sym->flags&(EXPORT|WEAK|LOCAL))!=0 &&
+        (sym->flags&(EXPORT|WEAK|LOCAL))!=bind)
+       || ((sym->flags&COMMON) && bind==LOCAL))
+      general_error(62,sym->name,get_bind_name(sym)); /* binding already set */
     else
       sym->flags|=bind;
     s=skip(s);
@@ -317,16 +363,16 @@ static void handle_local(char *s)
   do_binding(s,LOCAL);
 }
 
-static void do_align(taddr align,expr *fill,taddr max)
-/* @@@ 'max' alignment is not really supported at the moment */
+static void do_align(taddr align,size_t width,expr *fill,taddr max)
 {
-  atom *a = new_space_atom(number_expr(0),1,fill);
+  atom *a = new_space_atom(number_expr(0),width,fill);
 
   a->align = align;
+  a->content.sb->maxalignbytes = max;
   add_atom(0,a);
 }
 
-static void alignment(char *s,int mode)
+static void alignment(char *s,int mode,size_t patwidth)
 {
   int align,max=0;
   expr *fill=0;
@@ -345,23 +391,45 @@ static void alignment(char *s,int mode)
   }
   if (!mode)
     mode = CPU_DEF_ALIGN;
-  do_align(mode==1?align:(1<<align),fill,max);
+  if (mode==2 && align>63)
+    syntax_error(23);  /* alignment too big */
+  do_align(mode==1?align:(1<<align),patwidth,fill,max);
   eol(s);
 }
 
 static void handle_align(char *s)
 {
-  alignment(s,0);
+  alignment(s,0,1);
 }
 
 static void handle_balign(char *s)
 {
-  alignment(s,1);
+  alignment(s,1,1);
+}
+
+static void handle_balignw(char *s)
+{
+  alignment(s,1,2);
+}
+
+static void handle_balignl(char *s)
+{
+  alignment(s,1,4);
 }
 
 static void handle_p2align(char *s)
 {
-  alignment(s,2);
+  alignment(s,2,1);
+}
+
+static void handle_p2alignw(char *s)
+{
+  alignment(s,2,2);
+}
+
+static void handle_p2alignl(char *s)
+{
+  alignment(s,2,4);
 }
 
 static void handle_space(char *s)
@@ -393,7 +461,7 @@ static void handle_size(char *s)
   if(*s==',')
     s=skip(s+1);
   else
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   sym->size=parse_expr_tmplab(&s);
   eol(s);
 }
@@ -413,7 +481,7 @@ static void handle_type(char *s)
   if(*s==',')
     s=skip(s+1);
   else
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   if(!strncmp(s,"@object",7)){
     sym->flags|=TYPE_OBJECT;
     s=skip(s+7);
@@ -457,7 +525,7 @@ static void new_bss(char *s,int global)
     sym->align=parse_constexpr(&s);
   }
   else
-    sym->align=(size>=8)?8:4;
+    sym->align=DATA_ALIGN(size*bitsperbyte);
   a=new_label_atom(sym);
   if(sym->align)
     a->align=sym->align;
@@ -471,7 +539,7 @@ static void new_bss(char *s,int global)
 
 static void handle_comm(char *s)
 {
-  char *name;
+  char *name,*start=s;
   symbol *sym;
 
   if (alloccommon){
@@ -482,18 +550,24 @@ static void handle_comm(char *s)
     syntax_error(10);  /* identifier expected */
     return;
   }
+  if ((sym=find_symbol(name))&&(sym->flags&LOCAL)) {
+    myfree(name);
+    new_bss(start,0);  /* symbol is local, make it .lcomm instead */
+    return;
+  }
+
   sym=new_import(name);
   myfree(name);
   s=skip(s);
   if(*s==',')
     s=skip(s+1);
   else
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   if (!(sym->size=parse_expr(&s)))
     return;
   simplify_expr(sym->size);
   if(sym->size->type!=NUM){
-    syntax_error(12);
+    general_error(30);
     return;
   }
   sym->flags|=COMMON|TYPE_OBJECT;
@@ -503,7 +577,7 @@ static void handle_comm(char *s)
     sym->align=parse_constexpr(&s);
   }
   else
-    sym->align=(sym->size->c.val>=8)?8:4;
+    sym->align=DATA_ALIGN((int)sym->size->c.val*bitsperbyte);
   eol(s);
 } 
 
@@ -587,7 +661,7 @@ static void handle_stabs(char *s)
     name = cnvstr(name,s-name);
   }
   else {
-    syntax_error(7);  /* " expected */
+      general_error(6,'\"');  /* quote expected */
     return;
   }
   s++;
@@ -601,7 +675,7 @@ static void handle_stabs(char *s)
     s = skip_operand(s);
   }
   else
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   eol(s);
 }
 
@@ -619,7 +693,7 @@ static void handle_stabn(char *s)
     s = skip_operand(s);
   }
   else
-    syntax_error(9);
+    general_error(6,',');  /* comma expected */
   eol(s);
 }
 
@@ -659,7 +733,7 @@ static void handle_incbin(char *s)
 
   if (name = parse_name(&s)) {
     eol(s);
-    include_binary_file(name);
+    include_binary_file(name,0,0);
   }
 }
 
@@ -668,30 +742,33 @@ static void handle_rept(char *s)
   taddr cnt = parse_constexpr(&s);
 
   eol(s);
-  new_repeat((int)cnt,nodotneeded?"rept":".rept",nodotneeded?"endr":".endr");
+  new_repeat((int)cnt,
+             nodotneeded?rept_dirlist:drept_dirlist,
+             nodotneeded?endr_dirlist:dendr_dirlist);
 }
 
 static void handle_endr(char *s)
 {
-  syntax_error(19);  /* unexpected endr without rept */
+  syntax_error(12,endrname,reptname);  /* unexpected endr without rept */
 }
 
 static void handle_macro(char *s)
 {
   char *name;
 
-  if (name = parse_identifier(&s)) {
-    eol(s);
-    new_macro(name,nodotneeded ?"endm":".endm");
+  if(name = parse_identifier(&s)){
+    s=skip(s);
+    if(ISEOL(s))
+      s=NULL;
+    new_macro(name,nodotneeded?endm_dirlist:dendm_dirlist,s);
     myfree(name);
-  }
-  else
+  }else
     syntax_error(10);  /* identifier expected */
 }
 
 static void handle_endm(char *s)
 {
-  syntax_error(13);  /* unexpected endm without macro */
+  syntax_error(12,endmname,".macro");  /* unexpected endm without macro */
 }
 
 static void ifdef(char *s,int b)
@@ -700,18 +777,16 @@ static void ifdef(char *s,int b)
   symbol *sym;
   int result;
 
-  if (!(name = get_local_label(&s))) {
-    if (!(name = parse_identifier(&s))) {
-      syntax_error(10);  /* identifier expected */
-      return;
-    }
+  if (!(name = parse_symbol(&s))) {
+    syntax_error(10);  /* identifier expected */
+    return;
   }
   if (sym = find_symbol(name))
     result = sym->type != IMPORT;
   else
     result = 0;
   myfree(name);
-  cond[++clev] = result == b;
+  cond_if(result == b);
   eol(s);
 }
 
@@ -725,21 +800,41 @@ static void handle_ifnd(char *s)
   ifdef(s,0);
 }
 
+static void handle_ifb(char *s)
+{
+  s = skip(s);
+  cond_if(ISEOL(s));
+}
+
+static void handle_ifnb(char *s)
+{
+  s = skip(s);
+  cond_if(!ISEOL(s));
+}
+
 static void ifexp(char *s,int c)
 {
-  taddr val = parse_constexpr(&s);
+  expr *condexp = parse_expr_tmplab(&s);
+  taddr val;
   int b;
 
-  switch (c) {
-    case 0: b = val == 0; break;
-    case 1: b = val != 0; break;
-    case 2: b = val > 0; break;
-    case 3: b = val >= 0; break;
-    case 4: b = val < 0; break;
-    case 5: b = val <= 0; break;
-    default: ierror(0); break;
+  if (eval_expr(condexp,&val,NULL,0)) {
+    switch (c) {
+      case 0: b = val == 0; break;
+      case 1: b = val != 0; break;
+      case 2: b = val > 0; break;
+      case 3: b = val >= 0; break;
+      case 4: b = val < 0; break;
+      case 5: b = val <= 0; break;
+      default: ierror(0); break;
+    }
   }
-  cond[++clev] = b;
+  else {
+    general_error(30);  /* expression must be constant */
+    b = 0;
+  }
+  cond_if(b);
+  free_expr(condexp);
   eol(s);
 }
 
@@ -776,31 +871,24 @@ static void handle_ifle(char *s)
 static void handle_else(char *s)
 {
   eol(s);
-  if (clev > 0)
-    cond[clev] = 0;
-  else
-    syntax_error(17);  /* else without if */
+  cond_skipelse();
 }
 
 static void handle_endif(char *s)
 {
   eol(s);
-  if (clev > 0)
-    clev--;
-  else
-    syntax_error(14);  /* endif without if */
+  cond_endif();
 }
 
 static void handle_bsss(char *s)
 {
-  s = skip(s);
-  if (*s!=0 && *s!=commentchar)	{
-		new_bss(s,0);
-	}
-	else {
-	  handle_section(bssname);
-  	eol(s);
-	}
+  s=skip(s);
+  if(!ISEOL(s)){
+    new_bss(s,0);
+  }else{
+    handle_section(bssname);
+    eol(s);
+  }
 }
 
 static void handle_8bit(char *s){ handle_data(s,8,0); }
@@ -810,6 +898,8 @@ static void handle_64bit(char *s){ handle_data(s,64,0); }
 static void handle_16bit_noalign(char *s){ handle_data(s,16,1); }
 static void handle_32bit_noalign(char *s){ handle_data(s,32,1); }
 static void handle_64bit_noalign(char *s){ handle_data(s,64,1); }
+static void handle_single(char *s){ handle_data(s,OPSZ_FLOAT|32,0); }
+static void handle_double(char *s){ handle_data(s,OPSZ_FLOAT|64,0); }
 #if VASM_CPU_OIL
 static void handle_string(char *s){ handle_data(s,8,0); }
 #else
@@ -827,12 +917,39 @@ static void handle_rodatas(char *s){ handle_section(rodataname);eol(s);}
 static void handle_sbsss(char *s){ handle_section(sbssname);eol(s);}
 static void handle_tocds(char *s){ handle_section(tocdname);eol(s);}
 
+static void handle_abort(char *s)
+{
+  syntax_error(11);
+  parse_end = 1;
+}
+
+static void handle_err(char *s)
+{
+  add_atom(0,new_assert_atom(NULL,NULL,mystrdup(s)));
+}
+
+static void handle_fail(char *s)
+{
+  expr *condexp = parse_expr_tmplab(&s);
+  taddr val;
+
+  if (eval_expr(condexp,&val,NULL,0)) {
+    if (val >= 500)
+      syntax_error(21,(long long)val);
+    else
+      syntax_error(22,(long long)val);
+  }
+  else
+    general_error(30);  /* expression must be constant */
+  eol(s);
+}
+
 static void handle_title(char *s)
 {
   char *t;
   s=skip(s);
   if(*s!='\"')
-    syntax_error(7);
+    general_error(6,'\"');  /* quote expected */
   else
     s++;
   t=s;
@@ -840,7 +957,7 @@ static void handle_title(char *s)
     s++;
   set_list_title(t,s-t);
   if(*s!='\"')
-    syntax_error(7);
+    general_error(6,'\"');  /* quote expected */
   else
     s++;
   eol(s);
@@ -855,6 +972,21 @@ static void handle_ident(char *s)
   eol(s);
 }
 
+static void handle_list(char *s)
+{
+  set_listing(1);
+}
+
+static void handle_nolist(char *s)
+{
+  set_listing(0);
+}
+
+static void handle_swbeg(char *s)
+{
+  /* gas emits no code here? Ignore...? */
+}
+
 struct {
   char *name;
   void (*func)(char *);
@@ -867,17 +999,20 @@ struct {
   "asciz",handle_string,
   "short",handle_16bit,
   "half",handle_16bit,
-  "word",handle_32bit,
+  "word",handle_16bit,
   "int",handle_32bit,
   "long",handle_32bit,
   "quad",handle_64bit,
   "2byte",handle_16bit_noalign,
   "uahalf",handle_16bit_noalign,
   "4byte",handle_32bit_noalign,
-  "uaword",handle_32bit_noalign,
+  "uaword",handle_16bit_noalign,
   "ualong",handle_32bit_noalign,
   "8byte",handle_64bit_noalign,
   "uaquad",handle_64bit_noalign,
+  "float",handle_single,
+  "single",handle_single,
+  "double",handle_double,
   "text",handle_texts,
   "data",handle_datas,
   "bss",handle_bsss,
@@ -886,8 +1021,9 @@ struct {
   "sdata2",handle_sdata2s,
   "sbss",handle_sbsss,
   "tocd",handle_tocds,
-  "equ",handle_equ,
-  "set",handle_equ,
+  "equ",handle_set,
+  "set",handle_set,
+  "equiv",handle_equiv,
   "global",handle_global,
   "globl",handle_global,
   "extern",handle_global,
@@ -895,9 +1031,14 @@ struct {
   "local",handle_local,
   "align",handle_align,
   "balign",handle_balign,
+  "balignw",handle_balignw,
+  "balignl",handle_balignl,
   "p2align",handle_p2align,
+  "p2alignw",handle_p2alignw,
+  "p2alignl",handle_p2alignl,
   "space",handle_space,
   "skip",handle_space,
+  "zero",handle_space,
   "comm",handle_comm,
   "lcomm",handle_lcomm,
   "size",handle_size,
@@ -915,6 +1056,8 @@ struct {
   "endm",handle_endm,
   "ifdef",handle_ifd,
   "ifndef",handle_ifnd,
+  "ifb",handle_ifb,
+  "ifnb",handle_ifnb,
   "if",handle_ifne,
   "ifeq",handle_ifeq,
   "ifne",handle_ifne,
@@ -924,8 +1067,14 @@ struct {
   "ifle",handle_ifle,
   "else",handle_else,
   "endif",handle_endif,
+  "abort",handle_abort,
+  "err",handle_err,
+  "fail",handle_fail,
   "title",handle_title,
   "ident",handle_ident,
+  "list",handle_list,
+  "nolist",handle_nolist,
+  "swbeg",handle_swbeg,
 };
 
 int dir_cnt=sizeof(directives)/sizeof(directives[0]);
@@ -946,7 +1095,7 @@ static int check_directive(char **line)
     name++;
   else if (!nodotneeded)
     return -1;
-  if (!find_namelen(dirhash,name,s-name,&data))
+  if (!find_namelen_nc(dirhash,name,s-name,&data))
     return -1;
   *line = s;
   return data.idx;
@@ -974,32 +1123,29 @@ void parse(void)
   instruction *ip;
 
   while (line=read_next_line()){
-    if (clev >= MAXCONDLEV)
-      syntax_error(16,clev);  /* nesting depth exceeded */
+    if (parse_end)
+      continue;
+
+    /* # is always allowed as a comment at the beginning of a line */
+    s = skip(line);
+    if (*s == '#')
+      continue;
 
-    if (!cond[clev]) {
+    if (!cond_state()) {
       /* skip source until ELSE or ENDIF */
       int idx;
 
       s = line;
+      if (labname = parse_labeldef(&s,1))  /* skip label field */
+        myfree(labname);
       idx = check_directive(&s);
       if (idx >= 0) {
-        if (!strncmp(directives[idx].name,"if",2)) {
-          ifnesting++;
-        }
-        else if (ifnesting==0 && !strncmp(directives[idx].name,"else",4)) {
-          cond[clev] = 1;
-        }
-        else if (directives[idx].func == handle_endif) {
-          if (ifnesting == 0) {
-            if (clev > 0)
-              clev--;
-            else
-              syntax_error(14);  /* endif without if */
-          }
-          else
-            ifnesting--;
-        }
+        if (!strncmp(directives[idx].name,"if",2))
+          cond_skipif();
+        else if (directives[idx].func == handle_else)
+          cond_else();
+        else if (directives[idx].func == handle_endif)
+          cond_endif();
       }
       continue;
     }
@@ -1011,38 +1157,21 @@ void parse(void)
 
     /* skip spaces */
     s=skip(s);
-    if(!*s||*s==commentchar)
+    if(ISEOL(s))
       continue;
 
-    /* check for label */
-    start=s;
-    if(labname=get_local_label(&s)){   /* local label? */
-      if(*s!=':'){
-        s=start;
-        myfree(labname);
-        labname=NULL;
-      }
-    }
-    else if(ISIDSTART(*s)){            /* or global label? */
-      s++;
-      while(ISIDCHAR(*s)) s++;
-      if(*s!=':')
-        s=start;
-      else
-        labname=cnvstr(start,s-start);
-    }
-    if(labname){
+    if(labname=parse_labeldef(&s,1)){
       /* we have found a valid global or local label */
       add_atom(0,new_label_atom(new_labsym(0,labname)));
-      s=skip(s+1);
+      s=skip(s);
       myfree(labname);
     }
 
-    if(!*s||*s==commentchar)
+    if(ISEOL(s))
       continue;
 
     s=skip(parse_cpu_special(s));
-    if(*s==0||*s==commentchar)
+    if(ISEOL(s))
       continue;
 
     if(handle_directive(s))
@@ -1064,12 +1193,12 @@ void parse(void)
 #endif
     s=skip(s);
 
-    if(execute_macro(start,inst_len,ext,ext_len,ext_cnt,s,clev))
+    if(execute_macro(start,inst_len,ext,ext_len,ext_cnt,s))
       continue;
 
     /* read operands, terminated by comma (unless in parentheses)  */
     op_cnt=0;
-    while(*s&&*s!=commentchar&&op_cnt<MAX_OPERANDS){
+    while(!ISEOL(s)&&op_cnt<MAX_OPERANDS){
       op[op_cnt]=s;
       s=skip_operand(s);
       op_len[op_cnt]=oplen(s,op[op_cnt]);
@@ -1087,7 +1216,7 @@ void parse(void)
       }
     }      
     s=skip(s);
-    if(*s!=0&&*s!=commentchar) syntax_error(6);
+    if(!ISEOL(s)) syntax_error(6);
     ip=new_inst(start,inst_len,op_cnt,op,op_len);
 #if MAX_QUALIFIERS>0
     if(ip){
@@ -1104,8 +1233,137 @@ void parse(void)
       ;
   }
 
-  if (clev > 0)
-    syntax_error(15);  /* if without endif */
+  cond_check();
+}
+
+/* get defaults and qualifiers for a macro argument name specifier */
+char *macro_arg_opts(macro *m,int argno,char *name,char *s)
+{
+  int req = 0;
+  char *end;
+  char *new = NULL;
+
+  if (*s==':' && (end=skip_identifier(s+1))!=NULL) {
+    if (end-s==4 && !strnicmp(s+1,"req",3)) {
+      /* required argument: argname:req */
+      req = 1;
+      new = s = skip(s+4);
+    }
+    else if (end-s==7 && !strnicmp(s+1,"vararg",6)) {
+      /* define vararg position: argname:vararg */
+      m->vararg = argno;
+      new = s = skip(s+7);
+    }
+  }
+  if (*s == '=') {
+    /* define a default value for this argument */
+    s = skip(s+1);
+    if (end = skip_operand(s)) {
+      if (req)
+        syntax_error(13,name);  /* pointless default value for req. parameter */
+      addmacarg(&m->defaults,s,end);
+      return end;
+    }
+  }
+  if (new) {
+    if (req)
+      addmacarg(&m->defaults,NULL,NULL);  /* mark as required - no default! */
+    else
+      addmacarg(&m->defaults,new,new);  /* empty string as default */
+  }
+  return new;  /* NULL means: set an empty string as default value */
+}
+
+/* parse next macro argument */
+char *parse_macro_arg(struct macro *m,char *s,
+                      struct namelen *param,struct namelen *arg)
+{
+  char *idend = skip_identifier(s);
+
+  arg->len = 0;
+  if (idend!=NULL && idend-s>0) {
+    char *end = skip(idend);
+
+    if (*end++ == '=') {
+      /* argument selected by keyword */
+      arg->name = s;
+      arg->len = idend - s;
+      s = skip(end);
+    }
+  }
+
+  if (*s == '\'') {
+    /* evaluate character constant */
+    unsigned long cc = parse_constexpr(&s);
+    char buf[16],*ccstr;
+    int len;
+
+    if ((len = sprintf(buf,"%lu",cc)) < 0)
+      ierror(0);
+    ccstr = mystrdup(buf);
+    param->name = ccstr;
+    param->len = len;
+  }
+  else if (*s == '\"') {
+    /* pass everything enclosed in quotes, but without the quotes */
+    param->name = ++s;
+    while (*s!='\0' && *s!='\"') s++;
+    param->len = s - param->name;
+    if (*s == '\"')
+      s++;
+    else
+      general_error(6,'\"');  /* " expected */
+  }
+  else {
+    param->name = s;
+    s = skip_macroparam(s);
+    param->len = s - param->name;
+  }
+  return s;
+}
+
+/* expands arguments and special escape codes into macro context */
+int expand_macro(source *src,char **line,char *d,int dlen)
+{
+  int n,nc=-1;
+  char *end,*s=*line;
+
+  if (*s++ == '\\') {
+    /* possible macro expansion detected */
+    if (*s == '@') {
+      /* \@: insert a unique id */
+      char buf[16];
+
+      nc = sprintf(buf,"%lu",src->id);
+      if (dlen >= nc) {
+        s++;
+        memcpy(d,buf,nc);
+      }
+      else
+        nc = -1;
+    }
+    else if (*s=='(' && *(s+1)==')') {
+      /* \() is just skipped, useful to terminate named macro parameters */
+      nc = 0;
+      s += 2;
+    }
+    else if ((end = skip_identifier(s)) != NULL) {
+      if ((n = find_macarg_name(src,s,end-s)) >= 0) {
+        /* \argname: insert named macro parameter n */
+        nc = copy_macro_param(src,n,d,dlen);
+        s = end;
+      }
+    }
+    if (nc >= 0)
+      *line = s;  /* update line pointer when expansion took place */
+  }           
+  return nc;  /* number of chars written to line buffer, -1: no expansion */
+}
+
+void my_exec_macro(source *src)
+{
+  if (src->macro->num_argnames>=0 && src->num_params<src->macro->num_argnames)
+    general_error(24);  /* missing macro parameters (named) */
 }
 
 char *const_prefix(char *s,int *base)
@@ -1122,14 +1380,23 @@ char *const_prefix(char *s,int *base)
     if(s[1]=='b'||s[1]=='B'){
       *base=2;
       return s+2;
-    }    
-    *base=8;
-    return s;
+    }
+    if(isdigit((unsigned char)s[1])){
+      *base=8;
+      return s;
+    }
+    if(s[1]=='f'||s[1]=='F')
+      s+=2;  /* floating point is handled automatically, so skip prefix */
   }
   *base=10;
   return s;
 }
 
+char *const_suffix(char *start,char *end)
+{
+  return end;
+}
+
 char *get_local_label(char **start)
 /* local labels start with a '.' or end with '$': "1234$", ".1" */
 {
@@ -1166,11 +1433,12 @@ int init_syntax()
     add_hashentry(dirhash,directives[i].name,data);
   }
 
+  cond_init();
 #if defined(VASM_CPU_X86)
   current_pc_char = '.';
 #endif  
-  cond[0] = 1;
-  clev = ifnesting = 0;
+  esc_sequences = !noesc;
+  nocase_macros = 1;
   return 1;
 }
 
@@ -1182,6 +1450,10 @@ int syntax_args(char *p)
     nodotneeded = 1;
     return 1;
   }
+  else if (!strcmp(p,"-noesc")) {
+    noesc = 1;
+    return 1;
+  }
   else if (!strcmp(p,"-ac")) {
     alloccommon = 1;
     return 1;
diff --git a/syntax/std/syntax.h b/syntax/std/syntax.h
index 79c75d1..65e0634 100644
--- a/syntax/std/syntax.h
+++ b/syntax/std/syntax.h
@@ -1,5 +1,5 @@
 /* snytax.h  syntax header file for vasm */
-/* (c) in 2002-2005 by Volker Barthelmann and Frank Wille */
+/* (c) in 2002-2005,2015 by Volker Barthelmann and Frank Wille */
 
 /* macros to recognize identifiers */
 #if defined(VASM_CPU_PPC)
@@ -9,7 +9,24 @@
 #define ISIDSTART(x) ((x)=='.'||(x)=='_'||isalpha((unsigned char)(x)))
 #define ISIDCHAR(x) ((x)=='.'||(x)=='_'||isalnum((unsigned char)(x)))
 #endif
+#define ISEOL(x) (*(x)=='\0'||*(x)==commentchar)
+#if defined(VASM_CPU_M68K)
+char *chkidend(char *,char *);
+#define CHKIDEND(s,e) chkidend((s),(e))
+#endif
+
+/* result of a boolean operation */
+#define BOOLEAN(x) -(x)
 
 #ifndef CPU_DEF_ALIGN
 #define CPU_DEF_ALIGN 2	 /* power2-alignment is default for .align */
 #endif
+
+/* overwrite macro defaults */
+#define MAXMACPARAMS 64
+char *macro_arg_opts(macro *,int,char *,char *);
+#define MACRO_ARG_OPTS(m,n,a,p) macro_arg_opts(m,n,a,p)
+#define MACRO_ARG_SEP(p) (*p==',' ? skip(p+1) : p)
+#define MACRO_PARAM_SEP(p) (*p==',' ? skip(p+1) : p)
+void my_exec_macro(source *);
+#define EXEC_MACRO(s) my_exec_macro(s)
diff --git a/syntax/std/syntax_errors.h b/syntax/std/syntax_errors.h
index f0bcb05..1328c96 100644
--- a/syntax/std/syntax_errors.h
+++ b/syntax/std/syntax_errors.h
@@ -5,17 +5,20 @@
   "missing closing parentheses",WARNING,
   "missing operand",ERROR,                        /* 5 */
   "scratch at end of line",WARNING,
-  "\" expected",WARNING,
+  "section flags expected",ERROR,
   "invalid data operand",ERROR,
-  ", expected",WARNING,
+  "memory flags expected",ERROR,
   "identifier expected",ERROR,                    /* 10 */
-  "",WARNING,
-  "expression must be constant",ERROR,
-  "unexpected endm without macro",ERROR,
-  "endif without if",ERROR,
-  "if without endif",ERROR,                       /* 15 */
-  "maximum if-nesting depth exceeded (%d levels)",FATAL|ERROR,
-  "else without if",ERROR,
+  "assembly aborted",ERROR,
+  "unexpected \"%s\" without \"%s\"",ERROR,
+  "pointless default value for required parameter <%s>",ERROR,
+  "",ERROR,
+  "",ERROR,                                       /* 15 */
+  "",ERROR,
+  "",ERROR,
   "syntax error",ERROR,
-  "unexpected endr without rept",ERROR,
-  "symbol <%s> already defined with %s scope",WARNING, /* 20 */
+  "",ERROR,
+  "section name expected",ERROR,                  /* 20 */
+  ".fail %lld encountered",WARNING,
+  ".fail %lld encountered",ERROR,
+  "alignment too big",WARNING,
diff --git a/syntax/test/syntax.c b/syntax/test/syntax.c
index 8aae8b0..7098473 100644
--- a/syntax/test/syntax.c
+++ b/syntax/test/syntax.c
@@ -14,7 +14,7 @@
 
 char *syntax_copyright="vasm test syntax module (c) 2002 Volker Barthelmann";
 
-static hashtable *dirhash;
+hashtable *dirhash;
 
 char commentchar=';';
 char *defsectname = NULL;
@@ -32,7 +32,7 @@ char *skip(char *s)
 void eol(char *s)
 {
   s = skip(s);
-  if (*s!='\0' && *s!=commentchar)
+  if (!ISEOL(s))
     syntax_error(6);
 }
 
@@ -47,7 +47,7 @@ char *skip_operand(char *s)
       else
         syntax_error(3);
     }
-    if(!*s||*s==commentchar||(*s==','&&par_cnt==0))
+    if(ISEOL(s)||(*s==','&&par_cnt==0))
       break;
     s++;
   }
@@ -396,6 +396,11 @@ char *const_prefix(char *s,int *base)
   return s;
 }
 
+char *const_suffix(char *start,char *end)
+{
+  return end;
+}
+
 char *get_local_label(char **start)
 {
   return NULL;
diff --git a/syntax/test/syntax.h b/syntax/test/syntax.h
index 78dca20..1495add 100644
--- a/syntax/test/syntax.h
+++ b/syntax/test/syntax.h
@@ -4,3 +4,7 @@
 /* macros to recognize identifiers */
 #define ISIDSTART(x) ((x)=='.'||(x)=='_'||isalpha((unsigned char)(x)))
 #define ISIDCHAR(x) ((x)=='.'||(x)=='_'||isalnum((unsigned char)(x)))
+#define ISEOL(x) (*(x)=='\0'||*(x)==commentchar)
+
+/* result of a boolean operation */
+#define BOOLEAN(x) (x)
diff --git a/tfloat.h b/tfloat.h
new file mode 100644
index 0000000..07420d1
--- /dev/null
+++ b/tfloat.h
@@ -0,0 +1,10 @@
+/* tfloat.h Floating point type and string conversion function. */
+/* (c) 2014 Frank Wille */
+
+#if defined(__VBCC__) || (defined(_MSC_VER) && _MSC_VER < 1800) || defined(__CYGWIN__)
+typedef double tfloat;
+#define strtotfloat(n,e) strtod(n,e)
+#else
+typedef long double tfloat;
+#define strtotfloat(n,e) strtold(n,e)
+#endif
diff --git a/vasm.c b/vasm.c
index 79ede4a..0741fd3 100644
--- a/vasm.c
+++ b/vasm.c
@@ -1,36 +1,48 @@
 /* vasm.c  main module for vasm */
-/* (c) in 2002-2011 by Volker Barthelmann */
+/* (c) in 2002-2015 by Volker Barthelmann */
 
 #include <stdlib.h>
 #include <stdio.h>
 
 #include "vasm.h"
 
-#define _VER "vasm 1.5a"
-char *copyright = _VER " (c) in 2002-2011 Volker Barthelmann";
+#define _VER "vasm 1.7c"
+char *copyright = _VER " (c) in 2002-2015 Volker Barthelmann";
 #ifdef AMIGA
 static const char *_ver = "$VER: " _VER " " __AMIGADATE__ "\r\n";
 #endif
 
 #define SRCREADINC (64*1024)  /* extend buffer in these steps when reading */
-#define MAXPASSES 1000        /* break when MAXPASSES are reached */
+
+/* The resolver will run another pass over the current section as long as any
+   label location or atom size has changed. It gives up at MAXPASSES, which
+   hopefully will never happen.
+   During the first FASTOPTPHASE passes all instructions of a section will be
+   optimized at the same time. After that the resolver enters a safe mode,
+   where only a single instruction per pass is changed. */
+#define MAXPASSES 1000
+#define FASTOPTPHASE 50
 
 source *cur_src=NULL;
 char *filename,*debug_filename;
 section *current_section;
-char *inname=0,*outname=0,*listname=0;
-int secname_attr=0;
-int unnamed_sections=0;
-int ignore_multinc=0;
-int nocase=0;
-int no_symbols=0;
-int pic_check=0;
-int final_pass,produce_listing,listformfeed=1,listlinesperpage=40,listnosyms;
+char *inname,*outname,*listname;
+int secname_attr;
+int unnamed_sections;
+int ignore_multinc;
+int nocase;
+int no_symbols;
+int pic_check;
+int done,final_pass,debug;
+int listena,listformfeed=1,listlinesperpage=40,listnosyms;
+int exec_out;
 listing *first_listing,*last_listing,*cur_listing;
 char *output_format="test";
 unsigned long long taddrmask;
 char emptystr[]="";
+char vasmsym_name[]="__VASM";
 
+static int produce_listing;
 static char **listtitles;
 static int *listtitlelines;
 static int listtitlecnt;
@@ -38,21 +50,18 @@ static int listtitlecnt;
 static FILE *outfile=NULL;
 
 static section *first_section,*last_section;
-static symbol *first_symbol=NULL;
+static section *prev_sec=NULL,*prev_org=NULL;
+
+static taddr rorg_pc=0;
+static taddr org_pc;
 
 /* MNEMOHTABSIZE should be defined by cpu module */
 #ifndef MNEMOHTABSIZE
-#define MNEMOHTABSIZE 0x200
+#define MNEMOHTABSIZE 0x1000
 #endif
 hashtable *mnemohash;
 
-#ifndef SYMHTABSIZE
-#define SYMHTABSIZE 0x4000
-#endif
-static hashtable *symhash;
-
 static int verbose=1,auto_import=1;
-static char *last_global_label=emptystr;
 static struct include_path *first_incpath=NULL;
 static struct include_path *first_source=NULL;
 
@@ -72,7 +81,7 @@ void leave(void)
       remove(outname);
   }
 
-  if(DEBUG){
+  if(debug){
     fprintf(stdout,"Sections:\n");
     for(sec=first_section;sec;sec=sec->next)
       print_section(stdout,sec);
@@ -90,59 +99,119 @@ void leave(void)
     exit(EXIT_SUCCESS);
 }
 
-void fail(char *msg)
+/* Removes all unallocated (offset) sections from the list and converts
+   their label symbols into absolute expressions. */
+static void remove_unalloc_sects(void)
 {
-  general_error(19,msg);
+  section *prev,*sec;
+  symbol *sym;
+
+  for (sym=first_symbol; sym; sym=sym->next) {
+    if (sym->type==LABSYM && sym->sec!=NULL && (sym->sec->flags&UNALLOCATED)) {
+      sym->type = EXPRESSION;
+      sym->expr = number_expr(sym->pc);
+      sym->sec = NULL;
+    }
+  }
+  for (sec=first_section,prev=NULL; sec; sec=sec->next) {
+    if (sec->flags&UNALLOCATED) {
+      if (prev)
+        prev->next = sec->next;
+      else
+        first_section = sec->next;
+    }
+    else
+      prev = sec;
+  }
 }
 
 static void resolve_section(section *sec)
 {
+  int fastphase=FASTOPTPHASE;
+  int pass=0;
+  int extrapass;
+  size_t size;
   atom *p;
-  int done,pass=0;
-  taddr size;
+
   do{
     done=1;
     if (++pass>=MAXPASSES){
       general_error(7,sec->name);
       break;
     }
-    if(DEBUG)
-      printf("resolve_section(%s) pass %d\n",sec->name,pass);
+    extrapass=pass<=fastphase;
+    if(debug)
+      printf("resolve_section(%s) pass %d%s",sec->name,pass,
+             pass<=fastphase?" (fast)\n":"\n");
     sec->pc=sec->org;
     for(p=sec->first;p;p=p->next){
-      sec->pc=(sec->pc+p->align-1)/p->align*p->align;
+      sec->pc=pcalign(p,sec->pc);
       cur_src=p->src;
       cur_src->line=p->line;
-#ifdef HAVE_CPU_OPTS
+#if HAVE_CPU_OPTS
       if(p->type==OPTS){
         cpu_opts(p->content.opts);
       }
       else
 #endif
-      if(p->type==LABEL){
+      if(p->type==RORG){
+        if(rorg_pc!=0)
+          general_error(43);  /* reloc org is already set */
+        rorg_pc=*p->content.rorg;
+        org_pc=sec->pc;
+        sec->pc=rorg_pc;
+        sec->flags|=ABSOLUTE;
+      }
+      else if(p->type==RORGEND&&rorg_pc!=0){
+        sec->pc=org_pc+(sec->pc-rorg_pc);
+        rorg_pc=0;
+        sec->flags&=~ABSOLUTE;
+      }
+      else if(p->type==LABEL){
         symbol *label=p->content.label;
         if(label->type!=LABSYM)
           ierror(0);
         if(label->pc!=sec->pc){
-          if(DEBUG)
-            printf("changing label %s from %lu to %lu\n",label->name,
+          if(debug)
+            printf("moving label %s from %lu to %lu\n",label->name,
                    (unsigned long)label->pc,(unsigned long)sec->pc);
           done=0;
           label->pc=sec->pc;
         }
       }
-      size=atom_size(p,sec,sec->pc);
-#ifdef CHECK_ATOMSIZE
+      if(pass>fastphase&&!done&&p->type==INSTRUCTION){
+        /* entered safe mode: optimize only one instruction every pass */
+        sec->pc+=p->lastsize;
+        continue;
+      }
+      if(p->changes>MAXSIZECHANGES){
+        /* atom changed size too frequently, set warning flag */
+        if(debug)
+          printf("setting resolve-warning flag for atom type %d at %lu\n",
+                 p->type,(unsigned long)sec->pc);
+        sec->flags|=RESOLVE_WARN;
+        size=atom_size(p,sec,sec->pc);
+        sec->flags&=~RESOLVE_WARN;
+      }
+      else
+        size=atom_size(p,sec,sec->pc);
       if(size!=p->lastsize){
-        if(DEBUG)
-          printf("changed size of atom type %d at %lu from %ld to %ld\n",
-                 p->type,(unsigned long)sec->pc,(long)p->lastsize,(long)size);
+        if(debug)
+          printf("modify size of atom type %d at %lu from %lu to %lu\n",
+                 p->type,(unsigned long)sec->pc,(unsigned long)p->lastsize,
+                 (unsigned long)size);
         done=0;
+        if(pass>fastphase)
+          p->changes++;  /* now count size modifications of atoms */
+        else if(size>p->lastsize)
+          extrapass=0;   /* no extra pass, when an atom became larger */
         p->lastsize=size;
       }
-#endif
       sec->pc+=size;
     }
+    /* Extend the fast-optimization phase, when there was no atom which
+       became larger than in the previous pass. */
+    if(extrapass) fastphase++;
   }while(errors==0&&!done);
 }
 
@@ -150,7 +219,7 @@ static void resolve(void)
 {
   section *sec;
   final_pass=0;
-  if(DEBUG)
+  if(debug)
     printf("resolve()\n");
   for(sec=first_section;sec;sec=sec->next)
     resolve_section(sec);
@@ -159,10 +228,12 @@ static void resolve(void)
 static void assemble(void)
 {
   section *sec;
+  taddr basepc;
   atom *p;
   char *attr;
   int bss;
 
+  remove_unalloc_sects();
   final_pass=1;
   for(sec=first_section;sec;sec=sec->next){
     source *lasterrsrc=NULL;
@@ -177,22 +248,51 @@ static void assemble(void)
       }
     }
     for(p=sec->first;p;p=p->next){
-      sec->pc=(sec->pc+p->align-1)/p->align*p->align;
+      basepc=sec->pc;
+      sec->pc=pcalign(p,sec->pc);
       cur_src=p->src;
       cur_src->line=p->line;
       if(p->list&&p->list->atom==p){
         p->list->sec=sec;
         p->list->pc=sec->pc;
       }
-      if(p->type==INSTRUCTION){
+      if(p->changes>MAXSIZECHANGES)
+        sec->flags|=RESOLVE_WARN;
+      /* print a warning on auto-aligned instructions or data */
+      if(sec->pc!=basepc){
+        atom *aa;
+        if (p->type==LABEL&&p->next!=NULL&&p->next->line==p->line)
+          aa=p->next; /* next atom in same line, look at it instead of label */
+        else
+          aa=p;
+        if (aa->type==INSTRUCTION)
+          general_error(50);  /* instruction has been auto-aligned */
+        else if (aa->type==DATA||aa->type==DATADEF)
+          general_error(57);  /* data has been auto-aligned */
+      }
+      if(p->type==RORG&&rorg_pc==0){
+        rorg_pc=*p->content.rorg;
+        org_pc=sec->pc;
+        sec->pc=rorg_pc;
+      }
+      else if(p->type==RORGEND){
+        if(rorg_pc!=0){
+          sec->pc=org_pc+(sec->pc-rorg_pc);
+          rorg_pc=0;
+        }
+        else
+          general_error(44);  /* reloc org was not set */
+      }
+      else if(p->type==INSTRUCTION){
         dblock *db;
         cur_listing=p->list;
         db=eval_instruction(p->content.inst,sec,sec->pc);
         if(pic_check)
           do_pic_check(db->relocs);
         cur_listing=0;
-        if(DEBUG){
-          if(db->size!=instruction_size(p->content.inst,sec,sec->pc))
+        if(debug){
+          if(db->size!=(p->content.inst->code>=0?
+                        instruction_size(p->content.inst,sec,sec->pc):0))
             ierror(0);
         }
         /*FIXME: sauber freigeben */
@@ -212,7 +312,7 @@ static void assemble(void)
         p->content.db=db;
         p->type=DATA;
       }
-      else if(p->type==RORG){
+      else if(p->type==ROFFS){
         sblock *sb;
         taddr space;
         if(eval_expr(p->content.roffs,&space,sec,sec->pc)){
@@ -235,18 +335,28 @@ static void assemble(void)
           lasterrline=p->line;
         }
       }
-#ifdef HAVE_CPU_OPTS
+#if HAVE_CPU_OPTS
       else if(p->type==OPTS)
         cpu_opts(p->content.opts);
 #endif
       else if(p->type==PRINTTEXT)
-        printf("%s\n",p->content.ptext);
-      else if (p->type==PRINTEXPR){
+        printf("%s",p->content.ptext);
+      else if(p->type==PRINTEXPR)
+        atom_printexpr(p->content.pexpr,sec,sec->pc);
+      else if(p->type==ASSERT){
+        assertion *ast=p->content.assert;
         taddr val;
-        eval_expr(p->content.pexpr,&val,sec,sec->pc);
-        printf("%ld (0x%lx)\n",(long)val,(unsigned long)val);
+        if(ast->assert_exp!=NULL) {
+          eval_expr(ast->assert_exp,&val,sec,sec->pc);
+          if(val==0)
+            general_error(47,ast->expstr,ast->msgstr?ast->msgstr:emptystr);
+        }
+        else /* ASSERT without expression, used for user-FAIL directives */
+          general_error(19,ast->msgstr?ast->msgstr:emptystr);
       }
+
       sec->pc+=atom_size(p,sec,sec->pc);
+      sec->flags&=~RESOLVE_WARN;
     }
   }
 }
@@ -256,20 +366,46 @@ static void undef_syms(void)
   symbol *sym;
 
   for(sym=first_symbol;sym;sym=sym->next){
-    if (sym->type==IMPORT&&!(sym->flags&(EXPORT|COMMON|WEAK)))
+    if (!auto_import&&sym->type==IMPORT&&!(sym->flags&(EXPORT|COMMON|WEAK)))
       general_error(22,sym->name);
+    else if (sym->type==IMPORT&&!(sym->flags&REFERENCED))
+      general_error(61,sym->name);
+  }
+}
+
+/* All expressions which are based on a label are turned into a new label. */
+static void label_expressions(void)
+{
+  symbol *sym,*base;
+  taddr val;
+
+  for(sym=first_symbol;sym;sym=sym->next){
+    if(sym->type==EXPRESSION){
+      if(!eval_expr(sym->expr,&val,NULL,0)){
+        if(find_base(sym->expr,&base,NULL,0)==BASE_OK){
+          /* turn into an offseted label symbol from the base's section */
+          sym->type=LABSYM;
+          sym->sec=base->sec;
+          sym->pc=val;
+          sym->align=1;
+        }else
+          general_error(53,sym->name);  /* non-relocatable expr. in equate */
+      }
+    }
   }
 }
 
 static void statistics(void)
 {
   section *sec;
+  unsigned long long size;
 
   printf("\n");
-  for(sec=first_section;sec;sec=sec->next)
-    printf("%s(%s%d):\t%12llu byte%c\n",sec->name,sec->attr,sec->align,
-           (unsigned long long)(sec->pc-sec->org),
-           sec->pc-sec->org==1?' ':'s');
+  for(sec=first_section;sec;sec=sec->next){
+    size=ULLTADDR(ULLTADDR(sec->pc)-ULLTADDR(sec->org));
+    printf("%s(%s%lu):\t%12llu byte%c\n",sec->name,sec->attr,
+           (unsigned long)sec->align,size,size==1?' ':'s');
+  }
 }
 
 static int init_output(char *fmt)
@@ -284,12 +420,16 @@ static int init_output(char *fmt)
     return init_output_vobj(&output_copyright,&write_object,&output_args);  
   if(!strcmp(fmt,"hunk"))
     return init_output_hunk(&output_copyright,&write_object,&output_args);
-  if(!strcmp(fmt,"hunkexe"))
-    return init_output_hunkexe(&output_copyright,&write_object,&output_args);
   if(!strcmp(fmt,"aout"))
     return init_output_aout(&output_copyright,&write_object,&output_args);
-  if(!strcmp(fmt,"tos"))
+  if(!strcmp(fmt,"hunkexe")){
+    exec_out=1;  /* executable format */
+    return init_output_hunkexe(&output_copyright,&write_object,&output_args);
+  }
+  if(!strcmp(fmt,"tos")){
+    exec_out=1;  /* executable format */
     return init_output_tos(&output_copyright,&write_object,&output_args);
+  }
   return 0;
 }
 
@@ -308,11 +448,10 @@ static int init_main(void)
       i++;
     }while(i<mnemonic_cnt&&!strcmp(last,mnemonics[i].name));
   }
-  if(DEBUG){
+  if(debug){
     if(mnemohash->collisions)
       printf("*** %d mnemonic collisions!!\n",mnemohash->collisions);
   }
-  symhash=new_hashtable(SYMHTABSIZE);
   new_include_path(".");
   taddrmask=MAKEMASK(bytespertaddr<<3);
   return 1;
@@ -323,6 +462,27 @@ void set_default_output_format(char *fmt)
   output_format=fmt;
 }
 
+static void set_input_name(void)
+{
+  if(inname){
+    char *p,c;
+    if((p=strrchr(inname,'/'))!=NULL||
+       (p=strrchr(inname,'\\'))!=NULL||
+       (p=strrchr(inname,':'))!=NULL){
+      /* source text not in current dir., add an include path for it */
+      p++;
+      c=*p;
+      *p='\0';
+      new_include_path(inname);
+      *p=c;
+    }
+    setfilename(inname);
+    setdebugname(inname);
+    include_source(inname);
+  }else
+    general_error(15);
+}
+
 int main(int argc,char **argv)
 {
   int i;
@@ -335,11 +495,17 @@ int main(int argc,char **argv)
       verbose=0;
       argv[i][0]=0;
     }
+    if(!strcmp("-debug",argv[i])){
+      debug=1;
+      argv[i][0]=0;
+    }
   }
   if(!init_output(output_format))
     general_error(16,output_format);
   if(!init_main())
     general_error(10,"main");
+  if(!init_symbol())
+    general_error(10,"symbol");
   if(verbose)
     printf("%s\n%s\n%s\n%s\n",copyright,cpu_copyright,syntax_copyright,output_copyright);
   for(i=1;i<argc;i++){
@@ -362,6 +528,7 @@ int main(int argc,char **argv)
         general_error(28,'L');
       listname=argv[++i];
       produce_listing=1;
+      set_listing(1);
       continue;
     }
     if(!strcmp("-Lnf",argv[i])){
@@ -427,10 +594,6 @@ int main(int argc,char **argv)
       nocase=1;
       continue;
     }
-    if(!strcmp("-noesc",argv[i])){
-      esc_sequences=0;
-      continue;
-    }
     if(!strcmp("-nosym",argv[i])){
       no_symbols=1;
       continue;
@@ -453,24 +616,36 @@ int main(int argc,char **argv)
       pic_check=1;
       continue;
     }
+    else if(!strncmp("-maxmacrecurs=",argv[i],14)) {
+      sscanf(argv[i]+14,"%i",&maxmacrecurs);
+      continue;
+    }
+    else if(!strcmp("-unsshift",argv[i])){
+      unsigned_shift=1;
+      continue;
+    }
     if(cpu_args(argv[i]))
       continue;
     if(syntax_args(argv[i]))
       continue;
     if(output_args(argv[i]))
       continue;
+    if(!strcmp("-esc",argv[i])){
+      esc_sequences=1;
+      continue;
+    }
+    if(!strcmp("-noesc",argv[i])){
+      esc_sequences=0;
+      continue;
+    }
     if (!strncmp("-x",argv[i],2)){
       auto_import=0;
       continue;
     }
     general_error(14,argv[i]);
   }
-  if(inname){
-    setfilename(inname);
-    setdebugname(inname);
-    include_source(inname);
-  }else
-    general_error(15);
+  set_input_name();
+  internal_abs(vasmsym_name);
   if(!init_parse())
     general_error(10,"parse");
   if(!init_syntax())
@@ -482,8 +657,10 @@ int main(int argc,char **argv)
     resolve();
   if(errors==0||produce_listing)
     assemble();
-  if(errors==0&&!auto_import)
+  cur_src=NULL;
+  if(errors==0)
     undef_syms();
+  label_expressions();
   if(!listname)
     listname="a.lst";
   if(produce_listing)
@@ -540,7 +717,7 @@ void include_source(char *inname)
 
   /* check whether this source was already included */
   while (name = *nptr) {
-#if defined(AMIGA) || defined(MSDOS) || defined(_WIN32)
+#if defined(AMIGA) || defined(MSDOS) || defined(ATARI) || defined(_WIN32)
     if (!stricmp(name->path,filename)) {
 #else
     if (!strcmp(name->path,filename)) {
@@ -579,8 +756,9 @@ void include_source(char *inname)
     }
     if (feof(f)) {
       if (size > 0) {
-        cur_src = new_source(filename,myrealloc(text,size+1),size+1);
+        cur_src = new_source(filename,myrealloc(text,size+2),size+1);
         *(cur_src->text+size) = '\n';
+        *(cur_src->text+size+1) = '\0';
       }
       else {
         myfree(text);
@@ -617,26 +795,71 @@ source *new_source(char *filename,char *text,size_t size)
 {
   static unsigned long id = 0;
   source *s = mymalloc(sizeof(source));
+  char *p;
+  size_t i;
+
+  /* scan source for strange characters */
+  for (p=text,i=0; i<size; i++,p++) {
+    if (*p == 0x1a) {
+      /* EOF character - replace by newline and ignore rest of source */
+      *p = '\n';
+      size = i + 1;
+      break;
+    }
+  }
 
   s->parent = cur_src;
   s->parent_line = cur_src ? cur_src->line : 0;
   s->name = mystrdup(filename);
   s->text = text;
   s->size = size;
-  s->repeat = 1;  /* read just once */
-  s->num_params = -1;	/* not a macro, no parameters */
+  s->macro = NULL;
+  s->repeat = 1;        /* read just once */
+  s->cond_level = clev; /* remember level of conditional nesting */
+  s->num_params = -1;   /* not a macro, no parameters */
   s->param[0] = emptystr;
   s->param_len[0] = 0;
-  s->id = id++;	 /* every source has a unique id - important for macros */
+  s->id = id++;	        /* every source has unique id - important for macros */
   s->srcptr = text;
   s->line = 0;
   s->linebuf = mymalloc(MAXLINELENGTH);
 #ifdef CARGSYM
   s->cargexp = NULL;
+#endif
+#ifdef REPTNSYM
+  /* -1 outside of a repetition block */
+  s->reptn = cur_src ? cur_src->reptn : -1;
 #endif
   return s;
 }
 
+/* quit parsing the current source instance, leave macros, repeat loops
+   and restore the conditional assembly level */
+void end_source(source *s)
+{
+  if(s){
+    s->srcptr=s->text+s->size;
+    s->repeat=1;
+    clev=s->cond_level;
+  }
+}
+
+/* set current section, remember last */
+void set_section(section *s)
+{
+  if (current_section!=NULL && !(current_section->flags & UNALLOCATED)) {
+    if (current_section->flags & ABSOLUTE)
+      prev_org = current_section;
+    else
+      prev_sec = current_section;
+  }
+#if HAVE_CPU_OPTS
+  if (!(s->flags & UNALLOCATED))
+    cpu_opts_init(s);  /* set initial cpu opts before the first atom */
+#endif
+  current_section = s;
+}
+
 /* creates a new section with given attributes and alignment;
    does not switch to this section automatically */
 section *new_section(char *name,char *attr,int align)
@@ -654,6 +877,9 @@ section *new_section(char *name,char *attr,int align)
   p->align=align;
   p->org=p->pc=0;
   p->flags=0;
+  p->memattr=0;
+  memset(p->pad,0,MAXPADBYTES);
+  p->padbytes=1;
   if(last_section)
     last_section=last_section->next=p;
   else
@@ -661,20 +887,17 @@ section *new_section(char *name,char *attr,int align)
   return p;
 }
 
-/* create a dummy code section for each new ORG directive and
-   switches to it */
-void new_org(taddr org)
+/* create a dummy code section for each new ORG directive */
+section *new_org(taddr org)
 {
   char buf[16];
   section *sec;
 
-  sprintf(buf,"seg%08lx",(unsigned long)org);
-  sec = new_section(mystrdup(buf),"acrwx",1);
+  sprintf(buf,"seg%llx",ULLTADDR(org));
+  sec = new_section(buf,"acrwx",1);
   sec->org = sec->pc = org;
-  current_section = sec;
-#ifdef HAVE_CPU_OPTS
-  cpu_opts_init(sec);  /* set initial cpu opts before the first atom */
-#endif
+  sec->flags |= ABSOLUTE;  /* absolute destination address */
+  return sec;
 }
 
 /* switches current section to the section with the specified name */
@@ -687,10 +910,28 @@ void switch_section(char *name,char *attr)
   if(!p)
     general_error(2,name);
   else
-    current_section=p;
-#ifdef HAVE_CPU_OPTS
-  cpu_opts_init(p);  /* set initial cpu opts before the first atom */
-#endif
+    set_section(p);
+}
+
+/* Switches current section to an offset section. Create a new section when
+   it doesn't exist yet or needs a different offset. */
+void switch_offset_section(char *name,taddr offs)
+{
+  static unsigned long id;
+  char unique_name[14];
+  section *sec;
+
+  if (!name) {
+    if (offs != -1)
+      ++id;
+    sprintf(unique_name,"OFFSET%06lu",id);
+    name = unique_name;
+  }
+  sec = new_section(name,"u",1);
+  sec->flags |= UNALLOCATED;
+  if (offs != -1)
+    sec->org = sec->pc = offs;
+  set_section(sec);
 }
 
 /* returns current_section or the syntax module's default section,
@@ -706,203 +947,79 @@ section *default_section(void)
   return sec;
 }
 
-void print_section(FILE *f,section *sec)
+/* restore last relocatable section */
+section *restore_section(void)
 {
-  atom *p;
-  taddr pc=sec->org;
-  fprintf(f,"section %s (attr=<%s> align=%d):\n",sec->name,sec->attr,sec->align);
-  for(p=sec->first;p;p=p->next){
-    pc=(pc+p->align-1)/p->align*p->align;
-    fprintf(f,"%8llx: ",((unsigned long long)pc)&taddrmask);
-    print_atom(f,p);
-    fprintf(f,"\n");
-    pc+=atom_size(p,sec,pc);
-  }
+  if (prev_sec)
+    return prev_sec;
+  if (defsectname && defsecttype)
+    return new_section(defsectname,defsecttype,1);
+  return NULL;  /* no previous section or default section defined */
 }
 
-static void print_type(FILE *f,symbol *p)
+/* restore last absolute section */
+section *restore_org(void)
 {
-  static const char *typename[] = {"???","obj","func","sect","file"};
-  if(p==NULL)
-    ierror(0);
-  fprintf(f,"type=%s ",typename[TYPE(p)]);
-}
-
-void print_symbol(FILE *f,symbol *p)
-{
-  if(p==NULL)
-    ierror(0);	/* this is usually an error in a cpu-backend, don't crash! */
-  fprintf(f,"%s ",p->name);
-  if(p->type==LABSYM)
-    fprintf(f,"LAB (0x%llx) ",((unsigned long long)p->pc)&taddrmask);
-  if(p->type==IMPORT)
-    fprintf(f,"IMP ");
-  if(p->type==EXPRESSION){
-    fprintf(f,"EXPR(");
-    print_expr(f,p->expr);
-    fprintf(f,") ");
-  }
-  if(p->flags&EXPORT)
-    fprintf(f,"EXPORT ");
-  if(p->flags&COMMON)
-    fprintf(f,"COMMON ");
-  if(p->flags&WEAK)
-    fprintf(f,"WEAK ");
-  if(TYPE(p))
-    print_type(f,p);
-  if(p->size){
-    fprintf(f,"size=");
-    print_expr(f,p->size);
-    fprintf(f," ");
-  }
-  if(p->align)
-    fprintf(f,"align=%lu ",(unsigned long)p->align);
-  if(p->sec)
-    fprintf(f,"sec=%s ",p->sec->name);
+  if (prev_org)
+    return prev_org;
+  return new_org(0);  /* no previous org: default to ORG 0 */
 }
 
-void add_symbol(symbol *p)
+/* end a relocated ORG block */
+int end_rorg(void)
 {
-  hashdata data;
-  p->next=first_symbol;
-  first_symbol=p;
-  data.ptr=p;
-  add_hashentry(symhash,p->name,data);
-}
+  section *s = default_section();
 
-symbol *find_symbol(char *name)
-{
-  hashdata data;
-  if(!find_name(symhash,name,&data))
+  if (s == NULL) {
+    general_error(3);
     return 0;
-  return data.ptr;
-}
-
-char *make_local_label(char *glob,int glen,char *loc,int llen)
-/* construct a local label of the form:
-   " " + global_label_name + " " + local_label_name */
-{
-  char *name,*p;
-
-  if (glen == 0) {
-    /* use the last defined global label */
-    glob = last_global_label;
-    glen = strlen(last_global_label);
   }
-  p = name = mymalloc(llen+glen+3);
-  *p++ = ' ';
-  if (glen) {
-    memcpy(p,glob,glen);
-    p += glen;
-  }
-  *p++ = ' ';
-  memcpy(p,loc,llen);
-  *(p + llen) = '\0';
-  return name;
-}
-
-symbol *new_abs(char *name,expr *tree)
-{
-  symbol *new=find_symbol(name);
-  int add;
-  if(new){
-    if(new->type!=IMPORT&&new->type!=EXPRESSION)
-      general_error(5,name);
-    add=0;
-  }else{
-    new=mymalloc(sizeof(*new));
-    new->name=mystrdup(name);
-    add=1;
-  }
-  new->type=EXPRESSION;
-  new->sec=0;
-  new->expr=tree;
-  if(add){
-    add_symbol(new);
-    new->flags=0;
-    new->size=0;
-    new->align=0;
+  if (s->flags & IN_RORG) {
+    add_atom(s,new_rorgend_atom());
+    if (s->flags & PREVABS)
+      s->flags |= ABSOLUTE;
+    else
+      s->flags &= ~ABSOLUTE;
+    return 1;
   }
-  return new;
+  general_error(44);  /* no Rorg block to end */
+  return 0;
 }
 
-symbol *new_import(char *name)
+/* start a relocated ORG block */
+void start_rorg(taddr rorg)
 {
-  symbol *new=find_symbol(name);
-  if(new)
-    return new;
-  new=mymalloc(sizeof(*new));
-  new->type=IMPORT;
-  new->flags=0;
-  new->name=mystrdup(name);
-  new->sec=0;
-  new->pc=0;
-  new->size=0;
-  new->align=0;
-  add_symbol(new);
-  return new;
-}
+  section *s = default_section();
 
-symbol *new_labsym(section *sec,char *name)
-{
-  symbol *new=find_symbol(name);
-  int add;
-
-  if(!sec){
-    sec=default_section();
-    if(!sec){
-      general_error(3);
-      return new_import(name);
-    }
-  }
-  sec->flags|=HAS_SYMBOLS;
-  if(new){
-    if(new->type!=IMPORT){
-      symbol *old = new;
-      new=mymalloc(sizeof(*new));
-      *new = *old;
-      general_error(5,name);
-    }
-    add=0;
-  }else{
-    new=mymalloc(sizeof(*new));
-    new->name=mystrdup(name);
-    add=1;
+  if (s == NULL) {
+    general_error(3);
+    return;
   }
-  new->type=LABSYM;
-  new->sec=sec;
-  new->pc=sec->pc;
-  if(add){
-    add_symbol(new);
-    new->flags=0;
-    new->size=0;
-    new->align=0;
+  if (s->flags & IN_RORG)
+    end_rorg();  /* we are already in a ROrg-block, so close it first */
+  add_atom(s,new_rorg_atom(rorg));
+  s->flags |= IN_RORG;
+  if (!(s->flags & ABSOLUTE)) {
+    s->flags &= ~PREVABS;
+    s->flags |= ABSOLUTE;  /* make section absolute during the ROrg-block */
   }
-  if(*name!=' ')
-    last_global_label=new->name;
-  return new;
-}
-
-symbol *new_tmplabel(section *sec)
-{
-  static unsigned long tmplabcnt=0;
-  char tmpnam[16];
-
-  sprintf(tmpnam," *tmp%09lu*",tmplabcnt++);
-  return new_labsym(sec,tmpnam);
+  else
+    s->flags |= PREVABS;
 }
 
-symbol *internal_abs(char *name)
+void print_section(FILE *f,section *sec)
 {
-  symbol *new = find_symbol(name);
-
-  if(new) {
-    if (new->type!=EXPRESSION || new->flags!=0)
-      syntax_error(37,name);  /* internal symbol redefined by user */
+  atom *p;
+  taddr pc=sec->org;
+  fprintf(f,"section %s (attr=<%s> align=%llu):\n",
+          sec->name,sec->attr,ULLTADDR(sec->align));
+  for(p=sec->first;p;p=p->next){
+    pc=pcalign(p,pc);
+    fprintf(f,"%8llx: ",ULLTADDR(pc));
+    print_atom(f,p);
+    fprintf(f,"\n");
+    pc+=atom_size(p,sec,pc);
   }
-  else
-    new = new_abs(name,number_expr(0));
-  return new;
 }
 
 void new_include_path(char *pathname)
@@ -919,7 +1036,7 @@ void new_include_path(char *pathname)
     pathname[len] = '/';
     pathname[len+1] = '\0';
   }
-#elif defined(MSDOS) || defined(_WIN32)
+#elif defined(MSDOS) || defined(ATARI) || defined(_WIN32)
   if (len>0 && newpath[len-1]!='\\' && newpath[len-1]!=':') {
     pathname = mymalloc(len+2);
     strcpy(pathname,newpath);
@@ -949,6 +1066,11 @@ void new_include_path(char *pathname)
     first_incpath = new;
 }
 
+void set_listing(int on)
+{
+  listena = on && produce_listing;
+}
+
 void set_list_title(char *p,int len)
 {
   listtitlecnt++;
@@ -1090,7 +1212,7 @@ void write_listing(char *listname)
       }
       if(a->next&&a->next->line==a->line&&a->next->src==a->src){
         a=a->next;
-        pc=(pc+a->align-1)/a->align*a->align;
+        pc=pcalign(a,pc);
         if(a->type==DATA&&a->content.db->relocs){
           symbol *s=((nreloc *)(a->content.db->relocs->reloc))->sym;
           if(s->type==IMPORT)
@@ -1179,7 +1301,7 @@ void write_listing(char *listname)
       }
       if(a->next&&a->next->line==a->line&&a->next->src==a->src){
         a=a->next;
-        pc=(pc+a->align-1)/a->align*a->align;
+        pc=pcalign(a,pc);
       }else
         a=0;
     }
diff --git a/vasm.h b/vasm.h
index accb173..c76c593 100644
--- a/vasm.h
+++ b/vasm.h
@@ -1,16 +1,13 @@
-/* vasm.h  main header file for vasm */
-/* (c) in 2002-2011 by Volker Barthelmann */
+  /* vasm.h  main header file for vasm */
+/* (c) in 2002-2014 by Volker Barthelmann */
 
 #include <stdlib.h>
 #include <stddef.h>
+#include <stdint.h>
 #include <stdio.h>
 #include <ctype.h>
 #include <string.h>
 
-#ifndef DEBUG
-#define DEBUG 0
-#endif
-
 typedef struct symbol symbol;
 typedef struct section section;
 typedef struct dblock dblock;
@@ -19,17 +16,21 @@ typedef struct expr expr;
 typedef struct macro macro;
 typedef struct source source;
 typedef struct listing listing;
+typedef struct regsym regsym;
+
+#define MAXPADBYTES 8  /* max. pattern size to pad alignments */
 
 #include "cpu.h"
+#include "symbol.h"
 #include "reloc.h"
 #include "syntax.h"
 #include "symtab.h"
-#include "vmath.h"
-#include "supp.h"
 #include "error.h"
 #include "expr.h"
 #include "parse.h"
 #include "atom.h"
+#include "cond.h"
+#include "supp.h"
 
 #if defined(BIGENDIAN)&&!defined(LITTLEENDIAN)
 #define LITTLEENDIAN (!BIGENDIAN)
@@ -39,12 +40,12 @@ typedef struct listing listing;
 #define BIGENDIAN (!LITTLEENDIAN)
 #endif
 
-#ifndef CPU_CHECKS_OPCNT
-#define CPU_CHECKS_OPCNT 0
+#ifndef MNEMONIC_VALID
+#define MNEMONIC_VALID(i) 1
 #endif
 
 #ifndef OPERAND_OPTIONAL
-#define OPERAND_OPTIONAL(x) 0
+#define OPERAND_OPTIONAL(p,t) 0
 #endif
 
 #ifndef START_PARENTH
@@ -74,11 +75,18 @@ struct source {
   char *name;
   char *text;
   size_t size;
+  macro *macro;
   unsigned long repeat;
   int cond_level;
+  struct macarg *argnames;
   int num_params;
   char *param[MAXMACPARAMS];
   int param_len[MAXMACPARAMS];
+#if MAX_QUALIFIERS > 0
+  int num_quals;
+  char *qual[MAX_QUALIFIERS];
+  int qual_len[MAX_QUALIFIERS];
+#endif
   unsigned long id;
   char *srcptr;
   int line;
@@ -86,43 +94,20 @@ struct source {
 #ifdef CARGSYM
   expr *cargexp;
 #endif
-};
-
-/* symbol types */
-#define LABSYM 1
-#define IMPORT 2
-#define EXPRESSION 3
-
-/* symbol flags */
-#define TYPE(sym) ((sym)->flags&7)
-#define TYPE_UNKNOWN  0
-#define TYPE_OBJECT   1
-#define TYPE_FUNCTION 2
-#define TYPE_SECTION  3
-#define TYPE_FILE     4
-
-#define EXPORT (1<<3)
-#define INEVAL (1<<4)
-#define COMMON (1<<5)
-#define WEAK (1<<6)
-#define RSRVD_S (1L<<24)    /* bits 24..27 are reserved for syntax modules */
-#define RSRVD_O (1L<<28)    /* bits 28..31 are reserved for output modules */
-
-struct symbol {
-  struct symbol *next;
-  int type;
-  int flags;
-  char *name;
-  expr *expr;
-  expr *size;
-  section *sec;
-  taddr pc;
-  taddr align;
-  size_t idx; /* usable by output module */
+#ifdef REPTNSYM
+  long reptn;
+#endif
 };
 
 /* section flags */
 #define HAS_SYMBOLS 1
+#define RESOLVE_WARN 2
+#define UNALLOCATED 4
+#define LABELS_ARE_LOCAL 8
+#define ABSOLUTE 16
+#define PREVABS 32          /* saved ABSOLUTE-flag during RORG-block */
+#define IN_RORG 64
+#define SECRSRVD (1L<<24)   /* bits 24..31 are reserved for output modules */
 
 /* section description */
 struct section {
@@ -131,11 +116,14 @@ struct section {
   char *attr;
   atom *first;
   atom *last;
-  int align;
-  int flags;
+  taddr align;
+  uint8_t pad[MAXPADBYTES];
+  int padbytes;
+  uint32_t flags;
+  uint32_t memattr;  /* type of memory, used by some object formats */
   taddr org;
   taddr pc;
-  size_t idx; /* usable by output module */
+  uint32_t idx; /* usable by output module */
 };
 
 /* mnemonic description */
@@ -147,6 +135,11 @@ typedef struct mnemonic {
   mnemonic_extension ext;
 } mnemonic;
 
+/* operand size flags (ORed with size in bits) */
+#define OPSZ_BITS(x)	((x) & 0xff)
+#define OPSZ_FLOAT      0x100  /* operand stored as floating point */
+#define OPSZ_SWAP	0x200  /* operand stored with swapped bytes */
+
 /* listing table */
 
 #define MAXLISTSRC 120
@@ -164,7 +157,8 @@ struct listing {
 
 
 extern listing *first_listing,*last_listing,*cur_listing;
-extern int final_pass,produce_listing,listformfeed,listlinesperpage,listnosyms;
+extern int done,final_pass;
+extern int listena,listformfeed,listlinesperpage,listnosyms;
 extern int mnemonic_cnt;
 extern int nocase,no_symbols,pic_check;
 extern hashtable *mnemohash;
@@ -174,34 +168,38 @@ extern char *filename;
 extern char *debug_filename;  /* usually an absolute C source file name */
 extern char *inname,*outname,*listname;
 extern int secname_attr;
+extern int exec_out;
 extern char *output_format;
-extern unsigned long long taddrmask;
 extern char emptystr[];
+extern char vasmsym_name[];
+
+extern unsigned long long taddrmask;
+#define ULLTADDR(x) (((unsigned long long)x)&taddrmask)
 
 /* provided by main assembler module */
+extern int debug;
+
 void leave(void);
-void fail(char *);
 void set_default_output_format(char *);
 FILE *locate_file(char *,char *);
 void include_source(char *);
-symbol *new_abs(char *,expr *);
-symbol *new_import(char *);
-symbol *new_labsym(section *,char *);
-symbol *new_tmplabel(section *);
-symbol *internal_abs(char *);
-void add_symbol(symbol *);
-symbol *find_symbol(char *);
-char *make_local_label(char *,int,char *,int);
 source *new_source(char *,char *,size_t);
+void end_source(source *);
+void set_section(section *);
 section *new_section(char *,char *,int);
-void new_org(taddr);
+section *new_org(taddr);
 section *find_section(char *,char *);
 void switch_section(char *,char *);
+void switch_offset_section(char *,taddr);
 void add_align(section *,taddr,expr *,int,unsigned char *);
 section *default_section(void);
+section *restore_section(void);
+section *restore_org(void);
+int end_rorg();
+void start_rorg(taddr);
 void print_section(FILE *,section *);
-void print_symbol(FILE *,symbol *);
 void new_include_path(char *);
+void set_listing(int);
 void set_list_title(char *,int);
 void write_listing(char *);
 
@@ -216,25 +214,28 @@ extern int bytespertaddr;
 extern mnemonic mnemonics[];
 extern char *cpu_copyright;
 extern char *cpuname;
+extern int debug;
+
 int init_cpu();
 int cpu_args(char *);
 char *parse_cpu_special(char *);
 operand *new_operand();
 int parse_operand(char *text,int len,operand *out,int requires);
+#define PO_SKIP 2
 #define PO_MATCH 1
 #define PO_NOMATCH 0
-#define PO_CORRUPT -123
-taddr instruction_size(instruction *,section *,taddr);
+#define PO_CORRUPT -1
+size_t instruction_size(instruction *,section *,taddr);
 dblock *eval_instruction(instruction *,section *,taddr);
-dblock *eval_data(operand *,taddr,section *,taddr);
-#ifdef HAVE_INSTRUCTION_EXTENSION
+dblock *eval_data(operand *,size_t,section *,taddr);
+#if HAVE_INSTRUCTION_EXTENSION
 void init_instruction_ext(instruction_ext *);
 #endif
 #if MAX_QUALIFIERS!=0
 char *parse_instruction(char *,int *,char **,int *,int *);
 int set_default_qualifiers(char **,int *);
 #endif
-#ifdef HAVE_CPU_OPTS
+#if HAVE_CPU_OPTS
 void cpu_opts_init(section *);
 void cpu_opts(void *);
 void print_cpu_opts(FILE *,void *);
@@ -243,18 +244,26 @@ void print_cpu_opts(FILE *,void *);
 /* provided by syntax.c */
 extern char *syntax_copyright;
 extern char commentchar;
+extern hashtable *dirhash;
 extern char *defsectname;
 extern char *defsecttype;
+
 int init_syntax();
 int syntax_args(char *);
 void parse(void);
+char *parse_macro_arg(struct macro *,char *,struct namelen *,struct namelen *);
+int expand_macro(source *,char **,char *,int);
 char *skip(char *);
 char *skip_operand(char *);
 void eol(char *);
 char *const_prefix(char *,int *);
+char *const_suffix(char *,char *);
 char *get_local_label(char **);
 
 /* provided by output_xxx.c */
+extern int tos_hisoft_dri;
+extern int hunk_onlyglobal;
+
 int init_output_test(char **,void (**)(FILE *,section *,symbol *),int (**)(char *));
 int init_output_elf(char **,void (**)(FILE *,section *,symbol *),int (**)(char *));
 int init_output_bin(char **,void (**)(FILE *,section *,symbol *),int (**)(char *));
diff --git a/vmath.c b/vmath.c
deleted file mode 100644
index 8941e9c..0000000
--- a/vmath.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/* vmath.c 96-bit integer and floating point routines for vasm */
-/* (c) in 2002 by Frank Wille */
-
-#include "vasm.h"
-#include <math.h>
-
-static int96 one = { 1,0,0,0,0,0,0,0,0,0,0,0 };
-
-
-unsigned char *int96_assign32(unsigned char *x,long val)
-{
-  int i;
-
-  for (i=0; i<4; i++) {
-    x[i] = val & 0xff;
-    val >>= 8;
-  }
-  memset(&x[4],(x[3] & 0x80)?0xff:0,8);
-  return x;
-}
-
-
-unsigned char *int96_assign64(unsigned char *x,long long val)
-{
-  int i;
-
-  for (i=0; i<8; i++) {
-    x[i] = val & 0xff;
-    val >>= 8;
-  }
-  memset(&x[8],(x[7] & 0x80)?0xff:0,4);
-  return x;
-}
-
-
-unsigned char *int96_add(unsigned char *x,unsigned char *y)
-{
-  unsigned char s,v;
-  int i;
-
-  for (i=0,v=0; i<12; i++) {
-    s = x[i] + y[i] + v;
-    v = s<x[i] || s<y[i];
-    x[i] = s;
-  }
-  return x;
-}
-
-
-unsigned char *int96_add32(unsigned char *x,long val)
-{
-  int96 y;
-
-  return int96_add(x,int96_assign32(y,val));
-}
-
-
-unsigned char *int96_add64(unsigned char *x,long long val)
-{
-  int96 y;
-
-  return int96_add(x,int96_assign64(y,val));
-}
-
-
-unsigned char *int96_negate(unsigned char *x)
-{
-  int i;
-
-  for (i=0; i<12; i++)
-    x[i] = ~x[i];
-  return int96_add(x,one);
-}
-
-
-unsigned char *int96_lshleft(unsigned char *x,int cnt)
-{
-  unsigned short old=0,new;
-  int i,sh;
-
-  while (cnt > 0) {
-    sh = (cnt > 8) ? 8 : cnt;
-    for (i=0; i<12; i++) {
-      new = (unsigned short)x[i] << sh;
-      x[i] = (new & 0xff) | ((old >> 8) & 0xff);
-      old = new;
-    }
-    cnt -= sh;
-  }
-  return x;
-}
-
-
-unsigned char *int96_lshright(unsigned char *x,int cnt)
-{
-  unsigned short old=0,new;
-  int i,sh;
-
-  while (cnt > 0) {
-    sh = (cnt > 8) ? 8 : cnt;
-    for (i=11; i>=0; i--) {
-      new = ((unsigned short)x[i]<<8) >> sh;
-      x[i] = (old & 0xff) | ((new >> 8) & 0xff);
-      old = new;
-    }
-    cnt -= sh;
-  }
-  return x;
-}
-
-
-unsigned char *int96_ashright(unsigned char *x,int cnt)
-{
-  unsigned short new;
-  unsigned short old = (x[11]>=0x80) ? 0xffff : 0;
-  int i,sh;
-
-  while (cnt > 0) {
-    sh = (cnt > 8) ? 8 : cnt;
-    for (i=11; i>=0; i--) {
-      new = ((unsigned short)x[i]<<8) >> sh;
-      x[i] = (old & 0xff) | ((new >> 8) & 0xff);
-      old = new;
-    }
-    cnt -= sh;
-  }
-  return x;
-}
-
-
-unsigned char *int96_mulu(unsigned char *x,unsigned char *y)
-{
-  int i,j;
-  unsigned short m;
-  unsigned char p[13];
-  int96 sum;
-
-  memset(sum,0,12);
-  memset(p,0,13);
-  for (i=0; i<12; i++) {
-    for (j=0; j<(12-i); j++) {
-      m = (unsigned short)x[i] * (unsigned short)y[j];
-      p[i+j] = m & 0xff;
-      p[i+j+1] = (m >> 8) & 0xff;
-      int96_add(sum,p);
-      p[i+j] = p[i+j+1] = 0;
-    }
-  }
-  memcpy(x,sum,12);
-  return x;
-}
-
-
-unsigned char *int96_muls(unsigned char *x,unsigned char *y)
-{
-  int neg = 0;
-
-  if (x[11] >= 0x80) {
-    neg = 1;
-    int96_negate(x);
-  }
-  if (y[11] >= 0x80) {
-    neg ^= 1;
-    int96_negate(y);
-  }
-  int96_mulu(x,y);
-  if (neg)
-    int96_negate(x);
-  return x;
-}
-
-
-long double int96_conv2longdouble(unsigned char *x)
-{
-  long double f = 0.0;
-  long double m = 1.0;
-  int i,neg=0;
-
-  if (x[11] >= 0x80) {
-    neg = 1;
-    int96_negate(x);
-  }
-  for (i=0; i<12; i++) {
-    f += (long double)x[i] * m;
-    m *= 256.0;
-  }
-  return neg ? -f : f;
-}
-
-
-int int96_cntz(unsigned char *x)
-{
-  int cnt = 0;
-  int i;
-
-  for (i=11; i>=0; i--) {
-    unsigned char v = x[i];
-    unsigned char m = 0x80;
-
-    for (m=0x80; m; m>>=1) {
-      if (v & m) {
-        i = -1;
-        break;
-      }
-      cnt++;
-    }
-  }
-  return cnt;
-}
-
-
-int int96_compare(unsigned char *x,unsigned char *y)
-{
-  int96 cmp;
-  int i;
-
-  for (i=0; i<12; i++)
-    cmp[i] = ~y[i];
-  int96_add(cmp,one);
-  int96_add(cmp,x);
-  for (i=0; i<12; i++) {
-    if (cmp[i])
-      return cmp[11]>=0x80 ? -1 : 1;
-  }
-  return 0;
-}
-
-
-void int96_copybe(unsigned char *d,unsigned char *x,int len)
-{
-  int i;
-
-  for (i=len-1; i>=0; i--)
-    *d++ = x[i];
-}
-
-
-void int96_copyle(unsigned char *d,unsigned char *x,int len)
-{
-  memcpy(d,x,len);
-}
diff --git a/vmath.h b/vmath.h
deleted file mode 100644
index 6e341d1..0000000
--- a/vmath.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef VMATH_H
-#define VMATH_H
-
-typedef unsigned char int96[12];    /* 96-bit little endian format */
-
-unsigned char *int96_assign32(unsigned char *,long);
-unsigned char *int96_assign64(unsigned char *,long long);
-unsigned char *int96_add(unsigned char *,unsigned char *);
-unsigned char *int96_add32(unsigned char *,long);
-unsigned char *int96_add64(unsigned char *,long long);
-unsigned char *int96_negate(unsigned char *);
-unsigned char *int96_lshleft(unsigned char *,int);
-unsigned char *int96_lshright(unsigned char *,int);
-unsigned char *int96_ashright(unsigned char *,int);
-unsigned char *int96_mulu(unsigned char *,unsigned char *);
-unsigned char *int96_muls(unsigned char *,unsigned char *);
-long double int96_conv2longdouble(unsigned char *);
-int int96_cntz(unsigned char *);
-int int96_compare(unsigned char *,unsigned char *);
-void int96_copybe(unsigned char *,unsigned char *,int);
-void int96_copyle(unsigned char *,unsigned char *,int);
-
-#endif
diff --git a/vobjdump.c b/vobjdump.c
index 5915f14..4c37918 100644
--- a/vobjdump.c
+++ b/vobjdump.c
@@ -71,7 +71,10 @@ static const char *type_name[] = {
 static ubyte *vobj;   /* base address of VOBJ buffer */
 static size_t vlen;   /* length of VOBJ file in buffer */
 static ubyte *p;      /* current object pointer */
+static int bpb,bpt;   /* bits per byte, bytes per taddr */
+static taddr bptmask; /* mask LSB to fit bytes per taddr */
 
+#define BPTMASK(x) (unsigned long long)((x)&bptmask)
 
 
 static void print_sep(void)
@@ -81,7 +84,7 @@ static void print_sep(void)
 }
 
 
-static taddr read_number(void)
+static taddr read_number(int is_signed)
 {
   taddr val;
   ubyte n,*q;
@@ -105,7 +108,7 @@ static taddr read_number(void)
     while (n--)
       val = (val<<8) | *(--q);
 
-    if (val & (1LL<<(size-1)))
+    if (is_signed && (val & (1LL<<(size-1))))
       val |= ~makemask(size);
   }
   return val;
@@ -125,11 +128,11 @@ static void read_symbol(struct vobj_symbol *vsym)
   vsym->offs = p - vobj;
   vsym->name = (const char *)p;
   skip_string();
-  vsym->type = (int)read_number();
-  vsym->flags = (int)read_number();
-  vsym->sec = (int)read_number();
-  vsym->val = read_number();
-  vsym->size = (int)read_number();
+  vsym->type = (int)read_number(0);
+  vsym->flags = (int)read_number(0);
+  vsym->sec = (int)read_number(0);
+  vsym->val = read_number(1);
+  vsym->size = (int)read_number(0);
 }
 
 
@@ -145,17 +148,18 @@ static void read_section(struct vobj_section *vsect,
   skip_string();
   attr = p;
   skip_string();
-  flags = (unsigned long)read_number();
-  align = (int)read_number();
-  vsect->dsize = read_number();
-  nrelocs = (int)read_number();
-  vsect->fsize = read_number();
+  flags = (unsigned long)read_number(0);
+  align = (int)read_number(0);
+  vsect->dsize = read_number(0);
+  nrelocs = (int)read_number(0);
+  vsect->fsize = read_number(0);
 
   print_sep();
-  printf("%08lx: SECTION \"%s\" (attributes=\"%s\")\n"
+  printf("%08llx: SECTION \"%s\" (attributes=\"%s\")\n"
          "Flags: %-8lx  Alignment: %-6d "
          "Total size: %-9lld File size: %-9lld\n",
-         vsect->offs,vsect->name,attr,flags,align,vsect->dsize,vsect->fsize);
+         BPTMASK(vsect->offs),vsect->name,attr,flags,align,
+         vsect->dsize,vsect->fsize);
   if (nrelocs)
     printf("%d Relocation%s present.\n",nrelocs,nrelocs==1?emptystr:sstr);
 
@@ -169,47 +173,54 @@ static void read_section(struct vobj_section *vsect,
       /* print header */
       printf("\nfile offs sectoffs pos sz mask     type     symbol+addend\n");
     }
-    printf("%08lx: ",(unsigned long)(p-vobj));
-    type = (ubyte)read_number();
+    printf("%08llx: ",BPTMASK(p-vobj));
+    type = (ubyte)read_number(0);
 
     if (type<sizeof(reloc_name)/sizeof(reloc_name[0])) {
       /* standard relocation */
       taddr offs,mask,addend;
       int bpos,bsiz,sym;
+      const char *basesym;
 
-      offs = read_number();
-      bpos = (int)read_number();
-      bsiz = (int)read_number();
-      mask = read_number();
-      addend = read_number();
-      sym = (int)read_number() - 1;  /* symbol index */
+      offs = read_number(0);
+      bpos = (int)read_number(0);
+      bsiz = (int)read_number(0);
+      mask = read_number(1);
+      addend = read_number(1);
+      sym = (int)read_number(0) - 1;  /* symbol index */
 
       if (offs<0 || offs>=vsect->dsize) {
-        printf("offset 0x%lx is outside of section!\n",(unsigned long)offs);
+        printf("offset 0x%llx is outside of section!\n",BPTMASK(offs));
         continue;
       }
       if (sym<0 || sym>=nsyms) {
         printf("symbol index %d is illegal!\n",sym+1);
         continue;
       }
-      if (bsiz<0 || bsiz>(sizeof(taddr)<<3)) {
+      if (bsiz<0 || bsiz>bpt*bpb) {
         printf("size of %d bits is illegal!\n",bsiz);
         continue;
       }
-      if (bpos<0 || bpos>=bsiz) {
-        printf("bit-position %d is outside of a %d bit word!\n",bpos,bsiz);
+      if (bpos<0 || bpos+bsiz>bpt*bpb) {
+        printf("bit field start=%d, size=%d doesn't fit into target address "
+               "type (%d bits)!\n",bpos,bsiz,bpt*bpb);
         continue;
       }
 
-      printf("%08lx  %02d %02d %08lx %-8s %s%+lld\n",
-             (unsigned long)offs,bpos,bsiz,(unsigned long)mask,
-             reloc_name[type],vsym[sym].name,addend);
+      basesym = vsym[sym].name;
+      if (!strncmp(basesym," *current pc",12)) {
+        basesym = vsect->name;
+        /*addend += offs;*/
+      }
+      printf("%08llx  %02d %02d %8llx %-8s %s%+lld\n",
+             BPTMASK(offs),bpos,bsiz,BPTMASK(mask),
+             reloc_name[type],basesym,addend);
     }
     else {
       /* non-standard relocation */
       taddr rsize;
 
-      rsize = read_number();  /* size of special relocation entry */
+      rsize = read_number(0);  /* size of special relocation entry */
       p += rsize;
       printf("special relocation type %-3d with a size of %d bytes\n",
              (int)type,(int)rsize);
@@ -251,7 +262,7 @@ static int vobjdump(void)
   p = vobj;
 
   if (vlen>4 && p[0]==0x56 && p[1]==0x4f && p[2]==0x42 && p[3]==0x4a) {
-    int endian,bpb,bpt,nsecs,nsyms,i;
+    int endian,nsecs,nsyms,i;
     const char *cpu_name;
     struct vobj_symbol *vsymbols = NULL;
     struct vobj_section *vsect = NULL;
@@ -263,22 +274,23 @@ static int vobjdump(void)
       return 1;
     }
 
-    bpb = (int)read_number();  /* bits per byte */
+    bpb = (int)read_number(0);  /* bits per byte */
     if (bpb != 8) {
       fprintf(stderr,"%d bits per byte not supported!\n",bpb);
       return 1;
     }
 
-    bpt = (int)read_number();  /* bytes per taddr */
+    bpt = (int)read_number(0);  /* bytes per taddr */
     if (bpt > sizeof(taddr)) {
       fprintf(stderr,"%d bytes per taddr not supported!\n",bpt);
       return 1;
     }
+    bptmask = makemask(bpt*bpb);
 
     cpu_name = p;
     skip_string();  /* skip cpu-string */
-    nsecs = (int)read_number();  /* number of sections */
-    nsyms = (int)read_number();  /* number of symbols */
+    nsecs = (int)read_number(0);  /* number of sections */
+    nsyms = (int)read_number(0);  /* number of symbols */
 
     /* print header */
     print_sep();
@@ -321,10 +333,12 @@ static int vobjdump(void)
         printf("SYMBOL TABLE\n"
                "file offs bind size     type def      value    name\n");
       }
-      printf("%08lx: %-4s %08x %-4s %8.8s %08lx %s\n",
-             (unsigned long)vs->offs,bind_name(vs->flags),(unsigned)vs->size,
+      if (!strncmp(vs->name," *current pc",12))
+        continue;
+      printf("%08llx: %-4s %08x %-4s %8.8s %8llx %s\n",
+             BPTMASK(vs->offs),bind_name(vs->flags),(unsigned)vs->size,
              type_name[TYPE(vs)],def_name(vs,vsect,nsecs),
-             (unsigned long)vs->val,vs->name);
+             BPTMASK(vs->val),vs->name);
     }
   }
   else {
@@ -376,7 +390,7 @@ int main(int argc,char *argv[])
       fprintf(stderr,"Cannot open \"%s\" for reading!\n",argv[1]);
   }
   else
-    fprintf(stderr,"vobjdump V0.1\nWritten by Frank Wille\n"
+    fprintf(stderr,"vobjdump V0.4\nWritten by Frank Wille\n"
             "Usage: %s <file name>\n",argv[0]);
 
   return rc;
diff --git a/vobjdump.h b/vobjdump.h
index 41f0bfc..ae884bb 100644
--- a/vobjdump.h
+++ b/vobjdump.h
@@ -6,6 +6,8 @@
 
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
+#include <stdint.h>
 
 /* symbol types */
 #define LABSYM 1
@@ -26,8 +28,8 @@
 #define WEAK 64
 
 
-typedef long long taddr;
-typedef unsigned char ubyte;
+typedef int64_t taddr;
+typedef uint8_t ubyte;
 
 struct vobj_symbol {
   size_t offs;