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Added VHDL

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1 parent 4aec634 commit 52a9630dc2b854d3f98694d24f2c2b083acd7285 @vrcsix vrcsix committed with Sep 7, 2008
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  1. +13 −0 v/vhdl.vhdl
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+use std.textio.all;
+
+entity hello_world is
+end hello_world;
+
+architecture behaviour of hello_world is
+begin
+ process
+ begin
+ write (output, String'("Hello world!"));
+ wait;
+ end process;
+end behaviour;

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