From 58938558189f1bbbdee7944d329c85be89fda61c Mon Sep 17 00:00:00 2001 From: Keyi Zhang Date: Sun, 12 May 2019 12:28:45 -0700 Subject: [PATCH] add initial implementation of skipping verilator build --- fault/verilator_target.py | 20 +++++++++++--------- tests/test_verilator_target.py | 22 ++++++++++++++++++++++ 2 files changed, 33 insertions(+), 9 deletions(-) diff --git a/fault/verilator_target.py b/fault/verilator_target.py index 31aeb803..f49e9b4f 100644 --- a/fault/verilator_target.py +++ b/fault/verilator_target.py @@ -79,7 +79,7 @@ class VerilatorTarget(VerilogTarget): def __init__(self, circuit, directory="build/", flags=[], skip_compile=False, include_verilog_libraries=[], include_directories=[], magma_output="coreir-verilog", - circuit_name=None, magma_opts={}): + circuit_name=None, magma_opts={}, skip_verilator=False): """ Params: `include_verilog_libraries`: a list of verilog libraries to include @@ -95,14 +95,16 @@ def __init__(self, circuit, directory="build/", self.flags = flags self.include_directories = include_directories - # Compile the design using `verilator` - driver_file = self.directory / Path(f"{self.circuit_name}_driver.cpp") - verilator_cmd = verilator_utils.verilator_cmd( - self.circuit_name, self.verilog_file.name, - self.include_verilog_libraries, self.include_directories, - driver_file.name, self.flags) - if self.run_from_directory(verilator_cmd): - raise Exception(f"Running verilator cmd {verilator_cmd} failed") + # Compile the design using `verilator`, if not skip + if not skip_verilator: + driver_file = self.directory / Path( + f"{self.circuit_name}_driver.cpp") + verilator_cmd = verilator_utils.verilator_cmd( + self.circuit_name, self.verilog_file.name, + self.include_verilog_libraries, self.include_directories, + driver_file.name, self.flags) + if self.run_from_directory(verilator_cmd): + raise Exception(f"Running verilator cmd {verilator_cmd} failed") self.debug_includes = set() verilator_version = subprocess.check_output("verilator --version", shell=True) diff --git a/tests/test_verilator_target.py b/tests/test_verilator_target.py index 23549a34..47b24e33 100644 --- a/tests/test_verilator_target.py +++ b/tests/test_verilator_target.py @@ -5,6 +5,7 @@ import common import random from fault.actions import Poke, Expect, Eval, Step, Print, Peek +from fault.tester import Tester from fault.random import random_bv import copy import os.path @@ -26,6 +27,27 @@ def test_verilator_peeks(): target.run(actions) +def test_verilator_skip_build(): + circ = common.TestBasicCircuit + flags = ["-Wno-lint"] + tester = Tester(circ) + with tempfile.TemporaryDirectory() as tempdir: + tester.compile_and_run(target="verilator", + directory=tempdir, + flags=flags) + # get the timestamp on generated verilator obj files + obj_filename = os.path.join(tempdir, "obj_dir", "VBasicCircuit__ALL.a") + mtime = os.path.getmtime(obj_filename) + + # run without building the verilator + tester.compile_and_run(target="verilator", + directory=tempdir, + skip_verilator=True, + flags=flags) + new_mtime = os.path.getmtime(obj_filename) + assert mtime == new_mtime + + def test_verilator_trace(): circ = common.TestBasicClkCircuit actions = [