diff --git a/CHANGELOG.md b/CHANGELOG.md index b4cd167..7b020da 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,3 +1,9 @@ +## 1.0.13 (2025-11-12) + +## Bug Fixes + +- fix test bugs + ## 1.0.12 (2025-10-31) ## Features diff --git a/doc/html/driver__w25qxx__read__test_8c_source.html b/doc/html/driver__w25qxx__read__test_8c_source.html index b30291e..a6b877c 100644 --- a/doc/html/driver__w25qxx__read__test_8c_source.html +++ b/doc/html/driver__w25qxx__read__test_8c_source.html @@ -102,2007 +102,2010 @@
40static w25qxx_handle_t gs_handle;
41static uint8_t gs_buffer_input[600];
42static uint8_t gs_buffer_output[600];
-
43static const uint32_t gsc_size[] = {0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000};
-
44
-
-
55uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
-
56{
-
57 uint8_t res;
-
58 w25qxx_info_t info;
-
59
-
60 /* link interface function */
-
61 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
-
62 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
-
63 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
-
64 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
-
65 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
-
66 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
-
67 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
-
68
-
69 /* get information */
-
70 res = w25qxx_info(&info);
-
71 if (res != 0)
-
72 {
-
73 w25qxx_interface_debug_print("w25qxx: get info failed.\n");
-
74
-
75 return 1;
-
76 }
-
77 else
-
78 {
-
79 /* print chip information */
-
80 w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
-
81 w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
-
82 w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
-
83 w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
-
84 w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
-
85 w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
-
86 w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
-
87 w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
-
88 w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
-
89 }
-
90
-
91 /* set chip type */
-
92 res = w25qxx_set_type(&gs_handle, type);
-
93 if (res != 0)
-
94 {
-
95 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
-
96
-
97 return 1;
-
98 }
-
99
-
100 /* set chip interface */
-
101 res = w25qxx_set_interface(&gs_handle, interface);
-
102 if (res != 0)
-
103 {
-
104 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
105
-
106 return 1;
-
107 }
-
108
-
109 /* set dual quad spi */
-
110 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
-
111 if (res != 0)
-
112 {
-
113 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
-
114 (void)w25qxx_deinit(&gs_handle);
-
115
-
116 return 1;
-
117 }
-
118
-
119 /* chip init */
-
120 res = w25qxx_init(&gs_handle);
-
121 if (res != 0)
-
122 {
-
123 w25qxx_interface_debug_print("w25qxx: init failed.\n");
-
124
-
125 return 1;
-
126 }
-
127
-
128 /* start read test */
-
129 w25qxx_interface_debug_print("w25qxx: start read test.\n");
+
43static const uint32_t gsc_size[] = {0x20000, 0x40000, 0x80000,
+
44 0x100000, 0x200000, 0x400000, 0x800000,
+
45 0x1000000, 0x2000000, 0x4000000, 0x8000000,
+
46 0x10000000};
+
47
+
+
58uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
+
59{
+
60 uint8_t res;
+
61 w25qxx_info_t info;
+
62
+
63 /* link interface function */
+
64 DRIVER_W25QXX_LINK_INIT(&gs_handle, w25qxx_handle_t);
+
65 DRIVER_W25QXX_LINK_SPI_QSPI_INIT(&gs_handle, w25qxx_interface_spi_qspi_init);
+
66 DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(&gs_handle, w25qxx_interface_spi_qspi_deinit);
+
67 DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(&gs_handle, w25qxx_interface_spi_qspi_write_read);
+
68 DRIVER_W25QXX_LINK_DELAY_MS(&gs_handle, w25qxx_interface_delay_ms);
+
69 DRIVER_W25QXX_LINK_DELAY_US(&gs_handle, w25qxx_interface_delay_us);
+
70 DRIVER_W25QXX_LINK_DEBUG_PRINT(&gs_handle, w25qxx_interface_debug_print);
+
71
+
72 /* get information */
+
73 res = w25qxx_info(&info);
+
74 if (res != 0)
+
75 {
+
76 w25qxx_interface_debug_print("w25qxx: get info failed.\n");
+
77
+
78 return 1;
+
79 }
+
80 else
+
81 {
+
82 /* print chip information */
+
83 w25qxx_interface_debug_print("w25qxx: chip is %s.\n", info.chip_name);
+
84 w25qxx_interface_debug_print("w25qxx: manufacturer is %s.\n", info.manufacturer_name);
+
85 w25qxx_interface_debug_print("w25qxx: interface is %s.\n", info.interface);
+
86 w25qxx_interface_debug_print("w25qxx: driver version is %d.%d.\n", info.driver_version / 1000, (info.driver_version % 1000) / 100);
+
87 w25qxx_interface_debug_print("w25qxx: min supply voltage is %0.1fV.\n", info.supply_voltage_min_v);
+
88 w25qxx_interface_debug_print("w25qxx: max supply voltage is %0.1fV.\n", info.supply_voltage_max_v);
+
89 w25qxx_interface_debug_print("w25qxx: max current is %0.2fmA.\n", info.max_current_ma);
+
90 w25qxx_interface_debug_print("w25qxx: max temperature is %0.1fC.\n", info.temperature_max);
+
91 w25qxx_interface_debug_print("w25qxx: min temperature is %0.1fC.\n", info.temperature_min);
+
92 }
+
93
+
94 /* set chip type */
+
95 res = w25qxx_set_type(&gs_handle, type);
+
96 if (res != 0)
+
97 {
+
98 w25qxx_interface_debug_print("w25qxx: set type failed.\n");
+
99
+
100 return 1;
+
101 }
+
102
+
103 /* set chip interface */
+
104 res = w25qxx_set_interface(&gs_handle, interface);
+
105 if (res != 0)
+
106 {
+
107 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
108
+
109 return 1;
+
110 }
+
111
+
112 /* set dual quad spi */
+
113 res = w25qxx_set_dual_quad_spi(&gs_handle, dual_quad_spi_enable);
+
114 if (res != 0)
+
115 {
+
116 w25qxx_interface_debug_print("w25qxx: set dual quad spi failed.\n");
+
117 (void)w25qxx_deinit(&gs_handle);
+
118
+
119 return 1;
+
120 }
+
121
+
122 /* chip init */
+
123 res = w25qxx_init(&gs_handle);
+
124 if (res != 0)
+
125 {
+
126 w25qxx_interface_debug_print("w25qxx: init failed.\n");
+
127
+
128 return 1;
+
129 }
130
-
131 if (interface == W25QXX_INTERFACE_SPI)
-
132 {
-
133 uint32_t size;
-
134 uint32_t addr, step, j;
-
135
-
136 size = gsc_size[type - W25Q80];
-
137 step = size / 16;
+
131 /* start read test */
+
132 w25qxx_interface_debug_print("w25qxx: start read test.\n");
+
133
+
134 if (interface == W25QXX_INTERFACE_SPI)
+
135 {
+
136 uint32_t size;
+
137 uint32_t addr, step, j;
138
-
139 /* w25qxx_write/w25qxx_read test */
-
140 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
139 size = gsc_size[type - W25Q10];
+
140 step = size / 16;
141
-
142 for (addr = 0; addr < size; addr += step)
-
143 {
-
144 for (j = 0; j < 600; j++)
-
145 {
-
146 gs_buffer_input[j] = rand() %256;
-
147 }
-
148 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
149 if (res != 0)
-
150 {
-
151 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
152 (void)w25qxx_deinit(&gs_handle);
-
153
-
154 return 1;
-
155 }
-
156 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
157 if (res != 0)
-
158 {
-
159 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
160 (void)w25qxx_deinit(&gs_handle);
-
161
-
162 return 1;
-
163 }
-
164 for (j = 0; j < 600; j++)
-
165 {
-
166 if (gs_buffer_input[j] != gs_buffer_output[j])
-
167 {
-
168 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
169 (void)w25qxx_deinit(&gs_handle);
-
170
-
171 return 1;
-
172 }
-
173 }
-
174 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
175 }
-
176
-
177 /* w25qxx_sector_erase_4k test */
-
178 addr = (rand() % 10) * 4 * 1024;
-
179 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
180 res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
181 if (res != 0)
-
182 {
-
183 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
184 (void)w25qxx_deinit(&gs_handle);
-
185
-
186 return 1;
-
187 }
-
188 for (j = 0; j < 256; j++)
-
189 {
-
190 gs_buffer_input[j] = rand() %256;
-
191 }
-
192
-
193 /* w25qxx_page_program */
-
194 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
195 if (res != 0)
-
196 {
-
197 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
198 (void)w25qxx_deinit(&gs_handle);
-
199
-
200 return 1;
-
201 }
-
202
-
203 /* w25qxx_only_spi_read */
-
204 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
205 if (res != 0)
-
206 {
-
207 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
208 (void)w25qxx_deinit(&gs_handle);
-
209
-
210 return 1;
-
211 }
-
212 for (j = 0; j < 256; j++)
-
213 {
-
214 if (gs_buffer_input[j] != gs_buffer_output[j])
-
215 {
-
216 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
217 (void)w25qxx_deinit(&gs_handle);
-
218
-
219 return 1;
-
220 }
-
221 }
-
222 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
223
-
224 /* w25qxx_fast_read */
-
225 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
226 if (res != 0)
-
227 {
-
228 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
229 (void)w25qxx_deinit(&gs_handle);
-
230
-
231 return 1;
-
232 }
-
233 for (j = 0; j < 256; j++)
-
234 {
-
235 if (gs_buffer_input[j] != gs_buffer_output[j])
-
236 {
-
237 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
238 (void)w25qxx_deinit(&gs_handle);
-
239
-
240 return 1;
-
241 }
-
242 }
-
243 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
244
-
245 /* w25qxx_block_erase_32k test */
-
246 addr = (rand() % 10) * 32 * 1024;
-
247 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
248 res = w25qxx_block_erase_32k(&gs_handle, addr);
-
249 if (res != 0)
-
250 {
-
251 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
252 (void)w25qxx_deinit(&gs_handle);
-
253
-
254 return 1;
-
255 }
-
256 for (j = 0; j < 256; j++)
-
257 {
-
258 gs_buffer_input[j] = rand() %256;
-
259 }
-
260
-
261 /* w25qxx_page_program */
-
262 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
263 if (res != 0)
-
264 {
-
265 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
266 (void)w25qxx_deinit(&gs_handle);
-
267
-
268 return 1;
-
269 }
-
270
-
271 /* w25qxx_only_spi_read */
-
272 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
273 if (res != 0)
-
274 {
-
275 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
276 (void)w25qxx_deinit(&gs_handle);
-
277
-
278 return 1;
-
279 }
-
280 for (j = 0; j < 256; j++)
-
281 {
-
282 if (gs_buffer_input[j] != gs_buffer_output[j])
-
283 {
-
284 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
285 (void)w25qxx_deinit(&gs_handle);
-
286
-
287 return 1;
-
288 }
-
289 }
-
290 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
291
-
292 /* w25qxx_fast_read */
-
293 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
294 if (res != 0)
-
295 {
-
296 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
297 (void)w25qxx_deinit(&gs_handle);
-
298
-
299 return 1;
-
300 }
-
301 for (j = 0; j < 256; j++)
-
302 {
-
303 if (gs_buffer_input[j] != gs_buffer_output[j])
-
304 {
-
305 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
306 (void)w25qxx_deinit(&gs_handle);
-
307
-
308 return 1;
-
309 }
-
310 }
-
311 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
312
-
313 /* w25qxx_block_erase_64k test */
-
314 addr = (rand() % 10) * 64 * 1024;
-
315 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
316 res = w25qxx_block_erase_64k(&gs_handle, addr);
-
317 if (res != 0)
-
318 {
-
319 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
320 (void)w25qxx_deinit(&gs_handle);
-
321
-
322 return 1;
-
323 }
-
324 for (j = 0; j < 256; j++)
-
325 {
-
326 gs_buffer_input[j] = rand() %256;
-
327 }
-
328
-
329 /* w25qxx_page_program */
-
330 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
331 if (res != 0)
-
332 {
-
333 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
334 (void)w25qxx_deinit(&gs_handle);
-
335
-
336 return 1;
-
337 }
-
338
-
339 /* w25qxx_only_spi_read */
-
340 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
341 if (res != 0)
-
342 {
-
343 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
344 (void)w25qxx_deinit(&gs_handle);
-
345
-
346 return 1;
-
347 }
-
348 for (j = 0; j < 256; j++)
-
349 {
-
350 if (gs_buffer_input[j] != gs_buffer_output[j])
-
351 {
-
352 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
353 (void)w25qxx_deinit(&gs_handle);
-
354
-
355 return 1;
-
356 }
-
357 }
-
358 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
359
-
360 /* w25qxx_fast_read */
-
361 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
362 if (res != 0)
-
363 {
-
364 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
365 (void)w25qxx_deinit(&gs_handle);
-
366
-
367 return 1;
-
368 }
-
369 for (j = 0; j < 256; j++)
-
370 {
-
371 if (gs_buffer_input[j] != gs_buffer_output[j])
-
372 {
-
373 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
374 (void)w25qxx_deinit(&gs_handle);
-
375
-
376 return 1;
-
377 }
-
378 }
-
379 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
380
-
381 /* get sfdp */
-
382 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
-
383 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
-
384 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
-
385 if (res != 0)
-
386 {
-
387 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
-
388 (void)w25qxx_deinit(&gs_handle);
-
389
-
390 return 1;
-
391 }
-
392 for (j = 0; j < 256; j += 8)
-
393 {
-
394 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
395 j , j + 7,
-
396 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
-
397 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
-
398 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
-
399 }
-
400
-
401 /* security register1 write and read test */
-
402 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
142 /* w25qxx_write/w25qxx_read test */
+
143 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
144
+
145 for (addr = 0; addr < size; addr += step)
+
146 {
+
147 for (j = 0; j < 600; j++)
+
148 {
+
149 gs_buffer_input[j] = rand() %256;
+
150 }
+
151 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
152 if (res != 0)
+
153 {
+
154 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
155 (void)w25qxx_deinit(&gs_handle);
+
156
+
157 return 1;
+
158 }
+
159 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
160 if (res != 0)
+
161 {
+
162 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
163 (void)w25qxx_deinit(&gs_handle);
+
164
+
165 return 1;
+
166 }
+
167 for (j = 0; j < 600; j++)
+
168 {
+
169 if (gs_buffer_input[j] != gs_buffer_output[j])
+
170 {
+
171 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
172 (void)w25qxx_deinit(&gs_handle);
+
173
+
174 return 1;
+
175 }
+
176 }
+
177 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
178 }
+
179
+
180 /* w25qxx_sector_erase_4k test */
+
181 addr = (rand() % 10) * 4 * 1024;
+
182 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
183 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
184 if (res != 0)
+
185 {
+
186 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
187 (void)w25qxx_deinit(&gs_handle);
+
188
+
189 return 1;
+
190 }
+
191 for (j = 0; j < 256; j++)
+
192 {
+
193 gs_buffer_input[j] = rand() %256;
+
194 }
+
195
+
196 /* w25qxx_page_program */
+
197 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
198 if (res != 0)
+
199 {
+
200 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
201 (void)w25qxx_deinit(&gs_handle);
+
202
+
203 return 1;
+
204 }
+
205
+
206 /* w25qxx_only_spi_read */
+
207 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
208 if (res != 0)
+
209 {
+
210 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
211 (void)w25qxx_deinit(&gs_handle);
+
212
+
213 return 1;
+
214 }
+
215 for (j = 0; j < 256; j++)
+
216 {
+
217 if (gs_buffer_input[j] != gs_buffer_output[j])
+
218 {
+
219 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
220 (void)w25qxx_deinit(&gs_handle);
+
221
+
222 return 1;
+
223 }
+
224 }
+
225 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
226
+
227 /* w25qxx_fast_read */
+
228 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
229 if (res != 0)
+
230 {
+
231 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
232 (void)w25qxx_deinit(&gs_handle);
+
233
+
234 return 1;
+
235 }
+
236 for (j = 0; j < 256; j++)
+
237 {
+
238 if (gs_buffer_input[j] != gs_buffer_output[j])
+
239 {
+
240 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
241 (void)w25qxx_deinit(&gs_handle);
+
242
+
243 return 1;
+
244 }
+
245 }
+
246 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
247
+
248 /* w25qxx_block_erase_32k test */
+
249 addr = (rand() % 10) * 32 * 1024;
+
250 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
251 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
252 if (res != 0)
+
253 {
+
254 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
255 (void)w25qxx_deinit(&gs_handle);
+
256
+
257 return 1;
+
258 }
+
259 for (j = 0; j < 256; j++)
+
260 {
+
261 gs_buffer_input[j] = rand() %256;
+
262 }
+
263
+
264 /* w25qxx_page_program */
+
265 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
266 if (res != 0)
+
267 {
+
268 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
269 (void)w25qxx_deinit(&gs_handle);
+
270
+
271 return 1;
+
272 }
+
273
+
274 /* w25qxx_only_spi_read */
+
275 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
276 if (res != 0)
+
277 {
+
278 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
279 (void)w25qxx_deinit(&gs_handle);
+
280
+
281 return 1;
+
282 }
+
283 for (j = 0; j < 256; j++)
+
284 {
+
285 if (gs_buffer_input[j] != gs_buffer_output[j])
+
286 {
+
287 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
288 (void)w25qxx_deinit(&gs_handle);
+
289
+
290 return 1;
+
291 }
+
292 }
+
293 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
294
+
295 /* w25qxx_fast_read */
+
296 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
297 if (res != 0)
+
298 {
+
299 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
300 (void)w25qxx_deinit(&gs_handle);
+
301
+
302 return 1;
+
303 }
+
304 for (j = 0; j < 256; j++)
+
305 {
+
306 if (gs_buffer_input[j] != gs_buffer_output[j])
+
307 {
+
308 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
309 (void)w25qxx_deinit(&gs_handle);
+
310
+
311 return 1;
+
312 }
+
313 }
+
314 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
315
+
316 /* w25qxx_block_erase_64k test */
+
317 addr = (rand() % 10) * 64 * 1024;
+
318 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
319 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
320 if (res != 0)
+
321 {
+
322 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
323 (void)w25qxx_deinit(&gs_handle);
+
324
+
325 return 1;
+
326 }
+
327 for (j = 0; j < 256; j++)
+
328 {
+
329 gs_buffer_input[j] = rand() %256;
+
330 }
+
331
+
332 /* w25qxx_page_program */
+
333 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
334 if (res != 0)
+
335 {
+
336 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
337 (void)w25qxx_deinit(&gs_handle);
+
338
+
339 return 1;
+
340 }
+
341
+
342 /* w25qxx_only_spi_read */
+
343 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
344 if (res != 0)
+
345 {
+
346 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
347 (void)w25qxx_deinit(&gs_handle);
+
348
+
349 return 1;
+
350 }
+
351 for (j = 0; j < 256; j++)
+
352 {
+
353 if (gs_buffer_input[j] != gs_buffer_output[j])
+
354 {
+
355 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
356 (void)w25qxx_deinit(&gs_handle);
+
357
+
358 return 1;
+
359 }
+
360 }
+
361 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
362
+
363 /* w25qxx_fast_read */
+
364 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
365 if (res != 0)
+
366 {
+
367 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
368 (void)w25qxx_deinit(&gs_handle);
+
369
+
370 return 1;
+
371 }
+
372 for (j = 0; j < 256; j++)
+
373 {
+
374 if (gs_buffer_input[j] != gs_buffer_output[j])
+
375 {
+
376 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
377 (void)w25qxx_deinit(&gs_handle);
+
378
+
379 return 1;
+
380 }
+
381 }
+
382 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
383
+
384 /* get sfdp */
+
385 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
+
386 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
+
387 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
+
388 if (res != 0)
+
389 {
+
390 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
+
391 (void)w25qxx_deinit(&gs_handle);
+
392
+
393 return 1;
+
394 }
+
395 for (j = 0; j < 256; j += 8)
+
396 {
+
397 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
398 j , j + 7,
+
399 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
+
400 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
+
401 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
+
402 }
403
-
404 /* security register1 write and read test */
-
405 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
-
406 if (res != 0)
-
407 {
-
408 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
409 (void)w25qxx_deinit(&gs_handle);
-
410
-
411 return 1;
-
412 }
-
413 for (j = 0; j < 256; j++)
-
414 {
-
415 gs_buffer_input[j] = rand() %256;
-
416 }
-
417 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
-
418 if (res != 0)
-
419 {
-
420 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
421 (void)w25qxx_deinit(&gs_handle);
-
422
-
423 return 1;
-
424 }
-
425 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
-
426 if (res != 0)
-
427 {
-
428 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
429 (void)w25qxx_deinit(&gs_handle);
-
430
-
431 return 1;
-
432 }
-
433 for (j = 0; j < 256; j++)
-
434 {
-
435 if (gs_buffer_input[j] != gs_buffer_output[j])
-
436 {
-
437 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
438 (void)w25qxx_deinit(&gs_handle);
-
439
-
440 return 1;
-
441 }
-
442 }
-
443 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
-
444
-
445 /* security register2 write and read test */
-
446 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
404 /* security register1 write and read test */
+
405 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
406
+
407 /* security register1 write and read test */
+
408 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
+
409 if (res != 0)
+
410 {
+
411 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
412 (void)w25qxx_deinit(&gs_handle);
+
413
+
414 return 1;
+
415 }
+
416 for (j = 0; j < 256; j++)
+
417 {
+
418 gs_buffer_input[j] = rand() %256;
+
419 }
+
420 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
+
421 if (res != 0)
+
422 {
+
423 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
424 (void)w25qxx_deinit(&gs_handle);
+
425
+
426 return 1;
+
427 }
+
428 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
+
429 if (res != 0)
+
430 {
+
431 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
432 (void)w25qxx_deinit(&gs_handle);
+
433
+
434 return 1;
+
435 }
+
436 for (j = 0; j < 256; j++)
+
437 {
+
438 if (gs_buffer_input[j] != gs_buffer_output[j])
+
439 {
+
440 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
441 (void)w25qxx_deinit(&gs_handle);
+
442
+
443 return 1;
+
444 }
+
445 }
+
446 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
447
-
448 /* security register2 write and read test */
-
449 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
-
450 if (res != 0)
-
451 {
-
452 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
453 (void)w25qxx_deinit(&gs_handle);
-
454
-
455 return 1;
-
456 }
-
457 for (j = 0; j < 256; j++)
-
458 {
-
459 gs_buffer_input[j] = rand() %256;
-
460 }
-
461 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
-
462 if (res != 0)
-
463 {
-
464 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
465 (void)w25qxx_deinit(&gs_handle);
-
466
-
467 return 1;
-
468 }
-
469 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
-
470 if (res != 0)
-
471 {
-
472 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
473 (void)w25qxx_deinit(&gs_handle);
-
474
-
475 return 1;
-
476 }
-
477 for (j = 0; j < 256; j++)
-
478 {
-
479 if (gs_buffer_input[j] != gs_buffer_output[j])
-
480 {
-
481 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
482 (void)w25qxx_deinit(&gs_handle);
-
483
-
484 return 1;
-
485 }
-
486 }
-
487 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
-
488
-
489 /* security register3 write and read test */
-
490 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
-
491
-
492 /* security register3 write and read test */
-
493 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
-
494 if (res != 0)
-
495 {
-
496 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
497 (void)w25qxx_deinit(&gs_handle);
-
498
-
499 return 1;
-
500 }
-
501 for (j = 0; j < 256; j++)
-
502 {
-
503 gs_buffer_input[j] = rand() %256;
-
504 }
-
505 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
-
506 if (res != 0)
-
507 {
-
508 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
509 (void)w25qxx_deinit(&gs_handle);
-
510
-
511 return 1;
-
512 }
-
513 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
-
514 if (res != 0)
-
515 {
-
516 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
517 (void)w25qxx_deinit(&gs_handle);
-
518
-
519 return 1;
-
520 }
-
521 for (j = 0; j < 256; j++)
-
522 {
-
523 if (gs_buffer_input[j] != gs_buffer_output[j])
-
524 {
-
525 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
526 (void)w25qxx_deinit(&gs_handle);
-
527
-
528 return 1;
-
529 }
-
530 }
-
531 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
-
532
-
533 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
-
534 /* start chip erasing */
-
535 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
-
536
-
537 /* chip erase */
-
538 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
-
539 res = w25qxx_chip_erase(&gs_handle);
-
540 if (res != 0)
-
541 {
-
542 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
-
543 (void)w25qxx_deinit(&gs_handle);
-
544
-
545 return 1;
-
546 }
-
547 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
-
548 #endif
-
549
-
550 if (type >= W25Q256)
-
551 {
-
552 /* set address mode 4 byte */
-
553 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
554
+
448 /* security register2 write and read test */
+
449 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
450
+
451 /* security register2 write and read test */
+
452 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
+
453 if (res != 0)
+
454 {
+
455 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
456 (void)w25qxx_deinit(&gs_handle);
+
457
+
458 return 1;
+
459 }
+
460 for (j = 0; j < 256; j++)
+
461 {
+
462 gs_buffer_input[j] = rand() %256;
+
463 }
+
464 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
+
465 if (res != 0)
+
466 {
+
467 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
468 (void)w25qxx_deinit(&gs_handle);
+
469
+
470 return 1;
+
471 }
+
472 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
+
473 if (res != 0)
+
474 {
+
475 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
476 (void)w25qxx_deinit(&gs_handle);
+
477
+
478 return 1;
+
479 }
+
480 for (j = 0; j < 256; j++)
+
481 {
+
482 if (gs_buffer_input[j] != gs_buffer_output[j])
+
483 {
+
484 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
485 (void)w25qxx_deinit(&gs_handle);
+
486
+
487 return 1;
+
488 }
+
489 }
+
490 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
+
491
+
492 /* security register3 write and read test */
+
493 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
+
494
+
495 /* security register3 write and read test */
+
496 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
+
497 if (res != 0)
+
498 {
+
499 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
500 (void)w25qxx_deinit(&gs_handle);
+
501
+
502 return 1;
+
503 }
+
504 for (j = 0; j < 256; j++)
+
505 {
+
506 gs_buffer_input[j] = rand() %256;
+
507 }
+
508 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
+
509 if (res != 0)
+
510 {
+
511 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
512 (void)w25qxx_deinit(&gs_handle);
+
513
+
514 return 1;
+
515 }
+
516 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
+
517 if (res != 0)
+
518 {
+
519 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
520 (void)w25qxx_deinit(&gs_handle);
+
521
+
522 return 1;
+
523 }
+
524 for (j = 0; j < 256; j++)
+
525 {
+
526 if (gs_buffer_input[j] != gs_buffer_output[j])
+
527 {
+
528 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
529 (void)w25qxx_deinit(&gs_handle);
+
530
+
531 return 1;
+
532 }
+
533 }
+
534 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
+
535
+
536 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
+
537 /* start chip erasing */
+
538 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
+
539
+
540 /* chip erase */
+
541 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
+
542 res = w25qxx_chip_erase(&gs_handle);
+
543 if (res != 0)
+
544 {
+
545 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
+
546 (void)w25qxx_deinit(&gs_handle);
+
547
+
548 return 1;
+
549 }
+
550 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
+
551 #endif
+
552
+
553 if (type >= W25Q256)
+
554 {
555 /* set address mode 4 byte */
-
556 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
557 if (res != 0)
-
558 {
-
559 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
560 (void)w25qxx_deinit(&gs_handle);
-
561
-
562 return 1;
-
563 }
-
564
-
565 /* w25qxx_write/w25qxx_read test */
-
566 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
556 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
557
+
558 /* set address mode 4 byte */
+
559 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
560 if (res != 0)
+
561 {
+
562 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
563 (void)w25qxx_deinit(&gs_handle);
+
564
+
565 return 1;
+
566 }
567
-
568 for (addr = 0; addr < size; addr += step)
-
569 {
-
570 for (j = 0; j < 600; j++)
-
571 {
-
572 gs_buffer_input[j] = rand() %256;
-
573 }
-
574 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
575 if (res != 0)
-
576 {
-
577 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
578 (void)w25qxx_deinit(&gs_handle);
-
579
-
580 return 1;
-
581 }
-
582 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
583 if (res != 0)
-
584 {
-
585 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
586 (void)w25qxx_deinit(&gs_handle);
-
587
-
588 return 1;
-
589 }
-
590 for (j = 0; j < 600; j++)
-
591 {
-
592 if (gs_buffer_input[j] != gs_buffer_output[j])
-
593 {
-
594 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
595 (void)w25qxx_deinit(&gs_handle);
-
596
-
597 return 1;
-
598 }
-
599 }
-
600 w25qxx_interface_debug_print("w25qxx: %d/%d successful.\n", addr, size);
-
601 }
-
602
-
603 /* w25qxx_sector_erase_4k test */
-
604 addr = (rand() % 10) * 4 * 1024;
-
605 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
606 res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
607 if (res != 0)
-
608 {
-
609 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
610 (void)w25qxx_deinit(&gs_handle);
-
611
-
612 return 1;
-
613 }
-
614 for (j = 0; j < 256; j++)
-
615 {
-
616 gs_buffer_input[j] = rand() %256;
-
617 }
-
618
-
619 /* w25qxx_page_program */
-
620 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
621 if (res != 0)
-
622 {
-
623 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
624 (void)w25qxx_deinit(&gs_handle);
-
625
-
626 return 1;
-
627 }
-
628
-
629 /* w25qxx_only_spi_read */
-
630 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
631 if (res != 0)
-
632 {
-
633 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
634 (void)w25qxx_deinit(&gs_handle);
-
635
-
636 return 1;
-
637 }
-
638 for (j = 0; j < 256; j++)
-
639 {
-
640 if (gs_buffer_input[j] != gs_buffer_output[j])
-
641 {
-
642 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
643 (void)w25qxx_deinit(&gs_handle);
-
644
-
645 return 1;
-
646 }
-
647 }
-
648 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
649
-
650 /* w25qxx_fast_read */
-
651 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
652 if (res != 0)
-
653 {
-
654 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
655 (void)w25qxx_deinit(&gs_handle);
-
656
-
657 return 1;
-
658 }
-
659 for (j = 0; j < 256; j++)
-
660 {
-
661 if (gs_buffer_input[j] != gs_buffer_output[j])
-
662 {
-
663 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
664 (void)w25qxx_deinit(&gs_handle);
-
665
-
666 return 1;
-
667 }
-
668 }
-
669 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
670
-
671 /* w25qxx_block_erase_32k test */
-
672 addr = (rand() % 10) * 32 * 1024;
-
673 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
674 res = w25qxx_block_erase_32k(&gs_handle, addr);
-
675 if (res != 0)
-
676 {
-
677 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
678 (void)w25qxx_deinit(&gs_handle);
-
679
-
680 return 1;
-
681 }
-
682 for (j = 0; j < 256; j++)
-
683 {
-
684 gs_buffer_input[j] = rand() %256;
-
685 }
-
686
-
687 /* w25qxx_page_program */
-
688 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
689 if (res != 0)
-
690 {
-
691 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
692 (void)w25qxx_deinit(&gs_handle);
-
693
-
694 return 1;
-
695 }
-
696
-
697 /* w25qxx_only_spi_read */
-
698 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
699 if (res != 0)
-
700 {
-
701 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
702 (void)w25qxx_deinit(&gs_handle);
-
703
-
704 return 1;
-
705 }
-
706 for (j = 0; j < 256; j++)
-
707 {
-
708 if (gs_buffer_input[j] != gs_buffer_output[j])
-
709 {
-
710 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
711 (void)w25qxx_deinit(&gs_handle);
-
712
-
713 return 1;
-
714 }
-
715 }
-
716 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
717
-
718 /* w25qxx_fast_read */
-
719 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
720 if (res != 0)
-
721 {
-
722 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
723 (void)w25qxx_deinit(&gs_handle);
-
724
-
725 return 1;
-
726 }
-
727 for (j = 0; j < 256; j++)
-
728 {
-
729 if (gs_buffer_input[j] != gs_buffer_output[j])
-
730 {
-
731 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
732 (void)w25qxx_deinit(&gs_handle);
-
733
-
734 return 1;
-
735 }
-
736 }
-
737 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
738
-
739 /* w25qxx_block_erase_64k test */
-
740 addr = (rand() % 10) * 64 * 1024;
-
741 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
742 res = w25qxx_block_erase_64k(&gs_handle, addr);
-
743 if (res != 0)
-
744 {
-
745 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
746 (void)w25qxx_deinit(&gs_handle);
-
747
-
748 return 1;
-
749 }
-
750 for (j = 0; j < 256; j++)
-
751 {
-
752 gs_buffer_input[j] = rand() %256;
-
753 }
-
754
-
755 /* w25qxx_page_program */
-
756 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
757 if (res != 0)
-
758 {
-
759 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
760 (void)w25qxx_deinit(&gs_handle);
-
761
-
762 return 1;
-
763 }
-
764
-
765 /* w25qxx_only_spi_read */
-
766 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
-
767 if (res != 0)
-
768 {
-
769 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
-
770 (void)w25qxx_deinit(&gs_handle);
-
771
-
772 return 1;
-
773 }
-
774 for (j = 0; j < 256; j++)
-
775 {
-
776 if (gs_buffer_input[j] != gs_buffer_output[j])
-
777 {
-
778 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
779 (void)w25qxx_deinit(&gs_handle);
-
780
-
781 return 1;
-
782 }
-
783 }
-
784 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
-
785
-
786 /* w25qxx_fast_read */
-
787 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
788 if (res != 0)
-
789 {
-
790 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
791 (void)w25qxx_deinit(&gs_handle);
-
792
-
793 return 1;
-
794 }
-
795 for (j = 0; j < 256; j++)
-
796 {
-
797 if (gs_buffer_input[j] != gs_buffer_output[j])
-
798 {
-
799 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
800 (void)w25qxx_deinit(&gs_handle);
-
801
-
802 return 1;
-
803 }
-
804 }
-
805 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
806
-
807 /* get sfdp */
-
808 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
-
809 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
-
810 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
-
811 if (res != 0)
-
812 {
-
813 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
-
814 (void)w25qxx_deinit(&gs_handle);
-
815
-
816 return 1;
-
817 }
-
818 for (j = 0; j < 256; j += 8)
-
819 {
-
820 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
-
821 j , j + 7,
-
822 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
-
823 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
-
824 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
-
825 }
-
826
-
827 /* security register1 write and read test */
-
828 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
568 /* w25qxx_write/w25qxx_read test */
+
569 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
570
+
571 for (addr = 0; addr < size; addr += step)
+
572 {
+
573 for (j = 0; j < 600; j++)
+
574 {
+
575 gs_buffer_input[j] = rand() %256;
+
576 }
+
577 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
578 if (res != 0)
+
579 {
+
580 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
581 (void)w25qxx_deinit(&gs_handle);
+
582
+
583 return 1;
+
584 }
+
585 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
586 if (res != 0)
+
587 {
+
588 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
589 (void)w25qxx_deinit(&gs_handle);
+
590
+
591 return 1;
+
592 }
+
593 for (j = 0; j < 600; j++)
+
594 {
+
595 if (gs_buffer_input[j] != gs_buffer_output[j])
+
596 {
+
597 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
598 (void)w25qxx_deinit(&gs_handle);
+
599
+
600 return 1;
+
601 }
+
602 }
+
603 w25qxx_interface_debug_print("w25qxx: %d/%d successful.\n", addr, size);
+
604 }
+
605
+
606 /* w25qxx_sector_erase_4k test */
+
607 addr = (rand() % 10) * 4 * 1024;
+
608 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
609 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
610 if (res != 0)
+
611 {
+
612 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
613 (void)w25qxx_deinit(&gs_handle);
+
614
+
615 return 1;
+
616 }
+
617 for (j = 0; j < 256; j++)
+
618 {
+
619 gs_buffer_input[j] = rand() %256;
+
620 }
+
621
+
622 /* w25qxx_page_program */
+
623 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
624 if (res != 0)
+
625 {
+
626 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
627 (void)w25qxx_deinit(&gs_handle);
+
628
+
629 return 1;
+
630 }
+
631
+
632 /* w25qxx_only_spi_read */
+
633 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
634 if (res != 0)
+
635 {
+
636 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
637 (void)w25qxx_deinit(&gs_handle);
+
638
+
639 return 1;
+
640 }
+
641 for (j = 0; j < 256; j++)
+
642 {
+
643 if (gs_buffer_input[j] != gs_buffer_output[j])
+
644 {
+
645 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
646 (void)w25qxx_deinit(&gs_handle);
+
647
+
648 return 1;
+
649 }
+
650 }
+
651 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
652
+
653 /* w25qxx_fast_read */
+
654 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
655 if (res != 0)
+
656 {
+
657 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
658 (void)w25qxx_deinit(&gs_handle);
+
659
+
660 return 1;
+
661 }
+
662 for (j = 0; j < 256; j++)
+
663 {
+
664 if (gs_buffer_input[j] != gs_buffer_output[j])
+
665 {
+
666 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
667 (void)w25qxx_deinit(&gs_handle);
+
668
+
669 return 1;
+
670 }
+
671 }
+
672 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
673
+
674 /* w25qxx_block_erase_32k test */
+
675 addr = (rand() % 10) * 32 * 1024;
+
676 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
677 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
678 if (res != 0)
+
679 {
+
680 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
681 (void)w25qxx_deinit(&gs_handle);
+
682
+
683 return 1;
+
684 }
+
685 for (j = 0; j < 256; j++)
+
686 {
+
687 gs_buffer_input[j] = rand() %256;
+
688 }
+
689
+
690 /* w25qxx_page_program */
+
691 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
692 if (res != 0)
+
693 {
+
694 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
695 (void)w25qxx_deinit(&gs_handle);
+
696
+
697 return 1;
+
698 }
+
699
+
700 /* w25qxx_only_spi_read */
+
701 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
702 if (res != 0)
+
703 {
+
704 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
705 (void)w25qxx_deinit(&gs_handle);
+
706
+
707 return 1;
+
708 }
+
709 for (j = 0; j < 256; j++)
+
710 {
+
711 if (gs_buffer_input[j] != gs_buffer_output[j])
+
712 {
+
713 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
714 (void)w25qxx_deinit(&gs_handle);
+
715
+
716 return 1;
+
717 }
+
718 }
+
719 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
720
+
721 /* w25qxx_fast_read */
+
722 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
723 if (res != 0)
+
724 {
+
725 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
726 (void)w25qxx_deinit(&gs_handle);
+
727
+
728 return 1;
+
729 }
+
730 for (j = 0; j < 256; j++)
+
731 {
+
732 if (gs_buffer_input[j] != gs_buffer_output[j])
+
733 {
+
734 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
735 (void)w25qxx_deinit(&gs_handle);
+
736
+
737 return 1;
+
738 }
+
739 }
+
740 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
741
+
742 /* w25qxx_block_erase_64k test */
+
743 addr = (rand() % 10) * 64 * 1024;
+
744 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
745 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
746 if (res != 0)
+
747 {
+
748 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
749 (void)w25qxx_deinit(&gs_handle);
+
750
+
751 return 1;
+
752 }
+
753 for (j = 0; j < 256; j++)
+
754 {
+
755 gs_buffer_input[j] = rand() %256;
+
756 }
+
757
+
758 /* w25qxx_page_program */
+
759 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
760 if (res != 0)
+
761 {
+
762 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
763 (void)w25qxx_deinit(&gs_handle);
+
764
+
765 return 1;
+
766 }
+
767
+
768 /* w25qxx_only_spi_read */
+
769 res = w25qxx_only_spi_read(&gs_handle, addr, gs_buffer_output, 256);
+
770 if (res != 0)
+
771 {
+
772 w25qxx_interface_debug_print("w25qxx: only spi read failed.\n");
+
773 (void)w25qxx_deinit(&gs_handle);
+
774
+
775 return 1;
+
776 }
+
777 for (j = 0; j < 256; j++)
+
778 {
+
779 if (gs_buffer_input[j] != gs_buffer_output[j])
+
780 {
+
781 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
782 (void)w25qxx_deinit(&gs_handle);
+
783
+
784 return 1;
+
785 }
+
786 }
+
787 w25qxx_interface_debug_print("w25qxx: only spi read test passed.\n");
+
788
+
789 /* w25qxx_fast_read */
+
790 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
791 if (res != 0)
+
792 {
+
793 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
794 (void)w25qxx_deinit(&gs_handle);
+
795
+
796 return 1;
+
797 }
+
798 for (j = 0; j < 256; j++)
+
799 {
+
800 if (gs_buffer_input[j] != gs_buffer_output[j])
+
801 {
+
802 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
803 (void)w25qxx_deinit(&gs_handle);
+
804
+
805 return 1;
+
806 }
+
807 }
+
808 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
809
+
810 /* get sfdp */
+
811 w25qxx_interface_debug_print("w25qxx: get sfdp.\n");
+
812 memset(gs_buffer_output, 0, sizeof(uint8_t) * 256);
+
813 res = w25qxx_get_sfdp(&gs_handle, (uint8_t *)gs_buffer_output);
+
814 if (res != 0)
+
815 {
+
816 w25qxx_interface_debug_print("w25qxx: get sfdp failed.\n");
+
817 (void)w25qxx_deinit(&gs_handle);
+
818
+
819 return 1;
+
820 }
+
821 for (j = 0; j < 256; j += 8)
+
822 {
+
823 w25qxx_interface_debug_print("w25qxx: sdfp[%d-%d] is 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X 0x%02X.\n",
+
824 j , j + 7,
+
825 gs_buffer_output[j + 0], gs_buffer_output[j + 1], gs_buffer_output[j + 2],
+
826 gs_buffer_output[j + 3], gs_buffer_output[j + 4], gs_buffer_output[j + 5],
+
827 gs_buffer_output[j + 6], gs_buffer_output[j + 7]);
+
828 }
829
-
830 /* security register1 write and read test */
-
831 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
-
832 if (res != 0)
-
833 {
-
834 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
835 (void)w25qxx_deinit(&gs_handle);
-
836
-
837 return 1;
-
838 }
-
839 for (j = 0; j < 256; j++)
-
840 {
-
841 gs_buffer_input[j] = rand() %256;
-
842 }
-
843 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
-
844 if (res != 0)
-
845 {
-
846 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
847 (void)w25qxx_deinit(&gs_handle);
-
848
-
849 return 1;
-
850 }
-
851 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
-
852 if (res != 0)
-
853 {
-
854 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
855 (void)w25qxx_deinit(&gs_handle);
-
856
-
857 return 1;
-
858 }
-
859 for (j = 0; j < 256; j++)
-
860 {
-
861 if (gs_buffer_input[j] != gs_buffer_output[j])
-
862 {
-
863 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
864 (void)w25qxx_deinit(&gs_handle);
-
865
-
866 return 1;
-
867 }
-
868 }
-
869 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
-
870
-
871 /* security register2 write and read test */
-
872 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
830 /* security register1 write and read test */
+
831 w25qxx_interface_debug_print("w25qxx: security register1 write and read test.\n");
+
832
+
833 /* security register1 write and read test */
+
834 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1);
+
835 if (res != 0)
+
836 {
+
837 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
838 (void)w25qxx_deinit(&gs_handle);
+
839
+
840 return 1;
+
841 }
+
842 for (j = 0; j < 256; j++)
+
843 {
+
844 gs_buffer_input[j] = rand() %256;
+
845 }
+
846 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_input);
+
847 if (res != 0)
+
848 {
+
849 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
850 (void)w25qxx_deinit(&gs_handle);
+
851
+
852 return 1;
+
853 }
+
854 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_1, gs_buffer_output);
+
855 if (res != 0)
+
856 {
+
857 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
858 (void)w25qxx_deinit(&gs_handle);
+
859
+
860 return 1;
+
861 }
+
862 for (j = 0; j < 256; j++)
+
863 {
+
864 if (gs_buffer_input[j] != gs_buffer_output[j])
+
865 {
+
866 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
867 (void)w25qxx_deinit(&gs_handle);
+
868
+
869 return 1;
+
870 }
+
871 }
+
872 w25qxx_interface_debug_print("w25qxx: security register1 check passed.\n");
873
-
874 /* security register2 write and read test */
-
875 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
-
876 if (res != 0)
-
877 {
-
878 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
879 (void)w25qxx_deinit(&gs_handle);
-
880
-
881 return 1;
-
882 }
-
883 for (j = 0; j < 256; j++)
-
884 {
-
885 gs_buffer_input[j] = rand() %256;
-
886 }
-
887 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
-
888 if (res != 0)
-
889 {
-
890 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
891 (void)w25qxx_deinit(&gs_handle);
-
892
-
893 return 1;
-
894 }
-
895 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
-
896 if (res != 0)
-
897 {
-
898 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
899 (void)w25qxx_deinit(&gs_handle);
-
900
-
901 return 1;
-
902 }
-
903 for (j = 0; j < 256; j++)
-
904 {
-
905 if (gs_buffer_input[j] != gs_buffer_output[j])
-
906 {
-
907 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
908 (void)w25qxx_deinit(&gs_handle);
-
909
-
910 return 1;
-
911 }
-
912 }
-
913 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
-
914
-
915 /* security register3 write and read test */
-
916 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
-
917
-
918 /* security register3 write and read test */
-
919 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
-
920 if (res != 0)
-
921 {
-
922 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
-
923 (void)w25qxx_deinit(&gs_handle);
-
924
-
925 return 1;
-
926 }
-
927 for (j = 0; j < 256; j++)
-
928 {
-
929 gs_buffer_input[j] = rand() %256;
-
930 }
-
931 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
-
932 if (res != 0)
-
933 {
-
934 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
-
935 (void)w25qxx_deinit(&gs_handle);
-
936
-
937 return 1;
-
938 }
-
939 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
-
940 if (res != 0)
-
941 {
-
942 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
-
943 (void)w25qxx_deinit(&gs_handle);
-
944
-
945 return 1;
-
946 }
-
947 for (j = 0; j < 256; j++)
-
948 {
-
949 if (gs_buffer_input[j] != gs_buffer_output[j])
-
950 {
-
951 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
952 (void)w25qxx_deinit(&gs_handle);
-
953
-
954 return 1;
-
955 }
-
956 }
-
957 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
-
958
-
959 /* set address mode 3 byte */
-
960 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
874 /* security register2 write and read test */
+
875 w25qxx_interface_debug_print("w25qxx: security register2 write and read test.\n");
+
876
+
877 /* security register2 write and read test */
+
878 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2);
+
879 if (res != 0)
+
880 {
+
881 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
882 (void)w25qxx_deinit(&gs_handle);
+
883
+
884 return 1;
+
885 }
+
886 for (j = 0; j < 256; j++)
+
887 {
+
888 gs_buffer_input[j] = rand() %256;
+
889 }
+
890 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_input);
+
891 if (res != 0)
+
892 {
+
893 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
894 (void)w25qxx_deinit(&gs_handle);
+
895
+
896 return 1;
+
897 }
+
898 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_2, gs_buffer_output);
+
899 if (res != 0)
+
900 {
+
901 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
902 (void)w25qxx_deinit(&gs_handle);
+
903
+
904 return 1;
+
905 }
+
906 for (j = 0; j < 256; j++)
+
907 {
+
908 if (gs_buffer_input[j] != gs_buffer_output[j])
+
909 {
+
910 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
911 (void)w25qxx_deinit(&gs_handle);
+
912
+
913 return 1;
+
914 }
+
915 }
+
916 w25qxx_interface_debug_print("w25qxx: security register2 check passed.\n");
+
917
+
918 /* security register3 write and read test */
+
919 w25qxx_interface_debug_print("w25qxx: security register3 write and read test.\n");
+
920
+
921 /* security register3 write and read test */
+
922 res = w25qxx_erase_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3);
+
923 if (res != 0)
+
924 {
+
925 w25qxx_interface_debug_print("w25qxx: erase security register failed.\n");
+
926 (void)w25qxx_deinit(&gs_handle);
+
927
+
928 return 1;
+
929 }
+
930 for (j = 0; j < 256; j++)
+
931 {
+
932 gs_buffer_input[j] = rand() %256;
+
933 }
+
934 res = w25qxx_program_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_input);
+
935 if (res != 0)
+
936 {
+
937 w25qxx_interface_debug_print("w25qxx: program security register failed.\n");
+
938 (void)w25qxx_deinit(&gs_handle);
+
939
+
940 return 1;
+
941 }
+
942 res = w25qxx_read_security_register(&gs_handle, W25QXX_SECURITY_REGISTER_3, gs_buffer_output);
+
943 if (res != 0)
+
944 {
+
945 w25qxx_interface_debug_print("w25qxx: read security register failed.\n");
+
946 (void)w25qxx_deinit(&gs_handle);
+
947
+
948 return 1;
+
949 }
+
950 for (j = 0; j < 256; j++)
+
951 {
+
952 if (gs_buffer_input[j] != gs_buffer_output[j])
+
953 {
+
954 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
955 (void)w25qxx_deinit(&gs_handle);
+
956
+
957 return 1;
+
958 }
+
959 }
+
960 w25qxx_interface_debug_print("w25qxx: security register3 check passed.\n");
961
962 /* set address mode 3 byte */
-
963 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
964 if (res != 0)
-
965 {
-
966 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
967 (void)w25qxx_deinit(&gs_handle);
-
968
-
969 return 1;
-
970 }
-
971 }
-
972 }
-
973 else
-
974 {
-
975 uint32_t size;
-
976 uint32_t addr, step, j;
-
977
-
978 size = gsc_size[type - W25Q80];
-
979 step = size / 16;
+
963 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
964
+
965 /* set address mode 3 byte */
+
966 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
967 if (res != 0)
+
968 {
+
969 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
970 (void)w25qxx_deinit(&gs_handle);
+
971
+
972 return 1;
+
973 }
+
974 }
+
975 }
+
976 else
+
977 {
+
978 uint32_t size;
+
979 uint32_t addr, step, j;
980
-
981 /* w25qxx_write/w25qxx_read test */
-
982 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
981 size = gsc_size[type - W25Q10];
+
982 step = size / 16;
983
-
984 for (addr = 0; addr < size; addr += step)
-
985 {
-
986 for (j = 0; j < 600; j++)
-
987 {
-
988 gs_buffer_input[j] = rand() %256;
-
989 }
-
990 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
991 if (res != 0)
-
992 {
-
993 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
994 (void)w25qxx_deinit(&gs_handle);
-
995
-
996 return 1;
-
997 }
-
998 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
999 if (res != 0)
-
1000 {
-
1001 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1002 (void)w25qxx_deinit(&gs_handle);
-
1003
-
1004 return 1;
-
1005 }
-
1006 for (j = 0; j < 600; j++)
-
1007 {
-
1008 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1009 {
-
1010 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1011 (void)w25qxx_deinit(&gs_handle);
-
1012
-
1013 return 1;
-
1014 }
-
1015 }
-
1016 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1017 }
-
1018
-
1019 /* w25qxx_sector_erase_4k test */
-
1020 addr = (rand() % 10) * 4 * 1024;
-
1021 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
1022 res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
1023 if (res != 0)
-
1024 {
-
1025 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1026 (void)w25qxx_deinit(&gs_handle);
-
1027
-
1028 return 1;
-
1029 }
-
1030 for (j = 0; j < 256; j++)
-
1031 {
-
1032 gs_buffer_input[j] = rand() %256;
-
1033 }
-
1034
-
1035 /* w25qxx_page_program */
-
1036 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1037 if (res != 0)
-
1038 {
-
1039 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1040 (void)w25qxx_deinit(&gs_handle);
-
1041
-
1042 return 1;
-
1043 }
-
1044
-
1045 /* w25qxx_fast_read */
-
1046 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1047 if (res != 0)
-
1048 {
-
1049 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1050 (void)w25qxx_deinit(&gs_handle);
-
1051
-
1052 return 1;
-
1053 }
-
1054 for (j = 0; j < 256; j++)
-
1055 {
-
1056 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1057 {
-
1058 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1059 (void)w25qxx_deinit(&gs_handle);
-
1060
-
1061 return 1;
-
1062 }
-
1063 }
-
1064 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1065
-
1066 /* w25qxx_block_erase_32k test */
-
1067 addr = (rand() % 10) * 32 * 1024;
-
1068 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
1069 res = w25qxx_block_erase_32k(&gs_handle, addr);
-
1070 if (res != 0)
-
1071 {
-
1072 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
1073 (void)w25qxx_deinit(&gs_handle);
-
1074
-
1075 return 1;
-
1076 }
-
1077 for (j = 0; j < 256; j++)
-
1078 {
-
1079 gs_buffer_input[j] = rand() %256;
-
1080 }
-
1081
-
1082 /* w25qxx_page_program */
-
1083 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1084 if (res != 0)
-
1085 {
-
1086 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1087 (void)w25qxx_deinit(&gs_handle);
-
1088
-
1089 return 1;
-
1090 }
-
1091
-
1092 /* w25qxx_fast_read */
-
1093 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1094 if (res != 0)
-
1095 {
-
1096 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1097 (void)w25qxx_deinit(&gs_handle);
-
1098
-
1099 return 1;
-
1100 }
-
1101 for (j = 0; j < 256; j++)
-
1102 {
-
1103 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1104 {
-
1105 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1106 (void)w25qxx_deinit(&gs_handle);
-
1107
-
1108 return 1;
-
1109 }
-
1110 }
-
1111 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1112
-
1113 /* w25qxx_block_erase_64k test */
-
1114 addr = (rand() % 10) * 64 * 1024;
-
1115 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
1116 res = w25qxx_block_erase_64k(&gs_handle, addr);
-
1117 if (res != 0)
-
1118 {
-
1119 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
1120 (void)w25qxx_deinit(&gs_handle);
-
1121
-
1122 return 1;
-
1123 }
-
1124 for (j = 0; j < 256; j++)
-
1125 {
-
1126 gs_buffer_input[j] = rand() %256;
-
1127 }
-
1128
-
1129 /* w25qxx_page_program */
-
1130 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1131 if (res != 0)
-
1132 {
-
1133 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1134 (void)w25qxx_deinit(&gs_handle);
-
1135
-
1136 return 1;
-
1137 }
-
1138
-
1139 /* w25qxx_fast_read */
-
1140 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1141 if (res != 0)
-
1142 {
-
1143 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1144 (void)w25qxx_deinit(&gs_handle);
-
1145
-
1146 return 1;
-
1147 }
-
1148 for (j = 0; j < 256; j++)
-
1149 {
-
1150 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1151 {
-
1152 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1153 (void)w25qxx_deinit(&gs_handle);
-
1154
-
1155 return 1;
-
1156 }
-
1157 }
-
1158 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1159
-
1160 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
-
1161 /* start chip erasing */
-
1162 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
-
1163
-
1164 /* chip erase */
-
1165 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
-
1166 res = w25qxx_chip_erase(&gs_handle);
-
1167 if (res != 0)
-
1168 {
-
1169 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
-
1170 (void)w25qxx_deinit(&gs_handle);
-
1171
-
1172 return 1;
-
1173 }
-
1174 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
-
1175 #endif
-
1176
-
1177 if (type >= W25Q256)
-
1178 {
-
1179 /* set address mode 4 byte */
-
1180 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1181
+
984 /* w25qxx_write/w25qxx_read test */
+
985 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
986
+
987 for (addr = 0; addr < size; addr += step)
+
988 {
+
989 for (j = 0; j < 600; j++)
+
990 {
+
991 gs_buffer_input[j] = rand() %256;
+
992 }
+
993 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
994 if (res != 0)
+
995 {
+
996 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
997 (void)w25qxx_deinit(&gs_handle);
+
998
+
999 return 1;
+
1000 }
+
1001 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1002 if (res != 0)
+
1003 {
+
1004 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1005 (void)w25qxx_deinit(&gs_handle);
+
1006
+
1007 return 1;
+
1008 }
+
1009 for (j = 0; j < 600; j++)
+
1010 {
+
1011 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1012 {
+
1013 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1014 (void)w25qxx_deinit(&gs_handle);
+
1015
+
1016 return 1;
+
1017 }
+
1018 }
+
1019 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1020 }
+
1021
+
1022 /* w25qxx_sector_erase_4k test */
+
1023 addr = (rand() % 10) * 4 * 1024;
+
1024 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
1025 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
1026 if (res != 0)
+
1027 {
+
1028 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1029 (void)w25qxx_deinit(&gs_handle);
+
1030
+
1031 return 1;
+
1032 }
+
1033 for (j = 0; j < 256; j++)
+
1034 {
+
1035 gs_buffer_input[j] = rand() %256;
+
1036 }
+
1037
+
1038 /* w25qxx_page_program */
+
1039 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1040 if (res != 0)
+
1041 {
+
1042 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1043 (void)w25qxx_deinit(&gs_handle);
+
1044
+
1045 return 1;
+
1046 }
+
1047
+
1048 /* w25qxx_fast_read */
+
1049 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1050 if (res != 0)
+
1051 {
+
1052 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1053 (void)w25qxx_deinit(&gs_handle);
+
1054
+
1055 return 1;
+
1056 }
+
1057 for (j = 0; j < 256; j++)
+
1058 {
+
1059 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1060 {
+
1061 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1062 (void)w25qxx_deinit(&gs_handle);
+
1063
+
1064 return 1;
+
1065 }
+
1066 }
+
1067 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1068
+
1069 /* w25qxx_block_erase_32k test */
+
1070 addr = (rand() % 10) * 32 * 1024;
+
1071 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
1072 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
1073 if (res != 0)
+
1074 {
+
1075 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
1076 (void)w25qxx_deinit(&gs_handle);
+
1077
+
1078 return 1;
+
1079 }
+
1080 for (j = 0; j < 256; j++)
+
1081 {
+
1082 gs_buffer_input[j] = rand() %256;
+
1083 }
+
1084
+
1085 /* w25qxx_page_program */
+
1086 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1087 if (res != 0)
+
1088 {
+
1089 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1090 (void)w25qxx_deinit(&gs_handle);
+
1091
+
1092 return 1;
+
1093 }
+
1094
+
1095 /* w25qxx_fast_read */
+
1096 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1097 if (res != 0)
+
1098 {
+
1099 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1100 (void)w25qxx_deinit(&gs_handle);
+
1101
+
1102 return 1;
+
1103 }
+
1104 for (j = 0; j < 256; j++)
+
1105 {
+
1106 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1107 {
+
1108 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1109 (void)w25qxx_deinit(&gs_handle);
+
1110
+
1111 return 1;
+
1112 }
+
1113 }
+
1114 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1115
+
1116 /* w25qxx_block_erase_64k test */
+
1117 addr = (rand() % 10) * 64 * 1024;
+
1118 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
1119 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
1120 if (res != 0)
+
1121 {
+
1122 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
1123 (void)w25qxx_deinit(&gs_handle);
+
1124
+
1125 return 1;
+
1126 }
+
1127 for (j = 0; j < 256; j++)
+
1128 {
+
1129 gs_buffer_input[j] = rand() %256;
+
1130 }
+
1131
+
1132 /* w25qxx_page_program */
+
1133 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1134 if (res != 0)
+
1135 {
+
1136 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1137 (void)w25qxx_deinit(&gs_handle);
+
1138
+
1139 return 1;
+
1140 }
+
1141
+
1142 /* w25qxx_fast_read */
+
1143 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1144 if (res != 0)
+
1145 {
+
1146 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1147 (void)w25qxx_deinit(&gs_handle);
+
1148
+
1149 return 1;
+
1150 }
+
1151 for (j = 0; j < 256; j++)
+
1152 {
+
1153 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1154 {
+
1155 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1156 (void)w25qxx_deinit(&gs_handle);
+
1157
+
1158 return 1;
+
1159 }
+
1160 }
+
1161 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1162
+
1163 #if (W25QXX_ENABLE_ERASE_READ_TEST == 1)
+
1164 /* start chip erasing */
+
1165 w25qxx_interface_debug_print("w25qxx: start chip erasing.\n");
+
1166
+
1167 /* chip erase */
+
1168 w25qxx_interface_debug_print("w25qxx: w25qxx_chip_erase test.\n");
+
1169 res = w25qxx_chip_erase(&gs_handle);
+
1170 if (res != 0)
+
1171 {
+
1172 w25qxx_interface_debug_print("w25qxx: chip erase failed.\n");
+
1173 (void)w25qxx_deinit(&gs_handle);
+
1174
+
1175 return 1;
+
1176 }
+
1177 w25qxx_interface_debug_print("w25qxx: chip erase successful.\n");
+
1178 #endif
+
1179
+
1180 if (type >= W25Q256)
+
1181 {
1182 /* set address mode 4 byte */
-
1183 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1184 if (res != 0)
-
1185 {
-
1186 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1187 (void)w25qxx_deinit(&gs_handle);
-
1188
-
1189 return 1;
-
1190 }
-
1191
-
1192 /* w25qxx_write/w25qxx_read test */
-
1193 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
1183 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1184
+
1185 /* set address mode 4 byte */
+
1186 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1187 if (res != 0)
+
1188 {
+
1189 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1190 (void)w25qxx_deinit(&gs_handle);
+
1191
+
1192 return 1;
+
1193 }
1194
-
1195 for (addr = 0; addr < size; addr += step)
-
1196 {
-
1197 for (j = 0; j < 600; j++)
-
1198 {
-
1199 gs_buffer_input[j] = rand() %256;
-
1200 }
-
1201 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1202 if (res != 0)
-
1203 {
-
1204 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1205 (void)w25qxx_deinit(&gs_handle);
-
1206
-
1207 return 1;
-
1208 }
-
1209 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1210 if (res != 0)
-
1211 {
-
1212 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1213 (void)w25qxx_deinit(&gs_handle);
-
1214
-
1215 return 1;
-
1216 }
-
1217 for (j = 0; j < 600; j++)
-
1218 {
-
1219 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1220 {
-
1221 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1222 (void)w25qxx_deinit(&gs_handle);
-
1223
-
1224 return 1;
-
1225 }
-
1226 }
-
1227 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1228 }
-
1229
-
1230 /* w25qxx_sector_erase_4k test */
-
1231 addr = (rand() % 10) * 4 * 1024;
-
1232 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
-
1233 res = w25qxx_sector_erase_4k(&gs_handle, addr);
-
1234 if (res != 0)
-
1235 {
-
1236 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1237 (void)w25qxx_deinit(&gs_handle);
-
1238
-
1239 return 1;
-
1240 }
-
1241 for (j = 0; j < 256; j++)
-
1242 {
-
1243 gs_buffer_input[j] = rand() %256;
-
1244 }
-
1245
-
1246 /* w25qxx_page_program */
-
1247 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1248 if (res != 0)
-
1249 {
-
1250 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1251 (void)w25qxx_deinit(&gs_handle);
-
1252
-
1253 return 1;
-
1254 }
-
1255
-
1256 /* w25qxx_fast_read */
-
1257 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1258 if (res != 0)
-
1259 {
-
1260 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1261 (void)w25qxx_deinit(&gs_handle);
-
1262
-
1263 return 1;
-
1264 }
-
1265 for (j = 0; j < 256; j++)
-
1266 {
-
1267 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1268 {
-
1269 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1270 (void)w25qxx_deinit(&gs_handle);
-
1271
-
1272 return 1;
-
1273 }
-
1274 }
-
1275 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1276
-
1277 /* w25qxx_block_erase_32k test */
-
1278 addr = (rand() % 10) * 32 * 1024;
-
1279 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
-
1280 res = w25qxx_block_erase_32k(&gs_handle, addr);
-
1281 if (res != 0)
-
1282 {
-
1283 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
-
1284 (void)w25qxx_deinit(&gs_handle);
-
1285
-
1286 return 1;
-
1287 }
-
1288 for (j = 0; j < 256; j++)
-
1289 {
-
1290 gs_buffer_input[j] = rand() %256;
-
1291 }
-
1292
-
1293 /* w25qxx_page_program */
-
1294 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1295 if (res != 0)
-
1296 {
-
1297 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1298 (void)w25qxx_deinit(&gs_handle);
-
1299
-
1300 return 1;
-
1301 }
-
1302
-
1303 /* w25qxx_fast_read */
-
1304 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1305 if (res != 0)
-
1306 {
-
1307 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1308 (void)w25qxx_deinit(&gs_handle);
-
1309
-
1310 return 1;
-
1311 }
-
1312 for (j = 0; j < 256; j++)
-
1313 {
-
1314 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1315 {
-
1316 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1317 (void)w25qxx_deinit(&gs_handle);
-
1318
-
1319 return 1;
-
1320 }
-
1321 }
-
1322 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1323
-
1324 /* w25qxx_block_erase_64k test */
-
1325 addr = (rand() % 10) * 64 * 1024;
-
1326 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
-
1327 res = w25qxx_block_erase_64k(&gs_handle, addr);
-
1328 if (res != 0)
-
1329 {
-
1330 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
-
1331 (void)w25qxx_deinit(&gs_handle);
-
1332
-
1333 return 1;
-
1334 }
-
1335 for (j = 0; j < 256; j++)
-
1336 {
-
1337 gs_buffer_input[j] = rand() %256;
-
1338 }
-
1339
-
1340 /* w25qxx_page_program */
-
1341 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
-
1342 if (res != 0)
-
1343 {
-
1344 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1345 (void)w25qxx_deinit(&gs_handle);
-
1346
-
1347 return 1;
-
1348 }
-
1349
-
1350 /* w25qxx_fast_read */
-
1351 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
-
1352 if (res != 0)
-
1353 {
-
1354 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1355 (void)w25qxx_deinit(&gs_handle);
-
1356
-
1357 return 1;
-
1358 }
-
1359 for (j = 0; j < 256; j++)
-
1360 {
-
1361 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1362 {
-
1363 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1364 (void)w25qxx_deinit(&gs_handle);
-
1365
-
1366 return 1;
-
1367 }
-
1368 }
-
1369 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
-
1370
-
1371 /* set address mode 3 byte */
-
1372 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1195 /* w25qxx_write/w25qxx_read test */
+
1196 w25qxx_interface_debug_print("w25qxx: w25qxx_write/w25qxx_read test.\n");
+
1197
+
1198 for (addr = 0; addr < size; addr += step)
+
1199 {
+
1200 for (j = 0; j < 600; j++)
+
1201 {
+
1202 gs_buffer_input[j] = rand() %256;
+
1203 }
+
1204 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1205 if (res != 0)
+
1206 {
+
1207 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1208 (void)w25qxx_deinit(&gs_handle);
+
1209
+
1210 return 1;
+
1211 }
+
1212 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1213 if (res != 0)
+
1214 {
+
1215 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1216 (void)w25qxx_deinit(&gs_handle);
+
1217
+
1218 return 1;
+
1219 }
+
1220 for (j = 0; j < 600; j++)
+
1221 {
+
1222 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1223 {
+
1224 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1225 (void)w25qxx_deinit(&gs_handle);
+
1226
+
1227 return 1;
+
1228 }
+
1229 }
+
1230 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1231 }
+
1232
+
1233 /* w25qxx_sector_erase_4k test */
+
1234 addr = (rand() % 10) * 4 * 1024;
+
1235 w25qxx_interface_debug_print("w25qxx: w25qxx_sector_erase_4k test with address 0x%X.\n", addr);
+
1236 res = w25qxx_sector_erase_4k(&gs_handle, addr);
+
1237 if (res != 0)
+
1238 {
+
1239 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1240 (void)w25qxx_deinit(&gs_handle);
+
1241
+
1242 return 1;
+
1243 }
+
1244 for (j = 0; j < 256; j++)
+
1245 {
+
1246 gs_buffer_input[j] = rand() %256;
+
1247 }
+
1248
+
1249 /* w25qxx_page_program */
+
1250 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1251 if (res != 0)
+
1252 {
+
1253 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1254 (void)w25qxx_deinit(&gs_handle);
+
1255
+
1256 return 1;
+
1257 }
+
1258
+
1259 /* w25qxx_fast_read */
+
1260 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1261 if (res != 0)
+
1262 {
+
1263 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1264 (void)w25qxx_deinit(&gs_handle);
+
1265
+
1266 return 1;
+
1267 }
+
1268 for (j = 0; j < 256; j++)
+
1269 {
+
1270 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1271 {
+
1272 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1273 (void)w25qxx_deinit(&gs_handle);
+
1274
+
1275 return 1;
+
1276 }
+
1277 }
+
1278 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1279
+
1280 /* w25qxx_block_erase_32k test */
+
1281 addr = (rand() % 10) * 32 * 1024;
+
1282 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_32k test with address 0x%X.\n", addr);
+
1283 res = w25qxx_block_erase_32k(&gs_handle, addr);
+
1284 if (res != 0)
+
1285 {
+
1286 w25qxx_interface_debug_print("w25qxx: sector erase 32k failed.\n");
+
1287 (void)w25qxx_deinit(&gs_handle);
+
1288
+
1289 return 1;
+
1290 }
+
1291 for (j = 0; j < 256; j++)
+
1292 {
+
1293 gs_buffer_input[j] = rand() %256;
+
1294 }
+
1295
+
1296 /* w25qxx_page_program */
+
1297 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1298 if (res != 0)
+
1299 {
+
1300 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1301 (void)w25qxx_deinit(&gs_handle);
+
1302
+
1303 return 1;
+
1304 }
+
1305
+
1306 /* w25qxx_fast_read */
+
1307 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1308 if (res != 0)
+
1309 {
+
1310 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1311 (void)w25qxx_deinit(&gs_handle);
+
1312
+
1313 return 1;
+
1314 }
+
1315 for (j = 0; j < 256; j++)
+
1316 {
+
1317 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1318 {
+
1319 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1320 (void)w25qxx_deinit(&gs_handle);
+
1321
+
1322 return 1;
+
1323 }
+
1324 }
+
1325 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
+
1326
+
1327 /* w25qxx_block_erase_64k test */
+
1328 addr = (rand() % 10) * 64 * 1024;
+
1329 w25qxx_interface_debug_print("w25qxx: w25qxx_block_erase_64k test with address 0x%X.\n", addr);
+
1330 res = w25qxx_block_erase_64k(&gs_handle, addr);
+
1331 if (res != 0)
+
1332 {
+
1333 w25qxx_interface_debug_print("w25qxx: sector erase 64k failed.\n");
+
1334 (void)w25qxx_deinit(&gs_handle);
+
1335
+
1336 return 1;
+
1337 }
+
1338 for (j = 0; j < 256; j++)
+
1339 {
+
1340 gs_buffer_input[j] = rand() %256;
+
1341 }
+
1342
+
1343 /* w25qxx_page_program */
+
1344 res = w25qxx_page_program(&gs_handle, addr, gs_buffer_input, 256);
+
1345 if (res != 0)
+
1346 {
+
1347 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1348 (void)w25qxx_deinit(&gs_handle);
+
1349
+
1350 return 1;
+
1351 }
+
1352
+
1353 /* w25qxx_fast_read */
+
1354 res = w25qxx_fast_read(&gs_handle, addr, gs_buffer_output, 256);
+
1355 if (res != 0)
+
1356 {
+
1357 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1358 (void)w25qxx_deinit(&gs_handle);
+
1359
+
1360 return 1;
+
1361 }
+
1362 for (j = 0; j < 256; j++)
+
1363 {
+
1364 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1365 {
+
1366 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1367 (void)w25qxx_deinit(&gs_handle);
+
1368
+
1369 return 1;
+
1370 }
+
1371 }
+
1372 w25qxx_interface_debug_print("w25qxx: fast read test passed.\n");
1373
1374 /* set address mode 3 byte */
-
1375 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1376 if (res != 0)
-
1377 {
-
1378 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1379 (void)w25qxx_deinit(&gs_handle);
-
1380
-
1381 return 1;
-
1382 }
-
1383 }
-
1384
-
1385 if (dual_quad_spi_enable != 0)
-
1386 {
-
1387 /* enter to spi mode */
-
1388 w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
-
1389
-
1390 /* exit qspi */
-
1391 res = w25qxx_exit_qspi_mode(&gs_handle);
-
1392 if (res != 0)
-
1393 {
-
1394 w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
-
1395 (void)w25qxx_deinit(&gs_handle);
-
1396
-
1397 return 1;
-
1398 }
-
1399
-
1400 /* set chip interface spi */
-
1401 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
-
1402 if (res != 0)
-
1403 {
-
1404 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1405
-
1406 return 1;
-
1407 }
-
1408
-
1409 /* random data */
-
1410 for (j = 0; j < 256; j++)
-
1411 {
-
1412 gs_buffer_input[j] = rand() %256;
-
1413 }
-
1414
-
1415 /* w25qxx_sector_erase_4k */
-
1416 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1417 if (res != 0)
-
1418 {
-
1419 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1420 (void)w25qxx_deinit(&gs_handle);
-
1421
-
1422 return 1;
-
1423 }
-
1424
-
1425 /* w25qxx_page_program */
-
1426 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1427 if (res != 0)
-
1428 {
-
1429 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1430 (void)w25qxx_deinit(&gs_handle);
-
1431
-
1432 return 1;
-
1433 }
-
1434
-
1435 /* fast read dual output */
-
1436 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1437 if (res != 0)
-
1438 {
-
1439 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
-
1440 (void)w25qxx_deinit(&gs_handle);
-
1441
-
1442 return 1;
-
1443 }
-
1444 for (j = 0; j < 256; j++)
-
1445 {
-
1446 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1447 {
-
1448 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1449 (void)w25qxx_deinit(&gs_handle);
-
1450
-
1451 return 1;
-
1452 }
-
1453 }
-
1454 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
-
1455
-
1456 /* fast read quad output */
-
1457 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1458 if (res != 0)
-
1459 {
-
1460 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
-
1461 (void)w25qxx_deinit(&gs_handle);
-
1462
-
1463 return 1;
-
1464 }
-
1465 for (j = 0; j < 256; j++)
-
1466 {
-
1467 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1468 {
-
1469 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1470 (void)w25qxx_deinit(&gs_handle);
-
1471
-
1472 return 1;
-
1473 }
-
1474 }
-
1475 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
-
1476
-
1477 /* fast read dual io */
-
1478 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1479 if (res != 0)
-
1480 {
-
1481 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
-
1482 (void)w25qxx_deinit(&gs_handle);
-
1483
-
1484 return 1;
-
1485 }
-
1486 for (j = 0; j < 256; j++)
-
1487 {
-
1488 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1489 {
-
1490 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1491 (void)w25qxx_deinit(&gs_handle);
-
1492
-
1493 return 1;
-
1494 }
-
1495 }
-
1496 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
-
1497
-
1498 /* fast read quad io */
-
1499 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1500 if (res != 0)
-
1501 {
-
1502 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
-
1503 (void)w25qxx_deinit(&gs_handle);
-
1504
-
1505 return 1;
-
1506 }
-
1507 for (j = 0; j < 256; j++)
-
1508 {
-
1509 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1510 {
-
1511 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1512 (void)w25qxx_deinit(&gs_handle);
-
1513
-
1514 return 1;
-
1515 }
-
1516 }
-
1517 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
-
1518
-
1519 /* word read quad io */
-
1520 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1521 if (res != 0)
-
1522 {
-
1523 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
-
1524 (void)w25qxx_deinit(&gs_handle);
-
1525
-
1526 return 1;
-
1527 }
-
1528 for (j = 0; j < 256; j++)
-
1529 {
-
1530 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1531 {
-
1532 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1533 (void)w25qxx_deinit(&gs_handle);
-
1534
-
1535 return 1;
-
1536 }
-
1537 }
-
1538 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
-
1539
-
1540 /* octal read quad io */
-
1541 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1542 if (res != 0)
-
1543 {
-
1544 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
-
1545 (void)w25qxx_deinit(&gs_handle);
-
1546
-
1547 return 1;
-
1548 }
-
1549 for (j = 0; j < 256; j++)
-
1550 {
-
1551 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1552 {
-
1553 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1554 (void)w25qxx_deinit(&gs_handle);
-
1555
-
1556 return 1;
-
1557 }
-
1558 }
-
1559 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
-
1560
-
1561 /* random data */
-
1562 for (j = 0; j < 256; j++)
-
1563 {
-
1564 gs_buffer_input[j] = rand() %256;
-
1565 }
-
1566
-
1567 /* w25qxx_sector_erase_4k */
-
1568 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1569 if (res != 0)
-
1570 {
-
1571 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1572 (void)w25qxx_deinit(&gs_handle);
-
1573
-
1574 return 1;
-
1575 }
-
1576
-
1577 /* w25qxx_page_program_quad_input */
-
1578 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1579 if (res != 0)
-
1580 {
-
1581 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
-
1582 (void)w25qxx_deinit(&gs_handle);
-
1583
-
1584 return 1;
-
1585 }
-
1586
-
1587 /* fast read */
-
1588 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1589 if (res != 0)
-
1590 {
-
1591 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1592 (void)w25qxx_deinit(&gs_handle);
-
1593
-
1594 return 1;
-
1595 }
-
1596 for (j = 0; j < 256; j++)
-
1597 {
-
1598 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1599 {
-
1600 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1601 (void)w25qxx_deinit(&gs_handle);
-
1602
-
1603 return 1;
-
1604 }
-
1605 }
-
1606 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
-
1607
-
1608 if (type >= W25Q256)
-
1609 {
-
1610 /* set address mode 4 byte */
-
1611 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
-
1612
+
1375 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1376
+
1377 /* set address mode 3 byte */
+
1378 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1379 if (res != 0)
+
1380 {
+
1381 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1382 (void)w25qxx_deinit(&gs_handle);
+
1383
+
1384 return 1;
+
1385 }
+
1386 }
+
1387
+
1388 if (dual_quad_spi_enable != 0)
+
1389 {
+
1390 /* enter to spi mode */
+
1391 w25qxx_interface_debug_print("w25qxx: enter to spi mode.\n");
+
1392
+
1393 /* exit qspi */
+
1394 res = w25qxx_exit_qspi_mode(&gs_handle);
+
1395 if (res != 0)
+
1396 {
+
1397 w25qxx_interface_debug_print("w25qxx: exit qspi mode failed.\n");
+
1398 (void)w25qxx_deinit(&gs_handle);
+
1399
+
1400 return 1;
+
1401 }
+
1402
+
1403 /* set chip interface spi */
+
1404 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_SPI);
+
1405 if (res != 0)
+
1406 {
+
1407 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1408
+
1409 return 1;
+
1410 }
+
1411
+
1412 /* random data */
+
1413 for (j = 0; j < 256; j++)
+
1414 {
+
1415 gs_buffer_input[j] = rand() %256;
+
1416 }
+
1417
+
1418 /* w25qxx_sector_erase_4k */
+
1419 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1420 if (res != 0)
+
1421 {
+
1422 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1423 (void)w25qxx_deinit(&gs_handle);
+
1424
+
1425 return 1;
+
1426 }
+
1427
+
1428 /* w25qxx_page_program */
+
1429 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1430 if (res != 0)
+
1431 {
+
1432 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1433 (void)w25qxx_deinit(&gs_handle);
+
1434
+
1435 return 1;
+
1436 }
+
1437
+
1438 /* fast read dual output */
+
1439 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1440 if (res != 0)
+
1441 {
+
1442 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
+
1443 (void)w25qxx_deinit(&gs_handle);
+
1444
+
1445 return 1;
+
1446 }
+
1447 for (j = 0; j < 256; j++)
+
1448 {
+
1449 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1450 {
+
1451 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1452 (void)w25qxx_deinit(&gs_handle);
+
1453
+
1454 return 1;
+
1455 }
+
1456 }
+
1457 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
+
1458
+
1459 /* fast read quad output */
+
1460 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1461 if (res != 0)
+
1462 {
+
1463 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
+
1464 (void)w25qxx_deinit(&gs_handle);
+
1465
+
1466 return 1;
+
1467 }
+
1468 for (j = 0; j < 256; j++)
+
1469 {
+
1470 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1471 {
+
1472 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1473 (void)w25qxx_deinit(&gs_handle);
+
1474
+
1475 return 1;
+
1476 }
+
1477 }
+
1478 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
+
1479
+
1480 /* fast read dual io */
+
1481 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1482 if (res != 0)
+
1483 {
+
1484 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
+
1485 (void)w25qxx_deinit(&gs_handle);
+
1486
+
1487 return 1;
+
1488 }
+
1489 for (j = 0; j < 256; j++)
+
1490 {
+
1491 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1492 {
+
1493 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1494 (void)w25qxx_deinit(&gs_handle);
+
1495
+
1496 return 1;
+
1497 }
+
1498 }
+
1499 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
+
1500
+
1501 /* fast read quad io */
+
1502 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1503 if (res != 0)
+
1504 {
+
1505 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
+
1506 (void)w25qxx_deinit(&gs_handle);
+
1507
+
1508 return 1;
+
1509 }
+
1510 for (j = 0; j < 256; j++)
+
1511 {
+
1512 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1513 {
+
1514 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1515 (void)w25qxx_deinit(&gs_handle);
+
1516
+
1517 return 1;
+
1518 }
+
1519 }
+
1520 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
+
1521
+
1522 /* word read quad io */
+
1523 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1524 if (res != 0)
+
1525 {
+
1526 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
+
1527 (void)w25qxx_deinit(&gs_handle);
+
1528
+
1529 return 1;
+
1530 }
+
1531 for (j = 0; j < 256; j++)
+
1532 {
+
1533 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1534 {
+
1535 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1536 (void)w25qxx_deinit(&gs_handle);
+
1537
+
1538 return 1;
+
1539 }
+
1540 }
+
1541 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
+
1542
+
1543 /* octal read quad io */
+
1544 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1545 if (res != 0)
+
1546 {
+
1547 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
+
1548 (void)w25qxx_deinit(&gs_handle);
+
1549
+
1550 return 1;
+
1551 }
+
1552 for (j = 0; j < 256; j++)
+
1553 {
+
1554 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1555 {
+
1556 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1557 (void)w25qxx_deinit(&gs_handle);
+
1558
+
1559 return 1;
+
1560 }
+
1561 }
+
1562 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
+
1563
+
1564 /* random data */
+
1565 for (j = 0; j < 256; j++)
+
1566 {
+
1567 gs_buffer_input[j] = rand() %256;
+
1568 }
+
1569
+
1570 /* w25qxx_sector_erase_4k */
+
1571 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1572 if (res != 0)
+
1573 {
+
1574 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1575 (void)w25qxx_deinit(&gs_handle);
+
1576
+
1577 return 1;
+
1578 }
+
1579
+
1580 /* w25qxx_page_program_quad_input */
+
1581 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1582 if (res != 0)
+
1583 {
+
1584 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
+
1585 (void)w25qxx_deinit(&gs_handle);
+
1586
+
1587 return 1;
+
1588 }
+
1589
+
1590 /* fast read */
+
1591 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1592 if (res != 0)
+
1593 {
+
1594 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1595 (void)w25qxx_deinit(&gs_handle);
+
1596
+
1597 return 1;
+
1598 }
+
1599 for (j = 0; j < 256; j++)
+
1600 {
+
1601 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1602 {
+
1603 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1604 (void)w25qxx_deinit(&gs_handle);
+
1605
+
1606 return 1;
+
1607 }
+
1608 }
+
1609 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
+
1610
+
1611 if (type >= W25Q256)
+
1612 {
1613 /* set address mode 4 byte */
-
1614 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
-
1615 if (res != 0)
-
1616 {
-
1617 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1618 (void)w25qxx_deinit(&gs_handle);
-
1619
-
1620 return 1;
-
1621 }
-
1622
-
1623 /* random data */
-
1624 for (j = 0; j < 256; j++)
-
1625 {
-
1626 gs_buffer_input[j] = rand() %256;
-
1627 }
-
1628
-
1629 /* w25qxx_sector_erase_4k */
-
1630 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1631 if (res != 0)
-
1632 {
-
1633 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1634 (void)w25qxx_deinit(&gs_handle);
-
1635
-
1636 return 1;
-
1637 }
-
1638
-
1639 /* w25qxx_page_program */
-
1640 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1641 if (res != 0)
-
1642 {
-
1643 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
-
1644 (void)w25qxx_deinit(&gs_handle);
-
1645
-
1646 return 1;
-
1647 }
-
1648
-
1649 /* fast read dual output */
-
1650 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1651 if (res != 0)
-
1652 {
-
1653 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
-
1654 (void)w25qxx_deinit(&gs_handle);
-
1655
-
1656 return 1;
-
1657 }
-
1658 for (j = 0; j < 256; j++)
-
1659 {
-
1660 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1661 {
-
1662 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1663 (void)w25qxx_deinit(&gs_handle);
-
1664
-
1665 return 1;
-
1666 }
-
1667 }
-
1668 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
-
1669
-
1670 /* fast read quad output */
-
1671 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1672 if (res != 0)
-
1673 {
-
1674 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
-
1675 (void)w25qxx_deinit(&gs_handle);
-
1676
-
1677 return 1;
-
1678 }
-
1679 for (j = 0; j < 256; j++)
-
1680 {
-
1681 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1682 {
-
1683 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1684 (void)w25qxx_deinit(&gs_handle);
-
1685
-
1686 return 1;
-
1687 }
-
1688 }
-
1689 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
-
1690
-
1691 /* fast read dual io */
-
1692 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1693 if (res != 0)
-
1694 {
-
1695 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
-
1696 (void)w25qxx_deinit(&gs_handle);
-
1697
-
1698 return 1;
-
1699 }
-
1700 for (j = 0; j < 256; j++)
-
1701 {
-
1702 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1703 {
-
1704 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1705 (void)w25qxx_deinit(&gs_handle);
-
1706
-
1707 return 1;
-
1708 }
-
1709 }
-
1710 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
-
1711
-
1712 /* fast read quad io */
-
1713 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1714 if (res != 0)
-
1715 {
-
1716 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
-
1717 (void)w25qxx_deinit(&gs_handle);
-
1718
-
1719 return 1;
-
1720 }
-
1721 for (j = 0; j < 256; j++)
-
1722 {
-
1723 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1724 {
-
1725 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1726 (void)w25qxx_deinit(&gs_handle);
-
1727
-
1728 return 1;
-
1729 }
-
1730 }
-
1731 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
-
1732
-
1733 /* word read quad io */
-
1734 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1735 if (res != 0)
-
1736 {
-
1737 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
-
1738 (void)w25qxx_deinit(&gs_handle);
-
1739
-
1740 return 1;
-
1741 }
-
1742 for (j = 0; j < 256; j++)
-
1743 {
-
1744 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1745 {
-
1746 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1747 (void)w25qxx_deinit(&gs_handle);
-
1748
-
1749 return 1;
-
1750 }
-
1751 }
-
1752 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
-
1753
-
1754 /* octal read quad io */
-
1755 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1756 if (res != 0)
-
1757 {
-
1758 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
-
1759 (void)w25qxx_deinit(&gs_handle);
-
1760
-
1761 return 1;
-
1762 }
-
1763 for (j = 0; j < 256; j++)
-
1764 {
-
1765 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1766 {
-
1767 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1768 (void)w25qxx_deinit(&gs_handle);
-
1769
-
1770 return 1;
-
1771 }
-
1772 }
-
1773 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
-
1774
-
1775 /* random data */
-
1776 for (j = 0; j < 256; j++)
-
1777 {
-
1778 gs_buffer_input[j] = rand() %256;
-
1779 }
-
1780
-
1781 /* w25qxx_sector_erase_4k */
-
1782 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
-
1783 if (res != 0)
-
1784 {
-
1785 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
-
1786 (void)w25qxx_deinit(&gs_handle);
-
1787
-
1788 return 1;
-
1789 }
-
1790
-
1791 /* w25qxx_page_program_quad_input */
-
1792 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
-
1793 if (res != 0)
-
1794 {
-
1795 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
-
1796 (void)w25qxx_deinit(&gs_handle);
-
1797
-
1798 return 1;
-
1799 }
-
1800
-
1801 /* fast read */
-
1802 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
-
1803 if (res != 0)
-
1804 {
-
1805 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
-
1806 (void)w25qxx_deinit(&gs_handle);
-
1807
-
1808 return 1;
-
1809 }
-
1810 for (j = 0; j < 256; j++)
-
1811 {
-
1812 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1813 {
-
1814 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1815 (void)w25qxx_deinit(&gs_handle);
-
1816
-
1817 return 1;
-
1818 }
-
1819 }
-
1820 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
-
1821
-
1822 /* set address mode 3 byte */
-
1823 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1614 w25qxx_interface_debug_print("w25qxx: set address mode 4 byte.\n");
+
1615
+
1616 /* set address mode 4 byte */
+
1617 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_4_BYTE);
+
1618 if (res != 0)
+
1619 {
+
1620 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1621 (void)w25qxx_deinit(&gs_handle);
+
1622
+
1623 return 1;
+
1624 }
+
1625
+
1626 /* random data */
+
1627 for (j = 0; j < 256; j++)
+
1628 {
+
1629 gs_buffer_input[j] = rand() %256;
+
1630 }
+
1631
+
1632 /* w25qxx_sector_erase_4k */
+
1633 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1634 if (res != 0)
+
1635 {
+
1636 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1637 (void)w25qxx_deinit(&gs_handle);
+
1638
+
1639 return 1;
+
1640 }
+
1641
+
1642 /* w25qxx_page_program */
+
1643 res = w25qxx_page_program(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1644 if (res != 0)
+
1645 {
+
1646 w25qxx_interface_debug_print("w25qxx: page program failed.\n");
+
1647 (void)w25qxx_deinit(&gs_handle);
+
1648
+
1649 return 1;
+
1650 }
+
1651
+
1652 /* fast read dual output */
+
1653 res = w25qxx_fast_read_dual_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1654 if (res != 0)
+
1655 {
+
1656 w25qxx_interface_debug_print("w25qxx: fast read dual output failed.\n");
+
1657 (void)w25qxx_deinit(&gs_handle);
+
1658
+
1659 return 1;
+
1660 }
+
1661 for (j = 0; j < 256; j++)
+
1662 {
+
1663 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1664 {
+
1665 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1666 (void)w25qxx_deinit(&gs_handle);
+
1667
+
1668 return 1;
+
1669 }
+
1670 }
+
1671 w25qxx_interface_debug_print("w25qxx: fast_read_dual_output check passed.\n");
+
1672
+
1673 /* fast read quad output */
+
1674 res = w25qxx_fast_read_quad_output(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1675 if (res != 0)
+
1676 {
+
1677 w25qxx_interface_debug_print("w25qxx: fast read quad output failed.\n");
+
1678 (void)w25qxx_deinit(&gs_handle);
+
1679
+
1680 return 1;
+
1681 }
+
1682 for (j = 0; j < 256; j++)
+
1683 {
+
1684 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1685 {
+
1686 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1687 (void)w25qxx_deinit(&gs_handle);
+
1688
+
1689 return 1;
+
1690 }
+
1691 }
+
1692 w25qxx_interface_debug_print("w25qxx: fast_read_quad_output check passed.\n");
+
1693
+
1694 /* fast read dual io */
+
1695 res = w25qxx_fast_read_dual_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1696 if (res != 0)
+
1697 {
+
1698 w25qxx_interface_debug_print("w25qxx: fast read dual io failed.\n");
+
1699 (void)w25qxx_deinit(&gs_handle);
+
1700
+
1701 return 1;
+
1702 }
+
1703 for (j = 0; j < 256; j++)
+
1704 {
+
1705 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1706 {
+
1707 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1708 (void)w25qxx_deinit(&gs_handle);
+
1709
+
1710 return 1;
+
1711 }
+
1712 }
+
1713 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_dual_io check passed.\n");
+
1714
+
1715 /* fast read quad io */
+
1716 res = w25qxx_fast_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1717 if (res != 0)
+
1718 {
+
1719 w25qxx_interface_debug_print("w25qxx: fast read quad io failed.\n");
+
1720 (void)w25qxx_deinit(&gs_handle);
+
1721
+
1722 return 1;
+
1723 }
+
1724 for (j = 0; j < 256; j++)
+
1725 {
+
1726 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1727 {
+
1728 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1729 (void)w25qxx_deinit(&gs_handle);
+
1730
+
1731 return 1;
+
1732 }
+
1733 }
+
1734 w25qxx_interface_debug_print("w25qxx: w25qxx_fast_read_quad_io check passed.\n");
+
1735
+
1736 /* word read quad io */
+
1737 res = w25qxx_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1738 if (res != 0)
+
1739 {
+
1740 w25qxx_interface_debug_print("w25qxx: word read quad io failed.\n");
+
1741 (void)w25qxx_deinit(&gs_handle);
+
1742
+
1743 return 1;
+
1744 }
+
1745 for (j = 0; j < 256; j++)
+
1746 {
+
1747 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1748 {
+
1749 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1750 (void)w25qxx_deinit(&gs_handle);
+
1751
+
1752 return 1;
+
1753 }
+
1754 }
+
1755 w25qxx_interface_debug_print("w25qxx: w25qxx_word_read_quad_io check passed.\n");
+
1756
+
1757 /* octal read quad io */
+
1758 res = w25qxx_octal_word_read_quad_io(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1759 if (res != 0)
+
1760 {
+
1761 w25qxx_interface_debug_print("w25qxx: octal read quad io failed.\n");
+
1762 (void)w25qxx_deinit(&gs_handle);
+
1763
+
1764 return 1;
+
1765 }
+
1766 for (j = 0; j < 256; j++)
+
1767 {
+
1768 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1769 {
+
1770 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1771 (void)w25qxx_deinit(&gs_handle);
+
1772
+
1773 return 1;
+
1774 }
+
1775 }
+
1776 w25qxx_interface_debug_print("w25qxx: w25qxx_octal_word_read_quad_io check passed.\n");
+
1777
+
1778 /* random data */
+
1779 for (j = 0; j < 256; j++)
+
1780 {
+
1781 gs_buffer_input[j] = rand() %256;
+
1782 }
+
1783
+
1784 /* w25qxx_sector_erase_4k */
+
1785 res = w25qxx_sector_erase_4k(&gs_handle, 0x00000000);
+
1786 if (res != 0)
+
1787 {
+
1788 w25qxx_interface_debug_print("w25qxx: sector erase 4k failed.\n");
+
1789 (void)w25qxx_deinit(&gs_handle);
+
1790
+
1791 return 1;
+
1792 }
+
1793
+
1794 /* w25qxx_page_program_quad_input */
+
1795 res = w25qxx_page_program_quad_input(&gs_handle, 0x00000000, gs_buffer_input, 256);
+
1796 if (res != 0)
+
1797 {
+
1798 w25qxx_interface_debug_print("w25qxx: page program quad input failed.\n");
+
1799 (void)w25qxx_deinit(&gs_handle);
+
1800
+
1801 return 1;
+
1802 }
+
1803
+
1804 /* fast read */
+
1805 res = w25qxx_fast_read(&gs_handle, 0x00000000, gs_buffer_output, 256);
+
1806 if (res != 0)
+
1807 {
+
1808 w25qxx_interface_debug_print("w25qxx: fast read failed.\n");
+
1809 (void)w25qxx_deinit(&gs_handle);
+
1810
+
1811 return 1;
+
1812 }
+
1813 for (j = 0; j < 256; j++)
+
1814 {
+
1815 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1816 {
+
1817 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1818 (void)w25qxx_deinit(&gs_handle);
+
1819
+
1820 return 1;
+
1821 }
+
1822 }
+
1823 w25qxx_interface_debug_print("w25qxx: w25qxx_page_program_quad_input check passed.\n");
1824
1825 /* set address mode 3 byte */
-
1826 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
-
1827 if (res != 0)
-
1828 {
-
1829 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
-
1830 (void)w25qxx_deinit(&gs_handle);
-
1831
-
1832 return 1;
-
1833 }
-
1834 }
-
1835
-
1836 /* enter to qspi mode */
-
1837 w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
+
1826 w25qxx_interface_debug_print("w25qxx: set address mode 3 byte.\n");
+
1827
+
1828 /* set address mode 3 byte */
+
1829 res = w25qxx_set_address_mode(&gs_handle, W25QXX_ADDRESS_MODE_3_BYTE);
+
1830 if (res != 0)
+
1831 {
+
1832 w25qxx_interface_debug_print("w25qxx: set address mode failed.\n");
+
1833 (void)w25qxx_deinit(&gs_handle);
+
1834
+
1835 return 1;
+
1836 }
+
1837 }
1838
-
1839 /* enter qspi */
-
1840 res = w25qxx_enter_qspi_mode(&gs_handle);
-
1841 if (res != 0)
-
1842 {
-
1843 w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
-
1844 (void)w25qxx_deinit(&gs_handle);
-
1845
-
1846 return 1;
-
1847 }
-
1848
-
1849 /* set chip interface spi */
-
1850 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
-
1851 if (res != 0)
-
1852 {
-
1853 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
-
1854
-
1855 return 1;
-
1856 }
-
1857 }
-
1858
-
1859 /* w25qxx_set_read_parameters test */
-
1860 w25qxx_interface_debug_print("w25qxx: w25qxx_set_read_parameters test.\n");
+
1839 /* enter to qspi mode */
+
1840 w25qxx_interface_debug_print("w25qxx: enter to qspi mode.\n");
+
1841
+
1842 /* enter qspi */
+
1843 res = w25qxx_enter_qspi_mode(&gs_handle);
+
1844 if (res != 0)
+
1845 {
+
1846 w25qxx_interface_debug_print("w25qxx: enter qspi mode failed.\n");
+
1847 (void)w25qxx_deinit(&gs_handle);
+
1848
+
1849 return 1;
+
1850 }
+
1851
+
1852 /* set chip interface spi */
+
1853 res = w25qxx_set_interface(&gs_handle, W25QXX_INTERFACE_QSPI);
+
1854 if (res != 0)
+
1855 {
+
1856 w25qxx_interface_debug_print("w25qxx: set interface failed.\n");
+
1857
+
1858 return 1;
+
1859 }
+
1860 }
1861
-
1862 /* 8 dummy max 80MHz test */
-
1863 w25qxx_interface_debug_print("w25qxx: set 8 dummy max 80MHz test.\n");
+
1862 /* w25qxx_set_read_parameters test */
+
1863 w25qxx_interface_debug_print("w25qxx: w25qxx_set_read_parameters test.\n");
1864
-
1865 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_8_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1866 if (res != 0)
-
1867 {
-
1868 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1869
-
1870 return 1;
-
1871 }
-
1872
-
1873 for (addr = 0; addr < size; addr += step)
-
1874 {
-
1875 for (j = 0; j < 600; j++)
-
1876 {
-
1877 gs_buffer_input[j] = rand() %256;
-
1878 }
-
1879 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1880 if (res != 0)
-
1881 {
-
1882 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1883 (void)w25qxx_deinit(&gs_handle);
-
1884
-
1885 return 1;
-
1886 }
-
1887 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1888 if (res != 0)
-
1889 {
-
1890 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1891 (void)w25qxx_deinit(&gs_handle);
-
1892
-
1893 return 1;
-
1894 }
-
1895 for (j = 0; j < 600; j++)
-
1896 {
-
1897 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1898 {
-
1899 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1900 (void)w25qxx_deinit(&gs_handle);
-
1901
-
1902 return 1;
-
1903 }
-
1904 }
-
1905 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1906 }
-
1907
-
1908 /* 6 dummy max 80MHz test */
-
1909 w25qxx_interface_debug_print("w25qxx: set 6 dummy max 80MHz test.\n");
+
1865 /* 8 dummy max 80MHz test */
+
1866 w25qxx_interface_debug_print("w25qxx: set 8 dummy max 80MHz test.\n");
+
1867
+
1868 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_8_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1869 if (res != 0)
+
1870 {
+
1871 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1872
+
1873 return 1;
+
1874 }
+
1875
+
1876 for (addr = 0; addr < size; addr += step)
+
1877 {
+
1878 for (j = 0; j < 600; j++)
+
1879 {
+
1880 gs_buffer_input[j] = rand() %256;
+
1881 }
+
1882 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1883 if (res != 0)
+
1884 {
+
1885 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1886 (void)w25qxx_deinit(&gs_handle);
+
1887
+
1888 return 1;
+
1889 }
+
1890 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1891 if (res != 0)
+
1892 {
+
1893 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1894 (void)w25qxx_deinit(&gs_handle);
+
1895
+
1896 return 1;
+
1897 }
+
1898 for (j = 0; j < 600; j++)
+
1899 {
+
1900 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1901 {
+
1902 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1903 (void)w25qxx_deinit(&gs_handle);
+
1904
+
1905 return 1;
+
1906 }
+
1907 }
+
1908 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1909 }
1910
-
1911 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_6_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1912 if (res != 0)
-
1913 {
-
1914 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1915
-
1916 return 1;
-
1917 }
-
1918
-
1919 for (addr = 0; addr < size; addr += step)
-
1920 {
-
1921 for (j = 0; j < 600; j++)
-
1922 {
-
1923 gs_buffer_input[j] = rand() %256;
-
1924 }
-
1925 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1926 if (res != 0)
-
1927 {
-
1928 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1929 (void)w25qxx_deinit(&gs_handle);
-
1930
-
1931 return 1;
-
1932 }
-
1933 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1934 if (res != 0)
-
1935 {
-
1936 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1937 (void)w25qxx_deinit(&gs_handle);
-
1938
-
1939 return 1;
-
1940 }
-
1941 for (j = 0; j < 600; j++)
-
1942 {
-
1943 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1944 {
-
1945 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1946 (void)w25qxx_deinit(&gs_handle);
-
1947
-
1948 return 1;
-
1949 }
-
1950 }
-
1951 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1952 }
-
1953
-
1954 /* 4 dummy max 55MHz test */
-
1955 w25qxx_interface_debug_print("w25qxx: set 4 dummy max 55MHz test.\n");
+
1911 /* 6 dummy max 80MHz test */
+
1912 w25qxx_interface_debug_print("w25qxx: set 6 dummy max 80MHz test.\n");
+
1913
+
1914 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_6_80MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1915 if (res != 0)
+
1916 {
+
1917 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1918
+
1919 return 1;
+
1920 }
+
1921
+
1922 for (addr = 0; addr < size; addr += step)
+
1923 {
+
1924 for (j = 0; j < 600; j++)
+
1925 {
+
1926 gs_buffer_input[j] = rand() %256;
+
1927 }
+
1928 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1929 if (res != 0)
+
1930 {
+
1931 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1932 (void)w25qxx_deinit(&gs_handle);
+
1933
+
1934 return 1;
+
1935 }
+
1936 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1937 if (res != 0)
+
1938 {
+
1939 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1940 (void)w25qxx_deinit(&gs_handle);
+
1941
+
1942 return 1;
+
1943 }
+
1944 for (j = 0; j < 600; j++)
+
1945 {
+
1946 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1947 {
+
1948 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1949 (void)w25qxx_deinit(&gs_handle);
+
1950
+
1951 return 1;
+
1952 }
+
1953 }
+
1954 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
1955 }
1956
-
1957 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_4_55MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
1958 if (res != 0)
-
1959 {
-
1960 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
1961
-
1962 return 1;
-
1963 }
-
1964
-
1965 for (addr = 0; addr < size; addr += step)
-
1966 {
-
1967 for (j = 0; j < 600; j++)
-
1968 {
-
1969 gs_buffer_input[j] = rand() %256;
-
1970 }
-
1971 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
1972 if (res != 0)
-
1973 {
-
1974 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
1975 (void)w25qxx_deinit(&gs_handle);
-
1976
-
1977 return 1;
-
1978 }
-
1979 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
1980 if (res != 0)
-
1981 {
-
1982 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
1983 (void)w25qxx_deinit(&gs_handle);
-
1984
-
1985 return 1;
-
1986 }
-
1987 for (j = 0; j < 600; j++)
-
1988 {
-
1989 if (gs_buffer_input[j] != gs_buffer_output[j])
-
1990 {
-
1991 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
1992 (void)w25qxx_deinit(&gs_handle);
-
1993
-
1994 return 1;
-
1995 }
-
1996 }
-
1997 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
1998 }
-
1999
-
2000 /* 2 dummy max 33MHz test */
-
2001 w25qxx_interface_debug_print("w25qxx: set 2 dummy max 33MHz test.\n");
+
1957 /* 4 dummy max 55MHz test */
+
1958 w25qxx_interface_debug_print("w25qxx: set 4 dummy max 55MHz test.\n");
+
1959
+
1960 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_4_55MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
1961 if (res != 0)
+
1962 {
+
1963 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
1964
+
1965 return 1;
+
1966 }
+
1967
+
1968 for (addr = 0; addr < size; addr += step)
+
1969 {
+
1970 for (j = 0; j < 600; j++)
+
1971 {
+
1972 gs_buffer_input[j] = rand() %256;
+
1973 }
+
1974 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
1975 if (res != 0)
+
1976 {
+
1977 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
1978 (void)w25qxx_deinit(&gs_handle);
+
1979
+
1980 return 1;
+
1981 }
+
1982 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
1983 if (res != 0)
+
1984 {
+
1985 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
1986 (void)w25qxx_deinit(&gs_handle);
+
1987
+
1988 return 1;
+
1989 }
+
1990 for (j = 0; j < 600; j++)
+
1991 {
+
1992 if (gs_buffer_input[j] != gs_buffer_output[j])
+
1993 {
+
1994 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
1995 (void)w25qxx_deinit(&gs_handle);
+
1996
+
1997 return 1;
+
1998 }
+
1999 }
+
2000 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
2001 }
2002
-
2003 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_2_33MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
-
2004 if (res != 0)
-
2005 {
-
2006 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
-
2007
-
2008 return 1;
-
2009 }
-
2010
-
2011 for (addr = 0; addr < size; addr += step)
-
2012 {
-
2013 for (j = 0; j < 600; j++)
-
2014 {
-
2015 gs_buffer_input[j] = rand() %256;
-
2016 }
-
2017 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
-
2018 if (res != 0)
-
2019 {
-
2020 w25qxx_interface_debug_print("w25qxx: write failed.\n");
-
2021 (void)w25qxx_deinit(&gs_handle);
-
2022
-
2023 return 1;
-
2024 }
-
2025 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
-
2026 if (res != 0)
-
2027 {
-
2028 w25qxx_interface_debug_print("w25qxx: read failed.\n");
-
2029 (void)w25qxx_deinit(&gs_handle);
-
2030
-
2031 return 1;
-
2032 }
-
2033 for (j = 0; j < 600; j++)
-
2034 {
-
2035 if (gs_buffer_input[j] != gs_buffer_output[j])
-
2036 {
-
2037 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
-
2038 (void)w25qxx_deinit(&gs_handle);
-
2039
-
2040 return 1;
-
2041 }
-
2042 }
-
2043 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
-
2044 }
-
2045 }
-
2046
-
2047 /* finish read test */
-
2048 w25qxx_interface_debug_print("w25qxx: finish read test.\n");
-
2049 (void)w25qxx_deinit(&gs_handle);
-
2050
-
2051 return 0;
-
2052}
+
2003 /* 2 dummy max 33MHz test */
+
2004 w25qxx_interface_debug_print("w25qxx: set 2 dummy max 33MHz test.\n");
+
2005
+
2006 res = w25qxx_set_read_parameters(&gs_handle, W25QXX_QSPI_READ_DUMMY_2_33MHZ, W25QXX_QSPI_READ_WRAP_LENGTH_8_BYTE);
+
2007 if (res != 0)
+
2008 {
+
2009 w25qxx_interface_debug_print("w25qxx: set read parameters.\n");
+
2010
+
2011 return 1;
+
2012 }
+
2013
+
2014 for (addr = 0; addr < size; addr += step)
+
2015 {
+
2016 for (j = 0; j < 600; j++)
+
2017 {
+
2018 gs_buffer_input[j] = rand() %256;
+
2019 }
+
2020 res = w25qxx_write(&gs_handle, addr, gs_buffer_input, 600);
+
2021 if (res != 0)
+
2022 {
+
2023 w25qxx_interface_debug_print("w25qxx: write failed.\n");
+
2024 (void)w25qxx_deinit(&gs_handle);
+
2025
+
2026 return 1;
+
2027 }
+
2028 res = w25qxx_read(&gs_handle, addr, gs_buffer_output, 600);
+
2029 if (res != 0)
+
2030 {
+
2031 w25qxx_interface_debug_print("w25qxx: read failed.\n");
+
2032 (void)w25qxx_deinit(&gs_handle);
+
2033
+
2034 return 1;
+
2035 }
+
2036 for (j = 0; j < 600; j++)
+
2037 {
+
2038 if (gs_buffer_input[j] != gs_buffer_output[j])
+
2039 {
+
2040 w25qxx_interface_debug_print("w25qxx: write read check failed.\n");
+
2041 (void)w25qxx_deinit(&gs_handle);
+
2042
+
2043 return 1;
+
2044 }
+
2045 }
+
2046 w25qxx_interface_debug_print("w25qxx: 0x%08X/0x%08X successful.\n", addr, size);
+
2047 }
+
2048 }
+
2049
+
2050 /* finish read test */
+
2051 w25qxx_interface_debug_print("w25qxx: finish read test.\n");
+
2052 (void)w25qxx_deinit(&gs_handle);
+
2053
+
2054 return 0;
+
2055}
driver_w25qxx_read_test.h
driver w25qxx read test header file
w25qxx_page_program_quad_input
uint8_t w25qxx_page_program_quad_input(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint16_t len)
quad page program with quad input
Definition driver_w25qxx.c:4920
@@ -2148,7 +2151,7 @@
w25qxx_read
uint8_t w25qxx_read(w25qxx_handle_t *handle, uint32_t addr, uint8_t *data, uint32_t len)
read data
Definition driver_w25qxx.c:7289
w25qxx_block_erase_64k
uint8_t w25qxx_block_erase_64k(w25qxx_handle_t *handle, uint32_t addr)
erase the 64k block
Definition driver_w25qxx.c:5758
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:147
-
W25Q80
@ W25Q80
Definition driver_w25qxx.h:123
+
W25Q10
@ W25Q10
Definition driver_w25qxx.h:120
W25Q256
@ W25Q256
Definition driver_w25qxx.h:128
W25QXX_ADDRESS_MODE_3_BYTE
@ W25QXX_ADDRESS_MODE_3_BYTE
Definition driver_w25qxx.h:157
W25QXX_ADDRESS_MODE_4_BYTE
@ W25QXX_ADDRESS_MODE_4_BYTE
Definition driver_w25qxx.h:158
@@ -2167,7 +2170,7 @@
DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ
#define DRIVER_W25QXX_LINK_SPI_QSPI_WRITE_READ(HANDLE, FUC)
link spi_qspi_write_read function
Definition driver_w25qxx.h:351
DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT
#define DRIVER_W25QXX_LINK_SPI_QSPI_DEINIT(HANDLE, FUC)
link spi_qspi_deinit function
Definition driver_w25qxx.h:343
DRIVER_W25QXX_LINK_DELAY_US
#define DRIVER_W25QXX_LINK_DELAY_US(HANDLE, FUC)
link delay_us function
Definition driver_w25qxx.h:367
-
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:55
+
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:58
w25qxx_info_s::temperature_max
float temperature_max
Definition driver_w25qxx.h:306
w25qxx_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition driver_w25qxx.h:303
w25qxx_info_s::driver_version
uint32_t driver_version
Definition driver_w25qxx.h:307
diff --git a/doc/html/driver__w25qxx__read__test_8h_source.html b/doc/html/driver__w25qxx__read__test_8h_source.html index 2cbaad7..898c7cf 100644 --- a/doc/html/driver__w25qxx__read__test_8h_source.html +++ b/doc/html/driver__w25qxx__read__test_8h_source.html @@ -120,7 +120,7 @@
w25qxx_type_t
w25qxx_type_t
w25qxx type enumeration definition
Definition driver_w25qxx.h:119
w25qxx_interface_t
w25qxx_interface_t
w25qxx interface enumeration definition
Definition driver_w25qxx.h:138
w25qxx_bool_t
w25qxx_bool_t
w25qxx bool enumeration definition
Definition driver_w25qxx.h:147
-
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:55
+
w25qxx_read_test
uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qxx_bool_t dual_quad_spi_enable)
read test
Definition driver_w25qxx_read_test.c:58
diff --git a/doc/html/group__w25qxx__test__driver.html b/doc/html/group__w25qxx__test__driver.html index 868401a..a954b63 100644 --- a/doc/html/group__w25qxx__test__driver.html +++ b/doc/html/group__w25qxx__test__driver.html @@ -178,7 +178,7 @@

Note
none
-

Definition at line 55 of file driver_w25qxx_read_test.c.

+

Definition at line 58 of file driver_w25qxx_read_test.c.

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diff --git a/test/driver_w25qxx_read_test.c b/test/driver_w25qxx_read_test.c index ce51eb1..5d8ecf4 100644 --- a/test/driver_w25qxx_read_test.c +++ b/test/driver_w25qxx_read_test.c @@ -40,7 +40,10 @@ static w25qxx_handle_t gs_handle; /**< w25qxx handle */ static uint8_t gs_buffer_input[600]; /**< input buffer */ static uint8_t gs_buffer_output[600]; /**< output buffer */ -static const uint32_t gsc_size[] = {0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000}; /**< flash size */ +static const uint32_t gsc_size[] = {0x20000, 0x40000, 0x80000, + 0x100000, 0x200000, 0x400000, 0x800000, + 0x1000000, 0x2000000, 0x4000000, 0x8000000, + 0x10000000}; /**< flash size */ /** * @brief read test @@ -133,7 +136,7 @@ uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qx uint32_t size; uint32_t addr, step, j; - size = gsc_size[type - W25Q80]; + size = gsc_size[type - W25Q10]; step = size / 16; /* w25qxx_write/w25qxx_read test */ @@ -975,7 +978,7 @@ uint8_t w25qxx_read_test(w25qxx_type_t type, w25qxx_interface_t interface, w25qx uint32_t size; uint32_t addr, step, j; - size = gsc_size[type - W25Q80]; + size = gsc_size[type - W25Q10]; step = size / 16; /* w25qxx_write/w25qxx_read test */